1176491Smarcel/*	$NetBSD: fpu_subr.c,v 1.4 2005/12/11 12:18:42 christos Exp $ */
2176491Smarcel
3176491Smarcel/*
4176491Smarcel * Copyright (c) 1992, 1993
5176491Smarcel *	The Regents of the University of California.  All rights reserved.
6176491Smarcel *
7176491Smarcel * This software was developed by the Computer Systems Engineering group
8176491Smarcel * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
9176491Smarcel * contributed to Berkeley.
10176491Smarcel *
11176491Smarcel * All advertising materials mentioning features or use of this software
12176491Smarcel * must display the following acknowledgement:
13176491Smarcel *	This product includes software developed by the University of
14176491Smarcel *	California, Lawrence Berkeley Laboratory.
15176491Smarcel *
16176491Smarcel * Redistribution and use in source and binary forms, with or without
17176491Smarcel * modification, are permitted provided that the following conditions
18176491Smarcel * are met:
19176491Smarcel * 1. Redistributions of source code must retain the above copyright
20176491Smarcel *    notice, this list of conditions and the following disclaimer.
21176491Smarcel * 2. Redistributions in binary form must reproduce the above copyright
22176491Smarcel *    notice, this list of conditions and the following disclaimer in the
23176491Smarcel *    documentation and/or other materials provided with the distribution.
24176491Smarcel * 3. Neither the name of the University nor the names of its contributors
25176491Smarcel *    may be used to endorse or promote products derived from this software
26176491Smarcel *    without specific prior written permission.
27176491Smarcel *
28176491Smarcel * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
29176491Smarcel * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
30176491Smarcel * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
31176491Smarcel * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
32176491Smarcel * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
33176491Smarcel * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
34176491Smarcel * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
35176491Smarcel * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36176491Smarcel * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
37176491Smarcel * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
38176491Smarcel * SUCH DAMAGE.
39176491Smarcel *
40176491Smarcel *	@(#)fpu_subr.c	8.1 (Berkeley) 6/11/93
41176491Smarcel */
42176491Smarcel
43176491Smarcel/*
44176491Smarcel * FPU subroutines.
45176491Smarcel */
46176491Smarcel
47176491Smarcel#include <sys/cdefs.h>
48176491Smarcel__FBSDID("$FreeBSD$");
49176491Smarcel
50178030Sgrehan#include <sys/types.h>
51176491Smarcel#include <sys/systm.h>
52176491Smarcel
53176491Smarcel#include <machine/fpu.h>
54176491Smarcel#include <machine/reg.h>
55176491Smarcel
56176491Smarcel#include <powerpc/fpu/fpu_arith.h>
57176491Smarcel#include <powerpc/fpu/fpu_emu.h>
58176491Smarcel
59176491Smarcel/*
60176491Smarcel * Shift the given number right rsh bits.  Any bits that `fall off' will get
61176491Smarcel * shoved into the sticky field; we return the resulting sticky.  Note that
62176491Smarcel * shifting NaNs is legal (this will never shift all bits out); a NaN's
63176491Smarcel * sticky field is ignored anyway.
64176491Smarcel */
65176491Smarcelint
66176491Smarcelfpu_shr(struct fpn *fp, int rsh)
67176491Smarcel{
68176491Smarcel	u_int m0, m1, m2, m3, s;
69176491Smarcel	int lsh;
70176491Smarcel
71176491Smarcel#ifdef DIAGNOSTIC
72176491Smarcel	if (rsh <= 0 || (fp->fp_class != FPC_NUM && !ISNAN(fp)))
73176491Smarcel		panic("fpu_rightshift 1");
74176491Smarcel#endif
75176491Smarcel
76176491Smarcel	m0 = fp->fp_mant[0];
77176491Smarcel	m1 = fp->fp_mant[1];
78176491Smarcel	m2 = fp->fp_mant[2];
79176491Smarcel	m3 = fp->fp_mant[3];
80176491Smarcel
81176491Smarcel	/* If shifting all the bits out, take a shortcut. */
82176491Smarcel	if (rsh >= FP_NMANT) {
83176491Smarcel#ifdef DIAGNOSTIC
84176491Smarcel		if ((m0 | m1 | m2 | m3) == 0)
85176491Smarcel			panic("fpu_rightshift 2");
86176491Smarcel#endif
87176491Smarcel		fp->fp_mant[0] = 0;
88176491Smarcel		fp->fp_mant[1] = 0;
89176491Smarcel		fp->fp_mant[2] = 0;
90176491Smarcel		fp->fp_mant[3] = 0;
91176491Smarcel#ifdef notdef
92176491Smarcel		if ((m0 | m1 | m2 | m3) == 0)
93176491Smarcel			fp->fp_class = FPC_ZERO;
94176491Smarcel		else
95176491Smarcel#endif
96176491Smarcel			fp->fp_sticky = 1;
97176491Smarcel		return (1);
98176491Smarcel	}
99176491Smarcel
100176491Smarcel	/* Squish out full words. */
101176491Smarcel	s = fp->fp_sticky;
102176491Smarcel	if (rsh >= 32 * 3) {
103176491Smarcel		s |= m3 | m2 | m1;
104176491Smarcel		m3 = m0, m2 = 0, m1 = 0, m0 = 0;
105176491Smarcel	} else if (rsh >= 32 * 2) {
106176491Smarcel		s |= m3 | m2;
107176491Smarcel		m3 = m1, m2 = m0, m1 = 0, m0 = 0;
108176491Smarcel	} else if (rsh >= 32) {
109176491Smarcel		s |= m3;
110176491Smarcel		m3 = m2, m2 = m1, m1 = m0, m0 = 0;
111176491Smarcel	}
112176491Smarcel
113176491Smarcel	/* Handle any remaining partial word. */
114176491Smarcel	if ((rsh &= 31) != 0) {
115176491Smarcel		lsh = 32 - rsh;
116176491Smarcel		s |= m3 << lsh;
117176491Smarcel		m3 = (m3 >> rsh) | (m2 << lsh);
118176491Smarcel		m2 = (m2 >> rsh) | (m1 << lsh);
119176491Smarcel		m1 = (m1 >> rsh) | (m0 << lsh);
120176491Smarcel		m0 >>= rsh;
121176491Smarcel	}
122176491Smarcel	fp->fp_mant[0] = m0;
123176491Smarcel	fp->fp_mant[1] = m1;
124176491Smarcel	fp->fp_mant[2] = m2;
125176491Smarcel	fp->fp_mant[3] = m3;
126176491Smarcel	fp->fp_sticky = s;
127176491Smarcel	return (s);
128176491Smarcel}
129176491Smarcel
130176491Smarcel/*
131176491Smarcel * Force a number to be normal, i.e., make its fraction have all zero
132176491Smarcel * bits before FP_1, then FP_1, then all 1 bits.  This is used for denorms
133176491Smarcel * and (sometimes) for intermediate results.
134176491Smarcel *
135176491Smarcel * Internally, this may use a `supernormal' -- a number whose fp_mant
136176491Smarcel * is greater than or equal to 2.0 -- so as a side effect you can hand it
137176491Smarcel * a supernormal and it will fix it (provided fp->fp_mant[3] == 0).
138176491Smarcel */
139176491Smarcelvoid
140176491Smarcelfpu_norm(struct fpn *fp)
141176491Smarcel{
142176491Smarcel	u_int m0, m1, m2, m3, top, sup, nrm;
143176491Smarcel	int lsh, rsh, exp;
144176491Smarcel
145176491Smarcel	exp = fp->fp_exp;
146176491Smarcel	m0 = fp->fp_mant[0];
147176491Smarcel	m1 = fp->fp_mant[1];
148176491Smarcel	m2 = fp->fp_mant[2];
149176491Smarcel	m3 = fp->fp_mant[3];
150176491Smarcel
151176491Smarcel	/* Handle severe subnormals with 32-bit moves. */
152176491Smarcel	if (m0 == 0) {
153176491Smarcel		if (m1)
154176491Smarcel			m0 = m1, m1 = m2, m2 = m3, m3 = 0, exp -= 32;
155176491Smarcel		else if (m2)
156176491Smarcel			m0 = m2, m1 = m3, m2 = 0, m3 = 0, exp -= 2 * 32;
157176491Smarcel		else if (m3)
158176491Smarcel			m0 = m3, m1 = 0, m2 = 0, m3 = 0, exp -= 3 * 32;
159176491Smarcel		else {
160176491Smarcel			fp->fp_class = FPC_ZERO;
161176491Smarcel			return;
162176491Smarcel		}
163176491Smarcel	}
164176491Smarcel
165176491Smarcel	/* Now fix any supernormal or remaining subnormal. */
166176491Smarcel	nrm = FP_1;
167176491Smarcel	sup = nrm << 1;
168176491Smarcel	if (m0 >= sup) {
169176491Smarcel		/*
170176491Smarcel		 * We have a supernormal number.  We need to shift it right.
171176491Smarcel		 * We may assume m3==0.
172176491Smarcel		 */
173176491Smarcel		for (rsh = 1, top = m0 >> 1; top >= sup; rsh++)	/* XXX slow */
174176491Smarcel			top >>= 1;
175176491Smarcel		exp += rsh;
176176491Smarcel		lsh = 32 - rsh;
177176491Smarcel		m3 = m2 << lsh;
178176491Smarcel		m2 = (m2 >> rsh) | (m1 << lsh);
179176491Smarcel		m1 = (m1 >> rsh) | (m0 << lsh);
180176491Smarcel		m0 = top;
181176491Smarcel	} else if (m0 < nrm) {
182176491Smarcel		/*
183176491Smarcel		 * We have a regular denorm (a subnormal number), and need
184176491Smarcel		 * to shift it left.
185176491Smarcel		 */
186176491Smarcel		for (lsh = 1, top = m0 << 1; top < nrm; lsh++)	/* XXX slow */
187176491Smarcel			top <<= 1;
188176491Smarcel		exp -= lsh;
189176491Smarcel		rsh = 32 - lsh;
190176491Smarcel		m0 = top | (m1 >> rsh);
191176491Smarcel		m1 = (m1 << lsh) | (m2 >> rsh);
192176491Smarcel		m2 = (m2 << lsh) | (m3 >> rsh);
193176491Smarcel		m3 <<= lsh;
194176491Smarcel	}
195176491Smarcel
196176491Smarcel	fp->fp_exp = exp;
197176491Smarcel	fp->fp_mant[0] = m0;
198176491Smarcel	fp->fp_mant[1] = m1;
199176491Smarcel	fp->fp_mant[2] = m2;
200176491Smarcel	fp->fp_mant[3] = m3;
201176491Smarcel}
202176491Smarcel
203176491Smarcel/*
204176491Smarcel * Concoct a `fresh' Quiet NaN per Appendix N.
205176491Smarcel * As a side effect, we set NV (invalid) for the current exceptions.
206176491Smarcel */
207176491Smarcelstruct fpn *
208176491Smarcelfpu_newnan(struct fpemu *fe)
209176491Smarcel{
210176491Smarcel	struct fpn *fp;
211176491Smarcel
212176491Smarcel	fe->fe_cx |= FPSCR_VXSNAN;
213176491Smarcel	fp = &fe->fe_f3;
214176491Smarcel	fp->fp_class = FPC_QNAN;
215176491Smarcel	fp->fp_sign = 0;
216176491Smarcel	fp->fp_mant[0] = FP_1 - 1;
217176491Smarcel	fp->fp_mant[1] = fp->fp_mant[2] = fp->fp_mant[3] = ~0;
218176491Smarcel	DUMPFPN(FPE_REG, fp);
219176491Smarcel	return (fp);
220176491Smarcel}
221