siis.c revision 201222
1/*- 2 * Copyright (c) 2009 Alexander Motin <mav@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer, 10 * without modification, immediately at the beginning of the file. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 */ 26 27#include <sys/cdefs.h> 28__FBSDID("$FreeBSD: head/sys/dev/siis/siis.c 201222 2009-12-29 21:49:11Z mav $"); 29 30#include <sys/param.h> 31#include <sys/module.h> 32#include <sys/systm.h> 33#include <sys/kernel.h> 34#include <sys/ata.h> 35#include <sys/bus.h> 36#include <sys/endian.h> 37#include <sys/malloc.h> 38#include <sys/lock.h> 39#include <sys/mutex.h> 40#include <sys/sema.h> 41#include <sys/taskqueue.h> 42#include <vm/uma.h> 43#include <machine/stdarg.h> 44#include <machine/resource.h> 45#include <machine/bus.h> 46#include <sys/rman.h> 47#include <dev/pci/pcivar.h> 48#include <dev/pci/pcireg.h> 49#include "siis.h" 50 51#include <cam/cam.h> 52#include <cam/cam_ccb.h> 53#include <cam/cam_sim.h> 54#include <cam/cam_xpt_sim.h> 55#include <cam/cam_xpt_periph.h> 56#include <cam/cam_debug.h> 57 58/* local prototypes */ 59static int siis_setup_interrupt(device_t dev); 60static void siis_intr(void *data); 61static int siis_suspend(device_t dev); 62static int siis_resume(device_t dev); 63static int siis_ch_suspend(device_t dev); 64static int siis_ch_resume(device_t dev); 65static void siis_ch_intr_locked(void *data); 66static void siis_ch_intr(void *data); 67static void siis_begin_transaction(device_t dev, union ccb *ccb); 68static void siis_dmasetprd(void *arg, bus_dma_segment_t *segs, int nsegs, int error); 69static void siis_execute_transaction(struct siis_slot *slot); 70static void siis_timeout(struct siis_slot *slot); 71static void siis_end_transaction(struct siis_slot *slot, enum siis_err_type et); 72static int siis_setup_fis(device_t dev, struct siis_cmd *ctp, union ccb *ccb, int tag); 73static void siis_dmainit(device_t dev); 74static void siis_dmasetupc_cb(void *xsc, bus_dma_segment_t *segs, int nsegs, int error); 75static void siis_dmafini(device_t dev); 76static void siis_slotsalloc(device_t dev); 77static void siis_slotsfree(device_t dev); 78static void siis_reset(device_t dev); 79static void siis_portinit(device_t dev); 80static int siis_wait_ready(device_t dev, int t); 81 82static int siis_sata_connect(struct siis_channel *ch); 83 84static void siis_issue_read_log(device_t dev); 85static void siis_process_read_log(device_t dev, union ccb *ccb); 86 87static void siisaction(struct cam_sim *sim, union ccb *ccb); 88static void siispoll(struct cam_sim *sim); 89 90MALLOC_DEFINE(M_SIIS, "SIIS driver", "SIIS driver data buffers"); 91 92static struct { 93 uint32_t id; 94 const char *name; 95 int ports; 96 int quirks; 97#define SIIS_Q_SNTF 1 98} siis_ids[] = { 99 {0x31241095, "SiI3124", 4, 0}, 100 {0x31248086, "SiI3124", 4, 0}, 101 {0x31321095, "SiI3132", 2, SIIS_Q_SNTF}, 102 {0x02421095, "SiI3132", 2, SIIS_Q_SNTF}, 103 {0x02441095, "SiI3132", 2, SIIS_Q_SNTF}, 104 {0x31311095, "SiI3131", 1, SIIS_Q_SNTF}, 105 {0x35311095, "SiI3531", 1, SIIS_Q_SNTF}, 106 {0, NULL, 0, 0} 107}; 108 109static int 110siis_probe(device_t dev) 111{ 112 char buf[64]; 113 int i; 114 uint32_t devid = pci_get_devid(dev); 115 116 for (i = 0; siis_ids[i].id != 0; i++) { 117 if (siis_ids[i].id == devid) { 118 snprintf(buf, sizeof(buf), "%s SATA controller", 119 siis_ids[i].name); 120 device_set_desc_copy(dev, buf); 121 return (BUS_PROBE_VENDOR); 122 } 123 } 124 return (ENXIO); 125} 126 127static int 128siis_attach(device_t dev) 129{ 130 struct siis_controller *ctlr = device_get_softc(dev); 131 uint32_t devid = pci_get_devid(dev); 132 device_t child; 133 int error, i, unit; 134 135 ctlr->dev = dev; 136 for (i = 0; siis_ids[i].id != 0; i++) { 137 if (siis_ids[i].id == devid) 138 break; 139 } 140 ctlr->quirks = siis_ids[i].quirks; 141 /* Global memory */ 142 ctlr->r_grid = PCIR_BAR(0); 143 if (!(ctlr->r_gmem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 144 &ctlr->r_grid, RF_ACTIVE))) 145 return (ENXIO); 146 ctlr->gctl = ATA_INL(ctlr->r_gmem, SIIS_GCTL); 147 /* Channels memory */ 148 ctlr->r_rid = PCIR_BAR(2); 149 if (!(ctlr->r_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 150 &ctlr->r_rid, RF_ACTIVE))) 151 return (ENXIO); 152 /* Setup our own memory management for channels. */ 153 ctlr->sc_iomem.rm_type = RMAN_ARRAY; 154 ctlr->sc_iomem.rm_descr = "I/O memory addresses"; 155 if ((error = rman_init(&ctlr->sc_iomem)) != 0) { 156 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 157 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_grid, ctlr->r_gmem); 158 return (error); 159 } 160 if ((error = rman_manage_region(&ctlr->sc_iomem, 161 rman_get_start(ctlr->r_mem), rman_get_end(ctlr->r_mem))) != 0) { 162 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 163 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_grid, ctlr->r_gmem); 164 rman_fini(&ctlr->sc_iomem); 165 return (error); 166 } 167 /* Reset controller */ 168 siis_resume(dev); 169 /* Number of HW channels */ 170 ctlr->channels = siis_ids[i].ports; 171 /* Setup interrupts. */ 172 if (siis_setup_interrupt(dev)) { 173 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 174 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_grid, ctlr->r_gmem); 175 rman_fini(&ctlr->sc_iomem); 176 return ENXIO; 177 } 178 /* Attach all channels on this controller */ 179 for (unit = 0; unit < ctlr->channels; unit++) { 180 child = device_add_child(dev, "siisch", -1); 181 if (child == NULL) 182 device_printf(dev, "failed to add channel device\n"); 183 else 184 device_set_ivars(child, (void *)(intptr_t)unit); 185 } 186 bus_generic_attach(dev); 187 return 0; 188} 189 190static int 191siis_detach(device_t dev) 192{ 193 struct siis_controller *ctlr = device_get_softc(dev); 194 device_t *children; 195 int nchildren, i; 196 197 /* Detach & delete all children */ 198 if (!device_get_children(dev, &children, &nchildren)) { 199 for (i = 0; i < nchildren; i++) 200 device_delete_child(dev, children[i]); 201 free(children, M_TEMP); 202 } 203 /* Free interrupts. */ 204 if (ctlr->irq.r_irq) { 205 bus_teardown_intr(dev, ctlr->irq.r_irq, 206 ctlr->irq.handle); 207 bus_release_resource(dev, SYS_RES_IRQ, 208 ctlr->irq.r_irq_rid, ctlr->irq.r_irq); 209 } 210 pci_release_msi(dev); 211 /* Free memory. */ 212 rman_fini(&ctlr->sc_iomem); 213 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 214 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_grid, ctlr->r_gmem); 215 return (0); 216} 217 218static int 219siis_suspend(device_t dev) 220{ 221 struct siis_controller *ctlr = device_get_softc(dev); 222 223 bus_generic_suspend(dev); 224 /* Put controller into reset state. */ 225 ctlr->gctl |= SIIS_GCTL_GRESET; 226 ATA_OUTL(ctlr->r_gmem, SIIS_GCTL, ctlr->gctl); 227 return 0; 228} 229 230static int 231siis_resume(device_t dev) 232{ 233 struct siis_controller *ctlr = device_get_softc(dev); 234 int cap; 235 uint16_t val; 236 237 /* Set PCIe max read request size to at least 1024 bytes */ 238 if (pci_find_extcap(dev, PCIY_EXPRESS, &cap) == 0) { 239 val = pci_read_config(dev, 240 cap + PCIR_EXPRESS_DEVICE_CTL, 2); 241 if ((val & PCIM_EXP_CTL_MAX_READ_REQUEST) < 0x3000) { 242 val &= ~PCIM_EXP_CTL_MAX_READ_REQUEST; 243 val |= 0x3000; 244 pci_write_config(dev, 245 cap + PCIR_EXPRESS_DEVICE_CTL, val, 2); 246 } 247 } 248 /* Put controller into reset state. */ 249 ctlr->gctl |= SIIS_GCTL_GRESET; 250 ATA_OUTL(ctlr->r_gmem, SIIS_GCTL, ctlr->gctl); 251 DELAY(10000); 252 /* Get controller out of reset state and enable port interrupts. */ 253 ctlr->gctl &= ~(SIIS_GCTL_GRESET | SIIS_GCTL_I2C_IE); 254 ctlr->gctl |= 0x0000000f; 255 ATA_OUTL(ctlr->r_gmem, SIIS_GCTL, ctlr->gctl); 256 return (bus_generic_resume(dev)); 257} 258 259static int 260siis_setup_interrupt(device_t dev) 261{ 262 struct siis_controller *ctlr = device_get_softc(dev); 263 int msi = 0; 264 265 /* Process hints. */ 266 resource_int_value(device_get_name(dev), 267 device_get_unit(dev), "msi", &msi); 268 if (msi < 0) 269 msi = 0; 270 else if (msi > 0) 271 msi = min(1, pci_msi_count(dev)); 272 /* Allocate MSI if needed/present. */ 273 if (msi && pci_alloc_msi(dev, &msi) != 0) 274 msi = 0; 275 /* Allocate all IRQs. */ 276 ctlr->irq.r_irq_rid = msi ? 1 : 0; 277 if (!(ctlr->irq.r_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, 278 &ctlr->irq.r_irq_rid, RF_SHAREABLE | RF_ACTIVE))) { 279 device_printf(dev, "unable to map interrupt\n"); 280 return ENXIO; 281 } 282 if ((bus_setup_intr(dev, ctlr->irq.r_irq, ATA_INTR_FLAGS, NULL, 283 siis_intr, ctlr, &ctlr->irq.handle))) { 284 /* SOS XXX release r_irq */ 285 device_printf(dev, "unable to setup interrupt\n"); 286 return ENXIO; 287 } 288 return (0); 289} 290 291/* 292 * Common case interrupt handler. 293 */ 294static void 295siis_intr(void *data) 296{ 297 struct siis_controller *ctlr = (struct siis_controller *)data; 298 u_int32_t is; 299 void *arg; 300 int unit; 301 302 is = ATA_INL(ctlr->r_gmem, SIIS_IS); 303 for (unit = 0; unit < ctlr->channels; unit++) { 304 if ((is & SIIS_IS_PORT(unit)) != 0 && 305 (arg = ctlr->interrupt[unit].argument)) { 306 ctlr->interrupt[unit].function(arg); 307 } 308 } 309 /* Acknowledge interrupt, if MSI enabled. */ 310 if (ctlr->irq.r_irq_rid) { 311 ATA_OUTL(ctlr->r_gmem, SIIS_GCTL, 312 ctlr->gctl | SIIS_GCTL_MSIACK); 313 } 314} 315 316static struct resource * 317siis_alloc_resource(device_t dev, device_t child, int type, int *rid, 318 u_long start, u_long end, u_long count, u_int flags) 319{ 320 struct siis_controller *ctlr = device_get_softc(dev); 321 int unit = ((struct siis_channel *)device_get_softc(child))->unit; 322 struct resource *res = NULL; 323 int offset = unit << 13; 324 long st; 325 326 switch (type) { 327 case SYS_RES_MEMORY: 328 st = rman_get_start(ctlr->r_mem); 329 res = rman_reserve_resource(&ctlr->sc_iomem, st + offset, 330 st + offset + 0x2000, 0x2000, RF_ACTIVE, child); 331 if (res) { 332 bus_space_handle_t bsh; 333 bus_space_tag_t bst; 334 bsh = rman_get_bushandle(ctlr->r_mem); 335 bst = rman_get_bustag(ctlr->r_mem); 336 bus_space_subregion(bst, bsh, offset, 0x2000, &bsh); 337 rman_set_bushandle(res, bsh); 338 rman_set_bustag(res, bst); 339 } 340 break; 341 case SYS_RES_IRQ: 342 if (*rid == ATA_IRQ_RID) 343 res = ctlr->irq.r_irq; 344 break; 345 } 346 return (res); 347} 348 349static int 350siis_release_resource(device_t dev, device_t child, int type, int rid, 351 struct resource *r) 352{ 353 354 switch (type) { 355 case SYS_RES_MEMORY: 356 rman_release_resource(r); 357 return (0); 358 case SYS_RES_IRQ: 359 if (rid != ATA_IRQ_RID) 360 return ENOENT; 361 return (0); 362 } 363 return (EINVAL); 364} 365 366static int 367siis_setup_intr(device_t dev, device_t child, struct resource *irq, 368 int flags, driver_filter_t *filter, driver_intr_t *function, 369 void *argument, void **cookiep) 370{ 371 struct siis_controller *ctlr = device_get_softc(dev); 372 int unit = (intptr_t)device_get_ivars(child); 373 374 if (filter != NULL) { 375 printf("siis.c: we cannot use a filter here\n"); 376 return (EINVAL); 377 } 378 ctlr->interrupt[unit].function = function; 379 ctlr->interrupt[unit].argument = argument; 380 return (0); 381} 382 383static int 384siis_teardown_intr(device_t dev, device_t child, struct resource *irq, 385 void *cookie) 386{ 387 struct siis_controller *ctlr = device_get_softc(dev); 388 int unit = (intptr_t)device_get_ivars(child); 389 390 ctlr->interrupt[unit].function = NULL; 391 ctlr->interrupt[unit].argument = NULL; 392 return (0); 393} 394 395static int 396siis_print_child(device_t dev, device_t child) 397{ 398 int retval; 399 400 retval = bus_print_child_header(dev, child); 401 retval += printf(" at channel %d", 402 (int)(intptr_t)device_get_ivars(child)); 403 retval += bus_print_child_footer(dev, child); 404 405 return (retval); 406} 407 408devclass_t siis_devclass; 409static device_method_t siis_methods[] = { 410 DEVMETHOD(device_probe, siis_probe), 411 DEVMETHOD(device_attach, siis_attach), 412 DEVMETHOD(device_detach, siis_detach), 413 DEVMETHOD(device_suspend, siis_suspend), 414 DEVMETHOD(device_resume, siis_resume), 415 DEVMETHOD(bus_print_child, siis_print_child), 416 DEVMETHOD(bus_alloc_resource, siis_alloc_resource), 417 DEVMETHOD(bus_release_resource, siis_release_resource), 418 DEVMETHOD(bus_setup_intr, siis_setup_intr), 419 DEVMETHOD(bus_teardown_intr,siis_teardown_intr), 420 { 0, 0 } 421}; 422static driver_t siis_driver = { 423 "siis", 424 siis_methods, 425 sizeof(struct siis_controller) 426}; 427DRIVER_MODULE(siis, pci, siis_driver, siis_devclass, 0, 0); 428MODULE_VERSION(siis, 1); 429MODULE_DEPEND(siis, cam, 1, 1, 1); 430 431static int 432siis_ch_probe(device_t dev) 433{ 434 435 device_set_desc_copy(dev, "SIIS channel"); 436 return (0); 437} 438 439static int 440siis_ch_attach(device_t dev) 441{ 442 struct siis_controller *ctlr = device_get_softc(device_get_parent(dev)); 443 struct siis_channel *ch = device_get_softc(dev); 444 struct cam_devq *devq; 445 int rid, error, i, sata_rev = 0; 446 447 ch->dev = dev; 448 ch->unit = (intptr_t)device_get_ivars(dev); 449 ch->quirks = ctlr->quirks; 450 resource_int_value(device_get_name(dev), 451 device_get_unit(dev), "pm_level", &ch->pm_level); 452 resource_int_value(device_get_name(dev), 453 device_get_unit(dev), "sata_rev", &sata_rev); 454 for (i = 0; i < 16; i++) { 455 ch->user[i].revision = sata_rev; 456 ch->user[i].mode = 0; 457 ch->user[i].bytecount = 8192; 458 ch->user[i].tags = SIIS_MAX_SLOTS; 459 ch->curr[i] = ch->user[i]; 460 } 461 mtx_init(&ch->mtx, "SIIS channel lock", NULL, MTX_DEF); 462 rid = ch->unit; 463 if (!(ch->r_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 464 &rid, RF_ACTIVE))) 465 return (ENXIO); 466 siis_dmainit(dev); 467 siis_slotsalloc(dev); 468 siis_ch_resume(dev); 469 mtx_lock(&ch->mtx); 470 rid = ATA_IRQ_RID; 471 if (!(ch->r_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, 472 &rid, RF_SHAREABLE | RF_ACTIVE))) { 473 bus_release_resource(dev, SYS_RES_MEMORY, ch->unit, ch->r_mem); 474 device_printf(dev, "Unable to map interrupt\n"); 475 return (ENXIO); 476 } 477 if ((bus_setup_intr(dev, ch->r_irq, ATA_INTR_FLAGS, NULL, 478 siis_ch_intr_locked, dev, &ch->ih))) { 479 device_printf(dev, "Unable to setup interrupt\n"); 480 error = ENXIO; 481 goto err1; 482 } 483 /* Create the device queue for our SIM. */ 484 devq = cam_simq_alloc(SIIS_MAX_SLOTS); 485 if (devq == NULL) { 486 device_printf(dev, "Unable to allocate simq\n"); 487 error = ENOMEM; 488 goto err1; 489 } 490 /* Construct SIM entry */ 491 ch->sim = cam_sim_alloc(siisaction, siispoll, "siisch", ch, 492 device_get_unit(dev), &ch->mtx, 2, SIIS_MAX_SLOTS, devq); 493 if (ch->sim == NULL) { 494 device_printf(dev, "unable to allocate sim\n"); 495 error = ENOMEM; 496 goto err2; 497 } 498 if (xpt_bus_register(ch->sim, dev, 0) != CAM_SUCCESS) { 499 device_printf(dev, "unable to register xpt bus\n"); 500 error = ENXIO; 501 goto err2; 502 } 503 if (xpt_create_path(&ch->path, /*periph*/NULL, cam_sim_path(ch->sim), 504 CAM_TARGET_WILDCARD, CAM_LUN_WILDCARD) != CAM_REQ_CMP) { 505 device_printf(dev, "unable to create path\n"); 506 error = ENXIO; 507 goto err3; 508 } 509 mtx_unlock(&ch->mtx); 510 return (0); 511 512err3: 513 xpt_bus_deregister(cam_sim_path(ch->sim)); 514err2: 515 cam_sim_free(ch->sim, /*free_devq*/TRUE); 516err1: 517 bus_release_resource(dev, SYS_RES_IRQ, ATA_IRQ_RID, ch->r_irq); 518 bus_release_resource(dev, SYS_RES_MEMORY, ch->unit, ch->r_mem); 519 mtx_unlock(&ch->mtx); 520 return (error); 521} 522 523static int 524siis_ch_detach(device_t dev) 525{ 526 struct siis_channel *ch = device_get_softc(dev); 527 528 mtx_lock(&ch->mtx); 529 xpt_async(AC_LOST_DEVICE, ch->path, NULL); 530 xpt_free_path(ch->path); 531 xpt_bus_deregister(cam_sim_path(ch->sim)); 532 cam_sim_free(ch->sim, /*free_devq*/TRUE); 533 mtx_unlock(&ch->mtx); 534 535 bus_teardown_intr(dev, ch->r_irq, ch->ih); 536 bus_release_resource(dev, SYS_RES_IRQ, ATA_IRQ_RID, ch->r_irq); 537 538 siis_ch_suspend(dev); 539 siis_slotsfree(dev); 540 siis_dmafini(dev); 541 542 bus_release_resource(dev, SYS_RES_MEMORY, ch->unit, ch->r_mem); 543 mtx_destroy(&ch->mtx); 544 return (0); 545} 546 547static int 548siis_ch_suspend(device_t dev) 549{ 550 struct siis_channel *ch = device_get_softc(dev); 551 552 /* Put port into reset state. */ 553 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_PORT_RESET); 554 return (0); 555} 556 557static int 558siis_ch_resume(device_t dev) 559{ 560 struct siis_channel *ch = device_get_softc(dev); 561 562 /* Get port out of reset state. */ 563 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_PORT_RESET); 564 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_32BIT); 565 if (ch->pm_present) 566 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_PME); 567 else 568 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_PME); 569 /* Enable port interrupts */ 570 ATA_OUTL(ch->r_mem, SIIS_P_IESET, SIIS_P_IX_ENABLED); 571 return (0); 572} 573 574devclass_t siisch_devclass; 575static device_method_t siisch_methods[] = { 576 DEVMETHOD(device_probe, siis_ch_probe), 577 DEVMETHOD(device_attach, siis_ch_attach), 578 DEVMETHOD(device_detach, siis_ch_detach), 579 DEVMETHOD(device_suspend, siis_ch_suspend), 580 DEVMETHOD(device_resume, siis_ch_resume), 581 { 0, 0 } 582}; 583static driver_t siisch_driver = { 584 "siisch", 585 siisch_methods, 586 sizeof(struct siis_channel) 587}; 588DRIVER_MODULE(siisch, siis, siisch_driver, siis_devclass, 0, 0); 589 590struct siis_dc_cb_args { 591 bus_addr_t maddr; 592 int error; 593}; 594 595static void 596siis_dmainit(device_t dev) 597{ 598 struct siis_channel *ch = device_get_softc(dev); 599 struct siis_dc_cb_args dcba; 600 601 /* Command area. */ 602 if (bus_dma_tag_create(bus_get_dma_tag(dev), 1024, 0, 603 BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, 604 NULL, NULL, SIIS_WORK_SIZE, 1, SIIS_WORK_SIZE, 605 0, NULL, NULL, &ch->dma.work_tag)) 606 goto error; 607 if (bus_dmamem_alloc(ch->dma.work_tag, (void **)&ch->dma.work, 0, 608 &ch->dma.work_map)) 609 goto error; 610 if (bus_dmamap_load(ch->dma.work_tag, ch->dma.work_map, ch->dma.work, 611 SIIS_WORK_SIZE, siis_dmasetupc_cb, &dcba, 0) || dcba.error) { 612 bus_dmamem_free(ch->dma.work_tag, ch->dma.work, ch->dma.work_map); 613 goto error; 614 } 615 ch->dma.work_bus = dcba.maddr; 616 /* Data area. */ 617 if (bus_dma_tag_create(bus_get_dma_tag(dev), 1, 0, 618 BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, 619 NULL, NULL, 620 SIIS_SG_ENTRIES * PAGE_SIZE * SIIS_MAX_SLOTS, 621 SIIS_SG_ENTRIES, 0xFFFFFFFF, 622 0, busdma_lock_mutex, &ch->mtx, &ch->dma.data_tag)) { 623 goto error; 624 } 625 return; 626 627error: 628 device_printf(dev, "WARNING - DMA initialization failed\n"); 629 siis_dmafini(dev); 630} 631 632static void 633siis_dmasetupc_cb(void *xsc, bus_dma_segment_t *segs, int nsegs, int error) 634{ 635 struct siis_dc_cb_args *dcba = (struct siis_dc_cb_args *)xsc; 636 637 if (!(dcba->error = error)) 638 dcba->maddr = segs[0].ds_addr; 639} 640 641static void 642siis_dmafini(device_t dev) 643{ 644 struct siis_channel *ch = device_get_softc(dev); 645 646 if (ch->dma.data_tag) { 647 bus_dma_tag_destroy(ch->dma.data_tag); 648 ch->dma.data_tag = NULL; 649 } 650 if (ch->dma.work_bus) { 651 bus_dmamap_unload(ch->dma.work_tag, ch->dma.work_map); 652 bus_dmamem_free(ch->dma.work_tag, ch->dma.work, ch->dma.work_map); 653 ch->dma.work_bus = 0; 654 ch->dma.work_map = NULL; 655 ch->dma.work = NULL; 656 } 657 if (ch->dma.work_tag) { 658 bus_dma_tag_destroy(ch->dma.work_tag); 659 ch->dma.work_tag = NULL; 660 } 661} 662 663static void 664siis_slotsalloc(device_t dev) 665{ 666 struct siis_channel *ch = device_get_softc(dev); 667 int i; 668 669 /* Alloc and setup command/dma slots */ 670 bzero(ch->slot, sizeof(ch->slot)); 671 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 672 struct siis_slot *slot = &ch->slot[i]; 673 674 slot->dev = dev; 675 slot->slot = i; 676 slot->state = SIIS_SLOT_EMPTY; 677 slot->ccb = NULL; 678 callout_init_mtx(&slot->timeout, &ch->mtx, 0); 679 680 if (bus_dmamap_create(ch->dma.data_tag, 0, &slot->dma.data_map)) 681 device_printf(ch->dev, "FAILURE - create data_map\n"); 682 } 683} 684 685static void 686siis_slotsfree(device_t dev) 687{ 688 struct siis_channel *ch = device_get_softc(dev); 689 int i; 690 691 /* Free all dma slots */ 692 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 693 struct siis_slot *slot = &ch->slot[i]; 694 695 callout_drain(&slot->timeout); 696 if (slot->dma.data_map) { 697 bus_dmamap_destroy(ch->dma.data_tag, slot->dma.data_map); 698 slot->dma.data_map = NULL; 699 } 700 } 701} 702 703static void 704siis_notify_events(device_t dev) 705{ 706 struct siis_channel *ch = device_get_softc(dev); 707 struct cam_path *dpath; 708 u_int32_t status; 709 int i; 710 711 if (ch->quirks & SIIS_Q_SNTF) { 712 status = ATA_INL(ch->r_mem, SIIS_P_SNTF); 713 ATA_OUTL(ch->r_mem, SIIS_P_SNTF, status); 714 } else { 715 /* 716 * Without SNTF we have no idea which device sent notification. 717 * If PMP is connected, assume it, else - device. 718 */ 719 status = (ch->pm_present) ? 0x8000 : 0x0001; 720 } 721 if (bootverbose) 722 device_printf(dev, "SNTF 0x%04x\n", status); 723 for (i = 0; i < 16; i++) { 724 if ((status & (1 << i)) == 0) 725 continue; 726 if (xpt_create_path(&dpath, NULL, 727 xpt_path_path_id(ch->path), i, 0) == CAM_REQ_CMP) { 728 xpt_async(AC_SCSI_AEN, dpath, NULL); 729 xpt_free_path(dpath); 730 } 731 } 732 733} 734 735static void 736siis_phy_check_events(device_t dev) 737{ 738 struct siis_channel *ch = device_get_softc(dev); 739 740 /* If we have a connection event, deal with it */ 741 if (ch->pm_level == 0) { 742 u_int32_t status = ATA_INL(ch->r_mem, SIIS_P_SSTS); 743 if (((status & ATA_SS_DET_MASK) == ATA_SS_DET_PHY_ONLINE) && 744 ((status & ATA_SS_SPD_MASK) != ATA_SS_SPD_NO_SPEED) && 745 ((status & ATA_SS_IPM_MASK) == ATA_SS_IPM_ACTIVE)) { 746 if (bootverbose) 747 device_printf(dev, "CONNECT requested\n"); 748 siis_reset(dev); 749 } else { 750 if (bootverbose) 751 device_printf(dev, "DISCONNECT requested\n"); 752 ch->devices = 0; 753 } 754 } 755} 756 757static void 758siis_ch_intr_locked(void *data) 759{ 760 device_t dev = (device_t)data; 761 struct siis_channel *ch = device_get_softc(dev); 762 763 mtx_lock(&ch->mtx); 764 siis_ch_intr(data); 765 mtx_unlock(&ch->mtx); 766} 767 768static void 769siis_ch_intr(void *data) 770{ 771 device_t dev = (device_t)data; 772 struct siis_channel *ch = device_get_softc(dev); 773 uint32_t istatus, sstatus, ctx, estatus, ok, err = 0; 774 enum siis_err_type et; 775 int i, ccs, port, tslots; 776 777 mtx_assert(&ch->mtx, MA_OWNED); 778 /* Read command statuses. */ 779 sstatus = ATA_INL(ch->r_mem, SIIS_P_SS); 780 ok = ch->rslots & ~sstatus; 781 /* Complete all successfull commands. */ 782 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 783 if ((ok >> i) & 1) 784 siis_end_transaction(&ch->slot[i], SIIS_ERR_NONE); 785 } 786 /* Do we have any other events? */ 787 if ((sstatus & SIIS_P_SS_ATTN) == 0) 788 return; 789 /* Read and clear interrupt statuses. */ 790 istatus = ATA_INL(ch->r_mem, SIIS_P_IS) & 791 (0xFFFF & ~SIIS_P_IX_COMMCOMP); 792 ATA_OUTL(ch->r_mem, SIIS_P_IS, istatus); 793 /* Process PHY events */ 794 if (istatus & SIIS_P_IX_PHYRDYCHG) 795 siis_phy_check_events(dev); 796 /* Process NOTIFY events */ 797 if (istatus & SIIS_P_IX_SDBN) 798 siis_notify_events(dev); 799 /* Process command errors */ 800 if (istatus & SIIS_P_IX_COMMERR) { 801 estatus = ATA_INL(ch->r_mem, SIIS_P_CMDERR); 802 ctx = ATA_INL(ch->r_mem, SIIS_P_CTX); 803 ccs = (ctx & SIIS_P_CTX_SLOT) >> SIIS_P_CTX_SLOT_SHIFT; 804 port = (ctx & SIIS_P_CTX_PMP) >> SIIS_P_CTX_PMP_SHIFT; 805 err = ch->rslots & sstatus; 806//device_printf(dev, "%s ERROR ss %08x is %08x rs %08x es %d act %d port %d serr %08x\n", 807// __func__, sstatus, istatus, ch->rslots, estatus, ccs, port, 808// ATA_INL(ch->r_mem, SIIS_P_SERR)); 809 810 if (!ch->readlog && !ch->recovery) { 811 xpt_freeze_simq(ch->sim, ch->numrslots); 812 ch->recovery = 1; 813 } 814 if (ch->frozen) { 815 union ccb *fccb = ch->frozen; 816 ch->frozen = NULL; 817 fccb->ccb_h.status &= ~CAM_STATUS_MASK; 818 fccb->ccb_h.status |= CAM_REQUEUE_REQ | CAM_RELEASE_SIMQ; 819 if (!(fccb->ccb_h.status & CAM_DEV_QFRZN)) { 820 xpt_freeze_devq(fccb->ccb_h.path, 1); 821 fccb->ccb_h.status |= CAM_DEV_QFRZN; 822 } 823 xpt_done(fccb); 824 } 825 if (estatus == SIIS_P_CMDERR_DEV || 826 estatus == SIIS_P_CMDERR_SDB || 827 estatus == SIIS_P_CMDERR_DATAFIS) { 828 tslots = ch->numtslots[port]; 829 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 830 /* XXX: requests in loading state. */ 831 if (((ch->rslots >> i) & 1) == 0) 832 continue; 833 if (ch->slot[i].ccb->ccb_h.target_id != port) 834 continue; 835 if (tslots == 0) { 836 /* Untagged operation. */ 837 if (i == ccs) 838 et = SIIS_ERR_TFE; 839 else 840 et = SIIS_ERR_INNOCENT; 841 } else { 842 /* Tagged operation. */ 843 et = SIIS_ERR_NCQ; 844 } 845 siis_end_transaction(&ch->slot[i], et); 846 } 847 /* 848 * We can't reinit port if there are some other 849 * commands active, use resume to complete them. 850 */ 851 if (ch->rslots != 0) 852 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_RESUME); 853 } else { 854 if (estatus == SIIS_P_CMDERR_SENDFIS || 855 estatus == SIIS_P_CMDERR_INCSTATE || 856 estatus == SIIS_P_CMDERR_PPE || 857 estatus == SIIS_P_CMDERR_SERVICE) { 858 et = SIIS_ERR_SATA; 859 } else 860 et = SIIS_ERR_INVALID; 861 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 862 /* XXX: requests in loading state. */ 863 if (((ch->rslots >> i) & 1) == 0) 864 continue; 865 siis_end_transaction(&ch->slot[i], et); 866 } 867 } 868 } 869} 870 871/* Must be called with channel locked. */ 872static int 873siis_check_collision(device_t dev, union ccb *ccb) 874{ 875 struct siis_channel *ch = device_get_softc(dev); 876 877 mtx_assert(&ch->mtx, MA_OWNED); 878 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 879 (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) { 880 /* Tagged command while we have no supported tag free. */ 881 if (((~ch->oslots) & (0x7fffffff >> (31 - 882 ch->curr[ccb->ccb_h.target_id].tags))) == 0) 883 return (1); 884 } 885 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 886 (ccb->ataio.cmd.flags & (CAM_ATAIO_CONTROL | CAM_ATAIO_NEEDRESULT))) { 887 /* Atomic command while anything active. */ 888 if (ch->numrslots != 0) 889 return (1); 890 } 891 /* We have some atomic command running. */ 892 if (ch->aslots != 0) 893 return (1); 894 return (0); 895} 896 897/* Must be called with channel locked. */ 898static void 899siis_begin_transaction(device_t dev, union ccb *ccb) 900{ 901 struct siis_channel *ch = device_get_softc(dev); 902 struct siis_slot *slot; 903 int tag, tags; 904 905 mtx_assert(&ch->mtx, MA_OWNED); 906 /* Choose empty slot. */ 907 tags = SIIS_MAX_SLOTS; 908 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 909 (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) 910 tags = ch->curr[ccb->ccb_h.target_id].tags; 911 tag = fls((~ch->oslots) & (0x7fffffff >> (31 - tags))) - 1; 912 /* Occupy chosen slot. */ 913 slot = &ch->slot[tag]; 914 slot->ccb = ccb; 915 /* Update channel stats. */ 916 ch->oslots |= (1 << slot->slot); 917 ch->numrslots++; 918 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 919 (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) { 920 ch->numtslots[ccb->ccb_h.target_id]++; 921 } 922 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 923 (ccb->ataio.cmd.flags & (CAM_ATAIO_CONTROL | CAM_ATAIO_NEEDRESULT))) 924 ch->aslots |= (1 << slot->slot); 925 slot->dma.nsegs = 0; 926 /* If request moves data, setup and load SG list */ 927 if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) { 928 void *buf; 929 bus_size_t size; 930 931 slot->state = SIIS_SLOT_LOADING; 932 if (ccb->ccb_h.func_code == XPT_ATA_IO) { 933 buf = ccb->ataio.data_ptr; 934 size = ccb->ataio.dxfer_len; 935 } else { 936 buf = ccb->csio.data_ptr; 937 size = ccb->csio.dxfer_len; 938 } 939 bus_dmamap_load(ch->dma.data_tag, slot->dma.data_map, 940 buf, size, siis_dmasetprd, slot, 0); 941 } else 942 siis_execute_transaction(slot); 943} 944 945/* Locked by busdma engine. */ 946static void 947siis_dmasetprd(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 948{ 949 struct siis_slot *slot = arg; 950 struct siis_channel *ch = device_get_softc(slot->dev); 951 struct siis_cmd *ctp; 952 struct siis_dma_prd *prd; 953 int i; 954 955 mtx_assert(&ch->mtx, MA_OWNED); 956 if (error) { 957 device_printf(slot->dev, "DMA load error\n"); 958 if (!ch->readlog) 959 xpt_freeze_simq(ch->sim, 1); 960 siis_end_transaction(slot, SIIS_ERR_INVALID); 961 return; 962 } 963 KASSERT(nsegs <= SIIS_SG_ENTRIES, ("too many DMA segment entries\n")); 964 /* Get a piece of the workspace for this request */ 965 ctp = (struct siis_cmd *) 966 (ch->dma.work + SIIS_CT_OFFSET + (SIIS_CT_SIZE * slot->slot)); 967 /* Fill S/G table */ 968 if (slot->ccb->ccb_h.func_code == XPT_ATA_IO) 969 prd = &ctp->u.ata.prd[0]; 970 else 971 prd = &ctp->u.atapi.prd[0]; 972 for (i = 0; i < nsegs; i++) { 973 prd[i].dba = htole64(segs[i].ds_addr); 974 prd[i].dbc = htole32(segs[i].ds_len); 975 prd[i].control = 0; 976 } 977 prd[nsegs - 1].control = htole32(SIIS_PRD_TRM); 978 slot->dma.nsegs = nsegs; 979 bus_dmamap_sync(ch->dma.data_tag, slot->dma.data_map, 980 ((slot->ccb->ccb_h.flags & CAM_DIR_IN) ? 981 BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE)); 982 siis_execute_transaction(slot); 983} 984 985/* Must be called with channel locked. */ 986static void 987siis_execute_transaction(struct siis_slot *slot) 988{ 989 device_t dev = slot->dev; 990 struct siis_channel *ch = device_get_softc(dev); 991 struct siis_cmd *ctp; 992 union ccb *ccb = slot->ccb; 993 u_int64_t prb_bus; 994 995 mtx_assert(&ch->mtx, MA_OWNED); 996 /* Get a piece of the workspace for this request */ 997 ctp = (struct siis_cmd *) 998 (ch->dma.work + SIIS_CT_OFFSET + (SIIS_CT_SIZE * slot->slot)); 999 ctp->control = 0; 1000 ctp->protocol_override = 0; 1001 ctp->transfer_count = 0; 1002 /* Special handling for Soft Reset command. */ 1003 if (ccb->ccb_h.func_code == XPT_ATA_IO) { 1004 if (ccb->ataio.cmd.flags & CAM_ATAIO_CONTROL) { 1005 ctp->control |= htole16(SIIS_PRB_SOFT_RESET); 1006 } else { 1007 ctp->control |= htole16(SIIS_PRB_PROTOCOL_OVERRIDE); 1008 if (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA) { 1009 ctp->protocol_override |= 1010 htole16(SIIS_PRB_PROTO_NCQ); 1011 } 1012 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) { 1013 ctp->protocol_override |= 1014 htole16(SIIS_PRB_PROTO_READ); 1015 } else 1016 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_OUT) { 1017 ctp->protocol_override |= 1018 htole16(SIIS_PRB_PROTO_WRITE); 1019 } 1020 } 1021 } else if (ccb->ccb_h.func_code == XPT_SCSI_IO) { 1022 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) 1023 ctp->control |= htole16(SIIS_PRB_PACKET_READ); 1024 else 1025 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_OUT) 1026 ctp->control |= htole16(SIIS_PRB_PACKET_WRITE); 1027 } 1028 /* Setup the FIS for this request */ 1029 if (!siis_setup_fis(dev, ctp, ccb, slot->slot)) { 1030 device_printf(ch->dev, "Setting up SATA FIS failed\n"); 1031 if (!ch->readlog) 1032 xpt_freeze_simq(ch->sim, 1); 1033 siis_end_transaction(slot, SIIS_ERR_INVALID); 1034 return; 1035 } 1036 bus_dmamap_sync(ch->dma.work_tag, ch->dma.work_map, 1037 BUS_DMASYNC_PREWRITE); 1038 /* Issue command to the controller. */ 1039 slot->state = SIIS_SLOT_RUNNING; 1040 ch->rslots |= (1 << slot->slot); 1041 prb_bus = ch->dma.work_bus + 1042 SIIS_CT_OFFSET + (SIIS_CT_SIZE * slot->slot); 1043 ATA_OUTL(ch->r_mem, SIIS_P_CACTL(slot->slot), prb_bus); 1044 ATA_OUTL(ch->r_mem, SIIS_P_CACTH(slot->slot), prb_bus >> 32); 1045 /* Start command execution timeout */ 1046 callout_reset(&slot->timeout, (int)ccb->ccb_h.timeout * hz / 1000, 1047 (timeout_t*)siis_timeout, slot); 1048 return; 1049} 1050 1051/* Must be called with channel locked. */ 1052static void 1053siis_process_timeout(device_t dev) 1054{ 1055 struct siis_channel *ch = device_get_softc(dev); 1056 int i; 1057 1058 mtx_assert(&ch->mtx, MA_OWNED); 1059 if (!ch->readlog && !ch->recovery) { 1060 xpt_freeze_simq(ch->sim, ch->numrslots); 1061 ch->recovery = 1; 1062 } 1063 /* Handle the rest of commands. */ 1064 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1065 /* Do we have a running request on slot? */ 1066 if (ch->slot[i].state < SIIS_SLOT_RUNNING) 1067 continue; 1068 siis_end_transaction(&ch->slot[i], SIIS_ERR_TIMEOUT); 1069 } 1070} 1071 1072/* Locked by callout mechanism. */ 1073static void 1074siis_timeout(struct siis_slot *slot) 1075{ 1076 device_t dev = slot->dev; 1077 struct siis_channel *ch = device_get_softc(dev); 1078 1079 mtx_assert(&ch->mtx, MA_OWNED); 1080 /* Check for stale timeout. */ 1081 if (slot->state < SIIS_SLOT_RUNNING) 1082 return; 1083 device_printf(dev, "Timeout on slot %d\n", slot->slot); 1084device_printf(dev, "%s is %08x ss %08x rs %08x es %08x sts %08x serr %08x\n", 1085 __func__, ATA_INL(ch->r_mem, SIIS_P_IS), ATA_INL(ch->r_mem, SIIS_P_SS), ch->rslots, 1086 ATA_INL(ch->r_mem, SIIS_P_CMDERR), ATA_INL(ch->r_mem, SIIS_P_STS), 1087 ATA_INL(ch->r_mem, SIIS_P_SERR)); 1088 1089 if (ch->toslots == 0) 1090 xpt_freeze_simq(ch->sim, 1); 1091 ch->toslots |= (1 << slot->slot); 1092 if ((ch->rslots & ~ch->toslots) == 0) 1093 siis_process_timeout(dev); 1094 else 1095 device_printf(dev, " ... waiting for slots %08x\n", 1096 ch->rslots & ~ch->toslots); 1097} 1098 1099/* Must be called with channel locked. */ 1100static void 1101siis_end_transaction(struct siis_slot *slot, enum siis_err_type et) 1102{ 1103 device_t dev = slot->dev; 1104 struct siis_channel *ch = device_get_softc(dev); 1105 union ccb *ccb = slot->ccb; 1106 1107 mtx_assert(&ch->mtx, MA_OWNED); 1108 bus_dmamap_sync(ch->dma.work_tag, ch->dma.work_map, 1109 BUS_DMASYNC_POSTWRITE); 1110 /* Read result registers to the result struct 1111 * May be incorrect if several commands finished same time, 1112 * so read only when sure or have to. 1113 */ 1114 if (ccb->ccb_h.func_code == XPT_ATA_IO) { 1115 struct ata_res *res = &ccb->ataio.res; 1116 if ((et == SIIS_ERR_TFE) || 1117 (ccb->ataio.cmd.flags & CAM_ATAIO_NEEDRESULT)) { 1118 int offs = SIIS_P_LRAM_SLOT(slot->slot) + 8; 1119 1120 res->status = ATA_INB(ch->r_mem, offs + 2); 1121 res->error = ATA_INB(ch->r_mem, offs + 3); 1122 res->lba_low = ATA_INB(ch->r_mem, offs + 4); 1123 res->lba_mid = ATA_INB(ch->r_mem, offs + 5); 1124 res->lba_high = ATA_INB(ch->r_mem, offs + 6); 1125 res->device = ATA_INB(ch->r_mem, offs + 7); 1126 res->lba_low_exp = ATA_INB(ch->r_mem, offs + 8); 1127 res->lba_mid_exp = ATA_INB(ch->r_mem, offs + 9); 1128 res->lba_high_exp = ATA_INB(ch->r_mem, offs + 10); 1129 res->sector_count = ATA_INB(ch->r_mem, offs + 12); 1130 res->sector_count_exp = ATA_INB(ch->r_mem, offs + 13); 1131 } else 1132 bzero(res, sizeof(*res)); 1133 } 1134 if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) { 1135 bus_dmamap_sync(ch->dma.data_tag, slot->dma.data_map, 1136 (ccb->ccb_h.flags & CAM_DIR_IN) ? 1137 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1138 bus_dmamap_unload(ch->dma.data_tag, slot->dma.data_map); 1139 } 1140 /* Set proper result status. */ 1141 if (et != SIIS_ERR_NONE || ch->recovery) { 1142 ch->eslots |= (1 << slot->slot); 1143 ccb->ccb_h.status |= CAM_RELEASE_SIMQ; 1144 } 1145 /* In case of error, freeze device for proper recovery. */ 1146 if (et != SIIS_ERR_NONE && 1147 !(ccb->ccb_h.status & CAM_DEV_QFRZN)) { 1148 xpt_freeze_devq(ccb->ccb_h.path, 1); 1149 ccb->ccb_h.status |= CAM_DEV_QFRZN; 1150 } 1151 ccb->ccb_h.status &= ~CAM_STATUS_MASK; 1152 switch (et) { 1153 case SIIS_ERR_NONE: 1154 ccb->ccb_h.status |= CAM_REQ_CMP; 1155 if (ccb->ccb_h.func_code == XPT_SCSI_IO) 1156 ccb->csio.scsi_status = SCSI_STATUS_OK; 1157 break; 1158 case SIIS_ERR_INVALID: 1159 ch->fatalerr = 1; 1160 ccb->ccb_h.status |= CAM_REQ_INVALID; 1161 break; 1162 case SIIS_ERR_INNOCENT: 1163 ccb->ccb_h.status |= CAM_REQUEUE_REQ; 1164 break; 1165 case SIIS_ERR_TFE: 1166 case SIIS_ERR_NCQ: 1167 if (ccb->ccb_h.func_code == XPT_SCSI_IO) { 1168 ccb->ccb_h.status |= CAM_SCSI_STATUS_ERROR; 1169 ccb->csio.scsi_status = SCSI_STATUS_CHECK_COND; 1170 } else { 1171 ccb->ccb_h.status |= CAM_ATA_STATUS_ERROR; 1172 } 1173 break; 1174 case SIIS_ERR_SATA: 1175 ch->fatalerr = 1; 1176 ccb->ccb_h.status |= CAM_UNCOR_PARITY; 1177 break; 1178 case SIIS_ERR_TIMEOUT: 1179 ch->fatalerr = 1; 1180 ccb->ccb_h.status |= CAM_CMD_TIMEOUT; 1181 break; 1182 default: 1183 ccb->ccb_h.status |= CAM_REQ_CMP_ERR; 1184 } 1185 /* Free slot. */ 1186 ch->oslots &= ~(1 << slot->slot); 1187 ch->rslots &= ~(1 << slot->slot); 1188 ch->aslots &= ~(1 << slot->slot); 1189 if (et != SIIS_ERR_TIMEOUT) { 1190 if (ch->toslots == (1 << slot->slot)) 1191 xpt_release_simq(ch->sim, TRUE); 1192 ch->toslots &= ~(1 << slot->slot); 1193 } 1194 slot->state = SIIS_SLOT_EMPTY; 1195 slot->ccb = NULL; 1196 /* Update channel stats. */ 1197 ch->numrslots--; 1198 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 1199 (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) { 1200 ch->numtslots[ccb->ccb_h.target_id]--; 1201 } 1202 /* If it was our READ LOG command - process it. */ 1203 if (ch->readlog) { 1204 siis_process_read_log(dev, ccb); 1205 /* If it was NCQ command error, put result on hold. */ 1206 } else if (et == SIIS_ERR_NCQ) { 1207 ch->hold[slot->slot] = ccb; 1208 ch->numhslots++; 1209 } else 1210 xpt_done(ccb); 1211 /* Unfreeze frozen command. */ 1212 if (ch->frozen && !siis_check_collision(dev, ch->frozen)) { 1213 union ccb *fccb = ch->frozen; 1214 ch->frozen = NULL; 1215 siis_begin_transaction(dev, fccb); 1216 xpt_release_simq(ch->sim, TRUE); 1217 } 1218 /* If we have no other active commands, ... */ 1219 if (ch->rslots == 0) { 1220 /* if there were timeouts or fatal error - reset port. */ 1221 if (ch->toslots != 0 || ch->fatalerr) { 1222 siis_reset(dev); 1223 } else { 1224 /* if we have slots in error, we can reinit port. */ 1225 if (ch->eslots != 0) 1226 siis_portinit(dev); 1227 /* if there commands on hold, we can do READ LOG. */ 1228 if (!ch->readlog && ch->numhslots) 1229 siis_issue_read_log(dev); 1230 } 1231 /* If all the reset of commands are in timeout - abort them. */ 1232 } else if ((ch->rslots & ~ch->toslots) == 0) 1233 siis_process_timeout(dev); 1234} 1235 1236static void 1237siis_issue_read_log(device_t dev) 1238{ 1239 struct siis_channel *ch = device_get_softc(dev); 1240 union ccb *ccb; 1241 struct ccb_ataio *ataio; 1242 int i; 1243 1244 /* Find some holden command. */ 1245 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1246 if (ch->hold[i]) 1247 break; 1248 } 1249 if (i == SIIS_MAX_SLOTS) 1250 return; 1251 ch->readlog = 1; 1252 ccb = xpt_alloc_ccb_nowait(); 1253 if (ccb == NULL) { 1254 device_printf(dev, "Unable allocate READ LOG command"); 1255 return; /* XXX */ 1256 } 1257 ccb->ccb_h = ch->hold[i]->ccb_h; /* Reuse old header. */ 1258 ccb->ccb_h.func_code = XPT_ATA_IO; 1259 ccb->ccb_h.flags = CAM_DIR_IN; 1260 ccb->ccb_h.timeout = 1000; /* 1s should be enough. */ 1261 ataio = &ccb->ataio; 1262 ataio->data_ptr = malloc(512, M_SIIS, M_NOWAIT); 1263 if (ataio->data_ptr == NULL) { 1264 device_printf(dev, "Unable allocate memory for READ LOG command"); 1265 return; /* XXX */ 1266 } 1267 ataio->dxfer_len = 512; 1268 bzero(&ataio->cmd, sizeof(ataio->cmd)); 1269 ataio->cmd.flags = CAM_ATAIO_48BIT; 1270 ataio->cmd.command = 0x2F; /* READ LOG EXT */ 1271 ataio->cmd.sector_count = 1; 1272 ataio->cmd.sector_count_exp = 0; 1273 ataio->cmd.lba_low = 0x10; 1274 ataio->cmd.lba_mid = 0; 1275 ataio->cmd.lba_mid_exp = 0; 1276 siis_begin_transaction(dev, ccb); 1277} 1278 1279static void 1280siis_process_read_log(device_t dev, union ccb *ccb) 1281{ 1282 struct siis_channel *ch = device_get_softc(dev); 1283 uint8_t *data; 1284 struct ata_res *res; 1285 int i; 1286 1287 ch->readlog = 0; 1288 data = ccb->ataio.data_ptr; 1289 if ((ccb->ccb_h.status & CAM_STATUS_MASK) == CAM_REQ_CMP && 1290 (data[0] & 0x80) == 0) { 1291 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1292 if (!ch->hold[i]) 1293 continue; 1294 if (ch->hold[i]->ccb_h.target_id != ccb->ccb_h.target_id) 1295 continue; 1296 if ((data[0] & 0x1F) == i) { 1297 res = &ch->hold[i]->ataio.res; 1298 res->status = data[2]; 1299 res->error = data[3]; 1300 res->lba_low = data[4]; 1301 res->lba_mid = data[5]; 1302 res->lba_high = data[6]; 1303 res->device = data[7]; 1304 res->lba_low_exp = data[8]; 1305 res->lba_mid_exp = data[9]; 1306 res->lba_high_exp = data[10]; 1307 res->sector_count = data[12]; 1308 res->sector_count_exp = data[13]; 1309 } else { 1310 ch->hold[i]->ccb_h.status &= ~CAM_STATUS_MASK; 1311 ch->hold[i]->ccb_h.status |= CAM_REQUEUE_REQ; 1312 } 1313 xpt_done(ch->hold[i]); 1314 ch->hold[i] = NULL; 1315 ch->numhslots--; 1316 } 1317 } else { 1318 if ((ccb->ccb_h.status & CAM_STATUS_MASK) != CAM_REQ_CMP) 1319 device_printf(dev, "Error while READ LOG EXT\n"); 1320 else if ((data[0] & 0x80) == 0) { 1321 device_printf(dev, "Non-queued command error in READ LOG EXT\n"); 1322 } 1323 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1324 if (!ch->hold[i]) 1325 continue; 1326 if (ch->hold[i]->ccb_h.target_id != ccb->ccb_h.target_id) 1327 continue; 1328 xpt_done(ch->hold[i]); 1329 ch->hold[i] = NULL; 1330 ch->numhslots--; 1331 } 1332 } 1333 free(ccb->ataio.data_ptr, M_SIIS); 1334 xpt_free_ccb(ccb); 1335} 1336 1337static void 1338siis_portinit(device_t dev) 1339{ 1340 struct siis_channel *ch = device_get_softc(dev); 1341 int i; 1342 1343 ch->eslots = 0; 1344 ch->recovery = 0; 1345 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_RESUME); 1346 for (i = 0; i < 16; i++) { 1347 ATA_OUTL(ch->r_mem, SIIS_P_PMPSTS(i), 0), 1348 ATA_OUTL(ch->r_mem, SIIS_P_PMPQACT(i), 0); 1349 } 1350 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_PORT_INIT); 1351 siis_wait_ready(dev, 1000); 1352} 1353 1354static int 1355siis_devreset(device_t dev) 1356{ 1357 struct siis_channel *ch = device_get_softc(dev); 1358 int timeout = 0; 1359 uint32_t val; 1360 1361 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_DEV_RESET); 1362 while (((val = ATA_INL(ch->r_mem, SIIS_P_STS)) & 1363 SIIS_P_CTL_DEV_RESET) != 0) { 1364 DELAY(1000); 1365 if (timeout++ > 100) { 1366 device_printf(dev, "device reset stuck (timeout %dms) " 1367 "status = %08x\n", timeout, val); 1368 return (EBUSY); 1369 } 1370 } 1371 if (bootverbose) 1372 device_printf(dev, "device reset time=%dms\n", timeout); 1373 return (0); 1374} 1375 1376static int 1377siis_wait_ready(device_t dev, int t) 1378{ 1379 struct siis_channel *ch = device_get_softc(dev); 1380 int timeout = 0; 1381 uint32_t val; 1382 1383 while (((val = ATA_INL(ch->r_mem, SIIS_P_STS)) & 1384 SIIS_P_CTL_READY) == 0) { 1385 DELAY(1000); 1386 if (timeout++ > t) { 1387 device_printf(dev, "port is not ready (timeout %dms) " 1388 "status = %08x\n", t, val); 1389 return (EBUSY); 1390 } 1391 } 1392 if (bootverbose) 1393 device_printf(dev, "ready wait time=%dms\n", timeout); 1394 return (0); 1395} 1396 1397static void 1398siis_reset(device_t dev) 1399{ 1400 struct siis_channel *ch = device_get_softc(dev); 1401 int i, retry = 0, sata_rev; 1402 uint32_t val; 1403 1404 if (bootverbose) 1405 device_printf(dev, "SIIS reset...\n"); 1406 if (!ch->readlog && !ch->recovery) 1407 xpt_freeze_simq(ch->sim, ch->numrslots); 1408 /* Requeue frozen command. */ 1409 if (ch->frozen) { 1410 union ccb *fccb = ch->frozen; 1411 ch->frozen = NULL; 1412 fccb->ccb_h.status &= ~CAM_STATUS_MASK; 1413 fccb->ccb_h.status |= CAM_REQUEUE_REQ | CAM_RELEASE_SIMQ; 1414 if (!(fccb->ccb_h.status & CAM_DEV_QFRZN)) { 1415 xpt_freeze_devq(fccb->ccb_h.path, 1); 1416 fccb->ccb_h.status |= CAM_DEV_QFRZN; 1417 } 1418 xpt_done(fccb); 1419 } 1420 /* Requeue all running commands. */ 1421 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1422 /* Do we have a running request on slot? */ 1423 if (ch->slot[i].state < SIIS_SLOT_RUNNING) 1424 continue; 1425 /* XXX; Commands in loading state. */ 1426 siis_end_transaction(&ch->slot[i], SIIS_ERR_INNOCENT); 1427 } 1428 /* Finish all holden commands as-is. */ 1429 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1430 if (!ch->hold[i]) 1431 continue; 1432 xpt_done(ch->hold[i]); 1433 ch->hold[i] = NULL; 1434 ch->numhslots--; 1435 } 1436 if (ch->toslots != 0) 1437 xpt_release_simq(ch->sim, TRUE); 1438 ch->eslots = 0; 1439 ch->recovery = 0; 1440 ch->toslots = 0; 1441 ch->fatalerr = 0; 1442 /* Disable port interrupts */ 1443 ATA_OUTL(ch->r_mem, SIIS_P_IECLR, 0x0000FFFF); 1444 /* Set speed limit. */ 1445 sata_rev = ch->user[ch->pm_present ? 15 : 0].revision; 1446 if (sata_rev == 1) 1447 val = ATA_SC_SPD_SPEED_GEN1; 1448 else if (sata_rev == 2) 1449 val = ATA_SC_SPD_SPEED_GEN2; 1450 else if (sata_rev == 3) 1451 val = ATA_SC_SPD_SPEED_GEN3; 1452 else 1453 val = 0; 1454 ATA_OUTL(ch->r_mem, SIIS_P_SCTL, 1455 ATA_SC_DET_IDLE | val | ((ch->pm_level > 0) ? 0 : 1456 (ATA_SC_IPM_DIS_PARTIAL | ATA_SC_IPM_DIS_SLUMBER))); 1457retry: 1458 siis_devreset(dev); 1459 /* Reset and reconnect PHY, */ 1460 if (!siis_sata_connect(ch)) { 1461 ch->devices = 0; 1462 /* Enable port interrupts */ 1463 ATA_OUTL(ch->r_mem, SIIS_P_IESET, SIIS_P_IX_ENABLED); 1464 if (bootverbose) 1465 device_printf(dev, 1466 "SIIS reset done: phy reset found no device\n"); 1467 /* Tell the XPT about the event */ 1468 xpt_async(AC_BUS_RESET, ch->path, NULL); 1469 return; 1470 } 1471 /* Wait for clearing busy status. */ 1472 if (siis_wait_ready(dev, 10000)) { 1473 device_printf(dev, "device ready timeout\n"); 1474 if (!retry) { 1475 device_printf(dev, "trying full port reset ...\n"); 1476 /* Get port to the reset state. */ 1477 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_PORT_RESET); 1478 DELAY(10000); 1479 /* Get port out of reset state. */ 1480 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_PORT_RESET); 1481 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_32BIT); 1482 if (ch->pm_present) 1483 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_PME); 1484 else 1485 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_PME); 1486 siis_wait_ready(dev, 5000); 1487 retry = 1; 1488 goto retry; 1489 } 1490 } 1491 ch->devices = 1; 1492 /* Enable port interrupts */ 1493 ATA_OUTL(ch->r_mem, SIIS_P_IS, 0xFFFFFFFF); 1494 ATA_OUTL(ch->r_mem, SIIS_P_IESET, SIIS_P_IX_ENABLED); 1495 if (bootverbose) 1496 device_printf(dev, "SIIS reset done: devices=%08x\n", ch->devices); 1497 /* Tell the XPT about the event */ 1498 xpt_async(AC_BUS_RESET, ch->path, NULL); 1499} 1500 1501static int 1502siis_setup_fis(device_t dev, struct siis_cmd *ctp, union ccb *ccb, int tag) 1503{ 1504 struct siis_channel *ch = device_get_softc(dev); 1505 u_int8_t *fis = &ctp->fis[0]; 1506 1507 bzero(fis, 24); 1508 fis[0] = 0x27; /* host to device */ 1509 fis[1] = (ccb->ccb_h.target_id & 0x0f); 1510 if (ccb->ccb_h.func_code == XPT_SCSI_IO) { 1511 fis[1] |= 0x80; 1512 fis[2] = ATA_PACKET_CMD; 1513 if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE && 1514 ch->curr[ccb->ccb_h.target_id].mode >= ATA_DMA) 1515 fis[3] = ATA_F_DMA; 1516 else { 1517 fis[5] = ccb->csio.dxfer_len; 1518 fis[6] = ccb->csio.dxfer_len >> 8; 1519 } 1520 fis[7] = ATA_D_LBA; 1521 fis[15] = ATA_A_4BIT; 1522 bzero(ctp->u.atapi.ccb, 16); 1523 bcopy((ccb->ccb_h.flags & CAM_CDB_POINTER) ? 1524 ccb->csio.cdb_io.cdb_ptr : ccb->csio.cdb_io.cdb_bytes, 1525 ctp->u.atapi.ccb, ccb->csio.cdb_len); 1526 } else if ((ccb->ataio.cmd.flags & CAM_ATAIO_CONTROL) == 0) { 1527 fis[1] |= 0x80; 1528 fis[2] = ccb->ataio.cmd.command; 1529 fis[3] = ccb->ataio.cmd.features; 1530 fis[4] = ccb->ataio.cmd.lba_low; 1531 fis[5] = ccb->ataio.cmd.lba_mid; 1532 fis[6] = ccb->ataio.cmd.lba_high; 1533 fis[7] = ccb->ataio.cmd.device; 1534 fis[8] = ccb->ataio.cmd.lba_low_exp; 1535 fis[9] = ccb->ataio.cmd.lba_mid_exp; 1536 fis[10] = ccb->ataio.cmd.lba_high_exp; 1537 fis[11] = ccb->ataio.cmd.features_exp; 1538 if (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA) { 1539 fis[12] = tag << 3; 1540 fis[13] = 0; 1541 } else { 1542 fis[12] = ccb->ataio.cmd.sector_count; 1543 fis[13] = ccb->ataio.cmd.sector_count_exp; 1544 } 1545 fis[15] = ATA_A_4BIT; 1546 } else { 1547 /* Soft reset. */ 1548 } 1549 return (20); 1550} 1551 1552static int 1553siis_sata_connect(struct siis_channel *ch) 1554{ 1555 u_int32_t status; 1556 int timeout; 1557 1558 /* Wait up to 100ms for "connect well" */ 1559 for (timeout = 0; timeout < 100 ; timeout++) { 1560 status = ATA_INL(ch->r_mem, SIIS_P_SSTS); 1561 if (((status & ATA_SS_DET_MASK) == ATA_SS_DET_PHY_ONLINE) && 1562 ((status & ATA_SS_SPD_MASK) != ATA_SS_SPD_NO_SPEED) && 1563 ((status & ATA_SS_IPM_MASK) == ATA_SS_IPM_ACTIVE)) 1564 break; 1565 DELAY(1000); 1566 } 1567 if (timeout >= 100) { 1568 if (bootverbose) { 1569 device_printf(ch->dev, "SATA connect timeout status=%08x\n", 1570 status); 1571 } 1572 return (0); 1573 } 1574 if (bootverbose) { 1575 device_printf(ch->dev, "SATA connect time=%dms status=%08x\n", 1576 timeout, status); 1577 } 1578 /* Clear SATA error register */ 1579 ATA_OUTL(ch->r_mem, SIIS_P_SERR, 0xffffffff); 1580 return (1); 1581} 1582 1583static void 1584siisaction(struct cam_sim *sim, union ccb *ccb) 1585{ 1586 device_t dev; 1587 struct siis_channel *ch; 1588 1589 CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_TRACE, ("siisaction func_code=%x\n", 1590 ccb->ccb_h.func_code)); 1591 1592 ch = (struct siis_channel *)cam_sim_softc(sim); 1593 dev = ch->dev; 1594 mtx_assert(&ch->mtx, MA_OWNED); 1595 switch (ccb->ccb_h.func_code) { 1596 /* Common cases first */ 1597 case XPT_ATA_IO: /* Execute the requested I/O operation */ 1598 case XPT_SCSI_IO: 1599 if (ch->devices == 0) { 1600 ccb->ccb_h.status = CAM_SEL_TIMEOUT; 1601 xpt_done(ccb); 1602 break; 1603 } 1604 /* Check for command collision. */ 1605 if (siis_check_collision(dev, ccb)) { 1606 /* Freeze command. */ 1607 ch->frozen = ccb; 1608 /* We have only one frozen slot, so freeze simq also. */ 1609 xpt_freeze_simq(ch->sim, 1); 1610 return; 1611 } 1612 siis_begin_transaction(dev, ccb); 1613 break; 1614 case XPT_EN_LUN: /* Enable LUN as a target */ 1615 case XPT_TARGET_IO: /* Execute target I/O request */ 1616 case XPT_ACCEPT_TARGET_IO: /* Accept Host Target Mode CDB */ 1617 case XPT_CONT_TARGET_IO: /* Continue Host Target I/O Connection*/ 1618 case XPT_ABORT: /* Abort the specified CCB */ 1619 /* XXX Implement */ 1620 ccb->ccb_h.status = CAM_REQ_INVALID; 1621 xpt_done(ccb); 1622 break; 1623 case XPT_SET_TRAN_SETTINGS: 1624 { 1625 struct ccb_trans_settings *cts = &ccb->cts; 1626 struct siis_device *d; 1627 1628 if (cts->type == CTS_TYPE_CURRENT_SETTINGS) 1629 d = &ch->curr[ccb->ccb_h.target_id]; 1630 else 1631 d = &ch->user[ccb->ccb_h.target_id]; 1632 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_REVISION) 1633 d->revision = cts->xport_specific.sata.revision; 1634 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_MODE) 1635 d->mode = cts->xport_specific.sata.mode; 1636 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_BYTECOUNT) 1637 d->bytecount = min(8192, cts->xport_specific.sata.bytecount); 1638 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_TAGS) 1639 d->tags = min(SIIS_MAX_SLOTS, cts->xport_specific.sata.tags); 1640 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_PM) { 1641 ch->pm_present = cts->xport_specific.sata.pm_present; 1642 if (ch->pm_present) 1643 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_PME); 1644 else 1645 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_PME); 1646 } 1647 ccb->ccb_h.status = CAM_REQ_CMP; 1648 xpt_done(ccb); 1649 break; 1650 } 1651 case XPT_GET_TRAN_SETTINGS: 1652 /* Get default/user set transfer settings for the target */ 1653 { 1654 struct ccb_trans_settings *cts = &ccb->cts; 1655 struct siis_device *d; 1656 uint32_t status; 1657 1658 if (cts->type == CTS_TYPE_CURRENT_SETTINGS) 1659 d = &ch->curr[ccb->ccb_h.target_id]; 1660 else 1661 d = &ch->user[ccb->ccb_h.target_id]; 1662 cts->protocol = PROTO_ATA; 1663 cts->protocol_version = PROTO_VERSION_UNSPECIFIED; 1664 cts->transport = XPORT_SATA; 1665 cts->transport_version = XPORT_VERSION_UNSPECIFIED; 1666 cts->proto_specific.valid = 0; 1667 cts->xport_specific.sata.valid = 0; 1668 if (cts->type == CTS_TYPE_CURRENT_SETTINGS && 1669 (ccb->ccb_h.target_id == 15 || 1670 (ccb->ccb_h.target_id == 0 && !ch->pm_present))) { 1671 status = ATA_INL(ch->r_mem, SIIS_P_SSTS) & ATA_SS_SPD_MASK; 1672 if (status & 0x0f0) { 1673 cts->xport_specific.sata.revision = 1674 (status & 0x0f0) >> 4; 1675 cts->xport_specific.sata.valid |= 1676 CTS_SATA_VALID_REVISION; 1677 } 1678 } else { 1679 cts->xport_specific.sata.revision = d->revision; 1680 cts->xport_specific.sata.valid |= CTS_SATA_VALID_REVISION; 1681 } 1682 cts->xport_specific.sata.mode = d->mode; 1683 cts->xport_specific.sata.valid |= CTS_SATA_VALID_MODE; 1684 cts->xport_specific.sata.bytecount = d->bytecount; 1685 cts->xport_specific.sata.valid |= CTS_SATA_VALID_BYTECOUNT; 1686 cts->xport_specific.sata.pm_present = ch->pm_present; 1687 cts->xport_specific.sata.valid |= CTS_SATA_VALID_PM; 1688 cts->xport_specific.sata.tags = d->tags; 1689 cts->xport_specific.sata.valid |= CTS_SATA_VALID_TAGS; 1690 ccb->ccb_h.status = CAM_REQ_CMP; 1691 xpt_done(ccb); 1692 break; 1693 } 1694#if 0 1695 case XPT_CALC_GEOMETRY: 1696 { 1697 struct ccb_calc_geometry *ccg; 1698 uint32_t size_mb; 1699 uint32_t secs_per_cylinder; 1700 1701 ccg = &ccb->ccg; 1702 size_mb = ccg->volume_size 1703 / ((1024L * 1024L) / ccg->block_size); 1704 if (size_mb >= 1024 && (aha->extended_trans != 0)) { 1705 if (size_mb >= 2048) { 1706 ccg->heads = 255; 1707 ccg->secs_per_track = 63; 1708 } else { 1709 ccg->heads = 128; 1710 ccg->secs_per_track = 32; 1711 } 1712 } else { 1713 ccg->heads = 64; 1714 ccg->secs_per_track = 32; 1715 } 1716 secs_per_cylinder = ccg->heads * ccg->secs_per_track; 1717 ccg->cylinders = ccg->volume_size / secs_per_cylinder; 1718 ccb->ccb_h.status = CAM_REQ_CMP; 1719 xpt_done(ccb); 1720 break; 1721 } 1722#endif 1723 case XPT_RESET_BUS: /* Reset the specified SCSI bus */ 1724 case XPT_RESET_DEV: /* Bus Device Reset the specified SCSI device */ 1725 siis_reset(dev); 1726 ccb->ccb_h.status = CAM_REQ_CMP; 1727 xpt_done(ccb); 1728 break; 1729 case XPT_TERM_IO: /* Terminate the I/O process */ 1730 /* XXX Implement */ 1731 ccb->ccb_h.status = CAM_REQ_INVALID; 1732 xpt_done(ccb); 1733 break; 1734 case XPT_PATH_INQ: /* Path routing inquiry */ 1735 { 1736 struct ccb_pathinq *cpi = &ccb->cpi; 1737 1738 cpi->version_num = 1; /* XXX??? */ 1739 cpi->hba_inquiry = PI_SDTR_ABLE | PI_TAG_ABLE; 1740 cpi->hba_inquiry |= PI_SATAPM; 1741 cpi->target_sprt = 0; 1742 cpi->hba_misc = PIM_SEQSCAN; 1743 cpi->hba_eng_cnt = 0; 1744 cpi->max_target = 15; 1745 cpi->max_lun = 0; 1746 cpi->initiator_id = 0; 1747 cpi->bus_id = cam_sim_bus(sim); 1748 cpi->base_transfer_speed = 150000; 1749 strncpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN); 1750 strncpy(cpi->hba_vid, "SIIS", HBA_IDLEN); 1751 strncpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN); 1752 cpi->unit_number = cam_sim_unit(sim); 1753 cpi->transport = XPORT_SATA; 1754 cpi->transport_version = XPORT_VERSION_UNSPECIFIED; 1755 cpi->protocol = PROTO_ATA; 1756 cpi->protocol_version = PROTO_VERSION_UNSPECIFIED; 1757 cpi->ccb_h.status = CAM_REQ_CMP; 1758 cpi->maxio = MAXPHYS; 1759 xpt_done(ccb); 1760 break; 1761 } 1762 default: 1763 ccb->ccb_h.status = CAM_REQ_INVALID; 1764 xpt_done(ccb); 1765 break; 1766 } 1767} 1768 1769static void 1770siispoll(struct cam_sim *sim) 1771{ 1772 struct siis_channel *ch = (struct siis_channel *)cam_sim_softc(sim); 1773 1774 siis_ch_intr(ch->dev); 1775} 1776