sibavar.h revision 203319 
1/*-
2 * Copyright (c) 2007 Bruce M. Simpson.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 *
26 * $FreeBSD: head/sys/dev/siba/sibavar.h 203319 2010-01-31 21:18:22Z weongyo $
27 */
28
29#ifndef _SIBA_SIBAVAR_H_
30#define _SIBA_SIBAVAR_H_
31
32#include <sys/rman.h>
33
34struct siba_softc;
35struct siba_dev_softc;
36
37enum siba_device_ivars {
38	SIBA_IVAR_VENDOR,
39	SIBA_IVAR_DEVICE,
40	SIBA_IVAR_REVID,
41	SIBA_IVAR_CORE_INDEX
42};
43
44#define	SIBA_ACCESSOR(var, ivar, type)				\
45	__BUS_ACCESSOR(siba, var, SIBA, ivar, type)
46
47SIBA_ACCESSOR(vendor,		VENDOR,		uint16_t)
48SIBA_ACCESSOR(device,		DEVICE,		uint16_t)
49SIBA_ACCESSOR(revid,		REVID,		uint8_t)
50SIBA_ACCESSOR(core_index,	CORE_INDEX,	uint8_t)
51
52#undef SIBA_ACCESSOR
53
54/* XXX just for SPROM1? */
55enum {
56	SIBA_CCODE_WORLD,
57	SIBA_CCODE_THAILAND,
58	SIBA_CCODE_ISRAEL,
59	SIBA_CCODE_JORDAN,
60	SIBA_CCODE_CHINA,
61	SIBA_CCODE_JAPAN,
62	SIBA_CCODE_USA_CANADA_ANZ,
63	SIBA_CCODE_EUROPE,
64	SIBA_CCODE_USA_LOW,
65	SIBA_CCODE_JAPAN_HIGH,
66	SIBA_CCODE_ALL,
67	SIBA_CCODE_NONE,
68};
69
70#define siba_mips_read_2(sc, core, reg)				\
71	bus_space_read_2((sc)->siba_mem_bt, (sc)->siba_mem_bh,	\
72			 (core * SIBA_CORE_LEN) + (reg))
73
74#define siba_mips_read_4(sc, core, reg)				\
75	bus_space_read_4((sc)->siba_mem_bt, (sc)->siba_mem_bh,	\
76			 (core * SIBA_CORE_LEN) + (reg))
77
78#define siba_mips_write_2(sc, core, reg, val)			\
79	bus_space_write_2((sc)->siba_mem_bt, (sc)->siba_mem_bh,	\
80			 (core * SIBA_CORE_LEN) + (reg), (val))
81
82#define siba_mips_write_4(sc, core, reg, val)			\
83	bus_space_write_4((sc)->siba_mem_bt, (sc)->siba_mem_bh,	\
84			 (core * SIBA_CORE_LEN) + (reg), (val))
85
86#define	SIBA_READ_4(siba, reg)		\
87	bus_space_read_4((siba)->siba_mem_bt, (siba)->siba_mem_bh, (reg))
88#define	SIBA_READ_2(siba, reg)		\
89	bus_space_read_2((siba)->siba_mem_bt, (siba)->siba_mem_bh, (reg))
90#define	SIBA_READ_MULTI_1(siba, reg, addr, count)			\
91	bus_space_read_multi_1((siba)->siba_mem_bt, (siba)->siba_mem_bh,\
92	    (reg), (addr), (count))
93#define	SIBA_READ_MULTI_2(siba, reg, addr, count)			\
94	bus_space_read_multi_2((siba)->siba_mem_bt, (siba)->siba_mem_bh,\
95	    (reg), (addr), (count))
96#define	SIBA_READ_MULTI_4(siba, reg, addr, count)			\
97	bus_space_read_multi_4((siba)->siba_mem_bt, (siba)->siba_mem_bh,\
98	    (reg), (addr), (count))
99
100#define	SIBA_WRITE_4(siba, reg, val)	\
101	bus_space_write_4((siba)->siba_mem_bt, (siba)->siba_mem_bh,	\
102	    (reg), (val))
103#define	SIBA_WRITE_2(siba, reg, val)	\
104	bus_space_write_2((siba)->siba_mem_bt, (siba)->siba_mem_bh,	\
105	    (reg), (val))
106#define	SIBA_WRITE_MULTI_1(siba, reg, addr, count)			\
107	bus_space_write_multi_1((siba)->siba_mem_bt, (siba)->siba_mem_bh,\
108	    (reg), (addr), (count))
109#define	SIBA_WRITE_MULTI_2(siba, reg, addr, count)			\
110	bus_space_write_multi_2((siba)->siba_mem_bt, (siba)->siba_mem_bh,\
111	    (reg), (addr), (count))
112#define	SIBA_WRITE_MULTI_4(siba, reg, addr, count)			\
113	bus_space_write_multi_4((siba)->siba_mem_bt, (siba)->siba_mem_bh,\
114	    (reg), (addr), (count))
115
116#define	SIBA_BARRIER(siba, flags)					\
117	bus_space_barrier((siba)->siba_mem_bt, (siba)->siba_mem_bh, (0),\
118	    (0), (flags))
119
120#define	SIBA_SETBITS_4(siba, reg, bits)	\
121	SIBA_WRITE_4((siba), (reg), SIBA_READ_4((siba), (reg)) | (bits))
122#define	SIBA_SETBITS_2(siba, reg, bits)	\
123	SIBA_WRITE_2((siba), (reg), SIBA_READ_2((siba), (reg)) | (bits))
124
125#define	SIBA_FILT_SETBITS_4(siba, reg, filt, bits) \
126	SIBA_WRITE_4((siba), (reg), (SIBA_READ_4((siba),	\
127	    (reg)) & (filt)) | (bits))
128#define	SIBA_FILT_SETBITS_2(siba, reg, filt, bits)	\
129	SIBA_WRITE_2((siba), (reg), (SIBA_READ_2((siba),	\
130	    (reg)) & (filt)) | (bits))
131
132#define	SIBA_CLRBITS_4(siba, reg, bits)	\
133	SIBA_WRITE_4((siba), (reg), SIBA_READ_4((siba), (reg)) & ~(bits))
134#define	SIBA_CLRBITS_2(siba, reg, bits)	\
135	SIBA_WRITE_2((siba), (reg), SIBA_READ_2((siba), (reg)) & ~(bits))
136
137#define	SIBA_CC_READ32(scc, offset) \
138	siba_read_4((scc)->scc_dev, offset)
139#define	SIBA_CC_WRITE32(scc, offset, val) \
140	siba_write_4((scc)->scc_dev, offset, val)
141#define	SIBA_CC_MASK32(scc, offset, mask) \
142	SIBA_CC_WRITE32(scc, offset, SIBA_CC_READ32(scc, offset) & (mask))
143#define	SIBA_CC_SET32(scc, offset, set) \
144	SIBA_CC_WRITE32(scc, offset, SIBA_CC_READ32(scc, offset) | (set))
145#define	SIBA_CC_MASKSET32(scc, offset, mask, set)	\
146	SIBA_CC_WRITE32(scc, offset,			\
147	    (SIBA_CC_READ32(scc, offset) & (mask)) | (set))
148
149enum siba_type {
150	SIBA_TYPE_SSB,
151	SIBA_TYPE_PCI,
152	SIBA_TYPE_PCMCIA,
153};
154
155enum siba_clock {
156	SIBA_CLOCK_DYNAMIC,
157	SIBA_CLOCK_SLOW,
158	SIBA_CLOCK_FAST,
159};
160
161enum siba_clksrc {
162	SIBA_CC_CLKSRC_PCI,
163	SIBA_CC_CLKSRC_CRYSTAL,
164	SIBA_CC_CLKSRC_LOWPW,
165};
166
167struct siba_cc_pmu0_plltab {
168	uint16_t		freq;	/* in kHz.*/
169	uint8_t			xf;	/* crystal frequency */
170	uint8_t			wb_int;
171	uint32_t		wb_frac;
172};
173
174struct siba_cc_pmu1_plltab {
175	uint16_t		freq;
176	uint8_t			xf;
177	uint8_t			p1div;
178	uint8_t			p2div;
179	uint8_t			ndiv_int;
180	uint32_t		ndiv_frac;
181};
182
183struct siba_cc_pmu_res_updown {
184	uint8_t			res;
185	uint16_t		updown;
186};
187
188#define	SIBA_CC_PMU_DEP_SET	1
189#define	SIBA_CC_PMU_DEP_ADD	2
190#define	SIBA_CC_PMU_DEP_REMOVE	3
191
192struct siba_cc_pmu_res_depend {
193	uint8_t			res;
194	uint8_t			task;
195	uint32_t		depend;
196};
197
198struct siba_sprom {
199	uint8_t			rev;		/* revision */
200	uint8_t			mac_80211bg[6];	/* address for 802.11b/g */
201	uint8_t			mac_eth[6];	/* address for Ethernet */
202	uint8_t			mac_80211a[6];	/* address for 802.11a */
203	uint8_t			mii_eth0;	/* MII address for eth0 */
204	uint8_t			mii_eth1;	/* MII address for eth1 */
205	uint8_t			mdio_eth0;	/* MDIO for eth0 */
206	uint8_t			mdio_eth1;	/* MDIO for eth1 */
207	uint8_t			brev;		/* board revision */
208	uint8_t			ccode;		/* Country Code */
209	uint8_t			ant_a;		/* A-PHY antenna */
210	uint8_t			ant_bg;		/* B/G-PHY antenna */
211	uint16_t		pa0b0;
212	uint16_t		pa0b1;
213	uint16_t		pa0b2;
214	uint16_t		pa1b0;
215	uint16_t		pa1b1;
216	uint16_t		pa1b2;
217	uint8_t			gpio0;
218	uint8_t			gpio1;
219	uint8_t			gpio2;
220	uint8_t			gpio3;
221	uint16_t		maxpwr_a;	/* A-PHY Max Power */
222	uint16_t		maxpwr_bg;	/* BG-PHY Max Power */
223	uint8_t			tssi_a;		/* Idle TSSI */
224	uint8_t			tssi_bg;	/* Idle TSSI */
225	uint16_t		bf_lo;		/* boardflags */
226	uint16_t		bf_hi;		/* boardflags */
227	struct {
228		struct {
229			int8_t a0, a1, a2, a3;
230		} ghz24;
231		struct {
232			int8_t a0, a1, a2, a3;
233		} ghz5;
234	} again;	/* antenna gain */
235};
236
237struct siba_cc_pmu {
238	uint8_t				rev;	/* PMU rev */
239	uint32_t			freq;	/* crystal freq in kHz */
240};
241
242struct siba_cc {
243	struct siba_dev_softc		*scc_dev;
244	uint32_t			scc_caps;
245	struct siba_cc_pmu		scc_pmu;
246	uint16_t			scc_powerup_delay;
247};
248
249struct siba_pci {
250	struct siba_dev_softc		*spc_dev;
251	uint8_t				spc_inited;
252	uint8_t				spc_hostmode;
253};
254
255struct siba_bus_ops {
256	uint16_t		(*read_2)(struct siba_dev_softc *,
257				    uint16_t);
258	uint32_t		(*read_4)(struct siba_dev_softc *,
259				    uint16_t);
260	void			(*write_2)(struct siba_dev_softc *,
261				    uint16_t, uint16_t);
262	void			(*write_4)(struct siba_dev_softc *,
263				    uint16_t, uint32_t);
264	void			(*read_multi_1)(struct siba_dev_softc *,
265				    void *, size_t, uint16_t);
266	void			(*read_multi_2)(struct siba_dev_softc *,
267				    void *, size_t, uint16_t);
268	void			(*read_multi_4)(struct siba_dev_softc *,
269				    void *, size_t, uint16_t);
270	void			(*write_multi_1)(struct siba_dev_softc *,
271				    const void *, size_t, uint16_t);
272	void			(*write_multi_2)(struct siba_dev_softc *,
273				    const void *, size_t, uint16_t);
274	void			(*write_multi_4)(struct siba_dev_softc *,
275				    const void *, size_t, uint16_t);
276};
277
278struct siba_dev_softc {
279	struct siba_softc		*sd_bus;
280	struct siba_devid		sd_id;
281	const struct siba_bus_ops	*sd_ops;
282
283	uint8_t				sd_coreidx;
284};
285
286struct siba_devinfo {
287	struct resource_list		 sdi_rl;
288	/*devhandle_t			 sdi_devhandle; XXX*/
289	/*struct rman sdi_intr_rman;*/
290
291	/* Accessors are needed for ivars below. */
292	uint16_t			 sdi_vid;
293	uint16_t			 sdi_devid;
294	uint8_t				 sdi_rev;
295	uint8_t				 sdi_idx;	/* core index on bus */
296	uint8_t				 sdi_irq;	/* TODO */
297};
298
299struct siba_softc {
300	/*
301	 * common variables which used for siba(4) bus and siba_bwn bridge.
302	 */
303	device_t			siba_dev;	/* Device ID */
304	struct resource			*siba_mem_res;
305	bus_space_tag_t			siba_mem_bt;
306	bus_space_handle_t		siba_mem_bh;
307	bus_addr_t			siba_maddr;
308	bus_size_t			siba_msize;
309	uint8_t				siba_ncores;
310
311	/*
312	 * the following variables are only used for siba_bwn bridge.
313	 */
314
315	enum siba_type			siba_type;
316	int				siba_invalid;
317
318	struct siba_dev_softc		*siba_curdev;	/* only for PCI */
319	struct siba_dev_softc		siba_devs[SIBA_MAX_CORES];
320	int				siba_ndevs;
321
322	uint16_t			siba_pci_vid;
323	uint16_t			siba_pci_did;
324	uint16_t			siba_pci_subvid;
325	uint16_t			siba_pci_subdid;
326	int				siba_mem_rid;
327
328	uint16_t			siba_chipid;	/* for CORE 0 */
329	uint16_t			siba_chiprev;
330	uint8_t				siba_chippkg;
331
332	struct siba_cc			siba_cc;		/* ChipCommon */
333	struct siba_pci			siba_pci;	/* PCI-core */
334	const struct siba_bus_ops	*siba_ops;
335
336	/* board informations */
337	uint16_t			siba_board_vendor;
338	uint16_t			siba_board_type;
339	uint16_t			siba_board_rev;
340	struct siba_sprom		siba_sprom;	/* SPROM */
341	uint16_t			siba_spromsize;	/* in word size */
342};
343
344void		siba_powerup(struct siba_softc *, int);
345uint16_t	siba_read_2(struct siba_dev_softc *, uint16_t);
346void		siba_write_2(struct siba_dev_softc *, uint16_t, uint16_t);
347uint32_t	siba_read_4(struct siba_dev_softc *, uint16_t);
348void		siba_write_4(struct siba_dev_softc *, uint16_t, uint32_t);
349void		siba_dev_up(struct siba_dev_softc *, uint32_t);
350void		siba_dev_down(struct siba_dev_softc *, uint32_t);
351int		siba_powerdown(struct siba_softc *);
352int		siba_dev_isup(struct siba_dev_softc *);
353void		siba_pcicore_intr(struct siba_pci *, struct siba_dev_softc *);
354uint32_t	siba_dma_translation(struct siba_dev_softc *);
355void		*siba_dma_alloc_consistent(struct siba_dev_softc *, size_t,
356		    bus_addr_t *);
357void		siba_read_multi_1(struct siba_dev_softc *, void *, size_t,
358		    uint16_t);
359void		siba_read_multi_2(struct siba_dev_softc *, void *, size_t,
360		    uint16_t);
361void		siba_read_multi_4(struct siba_dev_softc *, void *, size_t,
362		    uint16_t);
363void		siba_write_multi_1(struct siba_dev_softc *, const void *,
364		    size_t, uint16_t);
365void		siba_write_multi_2(struct siba_dev_softc *, const void *,
366		    size_t, uint16_t);
367void		siba_write_multi_4(struct siba_dev_softc *, const void *,
368		    size_t, uint16_t);
369void		siba_barrier(struct siba_dev_softc *, int);
370
371#endif /* _SIBA_SIBAVAR_H_ */
372