1193240Ssam/*-
2193240Ssam * Copyright (c) 2007-2009 Sam Leffler, Errno Consulting
3193240Ssam * Copyright (c) 2007-2008 Marvell Semiconductor, Inc.
4193240Ssam * All rights reserved.
5193240Ssam *
6193240Ssam * Redistribution and use in source and binary forms, with or without
7193240Ssam * modification, are permitted provided that the following conditions
8193240Ssam * are met:
9193240Ssam * 1. Redistributions of source code must retain the above copyright
10193240Ssam *    notice, this list of conditions and the following disclaimer,
11193240Ssam *    without modification.
12193240Ssam * 2. Redistributions in binary form must reproduce at minimum a disclaimer
13193240Ssam *    similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
14193240Ssam *    redistribution must be conditioned upon including a substantially
15193240Ssam *    similar Disclaimer requirement for further binary redistribution.
16193240Ssam *
17193240Ssam * NO WARRANTY
18193240Ssam * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
19193240Ssam * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
20193240Ssam * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
21193240Ssam * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
22193240Ssam * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
23193240Ssam * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24193240Ssam * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25193240Ssam * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
26193240Ssam * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27193240Ssam * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
28193240Ssam * THE POSSIBILITY OF SUCH DAMAGES.
29193240Ssam */
30193240Ssam
31193240Ssam#include <sys/cdefs.h>
32193240Ssam__FBSDID("$FreeBSD$");
33193240Ssam
34193240Ssam/*
35193240Ssam * Driver for the Marvell 88W8363 Wireless LAN controller.
36193240Ssam */
37193240Ssam
38193240Ssam#include "opt_inet.h"
39193240Ssam#include "opt_mwl.h"
40234367Sadrian#include "opt_wlan.h"
41193240Ssam
42193240Ssam#include <sys/param.h>
43193240Ssam#include <sys/systm.h>
44193240Ssam#include <sys/sysctl.h>
45193240Ssam#include <sys/mbuf.h>
46193240Ssam#include <sys/malloc.h>
47193240Ssam#include <sys/lock.h>
48193240Ssam#include <sys/mutex.h>
49193240Ssam#include <sys/kernel.h>
50193240Ssam#include <sys/socket.h>
51193240Ssam#include <sys/sockio.h>
52193240Ssam#include <sys/errno.h>
53193240Ssam#include <sys/callout.h>
54193240Ssam#include <sys/bus.h>
55193240Ssam#include <sys/endian.h>
56193240Ssam#include <sys/kthread.h>
57193240Ssam#include <sys/taskqueue.h>
58193240Ssam
59193240Ssam#include <machine/bus.h>
60193240Ssam
61193240Ssam#include <net/if.h>
62193240Ssam#include <net/if_dl.h>
63193240Ssam#include <net/if_media.h>
64193240Ssam#include <net/if_types.h>
65193240Ssam#include <net/if_arp.h>
66193240Ssam#include <net/ethernet.h>
67193240Ssam#include <net/if_llc.h>
68193240Ssam
69193240Ssam#include <net/bpf.h>
70193240Ssam
71193240Ssam#include <net80211/ieee80211_var.h>
72193240Ssam#include <net80211/ieee80211_regdomain.h>
73193240Ssam
74193240Ssam#ifdef INET
75193240Ssam#include <netinet/in.h>
76193240Ssam#include <netinet/if_ether.h>
77193240Ssam#endif /* INET */
78193240Ssam
79193240Ssam#include <dev/mwl/if_mwlvar.h>
80193240Ssam#include <dev/mwl/mwldiag.h>
81193240Ssam
82193240Ssam/* idiomatic shorthands: MS = mask+shift, SM = shift+mask */
83193240Ssam#define	MS(v,x)	(((v) & x) >> x##_S)
84193240Ssam#define	SM(v,x)	(((v) << x##_S) & x)
85193240Ssam
86193240Ssamstatic struct ieee80211vap *mwl_vap_create(struct ieee80211com *,
87228621Sbschmidt		    const char [IFNAMSIZ], int, enum ieee80211_opmode, int,
88228621Sbschmidt		    const uint8_t [IEEE80211_ADDR_LEN],
89228621Sbschmidt		    const uint8_t [IEEE80211_ADDR_LEN]);
90193240Ssamstatic void	mwl_vap_delete(struct ieee80211vap *);
91193240Ssamstatic int	mwl_setupdma(struct mwl_softc *);
92193240Ssamstatic int	mwl_hal_reset(struct mwl_softc *sc);
93193240Ssamstatic int	mwl_init_locked(struct mwl_softc *);
94193240Ssamstatic void	mwl_init(void *);
95193240Ssamstatic void	mwl_stop_locked(struct ifnet *, int);
96193240Ssamstatic int	mwl_reset(struct ieee80211vap *, u_long);
97193240Ssamstatic void	mwl_stop(struct ifnet *, int);
98193240Ssamstatic void	mwl_start(struct ifnet *);
99193240Ssamstatic int	mwl_raw_xmit(struct ieee80211_node *, struct mbuf *,
100193240Ssam			const struct ieee80211_bpf_params *);
101193240Ssamstatic int	mwl_media_change(struct ifnet *);
102199559Sjhbstatic void	mwl_watchdog(void *);
103193240Ssamstatic int	mwl_ioctl(struct ifnet *, u_long, caddr_t);
104193240Ssamstatic void	mwl_radar_proc(void *, int);
105193240Ssamstatic void	mwl_chanswitch_proc(void *, int);
106193240Ssamstatic void	mwl_bawatchdog_proc(void *, int);
107193240Ssamstatic int	mwl_key_alloc(struct ieee80211vap *,
108193240Ssam			struct ieee80211_key *,
109193240Ssam			ieee80211_keyix *, ieee80211_keyix *);
110193240Ssamstatic int	mwl_key_delete(struct ieee80211vap *,
111193240Ssam			const struct ieee80211_key *);
112193240Ssamstatic int	mwl_key_set(struct ieee80211vap *, const struct ieee80211_key *,
113193240Ssam			const uint8_t mac[IEEE80211_ADDR_LEN]);
114193240Ssamstatic int	mwl_mode_init(struct mwl_softc *);
115193240Ssamstatic void	mwl_update_mcast(struct ifnet *);
116193240Ssamstatic void	mwl_update_promisc(struct ifnet *);
117193240Ssamstatic void	mwl_updateslot(struct ifnet *);
118193240Ssamstatic int	mwl_beacon_setup(struct ieee80211vap *);
119193240Ssamstatic void	mwl_beacon_update(struct ieee80211vap *, int);
120193240Ssam#ifdef MWL_HOST_PS_SUPPORT
121193240Ssamstatic void	mwl_update_ps(struct ieee80211vap *, int);
122193240Ssamstatic int	mwl_set_tim(struct ieee80211_node *, int);
123193240Ssam#endif
124193240Ssamstatic int	mwl_dma_setup(struct mwl_softc *);
125193240Ssamstatic void	mwl_dma_cleanup(struct mwl_softc *);
126193240Ssamstatic struct ieee80211_node *mwl_node_alloc(struct ieee80211vap *,
127193240Ssam		    const uint8_t [IEEE80211_ADDR_LEN]);
128193240Ssamstatic void	mwl_node_cleanup(struct ieee80211_node *);
129193240Ssamstatic void	mwl_node_drain(struct ieee80211_node *);
130193240Ssamstatic void	mwl_node_getsignal(const struct ieee80211_node *,
131193240Ssam			int8_t *, int8_t *);
132193240Ssamstatic void	mwl_node_getmimoinfo(const struct ieee80211_node *,
133193240Ssam			struct ieee80211_mimo_info *);
134193240Ssamstatic int	mwl_rxbuf_init(struct mwl_softc *, struct mwl_rxbuf *);
135193240Ssamstatic void	mwl_rx_proc(void *, int);
136193240Ssamstatic void	mwl_txq_init(struct mwl_softc *sc, struct mwl_txq *, int);
137193240Ssamstatic int	mwl_tx_setup(struct mwl_softc *, int, int);
138193240Ssamstatic int	mwl_wme_update(struct ieee80211com *);
139193240Ssamstatic void	mwl_tx_cleanupq(struct mwl_softc *, struct mwl_txq *);
140193240Ssamstatic void	mwl_tx_cleanup(struct mwl_softc *);
141193240Ssamstatic uint16_t	mwl_calcformat(uint8_t rate, const struct ieee80211_node *);
142193240Ssamstatic int	mwl_tx_start(struct mwl_softc *, struct ieee80211_node *,
143193240Ssam			     struct mwl_txbuf *, struct mbuf *);
144193240Ssamstatic void	mwl_tx_proc(void *, int);
145193240Ssamstatic int	mwl_chan_set(struct mwl_softc *, struct ieee80211_channel *);
146193240Ssamstatic void	mwl_draintxq(struct mwl_softc *);
147193240Ssamstatic void	mwl_cleartxq(struct mwl_softc *, struct ieee80211vap *);
148195377Ssamstatic int	mwl_recv_action(struct ieee80211_node *,
149195377Ssam			const struct ieee80211_frame *,
150193240Ssam			const uint8_t *, const uint8_t *);
151193240Ssamstatic int	mwl_addba_request(struct ieee80211_node *,
152193240Ssam			struct ieee80211_tx_ampdu *, int dialogtoken,
153193240Ssam			int baparamset, int batimeout);
154193240Ssamstatic int	mwl_addba_response(struct ieee80211_node *,
155193240Ssam			struct ieee80211_tx_ampdu *, int status,
156193240Ssam			int baparamset, int batimeout);
157193240Ssamstatic void	mwl_addba_stop(struct ieee80211_node *,
158193240Ssam			struct ieee80211_tx_ampdu *);
159193240Ssamstatic int	mwl_startrecv(struct mwl_softc *);
160193240Ssamstatic MWL_HAL_APMODE mwl_getapmode(const struct ieee80211vap *,
161193240Ssam			struct ieee80211_channel *);
162193240Ssamstatic int	mwl_setapmode(struct ieee80211vap *, struct ieee80211_channel*);
163193240Ssamstatic void	mwl_scan_start(struct ieee80211com *);
164193240Ssamstatic void	mwl_scan_end(struct ieee80211com *);
165193240Ssamstatic void	mwl_set_channel(struct ieee80211com *);
166193240Ssamstatic int	mwl_peerstadb(struct ieee80211_node *,
167193240Ssam			int aid, int staid, MWL_HAL_PEERINFO *pi);
168193240Ssamstatic int	mwl_localstadb(struct ieee80211vap *);
169193240Ssamstatic int	mwl_newstate(struct ieee80211vap *, enum ieee80211_state, int);
170193240Ssamstatic int	allocstaid(struct mwl_softc *sc, int aid);
171193240Ssamstatic void	delstaid(struct mwl_softc *sc, int staid);
172193240Ssamstatic void	mwl_newassoc(struct ieee80211_node *, int);
173193240Ssamstatic void	mwl_agestations(void *);
174193240Ssamstatic int	mwl_setregdomain(struct ieee80211com *,
175193240Ssam			struct ieee80211_regdomain *, int,
176193240Ssam			struct ieee80211_channel []);
177193240Ssamstatic void	mwl_getradiocaps(struct ieee80211com *, int, int *,
178193240Ssam			struct ieee80211_channel []);
179193240Ssamstatic int	mwl_getchannels(struct mwl_softc *);
180193240Ssam
181193240Ssamstatic void	mwl_sysctlattach(struct mwl_softc *);
182193240Ssamstatic void	mwl_announce(struct mwl_softc *);
183193240Ssam
184193240SsamSYSCTL_NODE(_hw, OID_AUTO, mwl, CTLFLAG_RD, 0, "Marvell driver parameters");
185193240Ssam
186193240Ssamstatic	int mwl_rxdesc = MWL_RXDESC;		/* # rx desc's to allocate */
187193240SsamSYSCTL_INT(_hw_mwl, OID_AUTO, rxdesc, CTLFLAG_RW, &mwl_rxdesc,
188193240Ssam	    0, "rx descriptors allocated");
189193240Ssamstatic	int mwl_rxbuf = MWL_RXBUF;		/* # rx buffers to allocate */
190193240SsamSYSCTL_INT(_hw_mwl, OID_AUTO, rxbuf, CTLFLAG_RW, &mwl_rxbuf,
191193240Ssam	    0, "rx buffers allocated");
192193240SsamTUNABLE_INT("hw.mwl.rxbuf", &mwl_rxbuf);
193193240Ssamstatic	int mwl_txbuf = MWL_TXBUF;		/* # tx buffers to allocate */
194193240SsamSYSCTL_INT(_hw_mwl, OID_AUTO, txbuf, CTLFLAG_RW, &mwl_txbuf,
195193240Ssam	    0, "tx buffers allocated");
196193240SsamTUNABLE_INT("hw.mwl.txbuf", &mwl_txbuf);
197193240Ssamstatic	int mwl_txcoalesce = 8;		/* # tx packets to q before poking f/w*/
198193240SsamSYSCTL_INT(_hw_mwl, OID_AUTO, txcoalesce, CTLFLAG_RW, &mwl_txcoalesce,
199193240Ssam	    0, "tx buffers to send at once");
200193240SsamTUNABLE_INT("hw.mwl.txcoalesce", &mwl_txcoalesce);
201193240Ssamstatic	int mwl_rxquota = MWL_RXBUF;		/* # max buffers to process */
202193240SsamSYSCTL_INT(_hw_mwl, OID_AUTO, rxquota, CTLFLAG_RW, &mwl_rxquota,
203193240Ssam	    0, "max rx buffers to process per interrupt");
204193240SsamTUNABLE_INT("hw.mwl.rxquota", &mwl_rxquota);
205193240Ssamstatic	int mwl_rxdmalow = 3;			/* # min buffers for wakeup */
206193240SsamSYSCTL_INT(_hw_mwl, OID_AUTO, rxdmalow, CTLFLAG_RW, &mwl_rxdmalow,
207193240Ssam	    0, "min free rx buffers before restarting traffic");
208193240SsamTUNABLE_INT("hw.mwl.rxdmalow", &mwl_rxdmalow);
209193240Ssam
210193240Ssam#ifdef MWL_DEBUG
211193240Ssamstatic	int mwl_debug = 0;
212193240SsamSYSCTL_INT(_hw_mwl, OID_AUTO, debug, CTLFLAG_RW, &mwl_debug,
213193240Ssam	    0, "control debugging printfs");
214193240SsamTUNABLE_INT("hw.mwl.debug", &mwl_debug);
215193240Ssamenum {
216193240Ssam	MWL_DEBUG_XMIT		= 0x00000001,	/* basic xmit operation */
217193240Ssam	MWL_DEBUG_XMIT_DESC	= 0x00000002,	/* xmit descriptors */
218193240Ssam	MWL_DEBUG_RECV		= 0x00000004,	/* basic recv operation */
219193240Ssam	MWL_DEBUG_RECV_DESC	= 0x00000008,	/* recv descriptors */
220193240Ssam	MWL_DEBUG_RESET		= 0x00000010,	/* reset processing */
221193240Ssam	MWL_DEBUG_BEACON 	= 0x00000020,	/* beacon handling */
222193240Ssam	MWL_DEBUG_INTR		= 0x00000040,	/* ISR */
223193240Ssam	MWL_DEBUG_TX_PROC	= 0x00000080,	/* tx ISR proc */
224193240Ssam	MWL_DEBUG_RX_PROC	= 0x00000100,	/* rx ISR proc */
225193240Ssam	MWL_DEBUG_KEYCACHE	= 0x00000200,	/* key cache management */
226193240Ssam	MWL_DEBUG_STATE		= 0x00000400,	/* 802.11 state transitions */
227193240Ssam	MWL_DEBUG_NODE		= 0x00000800,	/* node management */
228193240Ssam	MWL_DEBUG_RECV_ALL	= 0x00001000,	/* trace all frames (beacons) */
229193240Ssam	MWL_DEBUG_TSO		= 0x00002000,	/* TSO processing */
230193240Ssam	MWL_DEBUG_AMPDU		= 0x00004000,	/* BA stream handling */
231193240Ssam	MWL_DEBUG_ANY		= 0xffffffff
232193240Ssam};
233193240Ssam#define	IS_BEACON(wh) \
234193240Ssam    ((wh->i_fc[0] & (IEEE80211_FC0_TYPE_MASK|IEEE80211_FC0_SUBTYPE_MASK)) == \
235193240Ssam	 (IEEE80211_FC0_TYPE_MGT|IEEE80211_FC0_SUBTYPE_BEACON))
236193240Ssam#define	IFF_DUMPPKTS_RECV(sc, wh) \
237193240Ssam    (((sc->sc_debug & MWL_DEBUG_RECV) && \
238193240Ssam      ((sc->sc_debug & MWL_DEBUG_RECV_ALL) || !IS_BEACON(wh))) || \
239193240Ssam     (sc->sc_ifp->if_flags & (IFF_DEBUG|IFF_LINK2)) == (IFF_DEBUG|IFF_LINK2))
240193240Ssam#define	IFF_DUMPPKTS_XMIT(sc) \
241193240Ssam	((sc->sc_debug & MWL_DEBUG_XMIT) || \
242193240Ssam	 (sc->sc_ifp->if_flags & (IFF_DEBUG|IFF_LINK2)) == (IFF_DEBUG|IFF_LINK2))
243193240Ssam#define	DPRINTF(sc, m, fmt, ...) do {				\
244193240Ssam	if (sc->sc_debug & (m))					\
245193240Ssam		printf(fmt, __VA_ARGS__);			\
246193240Ssam} while (0)
247193240Ssam#define	KEYPRINTF(sc, hk, mac) do {				\
248193240Ssam	if (sc->sc_debug & MWL_DEBUG_KEYCACHE)			\
249193240Ssam		mwl_keyprint(sc, __func__, hk, mac);		\
250193240Ssam} while (0)
251193240Ssamstatic	void mwl_printrxbuf(const struct mwl_rxbuf *bf, u_int ix);
252193240Ssamstatic	void mwl_printtxbuf(const struct mwl_txbuf *bf, u_int qnum, u_int ix);
253193240Ssam#else
254193240Ssam#define	IFF_DUMPPKTS_RECV(sc, wh) \
255193240Ssam	((sc->sc_ifp->if_flags & (IFF_DEBUG|IFF_LINK2)) == (IFF_DEBUG|IFF_LINK2))
256193240Ssam#define	IFF_DUMPPKTS_XMIT(sc) \
257193240Ssam	((sc->sc_ifp->if_flags & (IFF_DEBUG|IFF_LINK2)) == (IFF_DEBUG|IFF_LINK2))
258193240Ssam#define	DPRINTF(sc, m, fmt, ...) do {				\
259193240Ssam	(void) sc;						\
260193240Ssam} while (0)
261193240Ssam#define	KEYPRINTF(sc, k, mac) do {				\
262193240Ssam	(void) sc;						\
263193240Ssam} while (0)
264193240Ssam#endif
265193240Ssam
266227293Sedstatic MALLOC_DEFINE(M_MWLDEV, "mwldev", "mwl driver dma buffers");
267193240Ssam
268193240Ssam/*
269193240Ssam * Each packet has fixed front matter: a 2-byte length
270193240Ssam * of the payload, followed by a 4-address 802.11 header
271193240Ssam * (regardless of the actual header and always w/o any
272193240Ssam * QoS header).  The payload then follows.
273193240Ssam */
274193240Ssamstruct mwltxrec {
275193240Ssam	uint16_t fwlen;
276193240Ssam	struct ieee80211_frame_addr4 wh;
277193240Ssam} __packed;
278193240Ssam
279193240Ssam/*
280193240Ssam * Read/Write shorthands for accesses to BAR 0.  Note
281193240Ssam * that all BAR 1 operations are done in the "hal" and
282193240Ssam * there should be no reference to them here.
283193240Ssam */
284259985Sdim#ifdef MWL_DEBUG
285193240Ssamstatic __inline uint32_t
286193240SsamRD4(struct mwl_softc *sc, bus_size_t off)
287193240Ssam{
288193240Ssam	return bus_space_read_4(sc->sc_io0t, sc->sc_io0h, off);
289193240Ssam}
290259985Sdim#endif
291193240Ssam
292193240Ssamstatic __inline void
293193240SsamWR4(struct mwl_softc *sc, bus_size_t off, uint32_t val)
294193240Ssam{
295193240Ssam	bus_space_write_4(sc->sc_io0t, sc->sc_io0h, off, val);
296193240Ssam}
297193240Ssam
298193240Ssamint
299193240Ssammwl_attach(uint16_t devid, struct mwl_softc *sc)
300193240Ssam{
301193240Ssam	struct ifnet *ifp;
302193240Ssam	struct ieee80211com *ic;
303193240Ssam	struct mwl_hal *mh;
304193240Ssam	int error = 0;
305193240Ssam
306193240Ssam	DPRINTF(sc, MWL_DEBUG_ANY, "%s: devid 0x%x\n", __func__, devid);
307193240Ssam
308193240Ssam	ifp = sc->sc_ifp = if_alloc(IFT_IEEE80211);
309193240Ssam	if (ifp == NULL) {
310197441Srpaulo		device_printf(sc->sc_dev, "cannot if_alloc()\n");
311193240Ssam		return ENOSPC;
312193240Ssam	}
313193240Ssam	ic = ifp->if_l2com;
314193240Ssam
315234368Sadrian	/*
316234368Sadrian	 * Setup the RX free list lock early, so it can be consistently
317234368Sadrian	 * removed.
318234368Sadrian	 */
319234368Sadrian	MWL_RXFREE_INIT(sc);
320234368Sadrian
321193240Ssam	/* set these up early for if_printf use */
322193240Ssam	if_initname(ifp, device_get_name(sc->sc_dev),
323193240Ssam		device_get_unit(sc->sc_dev));
324193240Ssam
325193240Ssam	mh = mwl_hal_attach(sc->sc_dev, devid,
326193240Ssam	    sc->sc_io1h, sc->sc_io1t, sc->sc_dmat);
327193240Ssam	if (mh == NULL) {
328193240Ssam		if_printf(ifp, "unable to attach HAL\n");
329193240Ssam		error = EIO;
330193240Ssam		goto bad;
331193240Ssam	}
332193240Ssam	sc->sc_mh = mh;
333193240Ssam	/*
334193240Ssam	 * Load firmware so we can get setup.  We arbitrarily
335193240Ssam	 * pick station firmware; we'll re-load firmware as
336193240Ssam	 * needed so setting up the wrong mode isn't a big deal.
337193240Ssam	 */
338193240Ssam	if (mwl_hal_fwload(mh, NULL) != 0) {
339193240Ssam		if_printf(ifp, "unable to setup builtin firmware\n");
340193240Ssam		error = EIO;
341193240Ssam		goto bad1;
342193240Ssam	}
343193240Ssam	if (mwl_hal_gethwspecs(mh, &sc->sc_hwspecs) != 0) {
344193240Ssam		if_printf(ifp, "unable to fetch h/w specs\n");
345193240Ssam		error = EIO;
346193240Ssam		goto bad1;
347193240Ssam	}
348193240Ssam	error = mwl_getchannels(sc);
349193240Ssam	if (error != 0)
350193240Ssam		goto bad1;
351193240Ssam
352193240Ssam	sc->sc_txantenna = 0;		/* h/w default */
353193240Ssam	sc->sc_rxantenna = 0;		/* h/w default */
354193240Ssam	sc->sc_invalid = 0;		/* ready to go, enable int handling */
355193240Ssam	sc->sc_ageinterval = MWL_AGEINTERVAL;
356193240Ssam
357193240Ssam	/*
358193240Ssam	 * Allocate tx+rx descriptors and populate the lists.
359193240Ssam	 * We immediately push the information to the firmware
360193240Ssam	 * as otherwise it gets upset.
361193240Ssam	 */
362193240Ssam	error = mwl_dma_setup(sc);
363193240Ssam	if (error != 0) {
364193240Ssam		if_printf(ifp, "failed to setup descriptors: %d\n", error);
365193240Ssam		goto bad1;
366193240Ssam	}
367193240Ssam	error = mwl_setupdma(sc);	/* push to firmware */
368193240Ssam	if (error != 0)			/* NB: mwl_setupdma prints msg */
369193240Ssam		goto bad1;
370193240Ssam
371193240Ssam	callout_init(&sc->sc_timer, CALLOUT_MPSAFE);
372199559Sjhb	callout_init_mtx(&sc->sc_watchdog, &sc->sc_mtx, 0);
373193240Ssam
374193240Ssam	sc->sc_tq = taskqueue_create("mwl_taskq", M_NOWAIT,
375193240Ssam		taskqueue_thread_enqueue, &sc->sc_tq);
376193240Ssam	taskqueue_start_threads(&sc->sc_tq, 1, PI_NET,
377193240Ssam		"%s taskq", ifp->if_xname);
378193240Ssam
379193240Ssam	TASK_INIT(&sc->sc_rxtask, 0, mwl_rx_proc, sc);
380193240Ssam	TASK_INIT(&sc->sc_radartask, 0, mwl_radar_proc, sc);
381193240Ssam	TASK_INIT(&sc->sc_chanswitchtask, 0, mwl_chanswitch_proc, sc);
382193240Ssam	TASK_INIT(&sc->sc_bawatchdogtask, 0, mwl_bawatchdog_proc, sc);
383193240Ssam
384193240Ssam	/* NB: insure BK queue is the lowest priority h/w queue */
385193240Ssam	if (!mwl_tx_setup(sc, WME_AC_BK, MWL_WME_AC_BK)) {
386193240Ssam		if_printf(ifp, "unable to setup xmit queue for %s traffic!\n",
387193240Ssam			ieee80211_wme_acnames[WME_AC_BK]);
388193240Ssam		error = EIO;
389193240Ssam		goto bad2;
390193240Ssam	}
391193240Ssam	if (!mwl_tx_setup(sc, WME_AC_BE, MWL_WME_AC_BE) ||
392193240Ssam	    !mwl_tx_setup(sc, WME_AC_VI, MWL_WME_AC_VI) ||
393193240Ssam	    !mwl_tx_setup(sc, WME_AC_VO, MWL_WME_AC_VO)) {
394193240Ssam		/*
395193240Ssam		 * Not enough hardware tx queues to properly do WME;
396193240Ssam		 * just punt and assign them all to the same h/w queue.
397193240Ssam		 * We could do a better job of this if, for example,
398193240Ssam		 * we allocate queues when we switch from station to
399193240Ssam		 * AP mode.
400193240Ssam		 */
401193240Ssam		if (sc->sc_ac2q[WME_AC_VI] != NULL)
402193240Ssam			mwl_tx_cleanupq(sc, sc->sc_ac2q[WME_AC_VI]);
403193240Ssam		if (sc->sc_ac2q[WME_AC_BE] != NULL)
404193240Ssam			mwl_tx_cleanupq(sc, sc->sc_ac2q[WME_AC_BE]);
405193240Ssam		sc->sc_ac2q[WME_AC_BE] = sc->sc_ac2q[WME_AC_BK];
406193240Ssam		sc->sc_ac2q[WME_AC_VI] = sc->sc_ac2q[WME_AC_BK];
407193240Ssam		sc->sc_ac2q[WME_AC_VO] = sc->sc_ac2q[WME_AC_BK];
408193240Ssam	}
409193240Ssam	TASK_INIT(&sc->sc_txtask, 0, mwl_tx_proc, sc);
410193240Ssam
411193240Ssam	ifp->if_softc = sc;
412193240Ssam	ifp->if_flags = IFF_SIMPLEX | IFF_BROADCAST | IFF_MULTICAST;
413193240Ssam	ifp->if_start = mwl_start;
414193240Ssam	ifp->if_ioctl = mwl_ioctl;
415193240Ssam	ifp->if_init = mwl_init;
416207554Ssobomax	IFQ_SET_MAXLEN(&ifp->if_snd, ifqmaxlen);
417207554Ssobomax	ifp->if_snd.ifq_drv_maxlen = ifqmaxlen;
418193240Ssam	IFQ_SET_READY(&ifp->if_snd);
419193240Ssam
420193240Ssam	ic->ic_ifp = ifp;
421193240Ssam	/* XXX not right but it's not used anywhere important */
422193240Ssam	ic->ic_phytype = IEEE80211_T_OFDM;
423193240Ssam	ic->ic_opmode = IEEE80211_M_STA;
424193240Ssam	ic->ic_caps =
425193240Ssam		  IEEE80211_C_STA		/* station mode supported */
426193240Ssam		| IEEE80211_C_HOSTAP		/* hostap mode */
427193240Ssam		| IEEE80211_C_MONITOR		/* monitor mode */
428193240Ssam#if 0
429193240Ssam		| IEEE80211_C_IBSS		/* ibss, nee adhoc, mode */
430193240Ssam		| IEEE80211_C_AHDEMO		/* adhoc demo mode */
431193240Ssam#endif
432195618Srpaulo		| IEEE80211_C_MBSS		/* mesh point link mode */
433193240Ssam		| IEEE80211_C_WDS		/* WDS supported */
434193240Ssam		| IEEE80211_C_SHPREAMBLE	/* short preamble supported */
435193240Ssam		| IEEE80211_C_SHSLOT		/* short slot time supported */
436193240Ssam		| IEEE80211_C_WME		/* WME/WMM supported */
437193240Ssam		| IEEE80211_C_BURST		/* xmit bursting supported */
438193240Ssam		| IEEE80211_C_WPA		/* capable of WPA1+WPA2 */
439193240Ssam		| IEEE80211_C_BGSCAN		/* capable of bg scanning */
440193240Ssam		| IEEE80211_C_TXFRAG		/* handle tx frags */
441193240Ssam		| IEEE80211_C_TXPMGT		/* capable of txpow mgt */
442193240Ssam		| IEEE80211_C_DFS		/* DFS supported */
443193240Ssam		;
444193240Ssam
445193240Ssam	ic->ic_htcaps =
446193240Ssam		  IEEE80211_HTCAP_SMPS_ENA	/* SM PS mode enabled */
447193240Ssam		| IEEE80211_HTCAP_CHWIDTH40	/* 40MHz channel width */
448193240Ssam		| IEEE80211_HTCAP_SHORTGI20	/* short GI in 20MHz */
449193240Ssam		| IEEE80211_HTCAP_SHORTGI40	/* short GI in 40MHz */
450193240Ssam		| IEEE80211_HTCAP_RXSTBC_2STREAM/* 1-2 spatial streams */
451193240Ssam#if MWL_AGGR_SIZE == 7935
452193240Ssam		| IEEE80211_HTCAP_MAXAMSDU_7935	/* max A-MSDU length */
453193240Ssam#else
454193240Ssam		| IEEE80211_HTCAP_MAXAMSDU_3839	/* max A-MSDU length */
455193240Ssam#endif
456193240Ssam#if 0
457193240Ssam		| IEEE80211_HTCAP_PSMP		/* PSMP supported */
458193240Ssam		| IEEE80211_HTCAP_40INTOLERANT	/* 40MHz intolerant */
459193240Ssam#endif
460193240Ssam		/* s/w capabilities */
461193240Ssam		| IEEE80211_HTC_HT		/* HT operation */
462193240Ssam		| IEEE80211_HTC_AMPDU		/* tx A-MPDU */
463193240Ssam		| IEEE80211_HTC_AMSDU		/* tx A-MSDU */
464193240Ssam		| IEEE80211_HTC_SMPS		/* SMPS available */
465193240Ssam		;
466193240Ssam
467193240Ssam	/*
468193240Ssam	 * Mark h/w crypto support.
469193240Ssam	 * XXX no way to query h/w support.
470193240Ssam	 */
471193240Ssam	ic->ic_cryptocaps |= IEEE80211_CRYPTO_WEP
472193240Ssam			  |  IEEE80211_CRYPTO_AES_CCM
473193240Ssam			  |  IEEE80211_CRYPTO_TKIP
474193240Ssam			  |  IEEE80211_CRYPTO_TKIPMIC
475193240Ssam			  ;
476193240Ssam	/*
477193240Ssam	 * Transmit requires space in the packet for a special
478193240Ssam	 * format transmit record and optional padding between
479193240Ssam	 * this record and the payload.  Ask the net80211 layer
480193240Ssam	 * to arrange this when encapsulating packets so we can
481193240Ssam	 * add it efficiently.
482193240Ssam	 */
483193240Ssam	ic->ic_headroom = sizeof(struct mwltxrec) -
484193240Ssam		sizeof(struct ieee80211_frame);
485193240Ssam
486193240Ssam	/* call MI attach routine. */
487193240Ssam	ieee80211_ifattach(ic, sc->sc_hwspecs.macAddr);
488193240Ssam	ic->ic_setregdomain = mwl_setregdomain;
489193240Ssam	ic->ic_getradiocaps = mwl_getradiocaps;
490193240Ssam	/* override default methods */
491193240Ssam	ic->ic_raw_xmit = mwl_raw_xmit;
492193240Ssam	ic->ic_newassoc = mwl_newassoc;
493193240Ssam	ic->ic_updateslot = mwl_updateslot;
494193240Ssam	ic->ic_update_mcast = mwl_update_mcast;
495193240Ssam	ic->ic_update_promisc = mwl_update_promisc;
496193240Ssam	ic->ic_wme.wme_update = mwl_wme_update;
497193240Ssam
498193240Ssam	ic->ic_node_alloc = mwl_node_alloc;
499193240Ssam	sc->sc_node_cleanup = ic->ic_node_cleanup;
500193240Ssam	ic->ic_node_cleanup = mwl_node_cleanup;
501193240Ssam	sc->sc_node_drain = ic->ic_node_drain;
502193240Ssam	ic->ic_node_drain = mwl_node_drain;
503193240Ssam	ic->ic_node_getsignal = mwl_node_getsignal;
504193240Ssam	ic->ic_node_getmimoinfo = mwl_node_getmimoinfo;
505193240Ssam
506193240Ssam	ic->ic_scan_start = mwl_scan_start;
507193240Ssam	ic->ic_scan_end = mwl_scan_end;
508193240Ssam	ic->ic_set_channel = mwl_set_channel;
509193240Ssam
510193240Ssam	sc->sc_recv_action = ic->ic_recv_action;
511193240Ssam	ic->ic_recv_action = mwl_recv_action;
512193240Ssam	sc->sc_addba_request = ic->ic_addba_request;
513193240Ssam	ic->ic_addba_request = mwl_addba_request;
514193240Ssam	sc->sc_addba_response = ic->ic_addba_response;
515193240Ssam	ic->ic_addba_response = mwl_addba_response;
516193240Ssam	sc->sc_addba_stop = ic->ic_addba_stop;
517193240Ssam	ic->ic_addba_stop = mwl_addba_stop;
518193240Ssam
519193240Ssam	ic->ic_vap_create = mwl_vap_create;
520193240Ssam	ic->ic_vap_delete = mwl_vap_delete;
521193240Ssam
522193240Ssam	ieee80211_radiotap_attach(ic,
523193240Ssam	    &sc->sc_tx_th.wt_ihdr, sizeof(sc->sc_tx_th),
524193240Ssam		MWL_TX_RADIOTAP_PRESENT,
525193240Ssam	    &sc->sc_rx_th.wr_ihdr, sizeof(sc->sc_rx_th),
526193240Ssam		MWL_RX_RADIOTAP_PRESENT);
527193240Ssam	/*
528193240Ssam	 * Setup dynamic sysctl's now that country code and
529193240Ssam	 * regdomain are available from the hal.
530193240Ssam	 */
531193240Ssam	mwl_sysctlattach(sc);
532193240Ssam
533193240Ssam	if (bootverbose)
534193240Ssam		ieee80211_announce(ic);
535193240Ssam	mwl_announce(sc);
536193240Ssam	return 0;
537193240Ssambad2:
538193240Ssam	mwl_dma_cleanup(sc);
539193240Ssambad1:
540193240Ssam	mwl_hal_detach(mh);
541193240Ssambad:
542234368Sadrian	MWL_RXFREE_DESTROY(sc);
543193240Ssam	if_free(ifp);
544193240Ssam	sc->sc_invalid = 1;
545193240Ssam	return error;
546193240Ssam}
547193240Ssam
548193240Ssamint
549193240Ssammwl_detach(struct mwl_softc *sc)
550193240Ssam{
551193240Ssam	struct ifnet *ifp = sc->sc_ifp;
552193240Ssam	struct ieee80211com *ic = ifp->if_l2com;
553193240Ssam
554193240Ssam	DPRINTF(sc, MWL_DEBUG_ANY, "%s: if_flags %x\n",
555193240Ssam		__func__, ifp->if_flags);
556193240Ssam
557193240Ssam	mwl_stop(ifp, 1);
558193240Ssam	/*
559193240Ssam	 * NB: the order of these is important:
560193240Ssam	 * o call the 802.11 layer before detaching the hal to
561193240Ssam	 *   insure callbacks into the driver to delete global
562193240Ssam	 *   key cache entries can be handled
563193240Ssam	 * o reclaim the tx queue data structures after calling
564193240Ssam	 *   the 802.11 layer as we'll get called back to reclaim
565193240Ssam	 *   node state and potentially want to use them
566193240Ssam	 * o to cleanup the tx queues the hal is called, so detach
567193240Ssam	 *   it last
568193240Ssam	 * Other than that, it's straightforward...
569193240Ssam	 */
570193240Ssam	ieee80211_ifdetach(ic);
571199559Sjhb	callout_drain(&sc->sc_watchdog);
572193240Ssam	mwl_dma_cleanup(sc);
573234368Sadrian	MWL_RXFREE_DESTROY(sc);
574193240Ssam	mwl_tx_cleanup(sc);
575193240Ssam	mwl_hal_detach(sc->sc_mh);
576193240Ssam	if_free(ifp);
577193240Ssam
578193240Ssam	return 0;
579193240Ssam}
580193240Ssam
581193240Ssam/*
582193240Ssam * MAC address handling for multiple BSS on the same radio.
583193240Ssam * The first vap uses the MAC address from the EEPROM.  For
584193240Ssam * subsequent vap's we set the U/L bit (bit 1) in the MAC
585193240Ssam * address and use the next six bits as an index.
586193240Ssam */
587193240Ssamstatic void
588193240Ssamassign_address(struct mwl_softc *sc, uint8_t mac[IEEE80211_ADDR_LEN], int clone)
589193240Ssam{
590193240Ssam	int i;
591193240Ssam
592193240Ssam	if (clone && mwl_hal_ismbsscapable(sc->sc_mh)) {
593193240Ssam		/* NB: we only do this if h/w supports multiple bssid */
594193240Ssam		for (i = 0; i < 32; i++)
595193240Ssam			if ((sc->sc_bssidmask & (1<<i)) == 0)
596193240Ssam				break;
597193240Ssam		if (i != 0)
598193240Ssam			mac[0] |= (i << 2)|0x2;
599193240Ssam	} else
600193240Ssam		i = 0;
601193240Ssam	sc->sc_bssidmask |= 1<<i;
602193240Ssam	if (i == 0)
603193240Ssam		sc->sc_nbssid0++;
604193240Ssam}
605193240Ssam
606193240Ssamstatic void
607193240Ssamreclaim_address(struct mwl_softc *sc, uint8_t mac[IEEE80211_ADDR_LEN])
608193240Ssam{
609193240Ssam	int i = mac[0] >> 2;
610193240Ssam	if (i != 0 || --sc->sc_nbssid0 == 0)
611193240Ssam		sc->sc_bssidmask &= ~(1<<i);
612193240Ssam}
613193240Ssam
614193240Ssamstatic struct ieee80211vap *
615228621Sbschmidtmwl_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit,
616228621Sbschmidt    enum ieee80211_opmode opmode, int flags,
617228621Sbschmidt    const uint8_t bssid[IEEE80211_ADDR_LEN],
618228621Sbschmidt    const uint8_t mac0[IEEE80211_ADDR_LEN])
619193240Ssam{
620193240Ssam	struct ifnet *ifp = ic->ic_ifp;
621193240Ssam	struct mwl_softc *sc = ifp->if_softc;
622193240Ssam	struct mwl_hal *mh = sc->sc_mh;
623193240Ssam	struct ieee80211vap *vap, *apvap;
624193240Ssam	struct mwl_hal_vap *hvap;
625193240Ssam	struct mwl_vap *mvp;
626193240Ssam	uint8_t mac[IEEE80211_ADDR_LEN];
627193240Ssam
628193240Ssam	IEEE80211_ADDR_COPY(mac, mac0);
629193240Ssam	switch (opmode) {
630193240Ssam	case IEEE80211_M_HOSTAP:
631195618Srpaulo	case IEEE80211_M_MBSS:
632193240Ssam		if ((flags & IEEE80211_CLONE_MACADDR) == 0)
633193240Ssam			assign_address(sc, mac, flags & IEEE80211_CLONE_BSSID);
634193240Ssam		hvap = mwl_hal_newvap(mh, MWL_HAL_AP, mac);
635193240Ssam		if (hvap == NULL) {
636193240Ssam			if ((flags & IEEE80211_CLONE_MACADDR) == 0)
637193240Ssam				reclaim_address(sc, mac);
638193240Ssam			return NULL;
639193240Ssam		}
640193240Ssam		break;
641193240Ssam	case IEEE80211_M_STA:
642193240Ssam		if ((flags & IEEE80211_CLONE_MACADDR) == 0)
643193240Ssam			assign_address(sc, mac, flags & IEEE80211_CLONE_BSSID);
644193240Ssam		hvap = mwl_hal_newvap(mh, MWL_HAL_STA, mac);
645193240Ssam		if (hvap == NULL) {
646193240Ssam			if ((flags & IEEE80211_CLONE_MACADDR) == 0)
647193240Ssam				reclaim_address(sc, mac);
648193240Ssam			return NULL;
649193240Ssam		}
650193240Ssam		/* no h/w beacon miss support; always use s/w */
651193240Ssam		flags |= IEEE80211_CLONE_NOBEACONS;
652193240Ssam		break;
653193240Ssam	case IEEE80211_M_WDS:
654193240Ssam		hvap = NULL;		/* NB: we use associated AP vap */
655193240Ssam		if (sc->sc_napvaps == 0)
656193240Ssam			return NULL;	/* no existing AP vap */
657193240Ssam		break;
658193240Ssam	case IEEE80211_M_MONITOR:
659193240Ssam		hvap = NULL;
660193240Ssam		break;
661193240Ssam	case IEEE80211_M_IBSS:
662193240Ssam	case IEEE80211_M_AHDEMO:
663193240Ssam	default:
664193240Ssam		return NULL;
665193240Ssam	}
666193240Ssam
667193240Ssam	mvp = (struct mwl_vap *) malloc(sizeof(struct mwl_vap),
668193240Ssam	    M_80211_VAP, M_NOWAIT | M_ZERO);
669193240Ssam	if (mvp == NULL) {
670193240Ssam		if (hvap != NULL) {
671193240Ssam			mwl_hal_delvap(hvap);
672193240Ssam			if ((flags & IEEE80211_CLONE_MACADDR) == 0)
673193240Ssam				reclaim_address(sc, mac);
674193240Ssam		}
675193240Ssam		/* XXX msg */
676193240Ssam		return NULL;
677193240Ssam	}
678193240Ssam	mvp->mv_hvap = hvap;
679193240Ssam	if (opmode == IEEE80211_M_WDS) {
680193240Ssam		/*
681193240Ssam		 * WDS vaps must have an associated AP vap; find one.
682193240Ssam		 * XXX not right.
683193240Ssam		 */
684193240Ssam		TAILQ_FOREACH(apvap, &ic->ic_vaps, iv_next)
685193240Ssam			if (apvap->iv_opmode == IEEE80211_M_HOSTAP) {
686193240Ssam				mvp->mv_ap_hvap = MWL_VAP(apvap)->mv_hvap;
687193240Ssam				break;
688193240Ssam			}
689193240Ssam		KASSERT(mvp->mv_ap_hvap != NULL, ("no ap vap"));
690193240Ssam	}
691193240Ssam	vap = &mvp->mv_vap;
692193240Ssam	ieee80211_vap_setup(ic, vap, name, unit, opmode, flags, bssid, mac);
693193240Ssam	if (hvap != NULL)
694193240Ssam		IEEE80211_ADDR_COPY(vap->iv_myaddr, mac);
695193240Ssam	/* override with driver methods */
696193240Ssam	mvp->mv_newstate = vap->iv_newstate;
697193240Ssam	vap->iv_newstate = mwl_newstate;
698193240Ssam	vap->iv_max_keyix = 0;	/* XXX */
699193240Ssam	vap->iv_key_alloc = mwl_key_alloc;
700193240Ssam	vap->iv_key_delete = mwl_key_delete;
701193240Ssam	vap->iv_key_set = mwl_key_set;
702193240Ssam#ifdef MWL_HOST_PS_SUPPORT
703195618Srpaulo	if (opmode == IEEE80211_M_HOSTAP || opmode == IEEE80211_M_MBSS) {
704193240Ssam		vap->iv_update_ps = mwl_update_ps;
705193240Ssam		mvp->mv_set_tim = vap->iv_set_tim;
706193240Ssam		vap->iv_set_tim = mwl_set_tim;
707193240Ssam	}
708193240Ssam#endif
709193240Ssam	vap->iv_reset = mwl_reset;
710193240Ssam	vap->iv_update_beacon = mwl_beacon_update;
711193240Ssam
712193240Ssam	/* override max aid so sta's cannot assoc when we're out of sta id's */
713193240Ssam	vap->iv_max_aid = MWL_MAXSTAID;
714193240Ssam	/* override default A-MPDU rx parameters */
715193240Ssam	vap->iv_ampdu_rxmax = IEEE80211_HTCAP_MAXRXAMPDU_64K;
716193240Ssam	vap->iv_ampdu_density = IEEE80211_HTCAP_MPDUDENSITY_4;
717193240Ssam
718193240Ssam	/* complete setup */
719193240Ssam	ieee80211_vap_attach(vap, mwl_media_change, ieee80211_media_status);
720193240Ssam
721193240Ssam	switch (vap->iv_opmode) {
722193240Ssam	case IEEE80211_M_HOSTAP:
723195618Srpaulo	case IEEE80211_M_MBSS:
724193240Ssam	case IEEE80211_M_STA:
725193240Ssam		/*
726193240Ssam		 * Setup sta db entry for local address.
727193240Ssam		 */
728193240Ssam		mwl_localstadb(vap);
729195618Srpaulo		if (vap->iv_opmode == IEEE80211_M_HOSTAP ||
730195618Srpaulo		    vap->iv_opmode == IEEE80211_M_MBSS)
731193240Ssam			sc->sc_napvaps++;
732193240Ssam		else
733193240Ssam			sc->sc_nstavaps++;
734193240Ssam		break;
735193240Ssam	case IEEE80211_M_WDS:
736193240Ssam		sc->sc_nwdsvaps++;
737193240Ssam		break;
738193240Ssam	default:
739193240Ssam		break;
740193240Ssam	}
741193240Ssam	/*
742193240Ssam	 * Setup overall operating mode.
743193240Ssam	 */
744193240Ssam	if (sc->sc_napvaps)
745193240Ssam		ic->ic_opmode = IEEE80211_M_HOSTAP;
746193240Ssam	else if (sc->sc_nstavaps)
747193240Ssam		ic->ic_opmode = IEEE80211_M_STA;
748193240Ssam	else
749193240Ssam		ic->ic_opmode = opmode;
750193240Ssam
751193240Ssam	return vap;
752193240Ssam}
753193240Ssam
754193240Ssamstatic void
755193240Ssammwl_vap_delete(struct ieee80211vap *vap)
756193240Ssam{
757193240Ssam	struct mwl_vap *mvp = MWL_VAP(vap);
758193240Ssam	struct ifnet *parent = vap->iv_ic->ic_ifp;
759193240Ssam	struct mwl_softc *sc = parent->if_softc;
760193240Ssam	struct mwl_hal *mh = sc->sc_mh;
761193240Ssam	struct mwl_hal_vap *hvap = mvp->mv_hvap;
762193240Ssam	enum ieee80211_opmode opmode = vap->iv_opmode;
763193240Ssam
764193240Ssam	/* XXX disallow ap vap delete if WDS still present */
765193240Ssam	if (parent->if_drv_flags & IFF_DRV_RUNNING) {
766193240Ssam		/* quiesce h/w while we remove the vap */
767193240Ssam		mwl_hal_intrset(mh, 0);		/* disable interrupts */
768193240Ssam	}
769193240Ssam	ieee80211_vap_detach(vap);
770193240Ssam	switch (opmode) {
771193240Ssam	case IEEE80211_M_HOSTAP:
772195618Srpaulo	case IEEE80211_M_MBSS:
773193240Ssam	case IEEE80211_M_STA:
774193240Ssam		KASSERT(hvap != NULL, ("no hal vap handle"));
775193240Ssam		(void) mwl_hal_delstation(hvap, vap->iv_myaddr);
776193240Ssam		mwl_hal_delvap(hvap);
777195618Srpaulo		if (opmode == IEEE80211_M_HOSTAP || opmode == IEEE80211_M_MBSS)
778193240Ssam			sc->sc_napvaps--;
779193240Ssam		else
780193240Ssam			sc->sc_nstavaps--;
781193240Ssam		/* XXX don't do it for IEEE80211_CLONE_MACADDR */
782193240Ssam		reclaim_address(sc, vap->iv_myaddr);
783193240Ssam		break;
784193240Ssam	case IEEE80211_M_WDS:
785193240Ssam		sc->sc_nwdsvaps--;
786193240Ssam		break;
787193240Ssam	default:
788193240Ssam		break;
789193240Ssam	}
790193240Ssam	mwl_cleartxq(sc, vap);
791193240Ssam	free(mvp, M_80211_VAP);
792193240Ssam	if (parent->if_drv_flags & IFF_DRV_RUNNING)
793193240Ssam		mwl_hal_intrset(mh, sc->sc_imask);
794193240Ssam}
795193240Ssam
796193240Ssamvoid
797193240Ssammwl_suspend(struct mwl_softc *sc)
798193240Ssam{
799193240Ssam	struct ifnet *ifp = sc->sc_ifp;
800193240Ssam
801193240Ssam	DPRINTF(sc, MWL_DEBUG_ANY, "%s: if_flags %x\n",
802193240Ssam		__func__, ifp->if_flags);
803193240Ssam
804193240Ssam	mwl_stop(ifp, 1);
805193240Ssam}
806193240Ssam
807193240Ssamvoid
808193240Ssammwl_resume(struct mwl_softc *sc)
809193240Ssam{
810193240Ssam	struct ifnet *ifp = sc->sc_ifp;
811193240Ssam
812193240Ssam	DPRINTF(sc, MWL_DEBUG_ANY, "%s: if_flags %x\n",
813193240Ssam		__func__, ifp->if_flags);
814193240Ssam
815193240Ssam	if (ifp->if_flags & IFF_UP)
816193240Ssam		mwl_init(sc);
817193240Ssam}
818193240Ssam
819193240Ssamvoid
820193240Ssammwl_shutdown(void *arg)
821193240Ssam{
822193240Ssam	struct mwl_softc *sc = arg;
823193240Ssam
824193240Ssam	mwl_stop(sc->sc_ifp, 1);
825193240Ssam}
826193240Ssam
827193240Ssam/*
828193240Ssam * Interrupt handler.  Most of the actual processing is deferred.
829193240Ssam */
830193240Ssamvoid
831193240Ssammwl_intr(void *arg)
832193240Ssam{
833193240Ssam	struct mwl_softc *sc = arg;
834193240Ssam	struct mwl_hal *mh = sc->sc_mh;
835193240Ssam	uint32_t status;
836193240Ssam
837193240Ssam	if (sc->sc_invalid) {
838193240Ssam		/*
839193240Ssam		 * The hardware is not ready/present, don't touch anything.
840193240Ssam		 * Note this can happen early on if the IRQ is shared.
841193240Ssam		 */
842193240Ssam		DPRINTF(sc, MWL_DEBUG_ANY, "%s: invalid; ignored\n", __func__);
843193240Ssam		return;
844193240Ssam	}
845193240Ssam	/*
846193240Ssam	 * Figure out the reason(s) for the interrupt.
847193240Ssam	 */
848193240Ssam	mwl_hal_getisr(mh, &status);		/* NB: clears ISR too */
849193240Ssam	if (status == 0)			/* must be a shared irq */
850193240Ssam		return;
851193240Ssam
852193240Ssam	DPRINTF(sc, MWL_DEBUG_INTR, "%s: status 0x%x imask 0x%x\n",
853193240Ssam	    __func__, status, sc->sc_imask);
854193240Ssam	if (status & MACREG_A2HRIC_BIT_RX_RDY)
855193240Ssam		taskqueue_enqueue(sc->sc_tq, &sc->sc_rxtask);
856193240Ssam	if (status & MACREG_A2HRIC_BIT_TX_DONE)
857193240Ssam		taskqueue_enqueue(sc->sc_tq, &sc->sc_txtask);
858193240Ssam	if (status & MACREG_A2HRIC_BIT_BA_WATCHDOG)
859193240Ssam		taskqueue_enqueue(sc->sc_tq, &sc->sc_bawatchdogtask);
860193240Ssam	if (status & MACREG_A2HRIC_BIT_OPC_DONE)
861193240Ssam		mwl_hal_cmddone(mh);
862193240Ssam	if (status & MACREG_A2HRIC_BIT_MAC_EVENT) {
863193240Ssam		;
864193240Ssam	}
865193240Ssam	if (status & MACREG_A2HRIC_BIT_ICV_ERROR) {
866193240Ssam		/* TKIP ICV error */
867193240Ssam		sc->sc_stats.mst_rx_badtkipicv++;
868193240Ssam	}
869193240Ssam	if (status & MACREG_A2HRIC_BIT_QUEUE_EMPTY) {
870193240Ssam		/* 11n aggregation queue is empty, re-fill */
871193240Ssam		;
872193240Ssam	}
873193240Ssam	if (status & MACREG_A2HRIC_BIT_QUEUE_FULL) {
874193240Ssam		;
875193240Ssam	}
876193240Ssam	if (status & MACREG_A2HRIC_BIT_RADAR_DETECT) {
877193240Ssam		/* radar detected, process event */
878193240Ssam		taskqueue_enqueue(sc->sc_tq, &sc->sc_radartask);
879193240Ssam	}
880193240Ssam	if (status & MACREG_A2HRIC_BIT_CHAN_SWITCH) {
881193240Ssam		/* DFS channel switch */
882193240Ssam		taskqueue_enqueue(sc->sc_tq, &sc->sc_chanswitchtask);
883193240Ssam	}
884193240Ssam}
885193240Ssam
886193240Ssamstatic void
887193240Ssammwl_radar_proc(void *arg, int pending)
888193240Ssam{
889193240Ssam	struct mwl_softc *sc = arg;
890193240Ssam	struct ifnet *ifp = sc->sc_ifp;
891193240Ssam	struct ieee80211com *ic = ifp->if_l2com;
892193240Ssam
893193240Ssam	DPRINTF(sc, MWL_DEBUG_ANY, "%s: radar detected, pending %u\n",
894193240Ssam	    __func__, pending);
895193240Ssam
896193240Ssam	sc->sc_stats.mst_radardetect++;
897195171Ssam	/* XXX stop h/w BA streams? */
898193240Ssam
899193240Ssam	IEEE80211_LOCK(ic);
900193240Ssam	ieee80211_dfs_notify_radar(ic, ic->ic_curchan);
901193240Ssam	IEEE80211_UNLOCK(ic);
902193240Ssam}
903193240Ssam
904193240Ssamstatic void
905193240Ssammwl_chanswitch_proc(void *arg, int pending)
906193240Ssam{
907193240Ssam	struct mwl_softc *sc = arg;
908193240Ssam	struct ifnet *ifp = sc->sc_ifp;
909193240Ssam	struct ieee80211com *ic = ifp->if_l2com;
910193240Ssam
911193240Ssam	DPRINTF(sc, MWL_DEBUG_ANY, "%s: channel switch notice, pending %u\n",
912193240Ssam	    __func__, pending);
913193240Ssam
914193240Ssam	IEEE80211_LOCK(ic);
915193240Ssam	sc->sc_csapending = 0;
916193240Ssam	ieee80211_csa_completeswitch(ic);
917193240Ssam	IEEE80211_UNLOCK(ic);
918193240Ssam}
919193240Ssam
920193240Ssamstatic void
921193240Ssammwl_bawatchdog(const MWL_HAL_BASTREAM *sp)
922193240Ssam{
923193240Ssam	struct ieee80211_node *ni = sp->data[0];
924193240Ssam
925193240Ssam	/* send DELBA and drop the stream */
926193240Ssam	ieee80211_ampdu_stop(ni, sp->data[1], IEEE80211_REASON_UNSPECIFIED);
927193240Ssam}
928193240Ssam
929193240Ssamstatic void
930193240Ssammwl_bawatchdog_proc(void *arg, int pending)
931193240Ssam{
932193240Ssam	struct mwl_softc *sc = arg;
933193240Ssam	struct mwl_hal *mh = sc->sc_mh;
934193240Ssam	const MWL_HAL_BASTREAM *sp;
935193240Ssam	uint8_t bitmap, n;
936193240Ssam
937193240Ssam	sc->sc_stats.mst_bawatchdog++;
938193240Ssam
939193240Ssam	if (mwl_hal_getwatchdogbitmap(mh, &bitmap) != 0) {
940193240Ssam		DPRINTF(sc, MWL_DEBUG_AMPDU,
941193240Ssam		    "%s: could not get bitmap\n", __func__);
942193240Ssam		sc->sc_stats.mst_bawatchdog_failed++;
943193240Ssam		return;
944193240Ssam	}
945193240Ssam	DPRINTF(sc, MWL_DEBUG_AMPDU, "%s: bitmap 0x%x\n", __func__, bitmap);
946193240Ssam	if (bitmap == 0xff) {
947193240Ssam		n = 0;
948193240Ssam		/* disable all ba streams */
949193240Ssam		for (bitmap = 0; bitmap < 8; bitmap++) {
950193240Ssam			sp = mwl_hal_bastream_lookup(mh, bitmap);
951193240Ssam			if (sp != NULL) {
952193240Ssam				mwl_bawatchdog(sp);
953193240Ssam				n++;
954193240Ssam			}
955193240Ssam		}
956193240Ssam		if (n == 0) {
957193240Ssam			DPRINTF(sc, MWL_DEBUG_AMPDU,
958193240Ssam			    "%s: no BA streams found\n", __func__);
959193240Ssam			sc->sc_stats.mst_bawatchdog_empty++;
960193240Ssam		}
961193240Ssam	} else if (bitmap != 0xaa) {
962193240Ssam		/* disable a single ba stream */
963193240Ssam		sp = mwl_hal_bastream_lookup(mh, bitmap);
964193240Ssam		if (sp != NULL) {
965193240Ssam			mwl_bawatchdog(sp);
966193240Ssam		} else {
967193240Ssam			DPRINTF(sc, MWL_DEBUG_AMPDU,
968193240Ssam			    "%s: no BA stream %d\n", __func__, bitmap);
969193240Ssam			sc->sc_stats.mst_bawatchdog_notfound++;
970193240Ssam		}
971193240Ssam	}
972193240Ssam}
973193240Ssam
974193240Ssam/*
975193240Ssam * Convert net80211 channel to a HAL channel.
976193240Ssam */
977193240Ssamstatic void
978193240Ssammwl_mapchan(MWL_HAL_CHANNEL *hc, const struct ieee80211_channel *chan)
979193240Ssam{
980193240Ssam	hc->channel = chan->ic_ieee;
981193240Ssam
982193240Ssam	*(uint32_t *)&hc->channelFlags = 0;
983193240Ssam	if (IEEE80211_IS_CHAN_2GHZ(chan))
984193240Ssam		hc->channelFlags.FreqBand = MWL_FREQ_BAND_2DOT4GHZ;
985193240Ssam	else if (IEEE80211_IS_CHAN_5GHZ(chan))
986193240Ssam		hc->channelFlags.FreqBand = MWL_FREQ_BAND_5GHZ;
987193240Ssam	if (IEEE80211_IS_CHAN_HT40(chan)) {
988193240Ssam		hc->channelFlags.ChnlWidth = MWL_CH_40_MHz_WIDTH;
989193240Ssam		if (IEEE80211_IS_CHAN_HT40U(chan))
990193240Ssam			hc->channelFlags.ExtChnlOffset = MWL_EXT_CH_ABOVE_CTRL_CH;
991193240Ssam		else
992193240Ssam			hc->channelFlags.ExtChnlOffset = MWL_EXT_CH_BELOW_CTRL_CH;
993193240Ssam	} else
994193240Ssam		hc->channelFlags.ChnlWidth = MWL_CH_20_MHz_WIDTH;
995193240Ssam	/* XXX 10MHz channels */
996193240Ssam}
997193240Ssam
998193240Ssam/*
999193240Ssam * Inform firmware of our tx/rx dma setup.  The BAR 0
1000193240Ssam * writes below are for compatibility with older firmware.
1001193240Ssam * For current firmware we send this information with a
1002193240Ssam * cmd block via mwl_hal_sethwdma.
1003193240Ssam */
1004193240Ssamstatic int
1005193240Ssammwl_setupdma(struct mwl_softc *sc)
1006193240Ssam{
1007193240Ssam	int error, i;
1008193240Ssam
1009193240Ssam	sc->sc_hwdma.rxDescRead = sc->sc_rxdma.dd_desc_paddr;
1010193240Ssam	WR4(sc, sc->sc_hwspecs.rxDescRead, sc->sc_hwdma.rxDescRead);
1011193240Ssam	WR4(sc, sc->sc_hwspecs.rxDescWrite, sc->sc_hwdma.rxDescRead);
1012193240Ssam
1013195171Ssam	for (i = 0; i < MWL_NUM_TX_QUEUES-MWL_NUM_ACK_QUEUES; i++) {
1014193240Ssam		struct mwl_txq *txq = &sc->sc_txq[i];
1015193240Ssam		sc->sc_hwdma.wcbBase[i] = txq->dma.dd_desc_paddr;
1016193240Ssam		WR4(sc, sc->sc_hwspecs.wcbBase[i], sc->sc_hwdma.wcbBase[i]);
1017193240Ssam	}
1018193240Ssam	sc->sc_hwdma.maxNumTxWcb = mwl_txbuf;
1019195171Ssam	sc->sc_hwdma.maxNumWCB = MWL_NUM_TX_QUEUES-MWL_NUM_ACK_QUEUES;
1020193240Ssam
1021193240Ssam	error = mwl_hal_sethwdma(sc->sc_mh, &sc->sc_hwdma);
1022193240Ssam	if (error != 0) {
1023193240Ssam		device_printf(sc->sc_dev,
1024193240Ssam		    "unable to setup tx/rx dma; hal status %u\n", error);
1025193240Ssam		/* XXX */
1026193240Ssam	}
1027193240Ssam	return error;
1028193240Ssam}
1029193240Ssam
1030193240Ssam/*
1031193240Ssam * Inform firmware of tx rate parameters.
1032193240Ssam * Called after a channel change.
1033193240Ssam */
1034193240Ssamstatic int
1035193240Ssammwl_setcurchanrates(struct mwl_softc *sc)
1036193240Ssam{
1037193240Ssam	struct ifnet *ifp = sc->sc_ifp;
1038193240Ssam	struct ieee80211com *ic = ifp->if_l2com;
1039193240Ssam	const struct ieee80211_rateset *rs;
1040193240Ssam	MWL_HAL_TXRATE rates;
1041193240Ssam
1042193240Ssam	memset(&rates, 0, sizeof(rates));
1043193240Ssam	rs = ieee80211_get_suprates(ic, ic->ic_curchan);
1044193240Ssam	/* rate used to send management frames */
1045193240Ssam	rates.MgtRate = rs->rs_rates[0] & IEEE80211_RATE_VAL;
1046193240Ssam	/* rate used to send multicast frames */
1047193240Ssam	rates.McastRate = rates.MgtRate;
1048193240Ssam
1049193240Ssam	return mwl_hal_settxrate_auto(sc->sc_mh, &rates);
1050193240Ssam}
1051193240Ssam
1052193240Ssam/*
1053193240Ssam * Inform firmware of tx rate parameters.  Called whenever
1054193240Ssam * user-settable params change and after a channel change.
1055193240Ssam */
1056193240Ssamstatic int
1057193240Ssammwl_setrates(struct ieee80211vap *vap)
1058193240Ssam{
1059193240Ssam	struct mwl_vap *mvp = MWL_VAP(vap);
1060193240Ssam	struct ieee80211_node *ni = vap->iv_bss;
1061193240Ssam	const struct ieee80211_txparam *tp = ni->ni_txparms;
1062193240Ssam	MWL_HAL_TXRATE rates;
1063193240Ssam
1064193240Ssam	KASSERT(vap->iv_state == IEEE80211_S_RUN, ("state %d", vap->iv_state));
1065193240Ssam
1066193240Ssam	/*
1067193240Ssam	 * Update the h/w rate map.
1068193240Ssam	 * NB: 0x80 for MCS is passed through unchanged
1069193240Ssam	 */
1070193240Ssam	memset(&rates, 0, sizeof(rates));
1071193240Ssam	/* rate used to send management frames */
1072193240Ssam	rates.MgtRate = tp->mgmtrate;
1073193240Ssam	/* rate used to send multicast frames */
1074193240Ssam	rates.McastRate = tp->mcastrate;
1075193240Ssam
1076193240Ssam	/* while here calculate EAPOL fixed rate cookie */
1077193240Ssam	mvp->mv_eapolformat = htole16(mwl_calcformat(rates.MgtRate, ni));
1078193240Ssam
1079195171Ssam	return mwl_hal_settxrate(mvp->mv_hvap,
1080195171Ssam	    tp->ucastrate != IEEE80211_FIXED_RATE_NONE ?
1081195171Ssam		RATE_FIXED : RATE_AUTO, &rates);
1082193240Ssam}
1083193240Ssam
1084193240Ssam/*
1085193240Ssam * Setup a fixed xmit rate cookie for EAPOL frames.
1086193240Ssam */
1087193240Ssamstatic void
1088193240Ssammwl_seteapolformat(struct ieee80211vap *vap)
1089193240Ssam{
1090193240Ssam	struct mwl_vap *mvp = MWL_VAP(vap);
1091193240Ssam	struct ieee80211_node *ni = vap->iv_bss;
1092193240Ssam	enum ieee80211_phymode mode;
1093193240Ssam	uint8_t rate;
1094193240Ssam
1095193240Ssam	KASSERT(vap->iv_state == IEEE80211_S_RUN, ("state %d", vap->iv_state));
1096193240Ssam
1097193240Ssam	mode = ieee80211_chan2mode(ni->ni_chan);
1098193240Ssam	/*
1099193240Ssam	 * Use legacy rates when operating a mixed HT+non-HT bss.
1100193240Ssam	 * NB: this may violate POLA for sta and wds vap's.
1101193240Ssam	 */
1102193240Ssam	if (mode == IEEE80211_MODE_11NA &&
1103193656Ssam	    (vap->iv_flags_ht & IEEE80211_FHT_PUREN) == 0)
1104193240Ssam		rate = vap->iv_txparms[IEEE80211_MODE_11A].mgmtrate;
1105193240Ssam	else if (mode == IEEE80211_MODE_11NG &&
1106193656Ssam	    (vap->iv_flags_ht & IEEE80211_FHT_PUREN) == 0)
1107193240Ssam		rate = vap->iv_txparms[IEEE80211_MODE_11G].mgmtrate;
1108193240Ssam	else
1109193240Ssam		rate = vap->iv_txparms[mode].mgmtrate;
1110193240Ssam
1111193240Ssam	mvp->mv_eapolformat = htole16(mwl_calcformat(rate, ni));
1112193240Ssam}
1113193240Ssam
1114193240Ssam/*
1115193240Ssam * Map SKU+country code to region code for radar bin'ing.
1116193240Ssam */
1117193240Ssamstatic int
1118193240Ssammwl_map2regioncode(const struct ieee80211_regdomain *rd)
1119193240Ssam{
1120193240Ssam	switch (rd->regdomain) {
1121193240Ssam	case SKU_FCC:
1122193240Ssam	case SKU_FCC3:
1123193240Ssam		return DOMAIN_CODE_FCC;
1124193240Ssam	case SKU_CA:
1125193240Ssam		return DOMAIN_CODE_IC;
1126193240Ssam	case SKU_ETSI:
1127193240Ssam	case SKU_ETSI2:
1128193240Ssam	case SKU_ETSI3:
1129193240Ssam		if (rd->country == CTRY_SPAIN)
1130193240Ssam			return DOMAIN_CODE_SPAIN;
1131193240Ssam		if (rd->country == CTRY_FRANCE || rd->country == CTRY_FRANCE2)
1132193240Ssam			return DOMAIN_CODE_FRANCE;
1133193240Ssam		/* XXX force 1.3.1 radar type */
1134193240Ssam		return DOMAIN_CODE_ETSI_131;
1135193240Ssam	case SKU_JAPAN:
1136193240Ssam		return DOMAIN_CODE_MKK;
1137193240Ssam	case SKU_ROW:
1138193240Ssam		return DOMAIN_CODE_DGT;	/* Taiwan */
1139193240Ssam	case SKU_APAC:
1140193240Ssam	case SKU_APAC2:
1141193240Ssam	case SKU_APAC3:
1142193240Ssam		return DOMAIN_CODE_AUS;	/* Australia */
1143193240Ssam	}
1144193240Ssam	/* XXX KOREA? */
1145193240Ssam	return DOMAIN_CODE_FCC;			/* XXX? */
1146193240Ssam}
1147193240Ssam
1148193240Ssamstatic int
1149193240Ssammwl_hal_reset(struct mwl_softc *sc)
1150193240Ssam{
1151193240Ssam	struct ifnet *ifp = sc->sc_ifp;
1152193240Ssam	struct ieee80211com *ic = ifp->if_l2com;
1153193240Ssam	struct mwl_hal *mh = sc->sc_mh;
1154193240Ssam
1155193240Ssam	mwl_hal_setantenna(mh, WL_ANTENNATYPE_RX, sc->sc_rxantenna);
1156193240Ssam	mwl_hal_setantenna(mh, WL_ANTENNATYPE_TX, sc->sc_txantenna);
1157193240Ssam	mwl_hal_setradio(mh, 1, WL_AUTO_PREAMBLE);
1158193240Ssam	mwl_hal_setwmm(sc->sc_mh, (ic->ic_flags & IEEE80211_F_WME) != 0);
1159193240Ssam	mwl_chan_set(sc, ic->ic_curchan);
1160195171Ssam	/* NB: RF/RA performance tuned for indoor mode */
1161195171Ssam	mwl_hal_setrateadaptmode(mh, 0);
1162193240Ssam	mwl_hal_setoptimizationlevel(mh,
1163193240Ssam	    (ic->ic_flags & IEEE80211_F_BURST) != 0);
1164193240Ssam
1165193240Ssam	mwl_hal_setregioncode(mh, mwl_map2regioncode(&ic->ic_regdomain));
1166193240Ssam
1167195171Ssam	mwl_hal_setaggampduratemode(mh, 1, 80);		/* XXX */
1168195171Ssam	mwl_hal_setcfend(mh, 0);			/* XXX */
1169195171Ssam
1170193240Ssam	return 1;
1171193240Ssam}
1172193240Ssam
1173193240Ssamstatic int
1174193240Ssammwl_init_locked(struct mwl_softc *sc)
1175193240Ssam{
1176193240Ssam	struct ifnet *ifp = sc->sc_ifp;
1177193240Ssam	struct mwl_hal *mh = sc->sc_mh;
1178193240Ssam	int error = 0;
1179193240Ssam
1180193240Ssam	DPRINTF(sc, MWL_DEBUG_ANY, "%s: if_flags 0x%x\n",
1181193240Ssam		__func__, ifp->if_flags);
1182193240Ssam
1183193240Ssam	MWL_LOCK_ASSERT(sc);
1184193240Ssam
1185193240Ssam	/*
1186193240Ssam	 * Stop anything previously setup.  This is safe
1187193240Ssam	 * whether this is the first time through or not.
1188193240Ssam	 */
1189193240Ssam	mwl_stop_locked(ifp, 0);
1190193240Ssam
1191193240Ssam	/*
1192193240Ssam	 * Push vap-independent state to the firmware.
1193193240Ssam	 */
1194193240Ssam	if (!mwl_hal_reset(sc)) {
1195193240Ssam		if_printf(ifp, "unable to reset hardware\n");
1196193240Ssam		return EIO;
1197193240Ssam	}
1198193240Ssam
1199193240Ssam	/*
1200193240Ssam	 * Setup recv (once); transmit is already good to go.
1201193240Ssam	 */
1202193240Ssam	error = mwl_startrecv(sc);
1203193240Ssam	if (error != 0) {
1204193240Ssam		if_printf(ifp, "unable to start recv logic\n");
1205193240Ssam		return error;
1206193240Ssam	}
1207193240Ssam
1208193240Ssam	/*
1209193240Ssam	 * Enable interrupts.
1210193240Ssam	 */
1211193240Ssam	sc->sc_imask = MACREG_A2HRIC_BIT_RX_RDY
1212193240Ssam		     | MACREG_A2HRIC_BIT_TX_DONE
1213193240Ssam		     | MACREG_A2HRIC_BIT_OPC_DONE
1214193240Ssam#if 0
1215193240Ssam		     | MACREG_A2HRIC_BIT_MAC_EVENT
1216193240Ssam#endif
1217193240Ssam		     | MACREG_A2HRIC_BIT_ICV_ERROR
1218193240Ssam		     | MACREG_A2HRIC_BIT_RADAR_DETECT
1219193240Ssam		     | MACREG_A2HRIC_BIT_CHAN_SWITCH
1220193240Ssam#if 0
1221193240Ssam		     | MACREG_A2HRIC_BIT_QUEUE_EMPTY
1222193240Ssam#endif
1223193240Ssam		     | MACREG_A2HRIC_BIT_BA_WATCHDOG
1224195171Ssam		     | MACREQ_A2HRIC_BIT_TX_ACK
1225193240Ssam		     ;
1226193240Ssam
1227193240Ssam	ifp->if_drv_flags |= IFF_DRV_RUNNING;
1228193240Ssam	mwl_hal_intrset(mh, sc->sc_imask);
1229199559Sjhb	callout_reset(&sc->sc_watchdog, hz, mwl_watchdog, sc);
1230193240Ssam
1231193240Ssam	return 0;
1232193240Ssam}
1233193240Ssam
1234193240Ssamstatic void
1235193240Ssammwl_init(void *arg)
1236193240Ssam{
1237193240Ssam	struct mwl_softc *sc = arg;
1238193240Ssam	struct ifnet *ifp = sc->sc_ifp;
1239193240Ssam	struct ieee80211com *ic = ifp->if_l2com;
1240193240Ssam	int error = 0;
1241193240Ssam
1242193240Ssam	DPRINTF(sc, MWL_DEBUG_ANY, "%s: if_flags 0x%x\n",
1243193240Ssam		__func__, ifp->if_flags);
1244193240Ssam
1245193240Ssam	MWL_LOCK(sc);
1246193240Ssam	error = mwl_init_locked(sc);
1247193240Ssam	MWL_UNLOCK(sc);
1248193240Ssam
1249193240Ssam	if (error == 0)
1250193240Ssam		ieee80211_start_all(ic);	/* start all vap's */
1251193240Ssam}
1252193240Ssam
1253193240Ssamstatic void
1254193240Ssammwl_stop_locked(struct ifnet *ifp, int disable)
1255193240Ssam{
1256193240Ssam	struct mwl_softc *sc = ifp->if_softc;
1257193240Ssam
1258193240Ssam	DPRINTF(sc, MWL_DEBUG_ANY, "%s: invalid %u if_flags 0x%x\n",
1259193240Ssam		__func__, sc->sc_invalid, ifp->if_flags);
1260193240Ssam
1261193240Ssam	MWL_LOCK_ASSERT(sc);
1262193240Ssam	if (ifp->if_drv_flags & IFF_DRV_RUNNING) {
1263193240Ssam		/*
1264193240Ssam		 * Shutdown the hardware and driver.
1265193240Ssam		 */
1266193240Ssam		ifp->if_drv_flags &= ~IFF_DRV_RUNNING;
1267199559Sjhb		callout_stop(&sc->sc_watchdog);
1268199559Sjhb		sc->sc_tx_timer = 0;
1269193240Ssam		mwl_draintxq(sc);
1270193240Ssam	}
1271193240Ssam}
1272193240Ssam
1273193240Ssamstatic void
1274193240Ssammwl_stop(struct ifnet *ifp, int disable)
1275193240Ssam{
1276193240Ssam	struct mwl_softc *sc = ifp->if_softc;
1277193240Ssam
1278193240Ssam	MWL_LOCK(sc);
1279193240Ssam	mwl_stop_locked(ifp, disable);
1280193240Ssam	MWL_UNLOCK(sc);
1281193240Ssam}
1282193240Ssam
1283193240Ssamstatic int
1284193240Ssammwl_reset_vap(struct ieee80211vap *vap, int state)
1285193240Ssam{
1286193240Ssam	struct mwl_hal_vap *hvap = MWL_VAP(vap)->mv_hvap;
1287193240Ssam	struct ieee80211com *ic = vap->iv_ic;
1288193240Ssam
1289193240Ssam	if (state == IEEE80211_S_RUN)
1290193240Ssam		mwl_setrates(vap);
1291193240Ssam	/* XXX off by 1? */
1292193240Ssam	mwl_hal_setrtsthreshold(hvap, vap->iv_rtsthreshold);
1293193240Ssam	/* XXX auto? 20/40 split? */
1294193656Ssam	mwl_hal_sethtgi(hvap, (vap->iv_flags_ht &
1295193656Ssam	    (IEEE80211_FHT_SHORTGI20|IEEE80211_FHT_SHORTGI40)) ? 1 : 0);
1296193240Ssam	mwl_hal_setnprot(hvap, ic->ic_htprotmode == IEEE80211_PROT_NONE ?
1297193240Ssam	    HTPROTECT_NONE : HTPROTECT_AUTO);
1298193240Ssam	/* XXX txpower cap */
1299193240Ssam
1300193240Ssam	/* re-setup beacons */
1301193240Ssam	if (state == IEEE80211_S_RUN &&
1302193240Ssam	    (vap->iv_opmode == IEEE80211_M_HOSTAP ||
1303195618Srpaulo	     vap->iv_opmode == IEEE80211_M_MBSS ||
1304193240Ssam	     vap->iv_opmode == IEEE80211_M_IBSS)) {
1305193240Ssam		mwl_setapmode(vap, vap->iv_bss->ni_chan);
1306193240Ssam		mwl_hal_setnprotmode(hvap,
1307193240Ssam		    MS(ic->ic_curhtprotmode, IEEE80211_HTINFO_OPMODE));
1308193240Ssam		return mwl_beacon_setup(vap);
1309193240Ssam	}
1310193240Ssam	return 0;
1311193240Ssam}
1312193240Ssam
1313193240Ssam/*
1314193240Ssam * Reset the hardware w/o losing operational state.
1315193240Ssam * Used to to reset or reload hardware state for a vap.
1316193240Ssam */
1317193240Ssamstatic int
1318193240Ssammwl_reset(struct ieee80211vap *vap, u_long cmd)
1319193240Ssam{
1320193240Ssam	struct mwl_hal_vap *hvap = MWL_VAP(vap)->mv_hvap;
1321193240Ssam	int error = 0;
1322193240Ssam
1323193240Ssam	if (hvap != NULL) {			/* WDS, MONITOR, etc. */
1324193240Ssam		struct ieee80211com *ic = vap->iv_ic;
1325193240Ssam		struct ifnet *ifp = ic->ic_ifp;
1326193240Ssam		struct mwl_softc *sc = ifp->if_softc;
1327193240Ssam		struct mwl_hal *mh = sc->sc_mh;
1328193240Ssam
1329195171Ssam		/* XXX handle DWDS sta vap change */
1330193240Ssam		/* XXX do we need to disable interrupts? */
1331193240Ssam		mwl_hal_intrset(mh, 0);		/* disable interrupts */
1332193240Ssam		error = mwl_reset_vap(vap, vap->iv_state);
1333193240Ssam		mwl_hal_intrset(mh, sc->sc_imask);
1334193240Ssam	}
1335193240Ssam	return error;
1336193240Ssam}
1337193240Ssam
1338193240Ssam/*
1339193240Ssam * Allocate a tx buffer for sending a frame.  The
1340193240Ssam * packet is assumed to have the WME AC stored so
1341193240Ssam * we can use it to select the appropriate h/w queue.
1342193240Ssam */
1343193240Ssamstatic struct mwl_txbuf *
1344193240Ssammwl_gettxbuf(struct mwl_softc *sc, struct mwl_txq *txq)
1345193240Ssam{
1346193240Ssam	struct mwl_txbuf *bf;
1347193240Ssam
1348193240Ssam	/*
1349193240Ssam	 * Grab a TX buffer and associated resources.
1350193240Ssam	 */
1351193240Ssam	MWL_TXQ_LOCK(txq);
1352193240Ssam	bf = STAILQ_FIRST(&txq->free);
1353193240Ssam	if (bf != NULL) {
1354193240Ssam		STAILQ_REMOVE_HEAD(&txq->free, bf_list);
1355193240Ssam		txq->nfree--;
1356193240Ssam	}
1357193240Ssam	MWL_TXQ_UNLOCK(txq);
1358193240Ssam	if (bf == NULL)
1359193240Ssam		DPRINTF(sc, MWL_DEBUG_XMIT,
1360193240Ssam		    "%s: out of xmit buffers on q %d\n", __func__, txq->qnum);
1361193240Ssam	return bf;
1362193240Ssam}
1363193240Ssam
1364193240Ssam/*
1365193240Ssam * Return a tx buffer to the queue it came from.  Note there
1366193240Ssam * are two cases because we must preserve the order of buffers
1367193240Ssam * as it reflects the fixed order of descriptors in memory
1368193240Ssam * (the firmware pre-fetches descriptors so we cannot reorder).
1369193240Ssam */
1370193240Ssamstatic void
1371193240Ssammwl_puttxbuf_head(struct mwl_txq *txq, struct mwl_txbuf *bf)
1372193240Ssam{
1373193240Ssam	bf->bf_m = NULL;
1374193240Ssam	bf->bf_node = NULL;
1375193240Ssam	MWL_TXQ_LOCK(txq);
1376193240Ssam	STAILQ_INSERT_HEAD(&txq->free, bf, bf_list);
1377193240Ssam	txq->nfree++;
1378193240Ssam	MWL_TXQ_UNLOCK(txq);
1379193240Ssam}
1380193240Ssam
1381193240Ssamstatic void
1382193240Ssammwl_puttxbuf_tail(struct mwl_txq *txq, struct mwl_txbuf *bf)
1383193240Ssam{
1384193240Ssam	bf->bf_m = NULL;
1385193240Ssam	bf->bf_node = NULL;
1386193240Ssam	MWL_TXQ_LOCK(txq);
1387193240Ssam	STAILQ_INSERT_TAIL(&txq->free, bf, bf_list);
1388193240Ssam	txq->nfree++;
1389193240Ssam	MWL_TXQ_UNLOCK(txq);
1390193240Ssam}
1391193240Ssam
1392193240Ssamstatic void
1393193240Ssammwl_start(struct ifnet *ifp)
1394193240Ssam{
1395193240Ssam	struct mwl_softc *sc = ifp->if_softc;
1396193240Ssam	struct ieee80211_node *ni;
1397193240Ssam	struct mwl_txbuf *bf;
1398193240Ssam	struct mbuf *m;
1399193240Ssam	struct mwl_txq *txq = NULL;	/* XXX silence gcc */
1400193240Ssam	int nqueued;
1401193240Ssam
1402193240Ssam	if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0 || sc->sc_invalid)
1403193240Ssam		return;
1404193240Ssam	nqueued = 0;
1405193240Ssam	for (;;) {
1406193240Ssam		bf = NULL;
1407193240Ssam		IFQ_DEQUEUE(&ifp->if_snd, m);
1408193240Ssam		if (m == NULL)
1409193240Ssam			break;
1410193240Ssam		/*
1411193240Ssam		 * Grab the node for the destination.
1412193240Ssam		 */
1413193240Ssam		ni = (struct ieee80211_node *) m->m_pkthdr.rcvif;
1414193240Ssam		KASSERT(ni != NULL, ("no node"));
1415193240Ssam		m->m_pkthdr.rcvif = NULL;	/* committed, clear ref */
1416193240Ssam		/*
1417193240Ssam		 * Grab a TX buffer and associated resources.
1418193240Ssam		 * We honor the classification by the 802.11 layer.
1419193240Ssam		 */
1420193240Ssam		txq = sc->sc_ac2q[M_WME_GETAC(m)];
1421193240Ssam		bf = mwl_gettxbuf(sc, txq);
1422193240Ssam		if (bf == NULL) {
1423193240Ssam			m_freem(m);
1424193240Ssam			ieee80211_free_node(ni);
1425193240Ssam#ifdef MWL_TX_NODROP
1426193240Ssam			sc->sc_stats.mst_tx_qstop++;
1427193240Ssam			/* XXX blocks other traffic */
1428193240Ssam			ifp->if_drv_flags |= IFF_DRV_OACTIVE;
1429193240Ssam			break;
1430193240Ssam#else
1431193240Ssam			DPRINTF(sc, MWL_DEBUG_XMIT,
1432193240Ssam			    "%s: tail drop on q %d\n", __func__, txq->qnum);
1433193240Ssam			sc->sc_stats.mst_tx_qdrop++;
1434193240Ssam			continue;
1435193240Ssam#endif /* MWL_TX_NODROP */
1436193240Ssam		}
1437193240Ssam
1438193240Ssam		/*
1439193240Ssam		 * Pass the frame to the h/w for transmission.
1440193240Ssam		 */
1441193240Ssam		if (mwl_tx_start(sc, ni, bf, m)) {
1442193240Ssam			ifp->if_oerrors++;
1443193240Ssam			mwl_puttxbuf_head(txq, bf);
1444193240Ssam			ieee80211_free_node(ni);
1445193240Ssam			continue;
1446193240Ssam		}
1447193240Ssam		nqueued++;
1448193240Ssam		if (nqueued >= mwl_txcoalesce) {
1449193240Ssam			/*
1450193240Ssam			 * Poke the firmware to process queued frames;
1451193240Ssam			 * see below about (lack of) locking.
1452193240Ssam			 */
1453193240Ssam			nqueued = 0;
1454193240Ssam			mwl_hal_txstart(sc->sc_mh, 0/*XXX*/);
1455193240Ssam		}
1456193240Ssam	}
1457193240Ssam	if (nqueued) {
1458193240Ssam		/*
1459193240Ssam		 * NB: We don't need to lock against tx done because
1460193240Ssam		 * this just prods the firmware to check the transmit
1461193240Ssam		 * descriptors.  The firmware will also start fetching
1462193240Ssam		 * descriptors by itself if it notices new ones are
1463193240Ssam		 * present when it goes to deliver a tx done interrupt
1464193240Ssam		 * to the host. So if we race with tx done processing
1465193240Ssam		 * it's ok.  Delivering the kick here rather than in
1466193240Ssam		 * mwl_tx_start is an optimization to avoid poking the
1467193240Ssam		 * firmware for each packet.
1468193240Ssam		 *
1469193240Ssam		 * NB: the queue id isn't used so 0 is ok.
1470193240Ssam		 */
1471193240Ssam		mwl_hal_txstart(sc->sc_mh, 0/*XXX*/);
1472193240Ssam	}
1473193240Ssam}
1474193240Ssam
1475193240Ssamstatic int
1476193240Ssammwl_raw_xmit(struct ieee80211_node *ni, struct mbuf *m,
1477193240Ssam	const struct ieee80211_bpf_params *params)
1478193240Ssam{
1479193240Ssam	struct ieee80211com *ic = ni->ni_ic;
1480193240Ssam	struct ifnet *ifp = ic->ic_ifp;
1481193240Ssam	struct mwl_softc *sc = ifp->if_softc;
1482193240Ssam	struct mwl_txbuf *bf;
1483193240Ssam	struct mwl_txq *txq;
1484193240Ssam
1485193240Ssam	if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0 || sc->sc_invalid) {
1486193240Ssam		ieee80211_free_node(ni);
1487193240Ssam		m_freem(m);
1488193240Ssam		return ENETDOWN;
1489193240Ssam	}
1490193240Ssam	/*
1491193240Ssam	 * Grab a TX buffer and associated resources.
1492193240Ssam	 * Note that we depend on the classification
1493193240Ssam	 * by the 802.11 layer to get to the right h/w
1494193240Ssam	 * queue.  Management frames must ALWAYS go on
1495193240Ssam	 * queue 1 but we cannot just force that here
1496193240Ssam	 * because we may receive non-mgt frames.
1497193240Ssam	 */
1498193240Ssam	txq = sc->sc_ac2q[M_WME_GETAC(m)];
1499193240Ssam	bf = mwl_gettxbuf(sc, txq);
1500193240Ssam	if (bf == NULL) {
1501193240Ssam		sc->sc_stats.mst_tx_qstop++;
1502193240Ssam		/* XXX blocks other traffic */
1503193240Ssam		ifp->if_drv_flags |= IFF_DRV_OACTIVE;
1504193240Ssam		ieee80211_free_node(ni);
1505193240Ssam		m_freem(m);
1506193240Ssam		return ENOBUFS;
1507193240Ssam	}
1508193240Ssam	/*
1509193240Ssam	 * Pass the frame to the h/w for transmission.
1510193240Ssam	 */
1511193240Ssam	if (mwl_tx_start(sc, ni, bf, m)) {
1512193240Ssam		ifp->if_oerrors++;
1513193240Ssam		mwl_puttxbuf_head(txq, bf);
1514193240Ssam
1515193240Ssam		ieee80211_free_node(ni);
1516193240Ssam		return EIO;		/* XXX */
1517193240Ssam	}
1518193240Ssam	/*
1519193240Ssam	 * NB: We don't need to lock against tx done because
1520193240Ssam	 * this just prods the firmware to check the transmit
1521193240Ssam	 * descriptors.  The firmware will also start fetching
1522193240Ssam	 * descriptors by itself if it notices new ones are
1523193240Ssam	 * present when it goes to deliver a tx done interrupt
1524193240Ssam	 * to the host. So if we race with tx done processing
1525193240Ssam	 * it's ok.  Delivering the kick here rather than in
1526193240Ssam	 * mwl_tx_start is an optimization to avoid poking the
1527193240Ssam	 * firmware for each packet.
1528193240Ssam	 *
1529193240Ssam	 * NB: the queue id isn't used so 0 is ok.
1530193240Ssam	 */
1531193240Ssam	mwl_hal_txstart(sc->sc_mh, 0/*XXX*/);
1532193240Ssam	return 0;
1533193240Ssam}
1534193240Ssam
1535193240Ssamstatic int
1536193240Ssammwl_media_change(struct ifnet *ifp)
1537193240Ssam{
1538193240Ssam	struct ieee80211vap *vap = ifp->if_softc;
1539193240Ssam	int error;
1540193240Ssam
1541193240Ssam	error = ieee80211_media_change(ifp);
1542193240Ssam	/* NB: only the fixed rate can change and that doesn't need a reset */
1543193240Ssam	if (error == ENETRESET) {
1544193240Ssam		mwl_setrates(vap);
1545193240Ssam		error = 0;
1546193240Ssam	}
1547193240Ssam	return error;
1548193240Ssam}
1549193240Ssam
1550193240Ssam#ifdef MWL_DEBUG
1551193240Ssamstatic void
1552193240Ssammwl_keyprint(struct mwl_softc *sc, const char *tag,
1553193240Ssam	const MWL_HAL_KEYVAL *hk, const uint8_t mac[IEEE80211_ADDR_LEN])
1554193240Ssam{
1555193240Ssam	static const char *ciphers[] = {
1556193240Ssam		"WEP",
1557193240Ssam		"TKIP",
1558193240Ssam		"AES-CCM",
1559193240Ssam	};
1560193240Ssam	int i, n;
1561193240Ssam
1562193240Ssam	printf("%s: [%u] %-7s", tag, hk->keyIndex, ciphers[hk->keyTypeId]);
1563193240Ssam	for (i = 0, n = hk->keyLen; i < n; i++)
1564193240Ssam		printf(" %02x", hk->key.aes[i]);
1565193240Ssam	printf(" mac %s", ether_sprintf(mac));
1566193240Ssam	if (hk->keyTypeId == KEY_TYPE_ID_TKIP) {
1567193240Ssam		printf(" %s", "rxmic");
1568193240Ssam		for (i = 0; i < sizeof(hk->key.tkip.rxMic); i++)
1569193240Ssam			printf(" %02x", hk->key.tkip.rxMic[i]);
1570193240Ssam		printf(" txmic");
1571193240Ssam		for (i = 0; i < sizeof(hk->key.tkip.txMic); i++)
1572193240Ssam			printf(" %02x", hk->key.tkip.txMic[i]);
1573193240Ssam	}
1574193240Ssam	printf(" flags 0x%x\n", hk->keyFlags);
1575193240Ssam}
1576193240Ssam#endif
1577193240Ssam
1578193240Ssam/*
1579193240Ssam * Allocate a key cache slot for a unicast key.  The
1580193240Ssam * firmware handles key allocation and every station is
1581193240Ssam * guaranteed key space so we are always successful.
1582193240Ssam */
1583193240Ssamstatic int
1584193240Ssammwl_key_alloc(struct ieee80211vap *vap, struct ieee80211_key *k,
1585193240Ssam	ieee80211_keyix *keyix, ieee80211_keyix *rxkeyix)
1586193240Ssam{
1587193240Ssam	struct mwl_softc *sc = vap->iv_ic->ic_ifp->if_softc;
1588193240Ssam
1589193240Ssam	if (k->wk_keyix != IEEE80211_KEYIX_NONE ||
1590193240Ssam	    (k->wk_flags & IEEE80211_KEY_GROUP)) {
1591193240Ssam		if (!(&vap->iv_nw_keys[0] <= k &&
1592193240Ssam		      k < &vap->iv_nw_keys[IEEE80211_WEP_NKID])) {
1593193240Ssam			/* should not happen */
1594193240Ssam			DPRINTF(sc, MWL_DEBUG_KEYCACHE,
1595193240Ssam				"%s: bogus group key\n", __func__);
1596193240Ssam			return 0;
1597193240Ssam		}
1598193240Ssam		/* give the caller what they requested */
1599193240Ssam		*keyix = *rxkeyix = k - vap->iv_nw_keys;
1600193240Ssam	} else {
1601193240Ssam		/*
1602193240Ssam		 * Firmware handles key allocation.
1603193240Ssam		 */
1604193240Ssam		*keyix = *rxkeyix = 0;
1605193240Ssam	}
1606193240Ssam	return 1;
1607193240Ssam}
1608193240Ssam
1609193240Ssam/*
1610193240Ssam * Delete a key entry allocated by mwl_key_alloc.
1611193240Ssam */
1612193240Ssamstatic int
1613193240Ssammwl_key_delete(struct ieee80211vap *vap, const struct ieee80211_key *k)
1614193240Ssam{
1615193240Ssam	struct mwl_softc *sc = vap->iv_ic->ic_ifp->if_softc;
1616193240Ssam	struct mwl_hal_vap *hvap = MWL_VAP(vap)->mv_hvap;
1617193240Ssam	MWL_HAL_KEYVAL hk;
1618193240Ssam	const uint8_t bcastaddr[IEEE80211_ADDR_LEN] =
1619193240Ssam	    { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff };
1620193240Ssam
1621193240Ssam	if (hvap == NULL) {
1622193240Ssam		if (vap->iv_opmode != IEEE80211_M_WDS) {
1623193240Ssam			/* XXX monitor mode? */
1624193240Ssam			DPRINTF(sc, MWL_DEBUG_KEYCACHE,
1625193240Ssam			    "%s: no hvap for opmode %d\n", __func__,
1626193240Ssam			    vap->iv_opmode);
1627193240Ssam			return 0;
1628193240Ssam		}
1629193240Ssam		hvap = MWL_VAP(vap)->mv_ap_hvap;
1630193240Ssam	}
1631193240Ssam
1632193240Ssam	DPRINTF(sc, MWL_DEBUG_KEYCACHE, "%s: delete key %u\n",
1633193240Ssam	    __func__, k->wk_keyix);
1634193240Ssam
1635193240Ssam	memset(&hk, 0, sizeof(hk));
1636193240Ssam	hk.keyIndex = k->wk_keyix;
1637193240Ssam	switch (k->wk_cipher->ic_cipher) {
1638193240Ssam	case IEEE80211_CIPHER_WEP:
1639193240Ssam		hk.keyTypeId = KEY_TYPE_ID_WEP;
1640193240Ssam		break;
1641193240Ssam	case IEEE80211_CIPHER_TKIP:
1642193240Ssam		hk.keyTypeId = KEY_TYPE_ID_TKIP;
1643193240Ssam		break;
1644193240Ssam	case IEEE80211_CIPHER_AES_CCM:
1645193240Ssam		hk.keyTypeId = KEY_TYPE_ID_AES;
1646193240Ssam		break;
1647193240Ssam	default:
1648193240Ssam		/* XXX should not happen */
1649193240Ssam		DPRINTF(sc, MWL_DEBUG_KEYCACHE, "%s: unknown cipher %d\n",
1650193240Ssam		    __func__, k->wk_cipher->ic_cipher);
1651193240Ssam		return 0;
1652193240Ssam	}
1653193240Ssam	return (mwl_hal_keyreset(hvap, &hk, bcastaddr) == 0);	/*XXX*/
1654193240Ssam}
1655193240Ssam
1656193240Ssamstatic __inline int
1657193240Ssamaddgroupflags(MWL_HAL_KEYVAL *hk, const struct ieee80211_key *k)
1658193240Ssam{
1659193240Ssam	if (k->wk_flags & IEEE80211_KEY_GROUP) {
1660193240Ssam		if (k->wk_flags & IEEE80211_KEY_XMIT)
1661193240Ssam			hk->keyFlags |= KEY_FLAG_TXGROUPKEY;
1662193240Ssam		if (k->wk_flags & IEEE80211_KEY_RECV)
1663193240Ssam			hk->keyFlags |= KEY_FLAG_RXGROUPKEY;
1664193240Ssam		return 1;
1665193240Ssam	} else
1666193240Ssam		return 0;
1667193240Ssam}
1668193240Ssam
1669193240Ssam/*
1670193240Ssam * Set the key cache contents for the specified key.  Key cache
1671193240Ssam * slot(s) must already have been allocated by mwl_key_alloc.
1672193240Ssam */
1673193240Ssamstatic int
1674193240Ssammwl_key_set(struct ieee80211vap *vap, const struct ieee80211_key *k,
1675193240Ssam	const uint8_t mac[IEEE80211_ADDR_LEN])
1676193240Ssam{
1677193240Ssam#define	GRPXMIT	(IEEE80211_KEY_XMIT | IEEE80211_KEY_GROUP)
1678193240Ssam/* NB: static wep keys are marked GROUP+tx/rx; GTK will be tx or rx */
1679193240Ssam#define	IEEE80211_IS_STATICKEY(k) \
1680193240Ssam	(((k)->wk_flags & (GRPXMIT|IEEE80211_KEY_RECV)) == \
1681193240Ssam	 (GRPXMIT|IEEE80211_KEY_RECV))
1682193240Ssam	struct mwl_softc *sc = vap->iv_ic->ic_ifp->if_softc;
1683193240Ssam	struct mwl_hal_vap *hvap = MWL_VAP(vap)->mv_hvap;
1684193240Ssam	const struct ieee80211_cipher *cip = k->wk_cipher;
1685193240Ssam	const uint8_t *macaddr;
1686193240Ssam	MWL_HAL_KEYVAL hk;
1687193240Ssam
1688193240Ssam	KASSERT((k->wk_flags & IEEE80211_KEY_SWCRYPT) == 0,
1689193240Ssam		("s/w crypto set?"));
1690193240Ssam
1691193240Ssam	if (hvap == NULL) {
1692193240Ssam		if (vap->iv_opmode != IEEE80211_M_WDS) {
1693193240Ssam			/* XXX monitor mode? */
1694193240Ssam			DPRINTF(sc, MWL_DEBUG_KEYCACHE,
1695193240Ssam			    "%s: no hvap for opmode %d\n", __func__,
1696193240Ssam			    vap->iv_opmode);
1697193240Ssam			return 0;
1698193240Ssam		}
1699193240Ssam		hvap = MWL_VAP(vap)->mv_ap_hvap;
1700193240Ssam	}
1701193240Ssam	memset(&hk, 0, sizeof(hk));
1702193240Ssam	hk.keyIndex = k->wk_keyix;
1703193240Ssam	switch (cip->ic_cipher) {
1704193240Ssam	case IEEE80211_CIPHER_WEP:
1705193240Ssam		hk.keyTypeId = KEY_TYPE_ID_WEP;
1706193240Ssam		hk.keyLen = k->wk_keylen;
1707193240Ssam		if (k->wk_keyix == vap->iv_def_txkey)
1708193240Ssam			hk.keyFlags = KEY_FLAG_WEP_TXKEY;
1709193240Ssam		if (!IEEE80211_IS_STATICKEY(k)) {
1710193240Ssam			/* NB: WEP is never used for the PTK */
1711193240Ssam			(void) addgroupflags(&hk, k);
1712193240Ssam		}
1713193240Ssam		break;
1714193240Ssam	case IEEE80211_CIPHER_TKIP:
1715193240Ssam		hk.keyTypeId = KEY_TYPE_ID_TKIP;
1716193240Ssam		hk.key.tkip.tsc.high = (uint32_t)(k->wk_keytsc >> 16);
1717193240Ssam		hk.key.tkip.tsc.low = (uint16_t)k->wk_keytsc;
1718193240Ssam		hk.keyFlags = KEY_FLAG_TSC_VALID | KEY_FLAG_MICKEY_VALID;
1719193240Ssam		hk.keyLen = k->wk_keylen + IEEE80211_MICBUF_SIZE;
1720193240Ssam		if (!addgroupflags(&hk, k))
1721193240Ssam			hk.keyFlags |= KEY_FLAG_PAIRWISE;
1722193240Ssam		break;
1723193240Ssam	case IEEE80211_CIPHER_AES_CCM:
1724193240Ssam		hk.keyTypeId = KEY_TYPE_ID_AES;
1725193240Ssam		hk.keyLen = k->wk_keylen;
1726193240Ssam		if (!addgroupflags(&hk, k))
1727193240Ssam			hk.keyFlags |= KEY_FLAG_PAIRWISE;
1728193240Ssam		break;
1729193240Ssam	default:
1730193240Ssam		/* XXX should not happen */
1731193240Ssam		DPRINTF(sc, MWL_DEBUG_KEYCACHE, "%s: unknown cipher %d\n",
1732193240Ssam		    __func__, k->wk_cipher->ic_cipher);
1733193240Ssam		return 0;
1734193240Ssam	}
1735193240Ssam	/*
1736193240Ssam	 * NB: tkip mic keys get copied here too; the layout
1737193240Ssam	 *     just happens to match that in ieee80211_key.
1738193240Ssam	 */
1739193240Ssam	memcpy(hk.key.aes, k->wk_key, hk.keyLen);
1740193240Ssam
1741193240Ssam	/*
1742193240Ssam	 * Locate address of sta db entry for writing key;
1743193240Ssam	 * the convention unfortunately is somewhat different
1744193240Ssam	 * than how net80211, hostapd, and wpa_supplicant think.
1745193240Ssam	 */
1746193240Ssam	if (vap->iv_opmode == IEEE80211_M_STA) {
1747193240Ssam		/*
1748193240Ssam		 * NB: keys plumbed before the sta reaches AUTH state
1749193240Ssam		 * will be discarded or written to the wrong sta db
1750193240Ssam		 * entry because iv_bss is meaningless.  This is ok
1751193240Ssam		 * (right now) because we handle deferred plumbing of
1752193240Ssam		 * WEP keys when the sta reaches AUTH state.
1753193240Ssam		 */
1754193240Ssam		macaddr = vap->iv_bss->ni_bssid;
1755196842Ssam		if ((k->wk_flags & IEEE80211_KEY_GROUP) == 0) {
1756196842Ssam			/* XXX plumb to local sta db too for static key wep */
1757196842Ssam			mwl_hal_keyset(hvap, &hk, vap->iv_myaddr);
1758196842Ssam		}
1759193240Ssam	} else if (vap->iv_opmode == IEEE80211_M_WDS &&
1760193240Ssam	    vap->iv_state != IEEE80211_S_RUN) {
1761193240Ssam		/*
1762193240Ssam		 * Prior to RUN state a WDS vap will not it's BSS node
1763193240Ssam		 * setup so we will plumb the key to the wrong mac
1764193240Ssam		 * address (it'll be our local address).  Workaround
1765193240Ssam		 * this for the moment by grabbing the correct address.
1766193240Ssam		 */
1767193240Ssam		macaddr = vap->iv_des_bssid;
1768193240Ssam	} else if ((k->wk_flags & GRPXMIT) == GRPXMIT)
1769193240Ssam		macaddr = vap->iv_myaddr;
1770193240Ssam	else
1771193240Ssam		macaddr = mac;
1772193240Ssam	KEYPRINTF(sc, &hk, macaddr);
1773193240Ssam	return (mwl_hal_keyset(hvap, &hk, macaddr) == 0);
1774193240Ssam#undef IEEE80211_IS_STATICKEY
1775193240Ssam#undef GRPXMIT
1776193240Ssam}
1777193240Ssam
1778193240Ssam/* unaligned little endian access */
1779193240Ssam#define LE_READ_2(p)				\
1780193240Ssam	((uint16_t)				\
1781193240Ssam	 ((((const uint8_t *)(p))[0]      ) |	\
1782193240Ssam	  (((const uint8_t *)(p))[1] <<  8)))
1783193240Ssam#define LE_READ_4(p)				\
1784193240Ssam	((uint32_t)				\
1785193240Ssam	 ((((const uint8_t *)(p))[0]      ) |	\
1786193240Ssam	  (((const uint8_t *)(p))[1] <<  8) |	\
1787193240Ssam	  (((const uint8_t *)(p))[2] << 16) |	\
1788193240Ssam	  (((const uint8_t *)(p))[3] << 24)))
1789193240Ssam
1790193240Ssam/*
1791193240Ssam * Set the multicast filter contents into the hardware.
1792193240Ssam * XXX f/w has no support; just defer to the os.
1793193240Ssam */
1794193240Ssamstatic void
1795193240Ssammwl_setmcastfilter(struct mwl_softc *sc)
1796193240Ssam{
1797193240Ssam	struct ifnet *ifp = sc->sc_ifp;
1798193240Ssam#if 0
1799193240Ssam	struct ether_multi *enm;
1800193240Ssam	struct ether_multistep estep;
1801193240Ssam	uint8_t macs[IEEE80211_ADDR_LEN*MWL_HAL_MCAST_MAX];/* XXX stack use */
1802193240Ssam	uint8_t *mp;
1803193240Ssam	int nmc;
1804193240Ssam
1805193240Ssam	mp = macs;
1806193240Ssam	nmc = 0;
1807193240Ssam	ETHER_FIRST_MULTI(estep, &sc->sc_ec, enm);
1808193240Ssam	while (enm != NULL) {
1809193240Ssam		/* XXX Punt on ranges. */
1810193240Ssam		if (nmc == MWL_HAL_MCAST_MAX ||
1811193240Ssam		    !IEEE80211_ADDR_EQ(enm->enm_addrlo, enm->enm_addrhi)) {
1812193240Ssam			ifp->if_flags |= IFF_ALLMULTI;
1813193240Ssam			return;
1814193240Ssam		}
1815193240Ssam		IEEE80211_ADDR_COPY(mp, enm->enm_addrlo);
1816193240Ssam		mp += IEEE80211_ADDR_LEN, nmc++;
1817193240Ssam		ETHER_NEXT_MULTI(estep, enm);
1818193240Ssam	}
1819193240Ssam	ifp->if_flags &= ~IFF_ALLMULTI;
1820193240Ssam	mwl_hal_setmcast(sc->sc_mh, nmc, macs);
1821193240Ssam#else
1822193240Ssam	/* XXX no mcast filter support; we get everything */
1823193240Ssam	ifp->if_flags |= IFF_ALLMULTI;
1824193240Ssam#endif
1825193240Ssam}
1826193240Ssam
1827193240Ssamstatic int
1828193240Ssammwl_mode_init(struct mwl_softc *sc)
1829193240Ssam{
1830193240Ssam	struct ifnet *ifp = sc->sc_ifp;
1831193240Ssam	struct ieee80211com *ic = ifp->if_l2com;
1832193240Ssam	struct mwl_hal *mh = sc->sc_mh;
1833193240Ssam
1834193240Ssam	/*
1835193240Ssam	 * NB: Ignore promisc in hostap mode; it's set by the
1836193240Ssam	 * bridge.  This is wrong but we have no way to
1837193240Ssam	 * identify internal requests (from the bridge)
1838193240Ssam	 * versus external requests such as for tcpdump.
1839193240Ssam	 */
1840193240Ssam	mwl_hal_setpromisc(mh, (ifp->if_flags & IFF_PROMISC) &&
1841193240Ssam	    ic->ic_opmode != IEEE80211_M_HOSTAP);
1842193240Ssam	mwl_setmcastfilter(sc);
1843193240Ssam
1844193240Ssam	return 0;
1845193240Ssam}
1846193240Ssam
1847193240Ssam/*
1848193240Ssam * Callback from the 802.11 layer after a multicast state change.
1849193240Ssam */
1850193240Ssamstatic void
1851193240Ssammwl_update_mcast(struct ifnet *ifp)
1852193240Ssam{
1853193240Ssam	struct mwl_softc *sc = ifp->if_softc;
1854193240Ssam
1855193240Ssam	mwl_setmcastfilter(sc);
1856193240Ssam}
1857193240Ssam
1858193240Ssam/*
1859193240Ssam * Callback from the 802.11 layer after a promiscuous mode change.
1860193240Ssam * Note this interface does not check the operating mode as this
1861193240Ssam * is an internal callback and we are expected to honor the current
1862193240Ssam * state (e.g. this is used for setting the interface in promiscuous
1863193240Ssam * mode when operating in hostap mode to do ACS).
1864193240Ssam */
1865193240Ssamstatic void
1866193240Ssammwl_update_promisc(struct ifnet *ifp)
1867193240Ssam{
1868193240Ssam	struct mwl_softc *sc = ifp->if_softc;
1869193240Ssam
1870193240Ssam	mwl_hal_setpromisc(sc->sc_mh, (ifp->if_flags & IFF_PROMISC) != 0);
1871193240Ssam}
1872193240Ssam
1873193240Ssam/*
1874193240Ssam * Callback from the 802.11 layer to update the slot time
1875193240Ssam * based on the current setting.  We use it to notify the
1876193240Ssam * firmware of ERP changes and the f/w takes care of things
1877193240Ssam * like slot time and preamble.
1878193240Ssam */
1879193240Ssamstatic void
1880193240Ssammwl_updateslot(struct ifnet *ifp)
1881193240Ssam{
1882193240Ssam	struct mwl_softc *sc = ifp->if_softc;
1883193240Ssam	struct ieee80211com *ic = ifp->if_l2com;
1884193240Ssam	struct mwl_hal *mh = sc->sc_mh;
1885193240Ssam	int prot;
1886193240Ssam
1887193240Ssam	/* NB: can be called early; suppress needless cmds */
1888193240Ssam	if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0)
1889193240Ssam		return;
1890193240Ssam
1891193240Ssam	/*
1892193240Ssam	 * Calculate the ERP flags.  The firwmare will use
1893193240Ssam	 * this to carry out the appropriate measures.
1894193240Ssam	 */
1895193240Ssam	prot = 0;
1896193240Ssam	if (IEEE80211_IS_CHAN_ANYG(ic->ic_curchan)) {
1897193240Ssam		if ((ic->ic_flags & IEEE80211_F_SHSLOT) == 0)
1898193240Ssam			prot |= IEEE80211_ERP_NON_ERP_PRESENT;
1899193240Ssam		if (ic->ic_flags & IEEE80211_F_USEPROT)
1900193240Ssam			prot |= IEEE80211_ERP_USE_PROTECTION;
1901193240Ssam		if (ic->ic_flags & IEEE80211_F_USEBARKER)
1902193240Ssam			prot |= IEEE80211_ERP_LONG_PREAMBLE;
1903193240Ssam	}
1904193240Ssam
1905193240Ssam	DPRINTF(sc, MWL_DEBUG_RESET,
1906193240Ssam	    "%s: chan %u MHz/flags 0x%x %s slot, (prot 0x%x ic_flags 0x%x)\n",
1907193240Ssam	    __func__, ic->ic_curchan->ic_freq, ic->ic_curchan->ic_flags,
1908193240Ssam	    ic->ic_flags & IEEE80211_F_SHSLOT ? "short" : "long", prot,
1909193240Ssam	    ic->ic_flags);
1910193240Ssam
1911193240Ssam	mwl_hal_setgprot(mh, prot);
1912193240Ssam}
1913193240Ssam
1914193240Ssam/*
1915193240Ssam * Setup the beacon frame.
1916193240Ssam */
1917193240Ssamstatic int
1918193240Ssammwl_beacon_setup(struct ieee80211vap *vap)
1919193240Ssam{
1920193240Ssam	struct mwl_hal_vap *hvap = MWL_VAP(vap)->mv_hvap;
1921193240Ssam	struct ieee80211_node *ni = vap->iv_bss;
1922193240Ssam	struct ieee80211_beacon_offsets bo;
1923193240Ssam	struct mbuf *m;
1924193240Ssam
1925193240Ssam	m = ieee80211_beacon_alloc(ni, &bo);
1926193240Ssam	if (m == NULL)
1927193240Ssam		return ENOBUFS;
1928193240Ssam	mwl_hal_setbeacon(hvap, mtod(m, const void *), m->m_len);
1929193240Ssam	m_free(m);
1930193240Ssam
1931193240Ssam	return 0;
1932193240Ssam}
1933193240Ssam
1934193240Ssam/*
1935193240Ssam * Update the beacon frame in response to a change.
1936193240Ssam */
1937193240Ssamstatic void
1938193240Ssammwl_beacon_update(struct ieee80211vap *vap, int item)
1939193240Ssam{
1940193240Ssam	struct mwl_hal_vap *hvap = MWL_VAP(vap)->mv_hvap;
1941193240Ssam	struct ieee80211com *ic = vap->iv_ic;
1942193240Ssam
1943193240Ssam	KASSERT(hvap != NULL, ("no beacon"));
1944193240Ssam	switch (item) {
1945193240Ssam	case IEEE80211_BEACON_ERP:
1946193240Ssam		mwl_updateslot(ic->ic_ifp);
1947193240Ssam		break;
1948193240Ssam	case IEEE80211_BEACON_HTINFO:
1949193240Ssam		mwl_hal_setnprotmode(hvap,
1950193240Ssam		    MS(ic->ic_curhtprotmode, IEEE80211_HTINFO_OPMODE));
1951193240Ssam		break;
1952193240Ssam	case IEEE80211_BEACON_CAPS:
1953193240Ssam	case IEEE80211_BEACON_WME:
1954193240Ssam	case IEEE80211_BEACON_APPIE:
1955193240Ssam	case IEEE80211_BEACON_CSA:
1956193240Ssam		break;
1957193240Ssam	case IEEE80211_BEACON_TIM:
1958193240Ssam		/* NB: firmware always forms TIM */
1959193240Ssam		return;
1960193240Ssam	}
1961193240Ssam	/* XXX retain beacon frame and update */
1962193240Ssam	mwl_beacon_setup(vap);
1963193240Ssam}
1964193240Ssam
1965193240Ssamstatic void
1966193240Ssammwl_load_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
1967193240Ssam{
1968193240Ssam	bus_addr_t *paddr = (bus_addr_t*) arg;
1969193240Ssam	KASSERT(error == 0, ("error %u on bus_dma callback", error));
1970193240Ssam	*paddr = segs->ds_addr;
1971193240Ssam}
1972193240Ssam
1973193240Ssam#ifdef MWL_HOST_PS_SUPPORT
1974193240Ssam/*
1975193240Ssam * Handle power save station occupancy changes.
1976193240Ssam */
1977193240Ssamstatic void
1978193240Ssammwl_update_ps(struct ieee80211vap *vap, int nsta)
1979193240Ssam{
1980193240Ssam	struct mwl_vap *mvp = MWL_VAP(vap);
1981193240Ssam
1982193240Ssam	if (nsta == 0 || mvp->mv_last_ps_sta == 0)
1983193240Ssam		mwl_hal_setpowersave_bss(mvp->mv_hvap, nsta);
1984193240Ssam	mvp->mv_last_ps_sta = nsta;
1985193240Ssam}
1986193240Ssam
1987193240Ssam/*
1988193240Ssam * Handle associated station power save state changes.
1989193240Ssam */
1990193240Ssamstatic int
1991193240Ssammwl_set_tim(struct ieee80211_node *ni, int set)
1992193240Ssam{
1993193240Ssam	struct ieee80211vap *vap = ni->ni_vap;
1994193240Ssam	struct mwl_vap *mvp = MWL_VAP(vap);
1995193240Ssam
1996193240Ssam	if (mvp->mv_set_tim(ni, set)) {		/* NB: state change */
1997193240Ssam		mwl_hal_setpowersave_sta(mvp->mv_hvap,
1998193240Ssam		    IEEE80211_AID(ni->ni_associd), set);
1999193240Ssam		return 1;
2000193240Ssam	} else
2001193240Ssam		return 0;
2002193240Ssam}
2003193240Ssam#endif /* MWL_HOST_PS_SUPPORT */
2004193240Ssam
2005193240Ssamstatic int
2006193240Ssammwl_desc_setup(struct mwl_softc *sc, const char *name,
2007193240Ssam	struct mwl_descdma *dd,
2008193240Ssam	int nbuf, size_t bufsize, int ndesc, size_t descsize)
2009193240Ssam{
2010193240Ssam	struct ifnet *ifp = sc->sc_ifp;
2011193240Ssam	uint8_t *ds;
2012193240Ssam	int error;
2013193240Ssam
2014193240Ssam	DPRINTF(sc, MWL_DEBUG_RESET,
2015193240Ssam	    "%s: %s DMA: %u bufs (%ju) %u desc/buf (%ju)\n",
2016193240Ssam	    __func__, name, nbuf, (uintmax_t) bufsize,
2017193240Ssam	    ndesc, (uintmax_t) descsize);
2018193240Ssam
2019193240Ssam	dd->dd_name = name;
2020193240Ssam	dd->dd_desc_len = nbuf * ndesc * descsize;
2021193240Ssam
2022193240Ssam	/*
2023193240Ssam	 * Setup DMA descriptor area.
2024193240Ssam	 */
2025193240Ssam	error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev),	/* parent */
2026193240Ssam		       PAGE_SIZE, 0,		/* alignment, bounds */
2027193240Ssam		       BUS_SPACE_MAXADDR_32BIT,	/* lowaddr */
2028193240Ssam		       BUS_SPACE_MAXADDR,	/* highaddr */
2029193240Ssam		       NULL, NULL,		/* filter, filterarg */
2030193240Ssam		       dd->dd_desc_len,		/* maxsize */
2031193240Ssam		       1,			/* nsegments */
2032193240Ssam		       dd->dd_desc_len,		/* maxsegsize */
2033193240Ssam		       BUS_DMA_ALLOCNOW,	/* flags */
2034193240Ssam		       NULL,			/* lockfunc */
2035193240Ssam		       NULL,			/* lockarg */
2036193240Ssam		       &dd->dd_dmat);
2037193240Ssam	if (error != 0) {
2038193240Ssam		if_printf(ifp, "cannot allocate %s DMA tag\n", dd->dd_name);
2039193240Ssam		return error;
2040193240Ssam	}
2041193240Ssam
2042193240Ssam	/* allocate descriptors */
2043193240Ssam	error = bus_dmamap_create(dd->dd_dmat, BUS_DMA_NOWAIT, &dd->dd_dmamap);
2044193240Ssam	if (error != 0) {
2045193240Ssam		if_printf(ifp, "unable to create dmamap for %s descriptors, "
2046193240Ssam			"error %u\n", dd->dd_name, error);
2047193240Ssam		goto fail0;
2048193240Ssam	}
2049193240Ssam
2050193240Ssam	error = bus_dmamem_alloc(dd->dd_dmat, (void**) &dd->dd_desc,
2051193240Ssam				 BUS_DMA_NOWAIT | BUS_DMA_COHERENT,
2052193240Ssam				 &dd->dd_dmamap);
2053193240Ssam	if (error != 0) {
2054193240Ssam		if_printf(ifp, "unable to alloc memory for %u %s descriptors, "
2055193240Ssam			"error %u\n", nbuf * ndesc, dd->dd_name, error);
2056193240Ssam		goto fail1;
2057193240Ssam	}
2058193240Ssam
2059193240Ssam	error = bus_dmamap_load(dd->dd_dmat, dd->dd_dmamap,
2060193240Ssam				dd->dd_desc, dd->dd_desc_len,
2061193240Ssam				mwl_load_cb, &dd->dd_desc_paddr,
2062193240Ssam				BUS_DMA_NOWAIT);
2063193240Ssam	if (error != 0) {
2064193240Ssam		if_printf(ifp, "unable to map %s descriptors, error %u\n",
2065193240Ssam			dd->dd_name, error);
2066193240Ssam		goto fail2;
2067193240Ssam	}
2068193240Ssam
2069193240Ssam	ds = dd->dd_desc;
2070193240Ssam	memset(ds, 0, dd->dd_desc_len);
2071193240Ssam	DPRINTF(sc, MWL_DEBUG_RESET, "%s: %s DMA map: %p (%lu) -> %p (%lu)\n",
2072193240Ssam	    __func__, dd->dd_name, ds, (u_long) dd->dd_desc_len,
2073193240Ssam	    (caddr_t) dd->dd_desc_paddr, /*XXX*/ (u_long) dd->dd_desc_len);
2074193240Ssam
2075193240Ssam	return 0;
2076193240Ssamfail2:
2077193240Ssam	bus_dmamem_free(dd->dd_dmat, dd->dd_desc, dd->dd_dmamap);
2078193240Ssamfail1:
2079193240Ssam	bus_dmamap_destroy(dd->dd_dmat, dd->dd_dmamap);
2080193240Ssamfail0:
2081193240Ssam	bus_dma_tag_destroy(dd->dd_dmat);
2082193240Ssam	memset(dd, 0, sizeof(*dd));
2083193240Ssam	return error;
2084193240Ssam#undef DS2PHYS
2085193240Ssam}
2086193240Ssam
2087193240Ssamstatic void
2088193240Ssammwl_desc_cleanup(struct mwl_softc *sc, struct mwl_descdma *dd)
2089193240Ssam{
2090193240Ssam	bus_dmamap_unload(dd->dd_dmat, dd->dd_dmamap);
2091193240Ssam	bus_dmamem_free(dd->dd_dmat, dd->dd_desc, dd->dd_dmamap);
2092193240Ssam	bus_dmamap_destroy(dd->dd_dmat, dd->dd_dmamap);
2093193240Ssam	bus_dma_tag_destroy(dd->dd_dmat);
2094193240Ssam
2095193240Ssam	memset(dd, 0, sizeof(*dd));
2096193240Ssam}
2097193240Ssam
2098193240Ssam/*
2099193240Ssam * Construct a tx q's free list.  The order of entries on
2100193240Ssam * the list must reflect the physical layout of tx descriptors
2101193240Ssam * because the firmware pre-fetches descriptors.
2102193240Ssam *
2103193240Ssam * XXX might be better to use indices into the buffer array.
2104193240Ssam */
2105193240Ssamstatic void
2106193240Ssammwl_txq_reset(struct mwl_softc *sc, struct mwl_txq *txq)
2107193240Ssam{
2108193240Ssam	struct mwl_txbuf *bf;
2109193240Ssam	int i;
2110193240Ssam
2111193240Ssam	bf = txq->dma.dd_bufptr;
2112193240Ssam	STAILQ_INIT(&txq->free);
2113193240Ssam	for (i = 0; i < mwl_txbuf; i++, bf++)
2114193240Ssam		STAILQ_INSERT_TAIL(&txq->free, bf, bf_list);
2115193240Ssam	txq->nfree = i;
2116193240Ssam}
2117193240Ssam
2118193240Ssam#define	DS2PHYS(_dd, _ds) \
2119193240Ssam	((_dd)->dd_desc_paddr + ((caddr_t)(_ds) - (caddr_t)(_dd)->dd_desc))
2120193240Ssam
2121193240Ssamstatic int
2122193240Ssammwl_txdma_setup(struct mwl_softc *sc, struct mwl_txq *txq)
2123193240Ssam{
2124193240Ssam	struct ifnet *ifp = sc->sc_ifp;
2125193240Ssam	int error, bsize, i;
2126193240Ssam	struct mwl_txbuf *bf;
2127193240Ssam	struct mwl_txdesc *ds;
2128193240Ssam
2129193240Ssam	error = mwl_desc_setup(sc, "tx", &txq->dma,
2130193240Ssam			mwl_txbuf, sizeof(struct mwl_txbuf),
2131193240Ssam			MWL_TXDESC, sizeof(struct mwl_txdesc));
2132193240Ssam	if (error != 0)
2133193240Ssam		return error;
2134193240Ssam
2135193240Ssam	/* allocate and setup tx buffers */
2136193240Ssam	bsize = mwl_txbuf * sizeof(struct mwl_txbuf);
2137193240Ssam	bf = malloc(bsize, M_MWLDEV, M_NOWAIT | M_ZERO);
2138193240Ssam	if (bf == NULL) {
2139193240Ssam		if_printf(ifp, "malloc of %u tx buffers failed\n",
2140193240Ssam			mwl_txbuf);
2141193240Ssam		return ENOMEM;
2142193240Ssam	}
2143193240Ssam	txq->dma.dd_bufptr = bf;
2144193240Ssam
2145193240Ssam	ds = txq->dma.dd_desc;
2146193240Ssam	for (i = 0; i < mwl_txbuf; i++, bf++, ds += MWL_TXDESC) {
2147193240Ssam		bf->bf_desc = ds;
2148193240Ssam		bf->bf_daddr = DS2PHYS(&txq->dma, ds);
2149193240Ssam		error = bus_dmamap_create(sc->sc_dmat, BUS_DMA_NOWAIT,
2150193240Ssam				&bf->bf_dmamap);
2151193240Ssam		if (error != 0) {
2152193240Ssam			if_printf(ifp, "unable to create dmamap for tx "
2153193240Ssam				"buffer %u, error %u\n", i, error);
2154193240Ssam			return error;
2155193240Ssam		}
2156193240Ssam	}
2157193240Ssam	mwl_txq_reset(sc, txq);
2158193240Ssam	return 0;
2159193240Ssam}
2160193240Ssam
2161193240Ssamstatic void
2162193240Ssammwl_txdma_cleanup(struct mwl_softc *sc, struct mwl_txq *txq)
2163193240Ssam{
2164193240Ssam	struct mwl_txbuf *bf;
2165193240Ssam	int i;
2166193240Ssam
2167193240Ssam	bf = txq->dma.dd_bufptr;
2168193240Ssam	for (i = 0; i < mwl_txbuf; i++, bf++) {
2169193240Ssam		KASSERT(bf->bf_m == NULL, ("mbuf on free list"));
2170193240Ssam		KASSERT(bf->bf_node == NULL, ("node on free list"));
2171193240Ssam		if (bf->bf_dmamap != NULL)
2172193240Ssam			bus_dmamap_destroy(sc->sc_dmat, bf->bf_dmamap);
2173193240Ssam	}
2174193240Ssam	STAILQ_INIT(&txq->free);
2175193240Ssam	txq->nfree = 0;
2176193240Ssam	if (txq->dma.dd_bufptr != NULL) {
2177193240Ssam		free(txq->dma.dd_bufptr, M_MWLDEV);
2178193240Ssam		txq->dma.dd_bufptr = NULL;
2179193240Ssam	}
2180193240Ssam	if (txq->dma.dd_desc_len != 0)
2181193240Ssam		mwl_desc_cleanup(sc, &txq->dma);
2182193240Ssam}
2183193240Ssam
2184193240Ssamstatic int
2185193240Ssammwl_rxdma_setup(struct mwl_softc *sc)
2186193240Ssam{
2187193240Ssam	struct ifnet *ifp = sc->sc_ifp;
2188193240Ssam	int error, jumbosize, bsize, i;
2189193240Ssam	struct mwl_rxbuf *bf;
2190193240Ssam	struct mwl_jumbo *rbuf;
2191193240Ssam	struct mwl_rxdesc *ds;
2192193240Ssam	caddr_t data;
2193193240Ssam
2194193240Ssam	error = mwl_desc_setup(sc, "rx", &sc->sc_rxdma,
2195193240Ssam			mwl_rxdesc, sizeof(struct mwl_rxbuf),
2196193240Ssam			1, sizeof(struct mwl_rxdesc));
2197193240Ssam	if (error != 0)
2198193240Ssam		return error;
2199193240Ssam
2200193240Ssam	/*
2201193240Ssam	 * Receive is done to a private pool of jumbo buffers.
2202193240Ssam	 * This allows us to attach to mbuf's and avoid re-mapping
2203193240Ssam	 * memory on each rx we post.  We allocate a large chunk
2204193240Ssam	 * of memory and manage it in the driver.  The mbuf free
2205193240Ssam	 * callback method is used to reclaim frames after sending
2206193240Ssam	 * them up the stack.  By default we allocate 2x the number of
2207193240Ssam	 * rx descriptors configured so we have some slop to hold
2208193240Ssam	 * us while frames are processed.
2209193240Ssam	 */
2210193240Ssam	if (mwl_rxbuf < 2*mwl_rxdesc) {
2211193240Ssam		if_printf(ifp,
2212193240Ssam		    "too few rx dma buffers (%d); increasing to %d\n",
2213193240Ssam		    mwl_rxbuf, 2*mwl_rxdesc);
2214193240Ssam		mwl_rxbuf = 2*mwl_rxdesc;
2215193240Ssam	}
2216193240Ssam	jumbosize = roundup(MWL_AGGR_SIZE, PAGE_SIZE);
2217193240Ssam	sc->sc_rxmemsize = mwl_rxbuf*jumbosize;
2218193240Ssam
2219193240Ssam	error = bus_dma_tag_create(sc->sc_dmat,	/* parent */
2220193240Ssam		       PAGE_SIZE, 0,		/* alignment, bounds */
2221193240Ssam		       BUS_SPACE_MAXADDR_32BIT,	/* lowaddr */
2222193240Ssam		       BUS_SPACE_MAXADDR,	/* highaddr */
2223193240Ssam		       NULL, NULL,		/* filter, filterarg */
2224193240Ssam		       sc->sc_rxmemsize,	/* maxsize */
2225193240Ssam		       1,			/* nsegments */
2226193240Ssam		       sc->sc_rxmemsize,	/* maxsegsize */
2227193240Ssam		       BUS_DMA_ALLOCNOW,	/* flags */
2228193240Ssam		       NULL,			/* lockfunc */
2229193240Ssam		       NULL,			/* lockarg */
2230193240Ssam		       &sc->sc_rxdmat);
2231193240Ssam	error = bus_dmamap_create(sc->sc_rxdmat, BUS_DMA_NOWAIT, &sc->sc_rxmap);
2232193240Ssam	if (error != 0) {
2233193240Ssam		if_printf(ifp, "could not create rx DMA map\n");
2234193240Ssam		return error;
2235193240Ssam	}
2236193240Ssam
2237193240Ssam	error = bus_dmamem_alloc(sc->sc_rxdmat, (void**) &sc->sc_rxmem,
2238193240Ssam				 BUS_DMA_NOWAIT | BUS_DMA_COHERENT,
2239193240Ssam				 &sc->sc_rxmap);
2240193240Ssam	if (error != 0) {
2241193240Ssam		if_printf(ifp, "could not alloc %ju bytes of rx DMA memory\n",
2242193240Ssam		    (uintmax_t) sc->sc_rxmemsize);
2243193240Ssam		return error;
2244193240Ssam	}
2245193240Ssam
2246193240Ssam	error = bus_dmamap_load(sc->sc_rxdmat, sc->sc_rxmap,
2247193240Ssam				sc->sc_rxmem, sc->sc_rxmemsize,
2248193240Ssam				mwl_load_cb, &sc->sc_rxmem_paddr,
2249193240Ssam				BUS_DMA_NOWAIT);
2250193240Ssam	if (error != 0) {
2251193240Ssam		if_printf(ifp, "could not load rx DMA map\n");
2252193240Ssam		return error;
2253193240Ssam	}
2254193240Ssam
2255193240Ssam	/*
2256193240Ssam	 * Allocate rx buffers and set them up.
2257193240Ssam	 */
2258193240Ssam	bsize = mwl_rxdesc * sizeof(struct mwl_rxbuf);
2259193240Ssam	bf = malloc(bsize, M_MWLDEV, M_NOWAIT | M_ZERO);
2260193240Ssam	if (bf == NULL) {
2261193240Ssam		if_printf(ifp, "malloc of %u rx buffers failed\n", bsize);
2262193240Ssam		return error;
2263193240Ssam	}
2264193240Ssam	sc->sc_rxdma.dd_bufptr = bf;
2265193240Ssam
2266193240Ssam	STAILQ_INIT(&sc->sc_rxbuf);
2267193240Ssam	ds = sc->sc_rxdma.dd_desc;
2268193240Ssam	for (i = 0; i < mwl_rxdesc; i++, bf++, ds++) {
2269193240Ssam		bf->bf_desc = ds;
2270193240Ssam		bf->bf_daddr = DS2PHYS(&sc->sc_rxdma, ds);
2271193240Ssam		/* pre-assign dma buffer */
2272193240Ssam		bf->bf_data = ((uint8_t *)sc->sc_rxmem) + (i*jumbosize);
2273193240Ssam		/* NB: tail is intentional to preserve descriptor order */
2274193240Ssam		STAILQ_INSERT_TAIL(&sc->sc_rxbuf, bf, bf_list);
2275193240Ssam	}
2276193240Ssam
2277193240Ssam	/*
2278193240Ssam	 * Place remainder of dma memory buffers on the free list.
2279193240Ssam	 */
2280193240Ssam	SLIST_INIT(&sc->sc_rxfree);
2281193240Ssam	for (; i < mwl_rxbuf; i++) {
2282193240Ssam		data = ((uint8_t *)sc->sc_rxmem) + (i*jumbosize);
2283193240Ssam		rbuf = MWL_JUMBO_DATA2BUF(data);
2284193240Ssam		SLIST_INSERT_HEAD(&sc->sc_rxfree, rbuf, next);
2285193240Ssam		sc->sc_nrxfree++;
2286193240Ssam	}
2287193240Ssam	return 0;
2288193240Ssam}
2289193240Ssam#undef DS2PHYS
2290193240Ssam
2291193240Ssamstatic void
2292193240Ssammwl_rxdma_cleanup(struct mwl_softc *sc)
2293193240Ssam{
2294193240Ssam	if (sc->sc_rxmap != NULL)
2295193240Ssam		bus_dmamap_unload(sc->sc_rxdmat, sc->sc_rxmap);
2296193240Ssam	if (sc->sc_rxmem != NULL) {
2297193240Ssam		bus_dmamem_free(sc->sc_rxdmat, sc->sc_rxmem, sc->sc_rxmap);
2298193240Ssam		sc->sc_rxmem = NULL;
2299193240Ssam	}
2300193240Ssam	if (sc->sc_rxmap != NULL) {
2301193240Ssam		bus_dmamap_destroy(sc->sc_rxdmat, sc->sc_rxmap);
2302193240Ssam		sc->sc_rxmap = NULL;
2303193240Ssam	}
2304193240Ssam	if (sc->sc_rxdma.dd_bufptr != NULL) {
2305193240Ssam		free(sc->sc_rxdma.dd_bufptr, M_MWLDEV);
2306193240Ssam		sc->sc_rxdma.dd_bufptr = NULL;
2307193240Ssam	}
2308193240Ssam	if (sc->sc_rxdma.dd_desc_len != 0)
2309193240Ssam		mwl_desc_cleanup(sc, &sc->sc_rxdma);
2310193240Ssam}
2311193240Ssam
2312193240Ssamstatic int
2313193240Ssammwl_dma_setup(struct mwl_softc *sc)
2314193240Ssam{
2315193240Ssam	int error, i;
2316193240Ssam
2317193240Ssam	error = mwl_rxdma_setup(sc);
2318197307Srpaulo	if (error != 0) {
2319197307Srpaulo		mwl_rxdma_cleanup(sc);
2320193240Ssam		return error;
2321197307Srpaulo	}
2322193240Ssam
2323193240Ssam	for (i = 0; i < MWL_NUM_TX_QUEUES; i++) {
2324193240Ssam		error = mwl_txdma_setup(sc, &sc->sc_txq[i]);
2325193240Ssam		if (error != 0) {
2326193240Ssam			mwl_dma_cleanup(sc);
2327193240Ssam			return error;
2328193240Ssam		}
2329193240Ssam	}
2330193240Ssam	return 0;
2331193240Ssam}
2332193240Ssam
2333193240Ssamstatic void
2334193240Ssammwl_dma_cleanup(struct mwl_softc *sc)
2335193240Ssam{
2336193240Ssam	int i;
2337193240Ssam
2338193240Ssam	for (i = 0; i < MWL_NUM_TX_QUEUES; i++)
2339193240Ssam		mwl_txdma_cleanup(sc, &sc->sc_txq[i]);
2340193240Ssam	mwl_rxdma_cleanup(sc);
2341193240Ssam}
2342193240Ssam
2343193240Ssamstatic struct ieee80211_node *
2344193240Ssammwl_node_alloc(struct ieee80211vap *vap, const uint8_t mac[IEEE80211_ADDR_LEN])
2345193240Ssam{
2346193240Ssam	struct ieee80211com *ic = vap->iv_ic;
2347193240Ssam	struct mwl_softc *sc = ic->ic_ifp->if_softc;
2348193240Ssam	const size_t space = sizeof(struct mwl_node);
2349193240Ssam	struct mwl_node *mn;
2350193240Ssam
2351193240Ssam	mn = malloc(space, M_80211_NODE, M_NOWAIT|M_ZERO);
2352193240Ssam	if (mn == NULL) {
2353193240Ssam		/* XXX stat+msg */
2354193240Ssam		return NULL;
2355193240Ssam	}
2356193240Ssam	DPRINTF(sc, MWL_DEBUG_NODE, "%s: mn %p\n", __func__, mn);
2357193240Ssam	return &mn->mn_node;
2358193240Ssam}
2359193240Ssam
2360193240Ssamstatic void
2361193240Ssammwl_node_cleanup(struct ieee80211_node *ni)
2362193240Ssam{
2363193240Ssam	struct ieee80211com *ic = ni->ni_ic;
2364193240Ssam        struct mwl_softc *sc = ic->ic_ifp->if_softc;
2365193240Ssam	struct mwl_node *mn = MWL_NODE(ni);
2366193240Ssam
2367193240Ssam	DPRINTF(sc, MWL_DEBUG_NODE, "%s: ni %p ic %p staid %d\n",
2368193240Ssam	    __func__, ni, ni->ni_ic, mn->mn_staid);
2369193240Ssam
2370193240Ssam	if (mn->mn_staid != 0) {
2371193240Ssam		struct ieee80211vap *vap = ni->ni_vap;
2372193240Ssam
2373193240Ssam		if (mn->mn_hvap != NULL) {
2374193240Ssam			if (vap->iv_opmode == IEEE80211_M_STA)
2375193240Ssam				mwl_hal_delstation(mn->mn_hvap, vap->iv_myaddr);
2376193240Ssam			else
2377193240Ssam				mwl_hal_delstation(mn->mn_hvap, ni->ni_macaddr);
2378193240Ssam		}
2379193240Ssam		/*
2380193240Ssam		 * NB: legacy WDS peer sta db entry is installed using
2381193240Ssam		 * the associate ap's hvap; use it again to delete it.
2382193240Ssam		 * XXX can vap be NULL?
2383193240Ssam		 */
2384193240Ssam		else if (vap->iv_opmode == IEEE80211_M_WDS &&
2385193240Ssam		    MWL_VAP(vap)->mv_ap_hvap != NULL)
2386193240Ssam			mwl_hal_delstation(MWL_VAP(vap)->mv_ap_hvap,
2387193240Ssam			    ni->ni_macaddr);
2388193240Ssam		delstaid(sc, mn->mn_staid);
2389193240Ssam		mn->mn_staid = 0;
2390193240Ssam	}
2391193240Ssam	sc->sc_node_cleanup(ni);
2392193240Ssam}
2393193240Ssam
2394193240Ssam/*
2395193240Ssam * Reclaim rx dma buffers from packets sitting on the ampdu
2396193240Ssam * reorder queue for a station.  We replace buffers with a
2397193240Ssam * system cluster (if available).
2398193240Ssam */
2399193240Ssamstatic void
2400193240Ssammwl_ampdu_rxdma_reclaim(struct ieee80211_rx_ampdu *rap)
2401193240Ssam{
2402193240Ssam#if 0
2403193240Ssam	int i, n, off;
2404193240Ssam	struct mbuf *m;
2405193240Ssam	void *cl;
2406193240Ssam
2407193240Ssam	n = rap->rxa_qframes;
2408193240Ssam	for (i = 0; i < rap->rxa_wnd && n > 0; i++) {
2409193240Ssam		m = rap->rxa_m[i];
2410193240Ssam		if (m == NULL)
2411193240Ssam			continue;
2412193240Ssam		n--;
2413193240Ssam		/* our dma buffers have a well-known free routine */
2414193240Ssam		if ((m->m_flags & M_EXT) == 0 ||
2415193240Ssam		    m->m_ext.ext_free != mwl_ext_free)
2416193240Ssam			continue;
2417193240Ssam		/*
2418193240Ssam		 * Try to allocate a cluster and move the data.
2419193240Ssam		 */
2420193240Ssam		off = m->m_data - m->m_ext.ext_buf;
2421193240Ssam		if (off + m->m_pkthdr.len > MCLBYTES) {
2422193240Ssam			/* XXX no AMSDU for now */
2423193240Ssam			continue;
2424193240Ssam		}
2425193240Ssam		cl = pool_cache_get_paddr(&mclpool_cache, 0,
2426193240Ssam		    &m->m_ext.ext_paddr);
2427193240Ssam		if (cl != NULL) {
2428193240Ssam			/*
2429193240Ssam			 * Copy the existing data to the cluster, remove
2430193240Ssam			 * the rx dma buffer, and attach the cluster in
2431193240Ssam			 * its place.  Note we preserve the offset to the
2432193240Ssam			 * data so frames being bridged can still prepend
2433193240Ssam			 * their headers without adding another mbuf.
2434193240Ssam			 */
2435193240Ssam			memcpy((caddr_t) cl + off, m->m_data, m->m_pkthdr.len);
2436193240Ssam			MEXTREMOVE(m);
2437193240Ssam			MEXTADD(m, cl, MCLBYTES, 0, NULL, &mclpool_cache);
2438193240Ssam			/* setup mbuf like _MCLGET does */
2439193240Ssam			m->m_flags |= M_CLUSTER | M_EXT_RW;
2440193240Ssam			_MOWNERREF(m, M_EXT | M_CLUSTER);
2441193240Ssam			/* NB: m_data is clobbered by MEXTADDR, adjust */
2442193240Ssam			m->m_data += off;
2443193240Ssam		}
2444193240Ssam	}
2445193240Ssam#endif
2446193240Ssam}
2447193240Ssam
2448193240Ssam/*
2449193240Ssam * Callback to reclaim resources.  We first let the
2450193240Ssam * net80211 layer do it's thing, then if we are still
2451193240Ssam * blocked by a lack of rx dma buffers we walk the ampdu
2452193240Ssam * reorder q's to reclaim buffers by copying to a system
2453193240Ssam * cluster.
2454193240Ssam */
2455193240Ssamstatic void
2456193240Ssammwl_node_drain(struct ieee80211_node *ni)
2457193240Ssam{
2458193240Ssam	struct ieee80211com *ic = ni->ni_ic;
2459193240Ssam        struct mwl_softc *sc = ic->ic_ifp->if_softc;
2460193240Ssam	struct mwl_node *mn = MWL_NODE(ni);
2461193240Ssam
2462193240Ssam	DPRINTF(sc, MWL_DEBUG_NODE, "%s: ni %p vap %p staid %d\n",
2463193240Ssam	    __func__, ni, ni->ni_vap, mn->mn_staid);
2464193240Ssam
2465193240Ssam	/* NB: call up first to age out ampdu q's */
2466193240Ssam	sc->sc_node_drain(ni);
2467193240Ssam
2468193240Ssam	/* XXX better to not check low water mark? */
2469193240Ssam	if (sc->sc_rxblocked && mn->mn_staid != 0 &&
2470193240Ssam	    (ni->ni_flags & IEEE80211_NODE_HT)) {
2471193240Ssam		uint8_t tid;
2472193240Ssam		/*
2473193240Ssam		 * Walk the reorder q and reclaim rx dma buffers by copying
2474193240Ssam		 * the packet contents into clusters.
2475193240Ssam		 */
2476193240Ssam		for (tid = 0; tid < WME_NUM_TID; tid++) {
2477193240Ssam			struct ieee80211_rx_ampdu *rap;
2478193240Ssam
2479193240Ssam			rap = &ni->ni_rx_ampdu[tid];
2480193240Ssam			if ((rap->rxa_flags & IEEE80211_AGGR_XCHGPEND) == 0)
2481193240Ssam				continue;
2482193240Ssam			if (rap->rxa_qframes)
2483193240Ssam				mwl_ampdu_rxdma_reclaim(rap);
2484193240Ssam		}
2485193240Ssam	}
2486193240Ssam}
2487193240Ssam
2488193240Ssamstatic void
2489193240Ssammwl_node_getsignal(const struct ieee80211_node *ni, int8_t *rssi, int8_t *noise)
2490193240Ssam{
2491193240Ssam	*rssi = ni->ni_ic->ic_node_getrssi(ni);
2492193240Ssam#ifdef MWL_ANT_INFO_SUPPORT
2493193240Ssam#if 0
2494193240Ssam	/* XXX need to smooth data */
2495193240Ssam	*noise = -MWL_NODE_CONST(ni)->mn_ai.nf;
2496193240Ssam#else
2497193240Ssam	*noise = -95;		/* XXX */
2498193240Ssam#endif
2499193240Ssam#else
2500193240Ssam	*noise = -95;		/* XXX */
2501193240Ssam#endif
2502193240Ssam}
2503193240Ssam
2504193240Ssam/*
2505193240Ssam * Convert Hardware per-antenna rssi info to common format:
2506193240Ssam * Let a1, a2, a3 represent the amplitudes per chain
2507193240Ssam * Let amax represent max[a1, a2, a3]
2508193240Ssam * Rssi1_dBm = RSSI_dBm + 20*log10(a1/amax)
2509193240Ssam * Rssi1_dBm = RSSI_dBm + 20*log10(a1) - 20*log10(amax)
2510193240Ssam * We store a table that is 4*20*log10(idx) - the extra 4 is to store or
2511193240Ssam * maintain some extra precision.
2512193240Ssam *
2513193240Ssam * Values are stored in .5 db format capped at 127.
2514193240Ssam */
2515193240Ssamstatic void
2516193240Ssammwl_node_getmimoinfo(const struct ieee80211_node *ni,
2517193240Ssam	struct ieee80211_mimo_info *mi)
2518193240Ssam{
2519193240Ssam#define	CVT(_dst, _src) do {						\
2520193240Ssam	(_dst) = rssi + ((logdbtbl[_src] - logdbtbl[rssi_max]) >> 2);	\
2521193240Ssam	(_dst) = (_dst) > 64 ? 127 : ((_dst) << 1);			\
2522193240Ssam} while (0)
2523193240Ssam	static const int8_t logdbtbl[32] = {
2524193240Ssam	       0,   0,  24,  38,  48,  56,  62,  68,
2525193240Ssam	      72,  76,  80,  83,  86,  89,  92,  94,
2526193240Ssam	      96,  98, 100, 102, 104, 106, 107, 109,
2527193240Ssam	     110, 112, 113, 115, 116, 117, 118, 119
2528193240Ssam	};
2529193240Ssam	const struct mwl_node *mn = MWL_NODE_CONST(ni);
2530193240Ssam	uint8_t rssi = mn->mn_ai.rsvd1/2;		/* XXX */
2531193240Ssam	uint32_t rssi_max;
2532193240Ssam
2533193240Ssam	rssi_max = mn->mn_ai.rssi_a;
2534193240Ssam	if (mn->mn_ai.rssi_b > rssi_max)
2535193240Ssam		rssi_max = mn->mn_ai.rssi_b;
2536193240Ssam	if (mn->mn_ai.rssi_c > rssi_max)
2537193240Ssam		rssi_max = mn->mn_ai.rssi_c;
2538193240Ssam
2539220935Sadrian	CVT(mi->rssi[0], mn->mn_ai.rssi_a);
2540220935Sadrian	CVT(mi->rssi[1], mn->mn_ai.rssi_b);
2541220935Sadrian	CVT(mi->rssi[2], mn->mn_ai.rssi_c);
2542193240Ssam
2543220935Sadrian	mi->noise[0] = mn->mn_ai.nf_a;
2544220935Sadrian	mi->noise[1] = mn->mn_ai.nf_b;
2545220935Sadrian	mi->noise[2] = mn->mn_ai.nf_c;
2546193240Ssam#undef CVT
2547193240Ssam}
2548193240Ssam
2549193240Ssamstatic __inline void *
2550193240Ssammwl_getrxdma(struct mwl_softc *sc)
2551193240Ssam{
2552193240Ssam	struct mwl_jumbo *buf;
2553193240Ssam	void *data;
2554193240Ssam
2555193240Ssam	/*
2556193240Ssam	 * Allocate from jumbo pool.
2557193240Ssam	 */
2558193240Ssam	MWL_RXFREE_LOCK(sc);
2559193240Ssam	buf = SLIST_FIRST(&sc->sc_rxfree);
2560193240Ssam	if (buf == NULL) {
2561193240Ssam		DPRINTF(sc, MWL_DEBUG_ANY,
2562193240Ssam		    "%s: out of rx dma buffers\n", __func__);
2563193240Ssam		sc->sc_stats.mst_rx_nodmabuf++;
2564193240Ssam		data = NULL;
2565193240Ssam	} else {
2566193240Ssam		SLIST_REMOVE_HEAD(&sc->sc_rxfree, next);
2567193240Ssam		sc->sc_nrxfree--;
2568193240Ssam		data = MWL_JUMBO_BUF2DATA(buf);
2569193240Ssam	}
2570193240Ssam	MWL_RXFREE_UNLOCK(sc);
2571193240Ssam	return data;
2572193240Ssam}
2573193240Ssam
2574193240Ssamstatic __inline void
2575193240Ssammwl_putrxdma(struct mwl_softc *sc, void *data)
2576193240Ssam{
2577193240Ssam	struct mwl_jumbo *buf;
2578193240Ssam
2579193240Ssam	/* XXX bounds check data */
2580193240Ssam	MWL_RXFREE_LOCK(sc);
2581193240Ssam	buf = MWL_JUMBO_DATA2BUF(data);
2582193240Ssam	SLIST_INSERT_HEAD(&sc->sc_rxfree, buf, next);
2583193240Ssam	sc->sc_nrxfree++;
2584193240Ssam	MWL_RXFREE_UNLOCK(sc);
2585193240Ssam}
2586193240Ssam
2587193240Ssamstatic int
2588193240Ssammwl_rxbuf_init(struct mwl_softc *sc, struct mwl_rxbuf *bf)
2589193240Ssam{
2590193240Ssam	struct mwl_rxdesc *ds;
2591193240Ssam
2592193240Ssam	ds = bf->bf_desc;
2593193240Ssam	if (bf->bf_data == NULL) {
2594193240Ssam		bf->bf_data = mwl_getrxdma(sc);
2595193240Ssam		if (bf->bf_data == NULL) {
2596193240Ssam			/* mark descriptor to be skipped */
2597193240Ssam			ds->RxControl = EAGLE_RXD_CTRL_OS_OWN;
2598193240Ssam			/* NB: don't need PREREAD */
2599193240Ssam			MWL_RXDESC_SYNC(sc, ds, BUS_DMASYNC_PREWRITE);
2600193240Ssam			sc->sc_stats.mst_rxbuf_failed++;
2601193240Ssam			return ENOMEM;
2602193240Ssam		}
2603193240Ssam	}
2604193240Ssam	/*
2605193240Ssam	 * NB: DMA buffer contents is known to be unmodified
2606193240Ssam	 *     so there's no need to flush the data cache.
2607193240Ssam	 */
2608193240Ssam
2609193240Ssam	/*
2610193240Ssam	 * Setup descriptor.
2611193240Ssam	 */
2612193240Ssam	ds->QosCtrl = 0;
2613193240Ssam	ds->RSSI = 0;
2614193240Ssam	ds->Status = EAGLE_RXD_STATUS_IDLE;
2615193240Ssam	ds->Channel = 0;
2616193240Ssam	ds->PktLen = htole16(MWL_AGGR_SIZE);
2617193240Ssam	ds->SQ2 = 0;
2618193240Ssam	ds->pPhysBuffData = htole32(MWL_JUMBO_DMA_ADDR(sc, bf->bf_data));
2619193240Ssam	/* NB: don't touch pPhysNext, set once */
2620193240Ssam	ds->RxControl = EAGLE_RXD_CTRL_DRIVER_OWN;
2621193240Ssam	MWL_RXDESC_SYNC(sc, ds, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
2622193240Ssam
2623193240Ssam	return 0;
2624193240Ssam}
2625193240Ssam
2626254842Sandrestatic int
2627254799Sandremwl_ext_free(struct mbuf *m, void *data, void *arg)
2628193240Ssam{
2629193240Ssam	struct mwl_softc *sc = arg;
2630193240Ssam
2631193240Ssam	/* XXX bounds check data */
2632193240Ssam	mwl_putrxdma(sc, data);
2633193240Ssam	/*
2634193240Ssam	 * If we were previously blocked by a lack of rx dma buffers
2635193240Ssam	 * check if we now have enough to restart rx interrupt handling.
2636193240Ssam	 * NB: we know we are called at splvm which is above splnet.
2637193240Ssam	 */
2638193240Ssam	if (sc->sc_rxblocked && sc->sc_nrxfree > mwl_rxdmalow) {
2639193240Ssam		sc->sc_rxblocked = 0;
2640193240Ssam		mwl_hal_intrset(sc->sc_mh, sc->sc_imask);
2641193240Ssam	}
2642254842Sandre	return (EXT_FREE_OK);
2643193240Ssam}
2644193240Ssam
2645193240Ssamstruct mwl_frame_bar {
2646193240Ssam	u_int8_t	i_fc[2];
2647193240Ssam	u_int8_t	i_dur[2];
2648193240Ssam	u_int8_t	i_ra[IEEE80211_ADDR_LEN];
2649193240Ssam	u_int8_t	i_ta[IEEE80211_ADDR_LEN];
2650193240Ssam	/* ctl, seq, FCS */
2651193240Ssam} __packed;
2652193240Ssam
2653193240Ssam/*
2654193240Ssam * Like ieee80211_anyhdrsize, but handles BAR frames
2655193240Ssam * specially so the logic below to piece the 802.11
2656193240Ssam * header together works.
2657193240Ssam */
2658193240Ssamstatic __inline int
2659193240Ssammwl_anyhdrsize(const void *data)
2660193240Ssam{
2661193240Ssam	const struct ieee80211_frame *wh = data;
2662193240Ssam
2663193240Ssam	if ((wh->i_fc[0]&IEEE80211_FC0_TYPE_MASK) == IEEE80211_FC0_TYPE_CTL) {
2664193240Ssam		switch (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) {
2665193240Ssam		case IEEE80211_FC0_SUBTYPE_CTS:
2666193240Ssam		case IEEE80211_FC0_SUBTYPE_ACK:
2667193240Ssam			return sizeof(struct ieee80211_frame_ack);
2668193240Ssam		case IEEE80211_FC0_SUBTYPE_BAR:
2669193240Ssam			return sizeof(struct mwl_frame_bar);
2670193240Ssam		}
2671193240Ssam		return sizeof(struct ieee80211_frame_min);
2672193240Ssam	} else
2673193240Ssam		return ieee80211_hdrsize(data);
2674193240Ssam}
2675193240Ssam
2676193240Ssamstatic void
2677193240Ssammwl_handlemicerror(struct ieee80211com *ic, const uint8_t *data)
2678193240Ssam{
2679193240Ssam	const struct ieee80211_frame *wh;
2680193240Ssam	struct ieee80211_node *ni;
2681193240Ssam
2682193240Ssam	wh = (const struct ieee80211_frame *)(data + sizeof(uint16_t));
2683193240Ssam	ni = ieee80211_find_rxnode(ic, (const struct ieee80211_frame_min *) wh);
2684193240Ssam	if (ni != NULL) {
2685193240Ssam		ieee80211_notify_michael_failure(ni->ni_vap, wh, 0);
2686193240Ssam		ieee80211_free_node(ni);
2687193240Ssam	}
2688193240Ssam}
2689193240Ssam
2690193240Ssam/*
2691193240Ssam * Convert hardware signal strength to rssi.  The value
2692193240Ssam * provided by the device has the noise floor added in;
2693193240Ssam * we need to compensate for this but we don't have that
2694193240Ssam * so we use a fixed value.
2695193240Ssam *
2696193240Ssam * The offset of 8 is good for both 2.4 and 5GHz.  The LNA
2697193240Ssam * offset is already set as part of the initial gain.  This
2698193240Ssam * will give at least +/- 3dB for 2.4GHz and +/- 5dB for 5GHz.
2699193240Ssam */
2700193240Ssamstatic __inline int
2701193240Ssamcvtrssi(uint8_t ssi)
2702193240Ssam{
2703193240Ssam	int rssi = (int) ssi + 8;
2704193240Ssam	/* XXX hack guess until we have a real noise floor */
2705193240Ssam	rssi = 2*(87 - rssi);	/* NB: .5 dBm units */
2706193240Ssam	return (rssi < 0 ? 0 : rssi > 127 ? 127 : rssi);
2707193240Ssam}
2708193240Ssam
2709193240Ssamstatic void
2710193240Ssammwl_rx_proc(void *arg, int npending)
2711193240Ssam{
2712193240Ssam#define	IEEE80211_DIR_DSTODS(wh) \
2713193240Ssam	((((const struct ieee80211_frame *)wh)->i_fc[1] & IEEE80211_FC1_DIR_MASK) == IEEE80211_FC1_DIR_DSTODS)
2714193240Ssam	struct mwl_softc *sc = arg;
2715193240Ssam	struct ifnet *ifp = sc->sc_ifp;
2716193240Ssam	struct ieee80211com *ic = ifp->if_l2com;
2717193240Ssam	struct mwl_rxbuf *bf;
2718193240Ssam	struct mwl_rxdesc *ds;
2719193240Ssam	struct mbuf *m;
2720193240Ssam	struct ieee80211_qosframe *wh;
2721193240Ssam	struct ieee80211_qosframe_addr4 *wh4;
2722193240Ssam	struct ieee80211_node *ni;
2723193240Ssam	struct mwl_node *mn;
2724193240Ssam	int off, len, hdrlen, pktlen, rssi, ntodo;
2725193240Ssam	uint8_t *data, status;
2726193240Ssam	void *newdata;
2727193240Ssam	int16_t nf;
2728193240Ssam
2729193240Ssam	DPRINTF(sc, MWL_DEBUG_RX_PROC, "%s: pending %u rdptr 0x%x wrptr 0x%x\n",
2730193240Ssam	    __func__, npending, RD4(sc, sc->sc_hwspecs.rxDescRead),
2731193240Ssam	    RD4(sc, sc->sc_hwspecs.rxDescWrite));
2732193240Ssam	nf = -96;			/* XXX */
2733193240Ssam	bf = sc->sc_rxnext;
2734193240Ssam	for (ntodo = mwl_rxquota; ntodo > 0; ntodo--) {
2735193240Ssam		if (bf == NULL)
2736193240Ssam			bf = STAILQ_FIRST(&sc->sc_rxbuf);
2737193240Ssam		ds = bf->bf_desc;
2738193240Ssam		data = bf->bf_data;
2739193240Ssam		if (data == NULL) {
2740193240Ssam			/*
2741193240Ssam			 * If data allocation failed previously there
2742193240Ssam			 * will be no buffer; try again to re-populate it.
2743193240Ssam			 * Note the firmware will not advance to the next
2744193240Ssam			 * descriptor with a dma buffer so we must mimic
2745193240Ssam			 * this or we'll get out of sync.
2746193240Ssam			 */
2747193240Ssam			DPRINTF(sc, MWL_DEBUG_ANY,
2748193240Ssam			    "%s: rx buf w/o dma memory\n", __func__);
2749193240Ssam			(void) mwl_rxbuf_init(sc, bf);
2750193240Ssam			sc->sc_stats.mst_rx_dmabufmissing++;
2751193240Ssam			break;
2752193240Ssam		}
2753193240Ssam		MWL_RXDESC_SYNC(sc, ds,
2754193240Ssam		    BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
2755193240Ssam		if (ds->RxControl != EAGLE_RXD_CTRL_DMA_OWN)
2756193240Ssam			break;
2757193240Ssam#ifdef MWL_DEBUG
2758193240Ssam		if (sc->sc_debug & MWL_DEBUG_RECV_DESC)
2759193240Ssam			mwl_printrxbuf(bf, 0);
2760193240Ssam#endif
2761193240Ssam		status = ds->Status;
2762193240Ssam		if (status & EAGLE_RXD_STATUS_DECRYPT_ERR_MASK) {
2763193240Ssam			ifp->if_ierrors++;
2764193240Ssam			sc->sc_stats.mst_rx_crypto++;
2765193240Ssam			/*
2766193240Ssam			 * NB: Check EAGLE_RXD_STATUS_GENERAL_DECRYPT_ERR
2767193240Ssam			 *     for backwards compatibility.
2768193240Ssam			 */
2769193240Ssam			if (status != EAGLE_RXD_STATUS_GENERAL_DECRYPT_ERR &&
2770193240Ssam			    (status & EAGLE_RXD_STATUS_TKIP_MIC_DECRYPT_ERR)) {
2771193240Ssam				/*
2772193240Ssam				 * MIC error, notify upper layers.
2773193240Ssam				 */
2774193240Ssam				bus_dmamap_sync(sc->sc_rxdmat, sc->sc_rxmap,
2775193240Ssam				    BUS_DMASYNC_POSTREAD);
2776193240Ssam				mwl_handlemicerror(ic, data);
2777193240Ssam				sc->sc_stats.mst_rx_tkipmic++;
2778193240Ssam			}
2779193240Ssam			/* XXX too painful to tap packets */
2780193240Ssam			goto rx_next;
2781193240Ssam		}
2782193240Ssam		/*
2783193240Ssam		 * Sync the data buffer.
2784193240Ssam		 */
2785193240Ssam		len = le16toh(ds->PktLen);
2786193240Ssam		bus_dmamap_sync(sc->sc_rxdmat, sc->sc_rxmap, BUS_DMASYNC_POSTREAD);
2787193240Ssam		/*
2788193240Ssam		 * The 802.11 header is provided all or in part at the front;
2789193240Ssam		 * use it to calculate the true size of the header that we'll
2790193240Ssam		 * construct below.  We use this to figure out where to copy
2791193240Ssam		 * payload prior to constructing the header.
2792193240Ssam		 */
2793193240Ssam		hdrlen = mwl_anyhdrsize(data + sizeof(uint16_t));
2794193240Ssam		off = sizeof(uint16_t) + sizeof(struct ieee80211_frame_addr4);
2795193240Ssam
2796193240Ssam		/* calculate rssi early so we can re-use for each aggregate */
2797193240Ssam		rssi = cvtrssi(ds->RSSI);
2798193240Ssam
2799193240Ssam		pktlen = hdrlen + (len - off);
2800193240Ssam		/*
2801193240Ssam		 * NB: we know our frame is at least as large as
2802193240Ssam		 * IEEE80211_MIN_LEN because there is a 4-address
2803193240Ssam		 * frame at the front.  Hence there's no need to
2804193240Ssam		 * vet the packet length.  If the frame in fact
2805193240Ssam		 * is too small it should be discarded at the
2806193240Ssam		 * net80211 layer.
2807193240Ssam		 */
2808193240Ssam
2809193240Ssam		/*
2810193240Ssam		 * Attach dma buffer to an mbuf.  We tried
2811193240Ssam		 * doing this based on the packet size (i.e.
2812193240Ssam		 * copying small packets) but it turns out to
2813193240Ssam		 * be a net loss.  The tradeoff might be system
2814193240Ssam		 * dependent (cache architecture is important).
2815193240Ssam		 */
2816243857Sglebius		MGETHDR(m, M_NOWAIT, MT_DATA);
2817193240Ssam		if (m == NULL) {
2818193240Ssam			DPRINTF(sc, MWL_DEBUG_ANY,
2819193240Ssam			    "%s: no rx mbuf\n", __func__);
2820193240Ssam			sc->sc_stats.mst_rx_nombuf++;
2821193240Ssam			goto rx_next;
2822193240Ssam		}
2823193240Ssam		/*
2824193240Ssam		 * Acquire the replacement dma buffer before
2825193240Ssam		 * processing the frame.  If we're out of dma
2826193240Ssam		 * buffers we disable rx interrupts and wait
2827193240Ssam		 * for the free pool to reach mlw_rxdmalow buffers
2828193240Ssam		 * before starting to do work again.  If the firmware
2829193240Ssam		 * runs out of descriptors then it will toss frames
2830193240Ssam		 * which is better than our doing it as that can
2831193240Ssam		 * starve our processing.  It is also important that
2832193240Ssam		 * we always process rx'd frames in case they are
2833193240Ssam		 * A-MPDU as otherwise the host's view of the BA
2834193240Ssam		 * window may get out of sync with the firmware.
2835193240Ssam		 */
2836193240Ssam		newdata = mwl_getrxdma(sc);
2837193240Ssam		if (newdata == NULL) {
2838193240Ssam			/* NB: stat+msg in mwl_getrxdma */
2839193240Ssam			m_free(m);
2840193240Ssam			/* disable RX interrupt and mark state */
2841193240Ssam			mwl_hal_intrset(sc->sc_mh,
2842193240Ssam			    sc->sc_imask &~ MACREG_A2HRIC_BIT_RX_RDY);
2843193240Ssam			sc->sc_rxblocked = 1;
2844193240Ssam			ieee80211_drain(ic);
2845193240Ssam			/* XXX check rxblocked and immediately start again? */
2846193240Ssam			goto rx_stop;
2847193240Ssam		}
2848193240Ssam		bf->bf_data = newdata;
2849193240Ssam		/*
2850193240Ssam		 * Attach the dma buffer to the mbuf;
2851193240Ssam		 * mwl_rxbuf_init will re-setup the rx
2852193240Ssam		 * descriptor using the replacement dma
2853193240Ssam		 * buffer we just installed above.
2854193240Ssam		 */
2855193240Ssam		MEXTADD(m, data, MWL_AGGR_SIZE, mwl_ext_free,
2856193240Ssam		    data, sc, 0, EXT_NET_DRV);
2857193240Ssam		m->m_data += off - hdrlen;
2858193240Ssam		m->m_pkthdr.len = m->m_len = pktlen;
2859193240Ssam		m->m_pkthdr.rcvif = ifp;
2860193240Ssam		/* NB: dma buffer assumed read-only */
2861193240Ssam
2862193240Ssam		/*
2863193240Ssam		 * Piece 802.11 header together.
2864193240Ssam		 */
2865193240Ssam		wh = mtod(m, struct ieee80211_qosframe *);
2866193240Ssam		/* NB: don't need to do this sometimes but ... */
2867193240Ssam		/* XXX special case so we can memcpy after m_devget? */
2868193240Ssam		ovbcopy(data + sizeof(uint16_t), wh, hdrlen);
2869193240Ssam		if (IEEE80211_QOS_HAS_SEQ(wh)) {
2870193240Ssam			if (IEEE80211_DIR_DSTODS(wh)) {
2871193240Ssam				wh4 = mtod(m,
2872193240Ssam				    struct ieee80211_qosframe_addr4*);
2873193240Ssam				*(uint16_t *)wh4->i_qos = ds->QosCtrl;
2874193240Ssam			} else {
2875193240Ssam				*(uint16_t *)wh->i_qos = ds->QosCtrl;
2876193240Ssam			}
2877193240Ssam		}
2878193240Ssam		/*
2879193240Ssam		 * The f/w strips WEP header but doesn't clear
2880193240Ssam		 * the WEP bit; mark the packet with M_WEP so
2881193240Ssam		 * net80211 will treat the data as decrypted.
2882193240Ssam		 * While here also clear the PWR_MGT bit since
2883193240Ssam		 * power save is handled by the firmware and
2884193240Ssam		 * passing this up will potentially cause the
2885193240Ssam		 * upper layer to put a station in power save
2886193240Ssam		 * (except when configured with MWL_HOST_PS_SUPPORT).
2887193240Ssam		 */
2888262007Skevlo		if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED)
2889193240Ssam			m->m_flags |= M_WEP;
2890193240Ssam#ifdef MWL_HOST_PS_SUPPORT
2891262007Skevlo		wh->i_fc[1] &= ~IEEE80211_FC1_PROTECTED;
2892193240Ssam#else
2893262007Skevlo		wh->i_fc[1] &= ~(IEEE80211_FC1_PROTECTED |
2894262007Skevlo		    IEEE80211_FC1_PWR_MGT);
2895193240Ssam#endif
2896193240Ssam
2897193240Ssam		if (ieee80211_radiotap_active(ic)) {
2898193240Ssam			struct mwl_rx_radiotap_header *tap = &sc->sc_rx_th;
2899193240Ssam
2900193240Ssam			tap->wr_flags = 0;
2901193240Ssam			tap->wr_rate = ds->Rate;
2902193240Ssam			tap->wr_antsignal = rssi + nf;
2903193240Ssam			tap->wr_antnoise = nf;
2904193240Ssam		}
2905193240Ssam		if (IFF_DUMPPKTS_RECV(sc, wh)) {
2906193240Ssam			ieee80211_dump_pkt(ic, mtod(m, caddr_t),
2907193240Ssam			    len, ds->Rate, rssi);
2908193240Ssam		}
2909193240Ssam		ifp->if_ipackets++;
2910193240Ssam
2911193240Ssam		/* dispatch */
2912193240Ssam		ni = ieee80211_find_rxnode(ic,
2913193240Ssam		    (const struct ieee80211_frame_min *) wh);
2914193240Ssam		if (ni != NULL) {
2915193240Ssam			mn = MWL_NODE(ni);
2916193240Ssam#ifdef MWL_ANT_INFO_SUPPORT
2917193240Ssam			mn->mn_ai.rssi_a = ds->ai.rssi_a;
2918193240Ssam			mn->mn_ai.rssi_b = ds->ai.rssi_b;
2919193240Ssam			mn->mn_ai.rssi_c = ds->ai.rssi_c;
2920193240Ssam			mn->mn_ai.rsvd1 = rssi;
2921193240Ssam#endif
2922193240Ssam			/* tag AMPDU aggregates for reorder processing */
2923193240Ssam			if (ni->ni_flags & IEEE80211_NODE_HT)
2924193240Ssam				m->m_flags |= M_AMPDU;
2925193240Ssam			(void) ieee80211_input(ni, m, rssi, nf);
2926193240Ssam			ieee80211_free_node(ni);
2927193240Ssam		} else
2928193240Ssam			(void) ieee80211_input_all(ic, m, rssi, nf);
2929193240Ssamrx_next:
2930193240Ssam		/* NB: ignore ENOMEM so we process more descriptors */
2931193240Ssam		(void) mwl_rxbuf_init(sc, bf);
2932193240Ssam		bf = STAILQ_NEXT(bf, bf_list);
2933193240Ssam	}
2934193240Ssamrx_stop:
2935193240Ssam	sc->sc_rxnext = bf;
2936193240Ssam
2937193240Ssam	if ((ifp->if_drv_flags & IFF_DRV_OACTIVE) == 0 &&
2938193240Ssam	    !IFQ_IS_EMPTY(&ifp->if_snd)) {
2939193240Ssam		/* NB: kick fw; the tx thread may have been preempted */
2940193240Ssam		mwl_hal_txstart(sc->sc_mh, 0);
2941193240Ssam		mwl_start(ifp);
2942193240Ssam	}
2943193240Ssam#undef IEEE80211_DIR_DSTODS
2944193240Ssam}
2945193240Ssam
2946193240Ssamstatic void
2947193240Ssammwl_txq_init(struct mwl_softc *sc, struct mwl_txq *txq, int qnum)
2948193240Ssam{
2949193240Ssam	struct mwl_txbuf *bf, *bn;
2950193240Ssam	struct mwl_txdesc *ds;
2951193240Ssam
2952193240Ssam	MWL_TXQ_LOCK_INIT(sc, txq);
2953193240Ssam	txq->qnum = qnum;
2954193240Ssam	txq->txpri = 0;	/* XXX */
2955193240Ssam#if 0
2956193240Ssam	/* NB: q setup by mwl_txdma_setup XXX */
2957193240Ssam	STAILQ_INIT(&txq->free);
2958193240Ssam#endif
2959193240Ssam	STAILQ_FOREACH(bf, &txq->free, bf_list) {
2960193240Ssam		bf->bf_txq = txq;
2961193240Ssam
2962193240Ssam		ds = bf->bf_desc;
2963193240Ssam		bn = STAILQ_NEXT(bf, bf_list);
2964193240Ssam		if (bn == NULL)
2965193240Ssam			bn = STAILQ_FIRST(&txq->free);
2966193240Ssam		ds->pPhysNext = htole32(bn->bf_daddr);
2967193240Ssam	}
2968193240Ssam	STAILQ_INIT(&txq->active);
2969193240Ssam}
2970193240Ssam
2971193240Ssam/*
2972193240Ssam * Setup a hardware data transmit queue for the specified
2973193240Ssam * access control.  We record the mapping from ac's
2974193240Ssam * to h/w queues for use by mwl_tx_start.
2975193240Ssam */
2976193240Ssamstatic int
2977193240Ssammwl_tx_setup(struct mwl_softc *sc, int ac, int mvtype)
2978193240Ssam{
2979193240Ssam#define	N(a)	(sizeof(a)/sizeof(a[0]))
2980193240Ssam	struct mwl_txq *txq;
2981193240Ssam
2982193240Ssam	if (ac >= N(sc->sc_ac2q)) {
2983193240Ssam		device_printf(sc->sc_dev, "AC %u out of range, max %zu!\n",
2984193240Ssam			ac, N(sc->sc_ac2q));
2985193240Ssam		return 0;
2986193240Ssam	}
2987193240Ssam	if (mvtype >= MWL_NUM_TX_QUEUES) {
2988193240Ssam		device_printf(sc->sc_dev, "mvtype %u out of range, max %u!\n",
2989193240Ssam			mvtype, MWL_NUM_TX_QUEUES);
2990193240Ssam		return 0;
2991193240Ssam	}
2992193240Ssam	txq = &sc->sc_txq[mvtype];
2993193240Ssam	mwl_txq_init(sc, txq, mvtype);
2994193240Ssam	sc->sc_ac2q[ac] = txq;
2995193240Ssam	return 1;
2996193240Ssam#undef N
2997193240Ssam}
2998193240Ssam
2999193240Ssam/*
3000193240Ssam * Update WME parameters for a transmit queue.
3001193240Ssam */
3002193240Ssamstatic int
3003193240Ssammwl_txq_update(struct mwl_softc *sc, int ac)
3004193240Ssam{
3005193240Ssam#define	MWL_EXPONENT_TO_VALUE(v)	((1<<v)-1)
3006193240Ssam	struct ifnet *ifp = sc->sc_ifp;
3007193240Ssam	struct ieee80211com *ic = ifp->if_l2com;
3008193240Ssam	struct mwl_txq *txq = sc->sc_ac2q[ac];
3009193240Ssam	struct wmeParams *wmep = &ic->ic_wme.wme_chanParams.cap_wmeParams[ac];
3010193240Ssam	struct mwl_hal *mh = sc->sc_mh;
3011193240Ssam	int aifs, cwmin, cwmax, txoplim;
3012193240Ssam
3013193240Ssam	aifs = wmep->wmep_aifsn;
3014193240Ssam	/* XXX in sta mode need to pass log values for cwmin/max */
3015193240Ssam	cwmin = MWL_EXPONENT_TO_VALUE(wmep->wmep_logcwmin);
3016193240Ssam	cwmax = MWL_EXPONENT_TO_VALUE(wmep->wmep_logcwmax);
3017193240Ssam	txoplim = wmep->wmep_txopLimit;		/* NB: units of 32us */
3018193240Ssam
3019193240Ssam	if (mwl_hal_setedcaparams(mh, txq->qnum, cwmin, cwmax, aifs, txoplim)) {
3020193240Ssam		device_printf(sc->sc_dev, "unable to update hardware queue "
3021193240Ssam			"parameters for %s traffic!\n",
3022193240Ssam			ieee80211_wme_acnames[ac]);
3023193240Ssam		return 0;
3024193240Ssam	}
3025193240Ssam	return 1;
3026193240Ssam#undef MWL_EXPONENT_TO_VALUE
3027193240Ssam}
3028193240Ssam
3029193240Ssam/*
3030193240Ssam * Callback from the 802.11 layer to update WME parameters.
3031193240Ssam */
3032193240Ssamstatic int
3033193240Ssammwl_wme_update(struct ieee80211com *ic)
3034193240Ssam{
3035193240Ssam	struct mwl_softc *sc = ic->ic_ifp->if_softc;
3036193240Ssam
3037193240Ssam	return !mwl_txq_update(sc, WME_AC_BE) ||
3038193240Ssam	    !mwl_txq_update(sc, WME_AC_BK) ||
3039193240Ssam	    !mwl_txq_update(sc, WME_AC_VI) ||
3040193240Ssam	    !mwl_txq_update(sc, WME_AC_VO) ? EIO : 0;
3041193240Ssam}
3042193240Ssam
3043193240Ssam/*
3044193240Ssam * Reclaim resources for a setup queue.
3045193240Ssam */
3046193240Ssamstatic void
3047193240Ssammwl_tx_cleanupq(struct mwl_softc *sc, struct mwl_txq *txq)
3048193240Ssam{
3049193240Ssam	/* XXX hal work? */
3050193240Ssam	MWL_TXQ_LOCK_DESTROY(txq);
3051193240Ssam}
3052193240Ssam
3053193240Ssam/*
3054193240Ssam * Reclaim all tx queue resources.
3055193240Ssam */
3056193240Ssamstatic void
3057193240Ssammwl_tx_cleanup(struct mwl_softc *sc)
3058193240Ssam{
3059193240Ssam	int i;
3060193240Ssam
3061193240Ssam	for (i = 0; i < MWL_NUM_TX_QUEUES; i++)
3062193240Ssam		mwl_tx_cleanupq(sc, &sc->sc_txq[i]);
3063193240Ssam}
3064193240Ssam
3065193240Ssamstatic int
3066193240Ssammwl_tx_dmasetup(struct mwl_softc *sc, struct mwl_txbuf *bf, struct mbuf *m0)
3067193240Ssam{
3068193240Ssam	struct mbuf *m;
3069193240Ssam	int error;
3070193240Ssam
3071193240Ssam	/*
3072193240Ssam	 * Load the DMA map so any coalescing is done.  This
3073193240Ssam	 * also calculates the number of descriptors we need.
3074193240Ssam	 */
3075193240Ssam	error = bus_dmamap_load_mbuf_sg(sc->sc_dmat, bf->bf_dmamap, m0,
3076193240Ssam				     bf->bf_segs, &bf->bf_nseg,
3077193240Ssam				     BUS_DMA_NOWAIT);
3078193240Ssam	if (error == EFBIG) {
3079193240Ssam		/* XXX packet requires too many descriptors */
3080193240Ssam		bf->bf_nseg = MWL_TXDESC+1;
3081193240Ssam	} else if (error != 0) {
3082193240Ssam		sc->sc_stats.mst_tx_busdma++;
3083193240Ssam		m_freem(m0);
3084193240Ssam		return error;
3085193240Ssam	}
3086193240Ssam	/*
3087193240Ssam	 * Discard null packets and check for packets that
3088193240Ssam	 * require too many TX descriptors.  We try to convert
3089193240Ssam	 * the latter to a cluster.
3090193240Ssam	 */
3091193240Ssam	if (error == EFBIG) {		/* too many desc's, linearize */
3092193240Ssam		sc->sc_stats.mst_tx_linear++;
3093193240Ssam#if MWL_TXDESC > 1
3094243857Sglebius		m = m_collapse(m0, M_NOWAIT, MWL_TXDESC);
3095193240Ssam#else
3096243857Sglebius		m = m_defrag(m0, M_NOWAIT);
3097193240Ssam#endif
3098193240Ssam		if (m == NULL) {
3099193240Ssam			m_freem(m0);
3100193240Ssam			sc->sc_stats.mst_tx_nombuf++;
3101193240Ssam			return ENOMEM;
3102193240Ssam		}
3103193240Ssam		m0 = m;
3104193240Ssam		error = bus_dmamap_load_mbuf_sg(sc->sc_dmat, bf->bf_dmamap, m0,
3105193240Ssam					     bf->bf_segs, &bf->bf_nseg,
3106193240Ssam					     BUS_DMA_NOWAIT);
3107193240Ssam		if (error != 0) {
3108193240Ssam			sc->sc_stats.mst_tx_busdma++;
3109193240Ssam			m_freem(m0);
3110193240Ssam			return error;
3111193240Ssam		}
3112193240Ssam		KASSERT(bf->bf_nseg <= MWL_TXDESC,
3113193240Ssam		    ("too many segments after defrag; nseg %u", bf->bf_nseg));
3114193240Ssam	} else if (bf->bf_nseg == 0) {		/* null packet, discard */
3115193240Ssam		sc->sc_stats.mst_tx_nodata++;
3116193240Ssam		m_freem(m0);
3117193240Ssam		return EIO;
3118193240Ssam	}
3119193240Ssam	DPRINTF(sc, MWL_DEBUG_XMIT, "%s: m %p len %u\n",
3120193240Ssam		__func__, m0, m0->m_pkthdr.len);
3121193240Ssam	bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE);
3122193240Ssam	bf->bf_m = m0;
3123193240Ssam
3124193240Ssam	return 0;
3125193240Ssam}
3126193240Ssam
3127193240Ssamstatic __inline int
3128193240Ssammwl_cvtlegacyrate(int rate)
3129193240Ssam{
3130193240Ssam	switch (rate) {
3131193240Ssam	case 2:	 return 0;
3132193240Ssam	case 4:	 return 1;
3133193240Ssam	case 11: return 2;
3134193240Ssam	case 22: return 3;
3135193240Ssam	case 44: return 4;
3136193240Ssam	case 12: return 5;
3137193240Ssam	case 18: return 6;
3138193240Ssam	case 24: return 7;
3139193240Ssam	case 36: return 8;
3140193240Ssam	case 48: return 9;
3141193240Ssam	case 72: return 10;
3142193240Ssam	case 96: return 11;
3143193240Ssam	case 108:return 12;
3144193240Ssam	}
3145193240Ssam	return 0;
3146193240Ssam}
3147193240Ssam
3148193240Ssam/*
3149193240Ssam * Calculate fixed tx rate information per client state;
3150193240Ssam * this value is suitable for writing to the Format field
3151193240Ssam * of a tx descriptor.
3152193240Ssam */
3153193240Ssamstatic uint16_t
3154193240Ssammwl_calcformat(uint8_t rate, const struct ieee80211_node *ni)
3155193240Ssam{
3156193240Ssam	uint16_t fmt;
3157193240Ssam
3158193240Ssam	fmt = SM(3, EAGLE_TXD_ANTENNA)
3159193240Ssam	    | (IEEE80211_IS_CHAN_HT40D(ni->ni_chan) ?
3160193240Ssam		EAGLE_TXD_EXTCHAN_LO : EAGLE_TXD_EXTCHAN_HI);
3161195171Ssam	if (rate & IEEE80211_RATE_MCS) {	/* HT MCS */
3162193240Ssam		fmt |= EAGLE_TXD_FORMAT_HT
3163193240Ssam		    /* NB: 0x80 implicitly stripped from ucastrate */
3164193240Ssam		    | SM(rate, EAGLE_TXD_RATE);
3165193240Ssam		/* XXX short/long GI may be wrong; re-check */
3166193240Ssam		if (IEEE80211_IS_CHAN_HT40(ni->ni_chan)) {
3167193240Ssam			fmt |= EAGLE_TXD_CHW_40
3168193240Ssam			    | (ni->ni_htcap & IEEE80211_HTCAP_SHORTGI40 ?
3169193240Ssam			        EAGLE_TXD_GI_SHORT : EAGLE_TXD_GI_LONG);
3170193240Ssam		} else {
3171193240Ssam			fmt |= EAGLE_TXD_CHW_20
3172193240Ssam			    | (ni->ni_htcap & IEEE80211_HTCAP_SHORTGI20 ?
3173193240Ssam			        EAGLE_TXD_GI_SHORT : EAGLE_TXD_GI_LONG);
3174193240Ssam		}
3175193240Ssam	} else {			/* legacy rate */
3176193240Ssam		fmt |= EAGLE_TXD_FORMAT_LEGACY
3177193240Ssam		    | SM(mwl_cvtlegacyrate(rate), EAGLE_TXD_RATE)
3178193240Ssam		    | EAGLE_TXD_CHW_20
3179193240Ssam		    /* XXX iv_flags & IEEE80211_F_SHPREAMBLE? */
3180193240Ssam		    | (ni->ni_capinfo & IEEE80211_CAPINFO_SHORT_PREAMBLE ?
3181193240Ssam			EAGLE_TXD_PREAMBLE_SHORT : EAGLE_TXD_PREAMBLE_LONG);
3182193240Ssam	}
3183193240Ssam	return fmt;
3184193240Ssam}
3185193240Ssam
3186193240Ssamstatic int
3187193240Ssammwl_tx_start(struct mwl_softc *sc, struct ieee80211_node *ni, struct mwl_txbuf *bf,
3188193240Ssam    struct mbuf *m0)
3189193240Ssam{
3190193240Ssam#define	IEEE80211_DIR_DSTODS(wh) \
3191193240Ssam	((wh->i_fc[1] & IEEE80211_FC1_DIR_MASK) == IEEE80211_FC1_DIR_DSTODS)
3192193240Ssam	struct ifnet *ifp = sc->sc_ifp;
3193193240Ssam	struct ieee80211com *ic = ifp->if_l2com;
3194193240Ssam	struct ieee80211vap *vap = ni->ni_vap;
3195193240Ssam	int error, iswep, ismcast;
3196193240Ssam	int hdrlen, copyhdrlen, pktlen;
3197193240Ssam	struct mwl_txdesc *ds;
3198193240Ssam	struct mwl_txq *txq;
3199193240Ssam	struct ieee80211_frame *wh;
3200193240Ssam	struct mwltxrec *tr;
3201193240Ssam	struct mwl_node *mn;
3202193240Ssam	uint16_t qos;
3203193240Ssam#if MWL_TXDESC > 1
3204193240Ssam	int i;
3205193240Ssam#endif
3206193240Ssam
3207193240Ssam	wh = mtod(m0, struct ieee80211_frame *);
3208262007Skevlo	iswep = wh->i_fc[1] & IEEE80211_FC1_PROTECTED;
3209193240Ssam	ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1);
3210193240Ssam	hdrlen = ieee80211_anyhdrsize(wh);
3211193240Ssam	copyhdrlen = hdrlen;
3212193240Ssam	pktlen = m0->m_pkthdr.len;
3213193240Ssam	if (IEEE80211_QOS_HAS_SEQ(wh)) {
3214193240Ssam		if (IEEE80211_DIR_DSTODS(wh)) {
3215193240Ssam			qos = *(uint16_t *)
3216193240Ssam			    (((struct ieee80211_qosframe_addr4 *) wh)->i_qos);
3217193240Ssam			copyhdrlen -= sizeof(qos);
3218193240Ssam		} else
3219193240Ssam			qos = *(uint16_t *)
3220193240Ssam			    (((struct ieee80211_qosframe *) wh)->i_qos);
3221193240Ssam	} else
3222193240Ssam		qos = 0;
3223193240Ssam
3224193240Ssam	if (iswep) {
3225193240Ssam		const struct ieee80211_cipher *cip;
3226193240Ssam		struct ieee80211_key *k;
3227193240Ssam
3228193240Ssam		/*
3229193240Ssam		 * Construct the 802.11 header+trailer for an encrypted
3230193240Ssam		 * frame. The only reason this can fail is because of an
3231193240Ssam		 * unknown or unsupported cipher/key type.
3232193240Ssam		 *
3233193240Ssam		 * NB: we do this even though the firmware will ignore
3234193240Ssam		 *     what we've done for WEP and TKIP as we need the
3235193240Ssam		 *     ExtIV filled in for CCMP and this also adjusts
3236193240Ssam		 *     the headers which simplifies our work below.
3237193240Ssam		 */
3238193240Ssam		k = ieee80211_crypto_encap(ni, m0);
3239193240Ssam		if (k == NULL) {
3240193240Ssam			/*
3241193240Ssam			 * This can happen when the key is yanked after the
3242193240Ssam			 * frame was queued.  Just discard the frame; the
3243193240Ssam			 * 802.11 layer counts failures and provides
3244193240Ssam			 * debugging/diagnostics.
3245193240Ssam			 */
3246193240Ssam			m_freem(m0);
3247193240Ssam			return EIO;
3248193240Ssam		}
3249193240Ssam		/*
3250193240Ssam		 * Adjust the packet length for the crypto additions
3251193240Ssam		 * done during encap and any other bits that the f/w
3252193240Ssam		 * will add later on.
3253193240Ssam		 */
3254193240Ssam		cip = k->wk_cipher;
3255193240Ssam		pktlen += cip->ic_header + cip->ic_miclen + cip->ic_trailer;
3256193240Ssam
3257193240Ssam		/* packet header may have moved, reset our local pointer */
3258193240Ssam		wh = mtod(m0, struct ieee80211_frame *);
3259193240Ssam	}
3260193240Ssam
3261193240Ssam	if (ieee80211_radiotap_active_vap(vap)) {
3262193240Ssam		sc->sc_tx_th.wt_flags = 0;	/* XXX */
3263193240Ssam		if (iswep)
3264193240Ssam			sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_WEP;
3265193240Ssam#if 0
3266193240Ssam		sc->sc_tx_th.wt_rate = ds->DataRate;
3267193240Ssam#endif
3268193240Ssam		sc->sc_tx_th.wt_txpower = ni->ni_txpower;
3269193240Ssam		sc->sc_tx_th.wt_antenna = sc->sc_txantenna;
3270193240Ssam
3271193240Ssam		ieee80211_radiotap_tx(vap, m0);
3272193240Ssam	}
3273193240Ssam	/*
3274193240Ssam	 * Copy up/down the 802.11 header; the firmware requires
3275193240Ssam	 * we present a 2-byte payload length followed by a
3276193240Ssam	 * 4-address header (w/o QoS), followed (optionally) by
3277193240Ssam	 * any WEP/ExtIV header (but only filled in for CCMP).
3278193240Ssam	 * We are assured the mbuf has sufficient headroom to
3279193240Ssam	 * prepend in-place by the setup of ic_headroom in
3280193240Ssam	 * mwl_attach.
3281193240Ssam	 */
3282193240Ssam	if (hdrlen < sizeof(struct mwltxrec)) {
3283193240Ssam		const int space = sizeof(struct mwltxrec) - hdrlen;
3284193240Ssam		if (M_LEADINGSPACE(m0) < space) {
3285193240Ssam			/* NB: should never happen */
3286193240Ssam			device_printf(sc->sc_dev,
3287193240Ssam			    "not enough headroom, need %d found %zd, "
3288193240Ssam			    "m_flags 0x%x m_len %d\n",
3289193240Ssam			    space, M_LEADINGSPACE(m0), m0->m_flags, m0->m_len);
3290193240Ssam			ieee80211_dump_pkt(ic,
3291193240Ssam			    mtod(m0, const uint8_t *), m0->m_len, 0, -1);
3292193240Ssam			m_freem(m0);
3293193240Ssam			sc->sc_stats.mst_tx_noheadroom++;
3294193240Ssam			return EIO;
3295193240Ssam		}
3296193240Ssam		M_PREPEND(m0, space, M_NOWAIT);
3297193240Ssam	}
3298193240Ssam	tr = mtod(m0, struct mwltxrec *);
3299193240Ssam	if (wh != (struct ieee80211_frame *) &tr->wh)
3300193240Ssam		ovbcopy(wh, &tr->wh, hdrlen);
3301193240Ssam	/*
3302193240Ssam	 * Note: the "firmware length" is actually the length
3303193240Ssam	 * of the fully formed "802.11 payload".  That is, it's
3304193240Ssam	 * everything except for the 802.11 header.  In particular
3305193240Ssam	 * this includes all crypto material including the MIC!
3306193240Ssam	 */
3307193240Ssam	tr->fwlen = htole16(pktlen - hdrlen);
3308193240Ssam
3309193240Ssam	/*
3310193240Ssam	 * Load the DMA map so any coalescing is done.  This
3311193240Ssam	 * also calculates the number of descriptors we need.
3312193240Ssam	 */
3313193240Ssam	error = mwl_tx_dmasetup(sc, bf, m0);
3314193240Ssam	if (error != 0) {
3315193240Ssam		/* NB: stat collected in mwl_tx_dmasetup */
3316193240Ssam		DPRINTF(sc, MWL_DEBUG_XMIT,
3317193240Ssam		    "%s: unable to setup dma\n", __func__);
3318193240Ssam		return error;
3319193240Ssam	}
3320193240Ssam	bf->bf_node = ni;			/* NB: held reference */
3321193240Ssam	m0 = bf->bf_m;				/* NB: may have changed */
3322193240Ssam	tr = mtod(m0, struct mwltxrec *);
3323193240Ssam	wh = (struct ieee80211_frame *)&tr->wh;
3324193240Ssam
3325193240Ssam	/*
3326193240Ssam	 * Formulate tx descriptor.
3327193240Ssam	 */
3328193240Ssam	ds = bf->bf_desc;
3329193240Ssam	txq = bf->bf_txq;
3330193240Ssam
3331193240Ssam	ds->QosCtrl = qos;			/* NB: already little-endian */
3332193240Ssam#if MWL_TXDESC == 1
3333193240Ssam	/*
3334193240Ssam	 * NB: multiframes should be zero because the descriptors
3335193240Ssam	 *     are initialized to zero.  This should handle the case
3336193240Ssam	 *     where the driver is built with MWL_TXDESC=1 but we are
3337193240Ssam	 *     using firmware with multi-segment support.
3338193240Ssam	 */
3339193240Ssam	ds->PktPtr = htole32(bf->bf_segs[0].ds_addr);
3340193240Ssam	ds->PktLen = htole16(bf->bf_segs[0].ds_len);
3341193240Ssam#else
3342193240Ssam	ds->multiframes = htole32(bf->bf_nseg);
3343193240Ssam	ds->PktLen = htole16(m0->m_pkthdr.len);
3344193240Ssam	for (i = 0; i < bf->bf_nseg; i++) {
3345193240Ssam		ds->PktPtrArray[i] = htole32(bf->bf_segs[i].ds_addr);
3346193240Ssam		ds->PktLenArray[i] = htole16(bf->bf_segs[i].ds_len);
3347193240Ssam	}
3348193240Ssam#endif
3349193240Ssam	/* NB: pPhysNext, DataRate, and SapPktInfo setup once, don't touch */
3350193240Ssam	ds->Format = 0;
3351193240Ssam	ds->pad = 0;
3352195171Ssam	ds->ack_wcb_addr = 0;
3353193240Ssam
3354193240Ssam	mn = MWL_NODE(ni);
3355193240Ssam	/*
3356193240Ssam	 * Select transmit rate.
3357193240Ssam	 */
3358193240Ssam	switch (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) {
3359193240Ssam	case IEEE80211_FC0_TYPE_MGT:
3360193240Ssam		sc->sc_stats.mst_tx_mgmt++;
3361193240Ssam		/* fall thru... */
3362193240Ssam	case IEEE80211_FC0_TYPE_CTL:
3363193240Ssam		/* NB: assign to BE q to avoid bursting */
3364193240Ssam		ds->TxPriority = MWL_WME_AC_BE;
3365193240Ssam		break;
3366193240Ssam	case IEEE80211_FC0_TYPE_DATA:
3367193240Ssam		if (!ismcast) {
3368193240Ssam			const struct ieee80211_txparam *tp = ni->ni_txparms;
3369193240Ssam			/*
3370193240Ssam			 * EAPOL frames get forced to a fixed rate and w/o
3371193240Ssam			 * aggregation; otherwise check for any fixed rate
3372193240Ssam			 * for the client (may depend on association state).
3373193240Ssam			 */
3374193240Ssam			if (m0->m_flags & M_EAPOL) {
3375193240Ssam				const struct mwl_vap *mvp = MWL_VAP_CONST(vap);
3376193240Ssam				ds->Format = mvp->mv_eapolformat;
3377193240Ssam				ds->pad = htole16(
3378193240Ssam				    EAGLE_TXD_FIXED_RATE | EAGLE_TXD_DONT_AGGR);
3379195171Ssam			} else if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE) {
3380193240Ssam				/* XXX pre-calculate per node */
3381193240Ssam				ds->Format = htole16(
3382193240Ssam				    mwl_calcformat(tp->ucastrate, ni));
3383193240Ssam				ds->pad = htole16(EAGLE_TXD_FIXED_RATE);
3384193240Ssam			}
3385193240Ssam			/* NB: EAPOL frames will never have qos set */
3386193240Ssam			if (qos == 0)
3387193240Ssam				ds->TxPriority = txq->qnum;
3388193240Ssam#if MWL_MAXBA > 3
3389193240Ssam			else if (mwl_bastream_match(&mn->mn_ba[3], qos))
3390193240Ssam				ds->TxPriority = mn->mn_ba[3].txq;
3391193240Ssam#endif
3392193240Ssam#if MWL_MAXBA > 2
3393193240Ssam			else if (mwl_bastream_match(&mn->mn_ba[2], qos))
3394193240Ssam				ds->TxPriority = mn->mn_ba[2].txq;
3395193240Ssam#endif
3396193240Ssam#if MWL_MAXBA > 1
3397193240Ssam			else if (mwl_bastream_match(&mn->mn_ba[1], qos))
3398193240Ssam				ds->TxPriority = mn->mn_ba[1].txq;
3399193240Ssam#endif
3400193240Ssam#if MWL_MAXBA > 0
3401193240Ssam			else if (mwl_bastream_match(&mn->mn_ba[0], qos))
3402193240Ssam				ds->TxPriority = mn->mn_ba[0].txq;
3403193240Ssam#endif
3404193240Ssam			else
3405193240Ssam				ds->TxPriority = txq->qnum;
3406193240Ssam		} else
3407193240Ssam			ds->TxPriority = txq->qnum;
3408193240Ssam		break;
3409193240Ssam	default:
3410193240Ssam		if_printf(ifp, "bogus frame type 0x%x (%s)\n",
3411193240Ssam			wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK, __func__);
3412193240Ssam		sc->sc_stats.mst_tx_badframetype++;
3413193240Ssam		m_freem(m0);
3414193240Ssam		return EIO;
3415193240Ssam	}
3416193240Ssam
3417193240Ssam	if (IFF_DUMPPKTS_XMIT(sc))
3418193240Ssam		ieee80211_dump_pkt(ic,
3419193240Ssam		    mtod(m0, const uint8_t *)+sizeof(uint16_t),
3420193240Ssam		    m0->m_len - sizeof(uint16_t), ds->DataRate, -1);
3421193240Ssam
3422193240Ssam	MWL_TXQ_LOCK(txq);
3423193240Ssam	ds->Status = htole32(EAGLE_TXD_STATUS_FW_OWNED);
3424193240Ssam	STAILQ_INSERT_TAIL(&txq->active, bf, bf_list);
3425193240Ssam	MWL_TXDESC_SYNC(txq, ds, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
3426193240Ssam
3427193240Ssam	ifp->if_opackets++;
3428199559Sjhb	sc->sc_tx_timer = 5;
3429193240Ssam	MWL_TXQ_UNLOCK(txq);
3430193240Ssam
3431193240Ssam	return 0;
3432193240Ssam#undef	IEEE80211_DIR_DSTODS
3433193240Ssam}
3434193240Ssam
3435193240Ssamstatic __inline int
3436193240Ssammwl_cvtlegacyrix(int rix)
3437193240Ssam{
3438193240Ssam#define	N(x)	(sizeof(x)/sizeof(x[0]))
3439193240Ssam	static const int ieeerates[] =
3440193240Ssam	    { 2, 4, 11, 22, 44, 12, 18, 24, 36, 48, 72, 96, 108 };
3441193240Ssam	return (rix < N(ieeerates) ? ieeerates[rix] : 0);
3442193240Ssam#undef N
3443193240Ssam}
3444193240Ssam
3445193240Ssam/*
3446193240Ssam * Process completed xmit descriptors from the specified queue.
3447193240Ssam */
3448193240Ssamstatic int
3449193240Ssammwl_tx_processq(struct mwl_softc *sc, struct mwl_txq *txq)
3450193240Ssam{
3451193240Ssam#define	EAGLE_TXD_STATUS_MCAST \
3452193240Ssam	(EAGLE_TXD_STATUS_MULTICAST_TX | EAGLE_TXD_STATUS_BROADCAST_TX)
3453193240Ssam	struct ifnet *ifp = sc->sc_ifp;
3454193240Ssam	struct ieee80211com *ic = ifp->if_l2com;
3455193240Ssam	struct mwl_txbuf *bf;
3456193240Ssam	struct mwl_txdesc *ds;
3457193240Ssam	struct ieee80211_node *ni;
3458193240Ssam	struct mwl_node *an;
3459193240Ssam	int nreaped;
3460193240Ssam	uint32_t status;
3461193240Ssam
3462193240Ssam	DPRINTF(sc, MWL_DEBUG_TX_PROC, "%s: tx queue %u\n", __func__, txq->qnum);
3463193240Ssam	for (nreaped = 0;; nreaped++) {
3464193240Ssam		MWL_TXQ_LOCK(txq);
3465193240Ssam		bf = STAILQ_FIRST(&txq->active);
3466193240Ssam		if (bf == NULL) {
3467193240Ssam			MWL_TXQ_UNLOCK(txq);
3468193240Ssam			break;
3469193240Ssam		}
3470193240Ssam		ds = bf->bf_desc;
3471193240Ssam		MWL_TXDESC_SYNC(txq, ds,
3472193240Ssam		    BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
3473193240Ssam		if (ds->Status & htole32(EAGLE_TXD_STATUS_FW_OWNED)) {
3474193240Ssam			MWL_TXQ_UNLOCK(txq);
3475193240Ssam			break;
3476193240Ssam		}
3477193240Ssam		STAILQ_REMOVE_HEAD(&txq->active, bf_list);
3478193240Ssam		MWL_TXQ_UNLOCK(txq);
3479193240Ssam
3480193240Ssam#ifdef MWL_DEBUG
3481193240Ssam		if (sc->sc_debug & MWL_DEBUG_XMIT_DESC)
3482193240Ssam			mwl_printtxbuf(bf, txq->qnum, nreaped);
3483193240Ssam#endif
3484193240Ssam		ni = bf->bf_node;
3485193240Ssam		if (ni != NULL) {
3486193240Ssam			an = MWL_NODE(ni);
3487193240Ssam			status = le32toh(ds->Status);
3488193240Ssam			if (status & EAGLE_TXD_STATUS_OK) {
3489193240Ssam				uint16_t Format = le16toh(ds->Format);
3490193240Ssam				uint8_t txant = MS(Format, EAGLE_TXD_ANTENNA);
3491193240Ssam
3492193240Ssam				sc->sc_stats.mst_ant_tx[txant]++;
3493193240Ssam				if (status & EAGLE_TXD_STATUS_OK_RETRY)
3494193240Ssam					sc->sc_stats.mst_tx_retries++;
3495193240Ssam				if (status & EAGLE_TXD_STATUS_OK_MORE_RETRY)
3496193240Ssam					sc->sc_stats.mst_tx_mretries++;
3497193240Ssam				if (txq->qnum >= MWL_WME_AC_VO)
3498193240Ssam					ic->ic_wme.wme_hipri_traffic++;
3499193240Ssam				ni->ni_txrate = MS(Format, EAGLE_TXD_RATE);
3500193240Ssam				if ((Format & EAGLE_TXD_FORMAT_HT) == 0) {
3501193240Ssam					ni->ni_txrate = mwl_cvtlegacyrix(
3502193240Ssam					    ni->ni_txrate);
3503193240Ssam				} else
3504193240Ssam					ni->ni_txrate |= IEEE80211_RATE_MCS;
3505193240Ssam				sc->sc_stats.mst_tx_rate = ni->ni_txrate;
3506193240Ssam			} else {
3507193240Ssam				if (status & EAGLE_TXD_STATUS_FAILED_LINK_ERROR)
3508193240Ssam					sc->sc_stats.mst_tx_linkerror++;
3509193240Ssam				if (status & EAGLE_TXD_STATUS_FAILED_XRETRY)
3510193240Ssam					sc->sc_stats.mst_tx_xretries++;
3511193240Ssam				if (status & EAGLE_TXD_STATUS_FAILED_AGING)
3512193240Ssam					sc->sc_stats.mst_tx_aging++;
3513193240Ssam				if (bf->bf_m->m_flags & M_FF)
3514193240Ssam					sc->sc_stats.mst_ff_txerr++;
3515193240Ssam			}
3516193240Ssam			/*
3517193240Ssam			 * Do any tx complete callback.  Note this must
3518193240Ssam			 * be done before releasing the node reference.
3519193240Ssam			 * XXX no way to figure out if frame was ACK'd
3520193240Ssam			 */
3521193240Ssam			if (bf->bf_m->m_flags & M_TXCB) {
3522193240Ssam				/* XXX strip fw len in case header inspected */
3523193240Ssam				m_adj(bf->bf_m, sizeof(uint16_t));
3524193240Ssam				ieee80211_process_callback(ni, bf->bf_m,
3525193240Ssam					(status & EAGLE_TXD_STATUS_OK) == 0);
3526193240Ssam			}
3527193240Ssam			/*
3528193240Ssam			 * Reclaim reference to node.
3529193240Ssam			 *
3530193240Ssam			 * NB: the node may be reclaimed here if, for example
3531193240Ssam			 *     this is a DEAUTH message that was sent and the
3532193240Ssam			 *     node was timed out due to inactivity.
3533193240Ssam			 */
3534193240Ssam			ieee80211_free_node(ni);
3535193240Ssam		}
3536193240Ssam		ds->Status = htole32(EAGLE_TXD_STATUS_IDLE);
3537193240Ssam
3538193240Ssam		bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap,
3539193240Ssam		    BUS_DMASYNC_POSTWRITE);
3540193240Ssam		bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
3541193240Ssam		m_freem(bf->bf_m);
3542193240Ssam
3543193240Ssam		mwl_puttxbuf_tail(txq, bf);
3544193240Ssam	}
3545193240Ssam	return nreaped;
3546193240Ssam#undef EAGLE_TXD_STATUS_MCAST
3547193240Ssam}
3548193240Ssam
3549193240Ssam/*
3550193240Ssam * Deferred processing of transmit interrupt; special-cased
3551193240Ssam * for four hardware queues, 0-3.
3552193240Ssam */
3553193240Ssamstatic void
3554193240Ssammwl_tx_proc(void *arg, int npending)
3555193240Ssam{
3556193240Ssam	struct mwl_softc *sc = arg;
3557193240Ssam	struct ifnet *ifp = sc->sc_ifp;
3558193240Ssam	int nreaped;
3559193240Ssam
3560193240Ssam	/*
3561193240Ssam	 * Process each active queue.
3562193240Ssam	 */
3563193240Ssam	nreaped = 0;
3564193240Ssam	if (!STAILQ_EMPTY(&sc->sc_txq[0].active))
3565193240Ssam		nreaped += mwl_tx_processq(sc, &sc->sc_txq[0]);
3566193240Ssam	if (!STAILQ_EMPTY(&sc->sc_txq[1].active))
3567193240Ssam		nreaped += mwl_tx_processq(sc, &sc->sc_txq[1]);
3568193240Ssam	if (!STAILQ_EMPTY(&sc->sc_txq[2].active))
3569193240Ssam		nreaped += mwl_tx_processq(sc, &sc->sc_txq[2]);
3570193240Ssam	if (!STAILQ_EMPTY(&sc->sc_txq[3].active))
3571193240Ssam		nreaped += mwl_tx_processq(sc, &sc->sc_txq[3]);
3572193240Ssam
3573193240Ssam	if (nreaped != 0) {
3574193240Ssam		ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
3575199559Sjhb		sc->sc_tx_timer = 0;
3576193240Ssam		if (!IFQ_IS_EMPTY(&ifp->if_snd)) {
3577193240Ssam			/* NB: kick fw; the tx thread may have been preempted */
3578193240Ssam			mwl_hal_txstart(sc->sc_mh, 0);
3579193240Ssam			mwl_start(ifp);
3580193240Ssam		}
3581193240Ssam	}
3582193240Ssam}
3583193240Ssam
3584193240Ssamstatic void
3585193240Ssammwl_tx_draintxq(struct mwl_softc *sc, struct mwl_txq *txq)
3586193240Ssam{
3587193240Ssam	struct ieee80211_node *ni;
3588193240Ssam	struct mwl_txbuf *bf;
3589193240Ssam	u_int ix;
3590193240Ssam
3591193240Ssam	/*
3592193240Ssam	 * NB: this assumes output has been stopped and
3593193240Ssam	 *     we do not need to block mwl_tx_tasklet
3594193240Ssam	 */
3595193240Ssam	for (ix = 0;; ix++) {
3596193240Ssam		MWL_TXQ_LOCK(txq);
3597193240Ssam		bf = STAILQ_FIRST(&txq->active);
3598193240Ssam		if (bf == NULL) {
3599193240Ssam			MWL_TXQ_UNLOCK(txq);
3600193240Ssam			break;
3601193240Ssam		}
3602193240Ssam		STAILQ_REMOVE_HEAD(&txq->active, bf_list);
3603193240Ssam		MWL_TXQ_UNLOCK(txq);
3604193240Ssam#ifdef MWL_DEBUG
3605193240Ssam		if (sc->sc_debug & MWL_DEBUG_RESET) {
3606193240Ssam			struct ifnet *ifp = sc->sc_ifp;
3607193240Ssam			struct ieee80211com *ic = ifp->if_l2com;
3608193240Ssam			const struct mwltxrec *tr =
3609193240Ssam			    mtod(bf->bf_m, const struct mwltxrec *);
3610193240Ssam			mwl_printtxbuf(bf, txq->qnum, ix);
3611193240Ssam			ieee80211_dump_pkt(ic, (const uint8_t *)&tr->wh,
3612193240Ssam				bf->bf_m->m_len - sizeof(tr->fwlen), 0, -1);
3613193240Ssam		}
3614193240Ssam#endif /* MWL_DEBUG */
3615193240Ssam		bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
3616193240Ssam		ni = bf->bf_node;
3617193240Ssam		if (ni != NULL) {
3618193240Ssam			/*
3619193240Ssam			 * Reclaim node reference.
3620193240Ssam			 */
3621193240Ssam			ieee80211_free_node(ni);
3622193240Ssam		}
3623193240Ssam		m_freem(bf->bf_m);
3624193240Ssam
3625193240Ssam		mwl_puttxbuf_tail(txq, bf);
3626193240Ssam	}
3627193240Ssam}
3628193240Ssam
3629193240Ssam/*
3630193240Ssam * Drain the transmit queues and reclaim resources.
3631193240Ssam */
3632193240Ssamstatic void
3633193240Ssammwl_draintxq(struct mwl_softc *sc)
3634193240Ssam{
3635193240Ssam	struct ifnet *ifp = sc->sc_ifp;
3636193240Ssam	int i;
3637193240Ssam
3638193240Ssam	for (i = 0; i < MWL_NUM_TX_QUEUES; i++)
3639193240Ssam		mwl_tx_draintxq(sc, &sc->sc_txq[i]);
3640193240Ssam	ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
3641199559Sjhb	sc->sc_tx_timer = 0;
3642193240Ssam}
3643193240Ssam
3644193240Ssam#ifdef MWL_DIAGAPI
3645193240Ssam/*
3646193240Ssam * Reset the transmit queues to a pristine state after a fw download.
3647193240Ssam */
3648193240Ssamstatic void
3649193240Ssammwl_resettxq(struct mwl_softc *sc)
3650193240Ssam{
3651193240Ssam	int i;
3652193240Ssam
3653193240Ssam	for (i = 0; i < MWL_NUM_TX_QUEUES; i++)
3654193240Ssam		mwl_txq_reset(sc, &sc->sc_txq[i]);
3655193240Ssam}
3656193240Ssam#endif /* MWL_DIAGAPI */
3657193240Ssam
3658193240Ssam/*
3659193240Ssam * Clear the transmit queues of any frames submitted for the
3660193240Ssam * specified vap.  This is done when the vap is deleted so we
3661193240Ssam * don't potentially reference the vap after it is gone.
3662193240Ssam * Note we cannot remove the frames; we only reclaim the node
3663193240Ssam * reference.
3664193240Ssam */
3665193240Ssamstatic void
3666193240Ssammwl_cleartxq(struct mwl_softc *sc, struct ieee80211vap *vap)
3667193240Ssam{
3668193240Ssam	struct mwl_txq *txq;
3669193240Ssam	struct mwl_txbuf *bf;
3670193240Ssam	int i;
3671193240Ssam
3672193240Ssam	for (i = 0; i < MWL_NUM_TX_QUEUES; i++) {
3673193240Ssam		txq = &sc->sc_txq[i];
3674193240Ssam		MWL_TXQ_LOCK(txq);
3675193240Ssam		STAILQ_FOREACH(bf, &txq->active, bf_list) {
3676193240Ssam			struct ieee80211_node *ni = bf->bf_node;
3677193240Ssam			if (ni != NULL && ni->ni_vap == vap) {
3678193240Ssam				bf->bf_node = NULL;
3679193240Ssam				ieee80211_free_node(ni);
3680193240Ssam			}
3681193240Ssam		}
3682193240Ssam		MWL_TXQ_UNLOCK(txq);
3683193240Ssam	}
3684193240Ssam}
3685193240Ssam
3686195377Ssamstatic int
3687195377Ssammwl_recv_action(struct ieee80211_node *ni, const struct ieee80211_frame *wh,
3688195377Ssam	const uint8_t *frm, const uint8_t *efrm)
3689193240Ssam{
3690193240Ssam	struct mwl_softc *sc = ni->ni_ic->ic_ifp->if_softc;
3691193240Ssam	const struct ieee80211_action *ia;
3692193240Ssam
3693193240Ssam	ia = (const struct ieee80211_action *) frm;
3694193240Ssam	if (ia->ia_category == IEEE80211_ACTION_CAT_HT &&
3695193240Ssam	    ia->ia_action == IEEE80211_ACTION_HT_MIMOPWRSAVE) {
3696193240Ssam		const struct ieee80211_action_ht_mimopowersave *mps =
3697193240Ssam		    (const struct ieee80211_action_ht_mimopowersave *) ia;
3698193240Ssam
3699193240Ssam		mwl_hal_setmimops(sc->sc_mh, ni->ni_macaddr,
3700193240Ssam		    mps->am_control & IEEE80211_A_HT_MIMOPWRSAVE_ENA,
3701193240Ssam		    MS(mps->am_control, IEEE80211_A_HT_MIMOPWRSAVE_MODE));
3702195377Ssam		return 0;
3703193240Ssam	} else
3704195377Ssam		return sc->sc_recv_action(ni, wh, frm, efrm);
3705193240Ssam}
3706193240Ssam
3707193240Ssamstatic int
3708193240Ssammwl_addba_request(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap,
3709193240Ssam	int dialogtoken, int baparamset, int batimeout)
3710193240Ssam{
3711193240Ssam	struct mwl_softc *sc = ni->ni_ic->ic_ifp->if_softc;
3712195171Ssam	struct ieee80211vap *vap = ni->ni_vap;
3713193240Ssam	struct mwl_node *mn = MWL_NODE(ni);
3714193240Ssam	struct mwl_bastate *bas;
3715193240Ssam
3716193240Ssam	bas = tap->txa_private;
3717193240Ssam	if (bas == NULL) {
3718193240Ssam		const MWL_HAL_BASTREAM *sp;
3719193240Ssam		/*
3720193240Ssam		 * Check for a free BA stream slot.
3721193240Ssam		 */
3722193240Ssam#if MWL_MAXBA > 3
3723193240Ssam		if (mn->mn_ba[3].bastream == NULL)
3724193240Ssam			bas = &mn->mn_ba[3];
3725193240Ssam		else
3726193240Ssam#endif
3727193240Ssam#if MWL_MAXBA > 2
3728193240Ssam		if (mn->mn_ba[2].bastream == NULL)
3729193240Ssam			bas = &mn->mn_ba[2];
3730193240Ssam		else
3731193240Ssam#endif
3732193240Ssam#if MWL_MAXBA > 1
3733193240Ssam		if (mn->mn_ba[1].bastream == NULL)
3734193240Ssam			bas = &mn->mn_ba[1];
3735193240Ssam		else
3736193240Ssam#endif
3737193240Ssam#if MWL_MAXBA > 0
3738193240Ssam		if (mn->mn_ba[0].bastream == NULL)
3739193240Ssam			bas = &mn->mn_ba[0];
3740193240Ssam		else
3741193240Ssam#endif
3742193240Ssam		{
3743193240Ssam			/* sta already has max BA streams */
3744193240Ssam			/* XXX assign BA stream to highest priority tid */
3745193240Ssam			DPRINTF(sc, MWL_DEBUG_AMPDU,
3746193240Ssam			    "%s: already has max bastreams\n", __func__);
3747193240Ssam			sc->sc_stats.mst_ampdu_reject++;
3748193240Ssam			return 0;
3749193240Ssam		}
3750193240Ssam		/* NB: no held reference to ni */
3751195171Ssam		sp = mwl_hal_bastream_alloc(MWL_VAP(vap)->mv_hvap,
3752195171Ssam		    (baparamset & IEEE80211_BAPS_POLICY_IMMEDIATE) != 0,
3753234324Sadrian		    ni->ni_macaddr, tap->txa_tid, ni->ni_htparam,
3754195171Ssam		    ni, tap);
3755193240Ssam		if (sp == NULL) {
3756193240Ssam			/*
3757193240Ssam			 * No available stream, return 0 so no
3758193240Ssam			 * a-mpdu aggregation will be done.
3759193240Ssam			 */
3760193240Ssam			DPRINTF(sc, MWL_DEBUG_AMPDU,
3761193240Ssam			    "%s: no bastream available\n", __func__);
3762193240Ssam			sc->sc_stats.mst_ampdu_nostream++;
3763193240Ssam			return 0;
3764193240Ssam		}
3765193240Ssam		DPRINTF(sc, MWL_DEBUG_AMPDU, "%s: alloc bastream %p\n",
3766193240Ssam		    __func__, sp);
3767193240Ssam		/* NB: qos is left zero so we won't match in mwl_tx_start */
3768193240Ssam		bas->bastream = sp;
3769193240Ssam		tap->txa_private = bas;
3770193240Ssam	}
3771193240Ssam	/* fetch current seq# from the firmware; if available */
3772193240Ssam	if (mwl_hal_bastream_get_seqno(sc->sc_mh, bas->bastream,
3773195171Ssam	    vap->iv_opmode == IEEE80211_M_STA ? vap->iv_myaddr : ni->ni_macaddr,
3774193240Ssam	    &tap->txa_start) != 0)
3775193240Ssam		tap->txa_start = 0;
3776193240Ssam	return sc->sc_addba_request(ni, tap, dialogtoken, baparamset, batimeout);
3777193240Ssam}
3778193240Ssam
3779193240Ssamstatic int
3780193240Ssammwl_addba_response(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap,
3781193240Ssam	int code, int baparamset, int batimeout)
3782193240Ssam{
3783193240Ssam	struct mwl_softc *sc = ni->ni_ic->ic_ifp->if_softc;
3784193240Ssam	struct mwl_bastate *bas;
3785193240Ssam
3786193240Ssam	bas = tap->txa_private;
3787193240Ssam	if (bas == NULL) {
3788193240Ssam		/* XXX should not happen */
3789193240Ssam		DPRINTF(sc, MWL_DEBUG_AMPDU,
3790234324Sadrian		    "%s: no BA stream allocated, TID %d\n",
3791234324Sadrian		    __func__, tap->txa_tid);
3792193240Ssam		sc->sc_stats.mst_addba_nostream++;
3793193240Ssam		return 0;
3794193240Ssam	}
3795193240Ssam	if (code == IEEE80211_STATUS_SUCCESS) {
3796195171Ssam		struct ieee80211vap *vap = ni->ni_vap;
3797193240Ssam		int bufsiz, error;
3798193240Ssam
3799193240Ssam		/*
3800193240Ssam		 * Tell the firmware to setup the BA stream;
3801193240Ssam		 * we know resources are available because we
3802193240Ssam		 * pre-allocated one before forming the request.
3803193240Ssam		 */
3804193240Ssam		bufsiz = MS(baparamset, IEEE80211_BAPS_BUFSIZ);
3805193240Ssam		if (bufsiz == 0)
3806193240Ssam			bufsiz = IEEE80211_AGGR_BAWMAX;
3807195171Ssam		error = mwl_hal_bastream_create(MWL_VAP(vap)->mv_hvap,
3808195171Ssam		    bas->bastream, bufsiz, bufsiz, tap->txa_start);
3809193240Ssam		if (error != 0) {
3810193240Ssam			/*
3811193240Ssam			 * Setup failed, return immediately so no a-mpdu
3812193240Ssam			 * aggregation will be done.
3813193240Ssam			 */
3814193240Ssam			mwl_hal_bastream_destroy(sc->sc_mh, bas->bastream);
3815193240Ssam			mwl_bastream_free(bas);
3816193240Ssam			tap->txa_private = NULL;
3817193240Ssam
3818193240Ssam			DPRINTF(sc, MWL_DEBUG_AMPDU,
3819234324Sadrian			    "%s: create failed, error %d, bufsiz %d TID %d "
3820193240Ssam			    "htparam 0x%x\n", __func__, error, bufsiz,
3821234324Sadrian			    tap->txa_tid, ni->ni_htparam);
3822193240Ssam			sc->sc_stats.mst_bacreate_failed++;
3823193240Ssam			return 0;
3824193240Ssam		}
3825193240Ssam		/* NB: cache txq to avoid ptr indirect */
3826234324Sadrian		mwl_bastream_setup(bas, tap->txa_tid, bas->bastream->txq);
3827193240Ssam		DPRINTF(sc, MWL_DEBUG_AMPDU,
3828234324Sadrian		    "%s: bastream %p assigned to txq %d TID %d bufsiz %d "
3829193240Ssam		    "htparam 0x%x\n", __func__, bas->bastream,
3830234324Sadrian		    bas->txq, tap->txa_tid, bufsiz, ni->ni_htparam);
3831193240Ssam	} else {
3832193240Ssam		/*
3833193240Ssam		 * Other side NAK'd us; return the resources.
3834193240Ssam		 */
3835193240Ssam		DPRINTF(sc, MWL_DEBUG_AMPDU,
3836193240Ssam		    "%s: request failed with code %d, destroy bastream %p\n",
3837193240Ssam		    __func__, code, bas->bastream);
3838193240Ssam		mwl_hal_bastream_destroy(sc->sc_mh, bas->bastream);
3839193240Ssam		mwl_bastream_free(bas);
3840193240Ssam		tap->txa_private = NULL;
3841193240Ssam	}
3842193240Ssam	/* NB: firmware sends BAR so we don't need to */
3843193240Ssam	return sc->sc_addba_response(ni, tap, code, baparamset, batimeout);
3844193240Ssam}
3845193240Ssam
3846193240Ssamstatic void
3847193240Ssammwl_addba_stop(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap)
3848193240Ssam{
3849193240Ssam	struct mwl_softc *sc = ni->ni_ic->ic_ifp->if_softc;
3850193240Ssam	struct mwl_bastate *bas;
3851193240Ssam
3852193240Ssam	bas = tap->txa_private;
3853193240Ssam	if (bas != NULL) {
3854193240Ssam		DPRINTF(sc, MWL_DEBUG_AMPDU, "%s: destroy bastream %p\n",
3855193240Ssam		    __func__, bas->bastream);
3856193240Ssam		mwl_hal_bastream_destroy(sc->sc_mh, bas->bastream);
3857193240Ssam		mwl_bastream_free(bas);
3858193240Ssam		tap->txa_private = NULL;
3859193240Ssam	}
3860193240Ssam	sc->sc_addba_stop(ni, tap);
3861193240Ssam}
3862193240Ssam
3863193240Ssam/*
3864193240Ssam * Setup the rx data structures.  This should only be
3865193240Ssam * done once or we may get out of sync with the firmware.
3866193240Ssam */
3867193240Ssamstatic int
3868193240Ssammwl_startrecv(struct mwl_softc *sc)
3869193240Ssam{
3870193240Ssam	if (!sc->sc_recvsetup) {
3871193240Ssam		struct mwl_rxbuf *bf, *prev;
3872193240Ssam		struct mwl_rxdesc *ds;
3873193240Ssam
3874193240Ssam		prev = NULL;
3875193240Ssam		STAILQ_FOREACH(bf, &sc->sc_rxbuf, bf_list) {
3876193240Ssam			int error = mwl_rxbuf_init(sc, bf);
3877193240Ssam			if (error != 0) {
3878193240Ssam				DPRINTF(sc, MWL_DEBUG_RECV,
3879193240Ssam					"%s: mwl_rxbuf_init failed %d\n",
3880193240Ssam					__func__, error);
3881193240Ssam				return error;
3882193240Ssam			}
3883193240Ssam			if (prev != NULL) {
3884193240Ssam				ds = prev->bf_desc;
3885193240Ssam				ds->pPhysNext = htole32(bf->bf_daddr);
3886193240Ssam			}
3887193240Ssam			prev = bf;
3888193240Ssam		}
3889193240Ssam		if (prev != NULL) {
3890193240Ssam			ds = prev->bf_desc;
3891193240Ssam			ds->pPhysNext =
3892193240Ssam			    htole32(STAILQ_FIRST(&sc->sc_rxbuf)->bf_daddr);
3893193240Ssam		}
3894193240Ssam		sc->sc_recvsetup = 1;
3895193240Ssam	}
3896193240Ssam	mwl_mode_init(sc);		/* set filters, etc. */
3897193240Ssam	return 0;
3898193240Ssam}
3899193240Ssam
3900193240Ssamstatic MWL_HAL_APMODE
3901193240Ssammwl_getapmode(const struct ieee80211vap *vap, struct ieee80211_channel *chan)
3902193240Ssam{
3903193240Ssam	MWL_HAL_APMODE mode;
3904193240Ssam
3905193240Ssam	if (IEEE80211_IS_CHAN_HT(chan)) {
3906193656Ssam		if (vap->iv_flags_ht & IEEE80211_FHT_PUREN)
3907193240Ssam			mode = AP_MODE_N_ONLY;
3908193240Ssam		else if (IEEE80211_IS_CHAN_5GHZ(chan))
3909193240Ssam			mode = AP_MODE_AandN;
3910193240Ssam		else if (vap->iv_flags & IEEE80211_F_PUREG)
3911193240Ssam			mode = AP_MODE_GandN;
3912193240Ssam		else
3913193240Ssam			mode = AP_MODE_BandGandN;
3914193240Ssam	} else if (IEEE80211_IS_CHAN_ANYG(chan)) {
3915193240Ssam		if (vap->iv_flags & IEEE80211_F_PUREG)
3916193240Ssam			mode = AP_MODE_G_ONLY;
3917193240Ssam		else
3918193240Ssam			mode = AP_MODE_MIXED;
3919193240Ssam	} else if (IEEE80211_IS_CHAN_B(chan))
3920193240Ssam		mode = AP_MODE_B_ONLY;
3921193240Ssam	else if (IEEE80211_IS_CHAN_A(chan))
3922193240Ssam		mode = AP_MODE_A_ONLY;
3923193240Ssam	else
3924193240Ssam		mode = AP_MODE_MIXED;		/* XXX should not happen? */
3925193240Ssam	return mode;
3926193240Ssam}
3927193240Ssam
3928193240Ssamstatic int
3929193240Ssammwl_setapmode(struct ieee80211vap *vap, struct ieee80211_channel *chan)
3930193240Ssam{
3931193240Ssam	struct mwl_hal_vap *hvap = MWL_VAP(vap)->mv_hvap;
3932193240Ssam	return mwl_hal_setapmode(hvap, mwl_getapmode(vap, chan));
3933193240Ssam}
3934193240Ssam
3935193240Ssam/*
3936193240Ssam * Set/change channels.
3937193240Ssam */
3938193240Ssamstatic int
3939193240Ssammwl_chan_set(struct mwl_softc *sc, struct ieee80211_channel *chan)
3940193240Ssam{
3941193240Ssam	struct mwl_hal *mh = sc->sc_mh;
3942193240Ssam	struct ifnet *ifp = sc->sc_ifp;
3943193240Ssam	struct ieee80211com *ic = ifp->if_l2com;
3944193240Ssam	MWL_HAL_CHANNEL hchan;
3945193240Ssam	int maxtxpow;
3946193240Ssam
3947193240Ssam	DPRINTF(sc, MWL_DEBUG_RESET, "%s: chan %u MHz/flags 0x%x\n",
3948193240Ssam	    __func__, chan->ic_freq, chan->ic_flags);
3949193240Ssam
3950193240Ssam	/*
3951193240Ssam	 * Convert to a HAL channel description with
3952193240Ssam	 * the flags constrained to reflect the current
3953193240Ssam	 * operating mode.
3954193240Ssam	 */
3955193240Ssam	mwl_mapchan(&hchan, chan);
3956193240Ssam	mwl_hal_intrset(mh, 0);		/* disable interrupts */
3957193240Ssam#if 0
3958193240Ssam	mwl_draintxq(sc);		/* clear pending tx frames */
3959193240Ssam#endif
3960193240Ssam	mwl_hal_setchannel(mh, &hchan);
3961193240Ssam	/*
3962193240Ssam	 * Tx power is cap'd by the regulatory setting and
3963193240Ssam	 * possibly a user-set limit.  We pass the min of
3964193240Ssam	 * these to the hal to apply them to the cal data
3965193240Ssam	 * for this channel.
3966193240Ssam	 * XXX min bound?
3967193240Ssam	 */
3968193240Ssam	maxtxpow = 2*chan->ic_maxregpower;
3969193240Ssam	if (maxtxpow > ic->ic_txpowlimit)
3970193240Ssam		maxtxpow = ic->ic_txpowlimit;
3971193240Ssam	mwl_hal_settxpower(mh, &hchan, maxtxpow / 2);
3972193240Ssam	/* NB: potentially change mcast/mgt rates */
3973193240Ssam	mwl_setcurchanrates(sc);
3974193240Ssam
3975193240Ssam	/*
3976193240Ssam	 * Update internal state.
3977193240Ssam	 */
3978193240Ssam	sc->sc_tx_th.wt_chan_freq = htole16(chan->ic_freq);
3979193240Ssam	sc->sc_rx_th.wr_chan_freq = htole16(chan->ic_freq);
3980193240Ssam	if (IEEE80211_IS_CHAN_A(chan)) {
3981193240Ssam		sc->sc_tx_th.wt_chan_flags = htole16(IEEE80211_CHAN_A);
3982193240Ssam		sc->sc_rx_th.wr_chan_flags = htole16(IEEE80211_CHAN_A);
3983193240Ssam	} else if (IEEE80211_IS_CHAN_ANYG(chan)) {
3984193240Ssam		sc->sc_tx_th.wt_chan_flags = htole16(IEEE80211_CHAN_G);
3985193240Ssam		sc->sc_rx_th.wr_chan_flags = htole16(IEEE80211_CHAN_G);
3986193240Ssam	} else {
3987193240Ssam		sc->sc_tx_th.wt_chan_flags = htole16(IEEE80211_CHAN_B);
3988193240Ssam		sc->sc_rx_th.wr_chan_flags = htole16(IEEE80211_CHAN_B);
3989193240Ssam	}
3990193240Ssam	sc->sc_curchan = hchan;
3991193240Ssam	mwl_hal_intrset(mh, sc->sc_imask);
3992193240Ssam
3993193240Ssam	return 0;
3994193240Ssam}
3995193240Ssam
3996193240Ssamstatic void
3997193240Ssammwl_scan_start(struct ieee80211com *ic)
3998193240Ssam{
3999193240Ssam	struct ifnet *ifp = ic->ic_ifp;
4000193240Ssam	struct mwl_softc *sc = ifp->if_softc;
4001193240Ssam
4002193240Ssam	DPRINTF(sc, MWL_DEBUG_STATE, "%s\n", __func__);
4003193240Ssam}
4004193240Ssam
4005193240Ssamstatic void
4006193240Ssammwl_scan_end(struct ieee80211com *ic)
4007193240Ssam{
4008193240Ssam	struct ifnet *ifp = ic->ic_ifp;
4009193240Ssam	struct mwl_softc *sc = ifp->if_softc;
4010193240Ssam
4011193240Ssam	DPRINTF(sc, MWL_DEBUG_STATE, "%s\n", __func__);
4012193240Ssam}
4013193240Ssam
4014193240Ssamstatic void
4015193240Ssammwl_set_channel(struct ieee80211com *ic)
4016193240Ssam{
4017193240Ssam	struct ifnet *ifp = ic->ic_ifp;
4018193240Ssam	struct mwl_softc *sc = ifp->if_softc;
4019193240Ssam
4020193240Ssam	(void) mwl_chan_set(sc, ic->ic_curchan);
4021193240Ssam}
4022193240Ssam
4023193240Ssam/*
4024193240Ssam * Handle a channel switch request.  We inform the firmware
4025193240Ssam * and mark the global state to suppress various actions.
4026193240Ssam * NB: we issue only one request to the fw; we may be called
4027193240Ssam * multiple times if there are multiple vap's.
4028193240Ssam */
4029193240Ssamstatic void
4030193240Ssammwl_startcsa(struct ieee80211vap *vap)
4031193240Ssam{
4032193240Ssam	struct ieee80211com *ic = vap->iv_ic;
4033193240Ssam	struct mwl_softc *sc = ic->ic_ifp->if_softc;
4034193240Ssam	MWL_HAL_CHANNEL hchan;
4035193240Ssam
4036193240Ssam	if (sc->sc_csapending)
4037193240Ssam		return;
4038193240Ssam
4039193240Ssam	mwl_mapchan(&hchan, ic->ic_csa_newchan);
4040193240Ssam	/* 1 =>'s quiet channel */
4041193240Ssam	mwl_hal_setchannelswitchie(sc->sc_mh, &hchan, 1, ic->ic_csa_count);
4042193240Ssam	sc->sc_csapending = 1;
4043193240Ssam}
4044193240Ssam
4045193240Ssam/*
4046193240Ssam * Plumb any static WEP key for the station.  This is
4047193240Ssam * necessary as we must propagate the key from the
4048193240Ssam * global key table of the vap to each sta db entry.
4049193240Ssam */
4050193240Ssamstatic void
4051193240Ssammwl_setanywepkey(struct ieee80211vap *vap, const uint8_t mac[IEEE80211_ADDR_LEN])
4052193240Ssam{
4053193240Ssam	if ((vap->iv_flags & (IEEE80211_F_PRIVACY|IEEE80211_F_WPA)) ==
4054193240Ssam		IEEE80211_F_PRIVACY &&
4055193240Ssam	    vap->iv_def_txkey != IEEE80211_KEYIX_NONE &&
4056193240Ssam	    vap->iv_nw_keys[vap->iv_def_txkey].wk_keyix != IEEE80211_KEYIX_NONE)
4057193240Ssam		(void) mwl_key_set(vap, &vap->iv_nw_keys[vap->iv_def_txkey], mac);
4058193240Ssam}
4059193240Ssam
4060193240Ssamstatic int
4061193240Ssammwl_peerstadb(struct ieee80211_node *ni, int aid, int staid, MWL_HAL_PEERINFO *pi)
4062193240Ssam{
4063193240Ssam#define	WME(ie) ((const struct ieee80211_wme_info *) ie)
4064193240Ssam	struct ieee80211vap *vap = ni->ni_vap;
4065193240Ssam	struct mwl_hal_vap *hvap;
4066193240Ssam	int error;
4067193240Ssam
4068193240Ssam	if (vap->iv_opmode == IEEE80211_M_WDS) {
4069193240Ssam		/*
4070193240Ssam		 * WDS vap's do not have a f/w vap; instead they piggyback
4071193240Ssam		 * on an AP vap and we must install the sta db entry and
4072193240Ssam		 * crypto state using that AP's handle (the WDS vap has none).
4073193240Ssam		 */
4074193240Ssam		hvap = MWL_VAP(vap)->mv_ap_hvap;
4075193240Ssam	} else
4076193240Ssam		hvap = MWL_VAP(vap)->mv_hvap;
4077193240Ssam	error = mwl_hal_newstation(hvap, ni->ni_macaddr,
4078193240Ssam	    aid, staid, pi,
4079193240Ssam	    ni->ni_flags & (IEEE80211_NODE_QOS | IEEE80211_NODE_HT),
4080193240Ssam	    ni->ni_ies.wme_ie != NULL ? WME(ni->ni_ies.wme_ie)->wme_info : 0);
4081193240Ssam	if (error == 0) {
4082193240Ssam		/*
4083193240Ssam		 * Setup security for this station.  For sta mode this is
4084193240Ssam		 * needed even though do the same thing on transition to
4085193240Ssam		 * AUTH state because the call to mwl_hal_newstation
4086193240Ssam		 * clobbers the crypto state we setup.
4087193240Ssam		 */
4088193240Ssam		mwl_setanywepkey(vap, ni->ni_macaddr);
4089193240Ssam	}
4090193240Ssam	return error;
4091193240Ssam#undef WME
4092193240Ssam}
4093193240Ssam
4094193240Ssamstatic void
4095193240Ssammwl_setglobalkeys(struct ieee80211vap *vap)
4096193240Ssam{
4097193240Ssam	struct ieee80211_key *wk;
4098193240Ssam
4099193240Ssam	wk = &vap->iv_nw_keys[0];
4100193240Ssam	for (; wk < &vap->iv_nw_keys[IEEE80211_WEP_NKID]; wk++)
4101193240Ssam		if (wk->wk_keyix != IEEE80211_KEYIX_NONE)
4102193240Ssam			(void) mwl_key_set(vap, wk, vap->iv_myaddr);
4103193240Ssam}
4104193240Ssam
4105193240Ssam/*
4106195171Ssam * Convert a legacy rate set to a firmware bitmask.
4107195171Ssam */
4108195171Ssamstatic uint32_t
4109195171Ssamget_rate_bitmap(const struct ieee80211_rateset *rs)
4110195171Ssam{
4111195171Ssam	uint32_t rates;
4112195171Ssam	int i;
4113195171Ssam
4114195171Ssam	rates = 0;
4115195171Ssam	for (i = 0; i < rs->rs_nrates; i++)
4116195171Ssam		switch (rs->rs_rates[i] & IEEE80211_RATE_VAL) {
4117195171Ssam		case 2:	  rates |= 0x001; break;
4118195171Ssam		case 4:	  rates |= 0x002; break;
4119195171Ssam		case 11:  rates |= 0x004; break;
4120195171Ssam		case 22:  rates |= 0x008; break;
4121195171Ssam		case 44:  rates |= 0x010; break;
4122195171Ssam		case 12:  rates |= 0x020; break;
4123195171Ssam		case 18:  rates |= 0x040; break;
4124195171Ssam		case 24:  rates |= 0x080; break;
4125195171Ssam		case 36:  rates |= 0x100; break;
4126195171Ssam		case 48:  rates |= 0x200; break;
4127195171Ssam		case 72:  rates |= 0x400; break;
4128195171Ssam		case 96:  rates |= 0x800; break;
4129195171Ssam		case 108: rates |= 0x1000; break;
4130195171Ssam		}
4131195171Ssam	return rates;
4132195171Ssam}
4133195171Ssam
4134195171Ssam/*
4135195171Ssam * Construct an HT firmware bitmask from an HT rate set.
4136195171Ssam */
4137195171Ssamstatic uint32_t
4138195171Ssamget_htrate_bitmap(const struct ieee80211_htrateset *rs)
4139195171Ssam{
4140195171Ssam	uint32_t rates;
4141195171Ssam	int i;
4142195171Ssam
4143195171Ssam	rates = 0;
4144195171Ssam	for (i = 0; i < rs->rs_nrates; i++) {
4145195171Ssam		if (rs->rs_rates[i] < 16)
4146195171Ssam			rates |= 1<<rs->rs_rates[i];
4147195171Ssam	}
4148195171Ssam	return rates;
4149195171Ssam}
4150195171Ssam
4151195171Ssam/*
4152195171Ssam * Craft station database entry for station.
4153195171Ssam * NB: use host byte order here, the hal handles byte swapping.
4154195171Ssam */
4155195171Ssamstatic MWL_HAL_PEERINFO *
4156195171Ssammkpeerinfo(MWL_HAL_PEERINFO *pi, const struct ieee80211_node *ni)
4157195171Ssam{
4158195171Ssam	const struct ieee80211vap *vap = ni->ni_vap;
4159195171Ssam
4160195171Ssam	memset(pi, 0, sizeof(*pi));
4161195171Ssam	pi->LegacyRateBitMap = get_rate_bitmap(&ni->ni_rates);
4162195171Ssam	pi->CapInfo = ni->ni_capinfo;
4163195171Ssam	if (ni->ni_flags & IEEE80211_NODE_HT) {
4164195171Ssam		/* HT capabilities, etc */
4165195171Ssam		pi->HTCapabilitiesInfo = ni->ni_htcap;
4166195171Ssam		/* XXX pi.HTCapabilitiesInfo */
4167195171Ssam	        pi->MacHTParamInfo = ni->ni_htparam;
4168195171Ssam		pi->HTRateBitMap = get_htrate_bitmap(&ni->ni_htrates);
4169195171Ssam		pi->AddHtInfo.ControlChan = ni->ni_htctlchan;
4170195171Ssam		pi->AddHtInfo.AddChan = ni->ni_ht2ndchan;
4171195171Ssam		pi->AddHtInfo.OpMode = ni->ni_htopmode;
4172195171Ssam		pi->AddHtInfo.stbc = ni->ni_htstbc;
4173195171Ssam
4174195171Ssam		/* constrain according to local configuration */
4175195171Ssam		if ((vap->iv_flags_ht & IEEE80211_FHT_SHORTGI40) == 0)
4176195171Ssam			pi->HTCapabilitiesInfo &= ~IEEE80211_HTCAP_SHORTGI40;
4177195171Ssam		if ((vap->iv_flags_ht & IEEE80211_FHT_SHORTGI20) == 0)
4178195171Ssam			pi->HTCapabilitiesInfo &= ~IEEE80211_HTCAP_SHORTGI20;
4179195171Ssam		if (ni->ni_chw != 40)
4180195171Ssam			pi->HTCapabilitiesInfo &= ~IEEE80211_HTCAP_CHWIDTH40;
4181195171Ssam	}
4182195171Ssam	return pi;
4183195171Ssam}
4184195171Ssam
4185195171Ssam/*
4186193240Ssam * Re-create the local sta db entry for a vap to ensure
4187193240Ssam * up to date WME state is pushed to the firmware.  Because
4188193240Ssam * this resets crypto state this must be followed by a
4189193240Ssam * reload of any keys in the global key table.
4190193240Ssam */
4191193240Ssamstatic int
4192193240Ssammwl_localstadb(struct ieee80211vap *vap)
4193193240Ssam{
4194193240Ssam#define	WME(ie) ((const struct ieee80211_wme_info *) ie)
4195193240Ssam	struct mwl_hal_vap *hvap = MWL_VAP(vap)->mv_hvap;
4196193240Ssam	struct ieee80211_node *bss;
4197195171Ssam	MWL_HAL_PEERINFO pi;
4198193240Ssam	int error;
4199193240Ssam
4200193240Ssam	switch (vap->iv_opmode) {
4201193240Ssam	case IEEE80211_M_STA:
4202193240Ssam		bss = vap->iv_bss;
4203195171Ssam		error = mwl_hal_newstation(hvap, vap->iv_myaddr, 0, 0,
4204195171Ssam		    vap->iv_state == IEEE80211_S_RUN ?
4205195171Ssam			mkpeerinfo(&pi, bss) : NULL,
4206195171Ssam		    (bss->ni_flags & (IEEE80211_NODE_QOS | IEEE80211_NODE_HT)),
4207193240Ssam		    bss->ni_ies.wme_ie != NULL ?
4208193240Ssam			WME(bss->ni_ies.wme_ie)->wme_info : 0);
4209193240Ssam		if (error == 0)
4210193240Ssam			mwl_setglobalkeys(vap);
4211193240Ssam		break;
4212193240Ssam	case IEEE80211_M_HOSTAP:
4213195618Srpaulo	case IEEE80211_M_MBSS:
4214193240Ssam		error = mwl_hal_newstation(hvap, vap->iv_myaddr,
4215193240Ssam		    0, 0, NULL, vap->iv_flags & IEEE80211_F_WME, 0);
4216193240Ssam		if (error == 0)
4217193240Ssam			mwl_setglobalkeys(vap);
4218193240Ssam		break;
4219193240Ssam	default:
4220193240Ssam		error = 0;
4221193240Ssam		break;
4222193240Ssam	}
4223193240Ssam	return error;
4224193240Ssam#undef WME
4225193240Ssam}
4226193240Ssam
4227193240Ssamstatic int
4228193240Ssammwl_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg)
4229193240Ssam{
4230193240Ssam	struct mwl_vap *mvp = MWL_VAP(vap);
4231193240Ssam	struct mwl_hal_vap *hvap = mvp->mv_hvap;
4232193240Ssam	struct ieee80211com *ic = vap->iv_ic;
4233193240Ssam	struct ieee80211_node *ni = NULL;
4234193240Ssam	struct ifnet *ifp = ic->ic_ifp;
4235193240Ssam	struct mwl_softc *sc = ifp->if_softc;
4236193240Ssam	struct mwl_hal *mh = sc->sc_mh;
4237193240Ssam	enum ieee80211_state ostate = vap->iv_state;
4238193240Ssam	int error;
4239193240Ssam
4240193240Ssam	DPRINTF(sc, MWL_DEBUG_STATE, "%s: %s: %s -> %s\n",
4241193240Ssam	    vap->iv_ifp->if_xname, __func__,
4242193240Ssam	    ieee80211_state_name[ostate], ieee80211_state_name[nstate]);
4243193240Ssam
4244193240Ssam	callout_stop(&sc->sc_timer);
4245193240Ssam	/*
4246193240Ssam	 * Clear current radar detection state.
4247193240Ssam	 */
4248193240Ssam	if (ostate == IEEE80211_S_CAC) {
4249193240Ssam		/* stop quiet mode radar detection */
4250193240Ssam		mwl_hal_setradardetection(mh, DR_CHK_CHANNEL_AVAILABLE_STOP);
4251193240Ssam	} else if (sc->sc_radarena) {
4252193240Ssam		/* stop in-service radar detection */
4253193240Ssam		mwl_hal_setradardetection(mh, DR_DFS_DISABLE);
4254193240Ssam		sc->sc_radarena = 0;
4255193240Ssam	}
4256193240Ssam	/*
4257193240Ssam	 * Carry out per-state actions before doing net80211 work.
4258193240Ssam	 */
4259193240Ssam	if (nstate == IEEE80211_S_INIT) {
4260193240Ssam		/* NB: only ap+sta vap's have a fw entity */
4261193240Ssam		if (hvap != NULL)
4262193240Ssam			mwl_hal_stop(hvap);
4263193240Ssam	} else if (nstate == IEEE80211_S_SCAN) {
4264193240Ssam		mwl_hal_start(hvap);
4265193240Ssam		/* NB: this disables beacon frames */
4266193240Ssam		mwl_hal_setinframode(hvap);
4267193240Ssam	} else if (nstate == IEEE80211_S_AUTH) {
4268193240Ssam		/*
4269193240Ssam		 * Must create a sta db entry in case a WEP key needs to
4270193240Ssam		 * be plumbed.  This entry will be overwritten if we
4271193240Ssam		 * associate; otherwise it will be reclaimed on node free.
4272193240Ssam		 */
4273193240Ssam		ni = vap->iv_bss;
4274193240Ssam		MWL_NODE(ni)->mn_hvap = hvap;
4275193240Ssam		(void) mwl_peerstadb(ni, 0, 0, NULL);
4276193240Ssam	} else if (nstate == IEEE80211_S_CSA) {
4277193240Ssam		/* XXX move to below? */
4278195618Srpaulo		if (vap->iv_opmode == IEEE80211_M_HOSTAP ||
4279195618Srpaulo		    vap->iv_opmode == IEEE80211_M_MBSS)
4280193240Ssam			mwl_startcsa(vap);
4281193240Ssam	} else if (nstate == IEEE80211_S_CAC) {
4282193240Ssam		/* XXX move to below? */
4283193240Ssam		/* stop ap xmit and enable quiet mode radar detection */
4284193240Ssam		mwl_hal_setradardetection(mh, DR_CHK_CHANNEL_AVAILABLE_START);
4285193240Ssam	}
4286193240Ssam
4287193240Ssam	/*
4288193240Ssam	 * Invoke the parent method to do net80211 work.
4289193240Ssam	 */
4290193240Ssam	error = mvp->mv_newstate(vap, nstate, arg);
4291193240Ssam
4292193240Ssam	/*
4293193240Ssam	 * Carry out work that must be done after net80211 runs;
4294193240Ssam	 * this work requires up to date state (e.g. iv_bss).
4295193240Ssam	 */
4296193240Ssam	if (error == 0 && nstate == IEEE80211_S_RUN) {
4297193240Ssam		/* NB: collect bss node again, it may have changed */
4298193240Ssam		ni = vap->iv_bss;
4299193240Ssam
4300193240Ssam		DPRINTF(sc, MWL_DEBUG_STATE,
4301193240Ssam		    "%s: %s(RUN): iv_flags 0x%08x bintvl %d bssid %s "
4302193240Ssam		    "capinfo 0x%04x chan %d\n",
4303193240Ssam		    vap->iv_ifp->if_xname, __func__, vap->iv_flags,
4304193240Ssam		    ni->ni_intval, ether_sprintf(ni->ni_bssid), ni->ni_capinfo,
4305193240Ssam		    ieee80211_chan2ieee(ic, ic->ic_curchan));
4306193240Ssam
4307193240Ssam		/*
4308195171Ssam		 * Recreate local sta db entry to update WME/HT state.
4309193240Ssam		 */
4310193240Ssam		mwl_localstadb(vap);
4311193240Ssam		switch (vap->iv_opmode) {
4312193240Ssam		case IEEE80211_M_HOSTAP:
4313195618Srpaulo		case IEEE80211_M_MBSS:
4314193240Ssam			if (ostate == IEEE80211_S_CAC) {
4315193240Ssam				/* enable in-service radar detection */
4316193240Ssam				mwl_hal_setradardetection(mh,
4317193240Ssam				    DR_IN_SERVICE_MONITOR_START);
4318193240Ssam				sc->sc_radarena = 1;
4319193240Ssam			}
4320193240Ssam			/*
4321193240Ssam			 * Allocate and setup the beacon frame
4322193240Ssam			 * (and related state).
4323193240Ssam			 */
4324193240Ssam			error = mwl_reset_vap(vap, IEEE80211_S_RUN);
4325193240Ssam			if (error != 0) {
4326193240Ssam				DPRINTF(sc, MWL_DEBUG_STATE,
4327193240Ssam				    "%s: beacon setup failed, error %d\n",
4328193240Ssam				    __func__, error);
4329193240Ssam				goto bad;
4330193240Ssam			}
4331193240Ssam			/* NB: must be after setting up beacon */
4332193240Ssam			mwl_hal_start(hvap);
4333193240Ssam			break;
4334193240Ssam		case IEEE80211_M_STA:
4335193240Ssam			DPRINTF(sc, MWL_DEBUG_STATE, "%s: %s: aid 0x%x\n",
4336193240Ssam			    vap->iv_ifp->if_xname, __func__, ni->ni_associd);
4337193240Ssam			/*
4338193240Ssam			 * Set state now that we're associated.
4339193240Ssam			 */
4340193240Ssam			mwl_hal_setassocid(hvap, ni->ni_bssid, ni->ni_associd);
4341193240Ssam			mwl_setrates(vap);
4342193240Ssam			mwl_hal_setrtsthreshold(hvap, vap->iv_rtsthreshold);
4343195171Ssam			if ((vap->iv_flags & IEEE80211_F_DWDS) &&
4344195171Ssam			    sc->sc_ndwdsvaps++ == 0)
4345195171Ssam				mwl_hal_setdwds(mh, 1);
4346193240Ssam			break;
4347193240Ssam		case IEEE80211_M_WDS:
4348193240Ssam			DPRINTF(sc, MWL_DEBUG_STATE, "%s: %s: bssid %s\n",
4349193240Ssam			    vap->iv_ifp->if_xname, __func__,
4350193240Ssam			    ether_sprintf(ni->ni_bssid));
4351193240Ssam			mwl_seteapolformat(vap);
4352193240Ssam			break;
4353193240Ssam		default:
4354193240Ssam			break;
4355193240Ssam		}
4356193240Ssam		/*
4357193240Ssam		 * Set CS mode according to operating channel;
4358193240Ssam		 * this mostly an optimization for 5GHz.
4359193240Ssam		 *
4360193240Ssam		 * NB: must follow mwl_hal_start which resets csmode
4361193240Ssam		 */
4362193240Ssam		if (IEEE80211_IS_CHAN_5GHZ(ic->ic_bsschan))
4363193240Ssam			mwl_hal_setcsmode(mh, CSMODE_AGGRESSIVE);
4364193240Ssam		else
4365193240Ssam			mwl_hal_setcsmode(mh, CSMODE_AUTO_ENA);
4366193240Ssam		/*
4367193240Ssam		 * Start timer to prod firmware.
4368193240Ssam		 */
4369193240Ssam		if (sc->sc_ageinterval != 0)
4370193240Ssam			callout_reset(&sc->sc_timer, sc->sc_ageinterval*hz,
4371193240Ssam			    mwl_agestations, sc);
4372193240Ssam	} else if (nstate == IEEE80211_S_SLEEP) {
4373193240Ssam		/* XXX set chip in power save */
4374195171Ssam	} else if ((vap->iv_flags & IEEE80211_F_DWDS) &&
4375195171Ssam	    --sc->sc_ndwdsvaps == 0)
4376195171Ssam		mwl_hal_setdwds(mh, 0);
4377193240Ssambad:
4378193240Ssam	return error;
4379193240Ssam}
4380193240Ssam
4381193240Ssam/*
4382193240Ssam * Manage station id's; these are separate from AID's
4383193240Ssam * as AID's may have values out of the range of possible
4384193240Ssam * station id's acceptable to the firmware.
4385193240Ssam */
4386193240Ssamstatic int
4387193240Ssamallocstaid(struct mwl_softc *sc, int aid)
4388193240Ssam{
4389193240Ssam	int staid;
4390193240Ssam
4391193240Ssam	if (!(0 < aid && aid < MWL_MAXSTAID) || isset(sc->sc_staid, aid)) {
4392193240Ssam		/* NB: don't use 0 */
4393193240Ssam		for (staid = 1; staid < MWL_MAXSTAID; staid++)
4394193240Ssam			if (isclr(sc->sc_staid, staid))
4395193240Ssam				break;
4396193240Ssam	} else
4397193240Ssam		staid = aid;
4398193240Ssam	setbit(sc->sc_staid, staid);
4399193240Ssam	return staid;
4400193240Ssam}
4401193240Ssam
4402193240Ssamstatic void
4403193240Ssamdelstaid(struct mwl_softc *sc, int staid)
4404193240Ssam{
4405193240Ssam	clrbit(sc->sc_staid, staid);
4406193240Ssam}
4407193240Ssam
4408193240Ssam/*
4409193240Ssam * Setup driver-specific state for a newly associated node.
4410193240Ssam * Note that we're called also on a re-associate, the isnew
4411193240Ssam * param tells us if this is the first time or not.
4412193240Ssam */
4413193240Ssamstatic void
4414193240Ssammwl_newassoc(struct ieee80211_node *ni, int isnew)
4415193240Ssam{
4416193240Ssam	struct ieee80211vap *vap = ni->ni_vap;
4417193240Ssam        struct mwl_softc *sc = vap->iv_ic->ic_ifp->if_softc;
4418193240Ssam	struct mwl_node *mn = MWL_NODE(ni);
4419193240Ssam	MWL_HAL_PEERINFO pi;
4420193240Ssam	uint16_t aid;
4421193240Ssam	int error;
4422193240Ssam
4423193240Ssam	aid = IEEE80211_AID(ni->ni_associd);
4424193240Ssam	if (isnew) {
4425193240Ssam		mn->mn_staid = allocstaid(sc, aid);
4426193240Ssam		mn->mn_hvap = MWL_VAP(vap)->mv_hvap;
4427193240Ssam	} else {
4428193240Ssam		mn = MWL_NODE(ni);
4429193240Ssam		/* XXX reset BA stream? */
4430193240Ssam	}
4431193240Ssam	DPRINTF(sc, MWL_DEBUG_NODE, "%s: mac %s isnew %d aid %d staid %d\n",
4432193240Ssam	    __func__, ether_sprintf(ni->ni_macaddr), isnew, aid, mn->mn_staid);
4433195171Ssam	error = mwl_peerstadb(ni, aid, mn->mn_staid, mkpeerinfo(&pi, ni));
4434193240Ssam	if (error != 0) {
4435193240Ssam		DPRINTF(sc, MWL_DEBUG_NODE,
4436193240Ssam		    "%s: error %d creating sta db entry\n",
4437193240Ssam		    __func__, error);
4438193240Ssam		/* XXX how to deal with error? */
4439193240Ssam	}
4440193240Ssam}
4441193240Ssam
4442193240Ssam/*
4443193240Ssam * Periodically poke the firmware to age out station state
4444193240Ssam * (power save queues, pending tx aggregates).
4445193240Ssam */
4446193240Ssamstatic void
4447193240Ssammwl_agestations(void *arg)
4448193240Ssam{
4449193240Ssam	struct mwl_softc *sc = arg;
4450193240Ssam
4451193240Ssam	mwl_hal_setkeepalive(sc->sc_mh);
4452193240Ssam	if (sc->sc_ageinterval != 0)		/* NB: catch dynamic changes */
4453195171Ssam		callout_schedule(&sc->sc_timer, sc->sc_ageinterval*hz);
4454193240Ssam}
4455193240Ssam
4456193240Ssamstatic const struct mwl_hal_channel *
4457193240Ssamfindhalchannel(const MWL_HAL_CHANNELINFO *ci, int ieee)
4458193240Ssam{
4459193240Ssam	int i;
4460193240Ssam
4461193240Ssam	for (i = 0; i < ci->nchannels; i++) {
4462193240Ssam		const struct mwl_hal_channel *hc = &ci->channels[i];
4463193240Ssam		if (hc->ieee == ieee)
4464193240Ssam			return hc;
4465193240Ssam	}
4466193240Ssam	return NULL;
4467193240Ssam}
4468193240Ssam
4469193240Ssamstatic int
4470193240Ssammwl_setregdomain(struct ieee80211com *ic, struct ieee80211_regdomain *rd,
4471193240Ssam	int nchan, struct ieee80211_channel chans[])
4472193240Ssam{
4473193240Ssam	struct mwl_softc *sc = ic->ic_ifp->if_softc;
4474193240Ssam	struct mwl_hal *mh = sc->sc_mh;
4475193240Ssam	const MWL_HAL_CHANNELINFO *ci;
4476193240Ssam	int i;
4477193240Ssam
4478193240Ssam	for (i = 0; i < nchan; i++) {
4479193240Ssam		struct ieee80211_channel *c = &chans[i];
4480193240Ssam		const struct mwl_hal_channel *hc;
4481193240Ssam
4482193240Ssam		if (IEEE80211_IS_CHAN_2GHZ(c)) {
4483193240Ssam			mwl_hal_getchannelinfo(mh, MWL_FREQ_BAND_2DOT4GHZ,
4484193240Ssam			    IEEE80211_IS_CHAN_HT40(c) ?
4485193240Ssam				MWL_CH_40_MHz_WIDTH : MWL_CH_20_MHz_WIDTH, &ci);
4486193240Ssam		} else if (IEEE80211_IS_CHAN_5GHZ(c)) {
4487193240Ssam			mwl_hal_getchannelinfo(mh, MWL_FREQ_BAND_5GHZ,
4488193240Ssam			    IEEE80211_IS_CHAN_HT40(c) ?
4489193240Ssam				MWL_CH_40_MHz_WIDTH : MWL_CH_20_MHz_WIDTH, &ci);
4490193240Ssam		} else {
4491193240Ssam			if_printf(ic->ic_ifp,
4492193240Ssam			    "%s: channel %u freq %u/0x%x not 2.4/5GHz\n",
4493193240Ssam			    __func__, c->ic_ieee, c->ic_freq, c->ic_flags);
4494193240Ssam			return EINVAL;
4495193240Ssam		}
4496193240Ssam		/*
4497193240Ssam		 * Verify channel has cal data and cap tx power.
4498193240Ssam		 */
4499193240Ssam		hc = findhalchannel(ci, c->ic_ieee);
4500193240Ssam		if (hc != NULL) {
4501193240Ssam			if (c->ic_maxpower > 2*hc->maxTxPow)
4502193240Ssam				c->ic_maxpower = 2*hc->maxTxPow;
4503193240Ssam			goto next;
4504193240Ssam		}
4505193240Ssam		if (IEEE80211_IS_CHAN_HT40(c)) {
4506193240Ssam			/*
4507193240Ssam			 * Look for the extension channel since the
4508193240Ssam			 * hal table only has the primary channel.
4509193240Ssam			 */
4510193240Ssam			hc = findhalchannel(ci, c->ic_extieee);
4511193240Ssam			if (hc != NULL) {
4512193240Ssam				if (c->ic_maxpower > 2*hc->maxTxPow)
4513193240Ssam					c->ic_maxpower = 2*hc->maxTxPow;
4514193240Ssam				goto next;
4515193240Ssam			}
4516193240Ssam		}
4517193240Ssam		if_printf(ic->ic_ifp,
4518193240Ssam		    "%s: no cal data for channel %u ext %u freq %u/0x%x\n",
4519193240Ssam		    __func__, c->ic_ieee, c->ic_extieee,
4520193240Ssam		    c->ic_freq, c->ic_flags);
4521193240Ssam		return EINVAL;
4522193240Ssam	next:
4523193240Ssam		;
4524193240Ssam	}
4525193240Ssam	return 0;
4526193240Ssam}
4527193240Ssam
4528193240Ssam#define	IEEE80211_CHAN_HTG	(IEEE80211_CHAN_HT|IEEE80211_CHAN_G)
4529193240Ssam#define	IEEE80211_CHAN_HTA	(IEEE80211_CHAN_HT|IEEE80211_CHAN_A)
4530193240Ssam
4531193240Ssamstatic void
4532193240Ssamaddchan(struct ieee80211_channel *c, int freq, int flags, int ieee, int txpow)
4533193240Ssam{
4534193240Ssam	c->ic_freq = freq;
4535193240Ssam	c->ic_flags = flags;
4536193240Ssam	c->ic_ieee = ieee;
4537193240Ssam	c->ic_minpower = 0;
4538193240Ssam	c->ic_maxpower = 2*txpow;
4539193240Ssam	c->ic_maxregpower = txpow;
4540193240Ssam}
4541193240Ssam
4542193240Ssamstatic const struct ieee80211_channel *
4543193240Ssamfindchannel(const struct ieee80211_channel chans[], int nchans,
4544193240Ssam	int freq, int flags)
4545193240Ssam{
4546193240Ssam	const struct ieee80211_channel *c;
4547193240Ssam	int i;
4548193240Ssam
4549193240Ssam	for (i = 0; i < nchans; i++) {
4550193240Ssam		c = &chans[i];
4551193240Ssam		if (c->ic_freq == freq && c->ic_flags == flags)
4552193240Ssam			return c;
4553193240Ssam	}
4554193240Ssam	return NULL;
4555193240Ssam}
4556193240Ssam
4557193240Ssamstatic void
4558193240Ssamaddht40channels(struct ieee80211_channel chans[], int maxchans, int *nchans,
4559193240Ssam	const MWL_HAL_CHANNELINFO *ci, int flags)
4560193240Ssam{
4561193240Ssam	struct ieee80211_channel *c;
4562193240Ssam	const struct ieee80211_channel *extc;
4563193240Ssam	const struct mwl_hal_channel *hc;
4564193240Ssam	int i;
4565193240Ssam
4566193240Ssam	c = &chans[*nchans];
4567193240Ssam
4568193240Ssam	flags &= ~IEEE80211_CHAN_HT;
4569193240Ssam	for (i = 0; i < ci->nchannels; i++) {
4570193240Ssam		/*
4571193240Ssam		 * Each entry defines an HT40 channel pair; find the
4572193240Ssam		 * extension channel above and the insert the pair.
4573193240Ssam		 */
4574193240Ssam		hc = &ci->channels[i];
4575193240Ssam		extc = findchannel(chans, *nchans, hc->freq+20,
4576193240Ssam		    flags | IEEE80211_CHAN_HT20);
4577193240Ssam		if (extc != NULL) {
4578193240Ssam			if (*nchans >= maxchans)
4579193240Ssam				break;
4580193240Ssam			addchan(c, hc->freq, flags | IEEE80211_CHAN_HT40U,
4581193240Ssam			    hc->ieee, hc->maxTxPow);
4582193240Ssam			c->ic_extieee = extc->ic_ieee;
4583193240Ssam			c++, (*nchans)++;
4584193240Ssam			if (*nchans >= maxchans)
4585193240Ssam				break;
4586193240Ssam			addchan(c, extc->ic_freq, flags | IEEE80211_CHAN_HT40D,
4587193240Ssam			    extc->ic_ieee, hc->maxTxPow);
4588193240Ssam			c->ic_extieee = hc->ieee;
4589193240Ssam			c++, (*nchans)++;
4590193240Ssam		}
4591193240Ssam	}
4592193240Ssam}
4593193240Ssam
4594193240Ssamstatic void
4595193240Ssamaddchannels(struct ieee80211_channel chans[], int maxchans, int *nchans,
4596193240Ssam	const MWL_HAL_CHANNELINFO *ci, int flags)
4597193240Ssam{
4598193240Ssam	struct ieee80211_channel *c;
4599193240Ssam	int i;
4600193240Ssam
4601193240Ssam	c = &chans[*nchans];
4602193240Ssam
4603193240Ssam	for (i = 0; i < ci->nchannels; i++) {
4604193240Ssam		const struct mwl_hal_channel *hc;
4605193240Ssam
4606193240Ssam		hc = &ci->channels[i];
4607193240Ssam		if (*nchans >= maxchans)
4608193240Ssam			break;
4609193240Ssam		addchan(c, hc->freq, flags, hc->ieee, hc->maxTxPow);
4610193240Ssam		c++, (*nchans)++;
4611193240Ssam		if (flags == IEEE80211_CHAN_G || flags == IEEE80211_CHAN_HTG) {
4612193240Ssam			/* g channel have a separate b-only entry */
4613193240Ssam			if (*nchans >= maxchans)
4614193240Ssam				break;
4615193240Ssam			c[0] = c[-1];
4616193240Ssam			c[-1].ic_flags = IEEE80211_CHAN_B;
4617193240Ssam			c++, (*nchans)++;
4618193240Ssam		}
4619193240Ssam		if (flags == IEEE80211_CHAN_HTG) {
4620193240Ssam			/* HT g channel have a separate g-only entry */
4621193240Ssam			if (*nchans >= maxchans)
4622193240Ssam				break;
4623193240Ssam			c[-1].ic_flags = IEEE80211_CHAN_G;
4624193240Ssam			c[0] = c[-1];
4625193240Ssam			c[0].ic_flags &= ~IEEE80211_CHAN_HT;
4626193240Ssam			c[0].ic_flags |= IEEE80211_CHAN_HT20;	/* HT20 */
4627193240Ssam			c++, (*nchans)++;
4628193240Ssam		}
4629193240Ssam		if (flags == IEEE80211_CHAN_HTA) {
4630193240Ssam			/* HT a channel have a separate a-only entry */
4631193240Ssam			if (*nchans >= maxchans)
4632193240Ssam				break;
4633193240Ssam			c[-1].ic_flags = IEEE80211_CHAN_A;
4634193240Ssam			c[0] = c[-1];
4635193240Ssam			c[0].ic_flags &= ~IEEE80211_CHAN_HT;
4636193240Ssam			c[0].ic_flags |= IEEE80211_CHAN_HT20;	/* HT20 */
4637193240Ssam			c++, (*nchans)++;
4638193240Ssam		}
4639193240Ssam	}
4640193240Ssam}
4641193240Ssam
4642193240Ssamstatic void
4643193240Ssamgetchannels(struct mwl_softc *sc, int maxchans, int *nchans,
4644193240Ssam	struct ieee80211_channel chans[])
4645193240Ssam{
4646193240Ssam	const MWL_HAL_CHANNELINFO *ci;
4647193240Ssam
4648193240Ssam	/*
4649193240Ssam	 * Use the channel info from the hal to craft the
4650193240Ssam	 * channel list.  Note that we pass back an unsorted
4651193240Ssam	 * list; the caller is required to sort it for us
4652193240Ssam	 * (if desired).
4653193240Ssam	 */
4654193240Ssam	*nchans = 0;
4655193240Ssam	if (mwl_hal_getchannelinfo(sc->sc_mh,
4656193240Ssam	    MWL_FREQ_BAND_2DOT4GHZ, MWL_CH_20_MHz_WIDTH, &ci) == 0)
4657193240Ssam		addchannels(chans, maxchans, nchans, ci, IEEE80211_CHAN_HTG);
4658193240Ssam	if (mwl_hal_getchannelinfo(sc->sc_mh,
4659193240Ssam	    MWL_FREQ_BAND_5GHZ, MWL_CH_20_MHz_WIDTH, &ci) == 0)
4660193240Ssam		addchannels(chans, maxchans, nchans, ci, IEEE80211_CHAN_HTA);
4661193240Ssam	if (mwl_hal_getchannelinfo(sc->sc_mh,
4662193240Ssam	    MWL_FREQ_BAND_2DOT4GHZ, MWL_CH_40_MHz_WIDTH, &ci) == 0)
4663193240Ssam		addht40channels(chans, maxchans, nchans, ci, IEEE80211_CHAN_HTG);
4664193240Ssam	if (mwl_hal_getchannelinfo(sc->sc_mh,
4665193240Ssam	    MWL_FREQ_BAND_5GHZ, MWL_CH_40_MHz_WIDTH, &ci) == 0)
4666193240Ssam		addht40channels(chans, maxchans, nchans, ci, IEEE80211_CHAN_HTA);
4667193240Ssam}
4668193240Ssam
4669193240Ssamstatic void
4670193240Ssammwl_getradiocaps(struct ieee80211com *ic,
4671193240Ssam	int maxchans, int *nchans, struct ieee80211_channel chans[])
4672193240Ssam{
4673193240Ssam	struct mwl_softc *sc = ic->ic_ifp->if_softc;
4674193240Ssam
4675193240Ssam	getchannels(sc, maxchans, nchans, chans);
4676193240Ssam}
4677193240Ssam
4678193240Ssamstatic int
4679193240Ssammwl_getchannels(struct mwl_softc *sc)
4680193240Ssam{
4681193240Ssam	struct ifnet *ifp = sc->sc_ifp;
4682193240Ssam	struct ieee80211com *ic = ifp->if_l2com;
4683193240Ssam
4684193240Ssam	/*
4685193240Ssam	 * Use the channel info from the hal to craft the
4686193240Ssam	 * channel list for net80211.  Note that we pass up
4687193240Ssam	 * an unsorted list; net80211 will sort it for us.
4688193240Ssam	 */
4689193240Ssam	memset(ic->ic_channels, 0, sizeof(ic->ic_channels));
4690193240Ssam	ic->ic_nchans = 0;
4691193240Ssam	getchannels(sc, IEEE80211_CHAN_MAX, &ic->ic_nchans, ic->ic_channels);
4692193240Ssam
4693193240Ssam	ic->ic_regdomain.regdomain = SKU_DEBUG;
4694193240Ssam	ic->ic_regdomain.country = CTRY_DEFAULT;
4695193240Ssam	ic->ic_regdomain.location = 'I';
4696193240Ssam	ic->ic_regdomain.isocc[0] = ' ';	/* XXX? */
4697193240Ssam	ic->ic_regdomain.isocc[1] = ' ';
4698193240Ssam	return (ic->ic_nchans == 0 ? EIO : 0);
4699193240Ssam}
4700193240Ssam#undef IEEE80211_CHAN_HTA
4701193240Ssam#undef IEEE80211_CHAN_HTG
4702193240Ssam
4703193240Ssam#ifdef MWL_DEBUG
4704193240Ssamstatic void
4705193240Ssammwl_printrxbuf(const struct mwl_rxbuf *bf, u_int ix)
4706193240Ssam{
4707193240Ssam	const struct mwl_rxdesc *ds = bf->bf_desc;
4708193240Ssam	uint32_t status = le32toh(ds->Status);
4709193240Ssam
4710193240Ssam	printf("R[%2u] (DS.V:%p DS.P:%p) NEXT:%08x DATA:%08x RC:%02x%s\n"
4711193240Ssam	       "      STAT:%02x LEN:%04x RSSI:%02x CHAN:%02x RATE:%02x QOS:%04x HT:%04x\n",
4712193240Ssam	    ix, ds, (const struct mwl_desc *)bf->bf_daddr,
4713193240Ssam	    le32toh(ds->pPhysNext), le32toh(ds->pPhysBuffData),
4714193240Ssam	    ds->RxControl,
4715193240Ssam	    ds->RxControl != EAGLE_RXD_CTRL_DRIVER_OWN ?
4716193240Ssam	        "" : (status & EAGLE_RXD_STATUS_OK) ? " *" : " !",
4717193240Ssam	    ds->Status, le16toh(ds->PktLen), ds->RSSI, ds->Channel,
4718193240Ssam	    ds->Rate, le16toh(ds->QosCtrl), le16toh(ds->HtSig2));
4719193240Ssam}
4720193240Ssam
4721193240Ssamstatic void
4722193240Ssammwl_printtxbuf(const struct mwl_txbuf *bf, u_int qnum, u_int ix)
4723193240Ssam{
4724193240Ssam	const struct mwl_txdesc *ds = bf->bf_desc;
4725193240Ssam	uint32_t status = le32toh(ds->Status);
4726193240Ssam
4727193240Ssam	printf("Q%u[%3u]", qnum, ix);
4728193240Ssam	printf(" (DS.V:%p DS.P:%p)\n",
4729193240Ssam	    ds, (const struct mwl_txdesc *)bf->bf_daddr);
4730193240Ssam	printf("    NEXT:%08x DATA:%08x LEN:%04x STAT:%08x%s\n",
4731193240Ssam	    le32toh(ds->pPhysNext),
4732193240Ssam	    le32toh(ds->PktPtr), le16toh(ds->PktLen), status,
4733193240Ssam	    status & EAGLE_TXD_STATUS_USED ?
4734193240Ssam		"" : (status & 3) != 0 ? " *" : " !");
4735193240Ssam	printf("    RATE:%02x PRI:%x QOS:%04x SAP:%08x FORMAT:%04x\n",
4736193240Ssam	    ds->DataRate, ds->TxPriority, le16toh(ds->QosCtrl),
4737193240Ssam	    le32toh(ds->SapPktInfo), le16toh(ds->Format));
4738193240Ssam#if MWL_TXDESC > 1
4739193240Ssam	printf("    MULTIFRAMES:%u LEN:%04x %04x %04x %04x %04x %04x\n"
4740193240Ssam	    , le32toh(ds->multiframes)
4741193240Ssam	    , le16toh(ds->PktLenArray[0]), le16toh(ds->PktLenArray[1])
4742193240Ssam	    , le16toh(ds->PktLenArray[2]), le16toh(ds->PktLenArray[3])
4743193240Ssam	    , le16toh(ds->PktLenArray[4]), le16toh(ds->PktLenArray[5])
4744193240Ssam	);
4745193240Ssam	printf("    DATA:%08x %08x %08x %08x %08x %08x\n"
4746193240Ssam	    , le32toh(ds->PktPtrArray[0]), le32toh(ds->PktPtrArray[1])
4747193240Ssam	    , le32toh(ds->PktPtrArray[2]), le32toh(ds->PktPtrArray[3])
4748193240Ssam	    , le32toh(ds->PktPtrArray[4]), le32toh(ds->PktPtrArray[5])
4749193240Ssam	);
4750193240Ssam#endif
4751193240Ssam#if 0
4752193240Ssam{ const uint8_t *cp = (const uint8_t *) ds;
4753193240Ssam  int i;
4754193240Ssam  for (i = 0; i < sizeof(struct mwl_txdesc); i++) {
4755193240Ssam	printf("%02x ", cp[i]);
4756193240Ssam	if (((i+1) % 16) == 0)
4757193240Ssam		printf("\n");
4758193240Ssam  }
4759193240Ssam  printf("\n");
4760193240Ssam}
4761193240Ssam#endif
4762193240Ssam}
4763193240Ssam#endif /* MWL_DEBUG */
4764193240Ssam
4765193240Ssam#if 0
4766193240Ssamstatic void
4767193240Ssammwl_txq_dump(struct mwl_txq *txq)
4768193240Ssam{
4769193240Ssam	struct mwl_txbuf *bf;
4770193240Ssam	int i = 0;
4771193240Ssam
4772193240Ssam	MWL_TXQ_LOCK(txq);
4773193240Ssam	STAILQ_FOREACH(bf, &txq->active, bf_list) {
4774193240Ssam		struct mwl_txdesc *ds = bf->bf_desc;
4775193240Ssam		MWL_TXDESC_SYNC(txq, ds,
4776193240Ssam		    BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
4777193240Ssam#ifdef MWL_DEBUG
4778193240Ssam		mwl_printtxbuf(bf, txq->qnum, i);
4779193240Ssam#endif
4780193240Ssam		i++;
4781193240Ssam	}
4782193240Ssam	MWL_TXQ_UNLOCK(txq);
4783193240Ssam}
4784193240Ssam#endif
4785193240Ssam
4786193240Ssamstatic void
4787199559Sjhbmwl_watchdog(void *arg)
4788193240Ssam{
4789199559Sjhb	struct mwl_softc *sc;
4790199559Sjhb	struct ifnet *ifp;
4791193240Ssam
4792199559Sjhb	sc = arg;
4793199559Sjhb	callout_reset(&sc->sc_watchdog, hz, mwl_watchdog, sc);
4794199559Sjhb	if (sc->sc_tx_timer == 0 || --sc->sc_tx_timer > 0)
4795199559Sjhb		return;
4796199559Sjhb
4797199559Sjhb	ifp = sc->sc_ifp;
4798193240Ssam	if ((ifp->if_drv_flags & IFF_DRV_RUNNING) && !sc->sc_invalid) {
4799193240Ssam		if (mwl_hal_setkeepalive(sc->sc_mh))
4800193240Ssam			if_printf(ifp, "transmit timeout (firmware hung?)\n");
4801193240Ssam		else
4802193240Ssam			if_printf(ifp, "transmit timeout\n");
4803193240Ssam#if 0
4804193240Ssam		mwl_reset(ifp);
4805193240Ssammwl_txq_dump(&sc->sc_txq[0]);/*XXX*/
4806193240Ssam#endif
4807193240Ssam		ifp->if_oerrors++;
4808193240Ssam		sc->sc_stats.mst_watchdog++;
4809193240Ssam	}
4810193240Ssam}
4811193240Ssam
4812193240Ssam#ifdef MWL_DIAGAPI
4813193240Ssam/*
4814193240Ssam * Diagnostic interface to the HAL.  This is used by various
4815193240Ssam * tools to do things like retrieve register contents for
4816193240Ssam * debugging.  The mechanism is intentionally opaque so that
4817193240Ssam * it can change frequently w/o concern for compatiblity.
4818193240Ssam */
4819193240Ssamstatic int
4820193240Ssammwl_ioctl_diag(struct mwl_softc *sc, struct mwl_diag *md)
4821193240Ssam{
4822193240Ssam	struct mwl_hal *mh = sc->sc_mh;
4823193240Ssam	u_int id = md->md_id & MWL_DIAG_ID;
4824193240Ssam	void *indata = NULL;
4825193240Ssam	void *outdata = NULL;
4826193240Ssam	u_int32_t insize = md->md_in_size;
4827193240Ssam	u_int32_t outsize = md->md_out_size;
4828193240Ssam	int error = 0;
4829193240Ssam
4830193240Ssam	if (md->md_id & MWL_DIAG_IN) {
4831193240Ssam		/*
4832193240Ssam		 * Copy in data.
4833193240Ssam		 */
4834193240Ssam		indata = malloc(insize, M_TEMP, M_NOWAIT);
4835193240Ssam		if (indata == NULL) {
4836193240Ssam			error = ENOMEM;
4837193240Ssam			goto bad;
4838193240Ssam		}
4839193240Ssam		error = copyin(md->md_in_data, indata, insize);
4840193240Ssam		if (error)
4841193240Ssam			goto bad;
4842193240Ssam	}
4843193240Ssam	if (md->md_id & MWL_DIAG_DYN) {
4844193240Ssam		/*
4845193240Ssam		 * Allocate a buffer for the results (otherwise the HAL
4846193240Ssam		 * returns a pointer to a buffer where we can read the
4847193240Ssam		 * results).  Note that we depend on the HAL leaving this
4848193240Ssam		 * pointer for us to use below in reclaiming the buffer;
4849193240Ssam		 * may want to be more defensive.
4850193240Ssam		 */
4851193240Ssam		outdata = malloc(outsize, M_TEMP, M_NOWAIT);
4852193240Ssam		if (outdata == NULL) {
4853193240Ssam			error = ENOMEM;
4854193240Ssam			goto bad;
4855193240Ssam		}
4856193240Ssam	}
4857193240Ssam	if (mwl_hal_getdiagstate(mh, id, indata, insize, &outdata, &outsize)) {
4858193240Ssam		if (outsize < md->md_out_size)
4859193240Ssam			md->md_out_size = outsize;
4860193240Ssam		if (outdata != NULL)
4861193240Ssam			error = copyout(outdata, md->md_out_data,
4862193240Ssam					md->md_out_size);
4863193240Ssam	} else {
4864193240Ssam		error = EINVAL;
4865193240Ssam	}
4866193240Ssambad:
4867193240Ssam	if ((md->md_id & MWL_DIAG_IN) && indata != NULL)
4868193240Ssam		free(indata, M_TEMP);
4869193240Ssam	if ((md->md_id & MWL_DIAG_DYN) && outdata != NULL)
4870193240Ssam		free(outdata, M_TEMP);
4871193240Ssam	return error;
4872193240Ssam}
4873193240Ssam
4874193240Ssamstatic int
4875193240Ssammwl_ioctl_reset(struct mwl_softc *sc, struct mwl_diag *md)
4876193240Ssam{
4877193240Ssam	struct mwl_hal *mh = sc->sc_mh;
4878193240Ssam	int error;
4879193240Ssam
4880193240Ssam	MWL_LOCK_ASSERT(sc);
4881193240Ssam
4882193240Ssam	if (md->md_id == 0 && mwl_hal_fwload(mh, NULL) != 0) {
4883193240Ssam		device_printf(sc->sc_dev, "unable to load firmware\n");
4884193240Ssam		return EIO;
4885193240Ssam	}
4886193240Ssam	if (mwl_hal_gethwspecs(mh, &sc->sc_hwspecs) != 0) {
4887193240Ssam		device_printf(sc->sc_dev, "unable to fetch h/w specs\n");
4888193240Ssam		return EIO;
4889193240Ssam	}
4890193240Ssam	error = mwl_setupdma(sc);
4891193240Ssam	if (error != 0) {
4892193240Ssam		/* NB: mwl_setupdma prints a msg */
4893193240Ssam		return error;
4894193240Ssam	}
4895193240Ssam	/*
4896193240Ssam	 * Reset tx/rx data structures; after reload we must
4897193240Ssam	 * re-start the driver's notion of the next xmit/recv.
4898193240Ssam	 */
4899193240Ssam	mwl_draintxq(sc);		/* clear pending frames */
4900193240Ssam	mwl_resettxq(sc);		/* rebuild tx q lists */
4901193240Ssam	sc->sc_rxnext = NULL;		/* force rx to start at the list head */
4902193240Ssam	return 0;
4903193240Ssam}
4904193240Ssam#endif /* MWL_DIAGAPI */
4905193240Ssam
4906193240Ssamstatic int
4907193240Ssammwl_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
4908193240Ssam{
4909193240Ssam#define	IS_RUNNING(ifp) \
4910193240Ssam	((ifp->if_flags & IFF_UP) && (ifp->if_drv_flags & IFF_DRV_RUNNING))
4911193240Ssam	struct mwl_softc *sc = ifp->if_softc;
4912193240Ssam	struct ieee80211com *ic = ifp->if_l2com;
4913193240Ssam	struct ifreq *ifr = (struct ifreq *)data;
4914193240Ssam	int error = 0, startall;
4915193240Ssam
4916193240Ssam	switch (cmd) {
4917193240Ssam	case SIOCSIFFLAGS:
4918193240Ssam		MWL_LOCK(sc);
4919193240Ssam		startall = 0;
4920193240Ssam		if (IS_RUNNING(ifp)) {
4921193240Ssam			/*
4922193240Ssam			 * To avoid rescanning another access point,
4923193240Ssam			 * do not call mwl_init() here.  Instead,
4924193240Ssam			 * only reflect promisc mode settings.
4925193240Ssam			 */
4926193240Ssam			mwl_mode_init(sc);
4927193240Ssam		} else if (ifp->if_flags & IFF_UP) {
4928193240Ssam			/*
4929193240Ssam			 * Beware of being called during attach/detach
4930193240Ssam			 * to reset promiscuous mode.  In that case we
4931193240Ssam			 * will still be marked UP but not RUNNING.
4932193240Ssam			 * However trying to re-init the interface
4933193240Ssam			 * is the wrong thing to do as we've already
4934193240Ssam			 * torn down much of our state.  There's
4935193240Ssam			 * probably a better way to deal with this.
4936193240Ssam			 */
4937193240Ssam			if (!sc->sc_invalid) {
4938193240Ssam				mwl_init_locked(sc);	/* XXX lose error */
4939193240Ssam				startall = 1;
4940193240Ssam			}
4941193240Ssam		} else
4942193240Ssam			mwl_stop_locked(ifp, 1);
4943193240Ssam		MWL_UNLOCK(sc);
4944193240Ssam		if (startall)
4945193240Ssam			ieee80211_start_all(ic);
4946193240Ssam		break;
4947193240Ssam	case SIOCGMVSTATS:
4948193240Ssam		mwl_hal_gethwstats(sc->sc_mh, &sc->sc_stats.hw_stats);
4949193240Ssam		/* NB: embed these numbers to get a consistent view */
4950193240Ssam		sc->sc_stats.mst_tx_packets = ifp->if_opackets;
4951193240Ssam		sc->sc_stats.mst_rx_packets = ifp->if_ipackets;
4952193240Ssam		/*
4953193240Ssam		 * NB: Drop the softc lock in case of a page fault;
4954193240Ssam		 * we'll accept any potential inconsisentcy in the
4955193240Ssam		 * statistics.  The alternative is to copy the data
4956193240Ssam		 * to a local structure.
4957193240Ssam		 */
4958193240Ssam		return copyout(&sc->sc_stats,
4959193240Ssam				ifr->ifr_data, sizeof (sc->sc_stats));
4960193240Ssam#ifdef MWL_DIAGAPI
4961193240Ssam	case SIOCGMVDIAG:
4962193240Ssam		/* XXX check privs */
4963193240Ssam		return mwl_ioctl_diag(sc, (struct mwl_diag *) ifr);
4964193240Ssam	case SIOCGMVRESET:
4965193240Ssam		/* XXX check privs */
4966193240Ssam		MWL_LOCK(sc);
4967193240Ssam		error = mwl_ioctl_reset(sc,(struct mwl_diag *) ifr);
4968193240Ssam		MWL_UNLOCK(sc);
4969193240Ssam		break;
4970193240Ssam#endif /* MWL_DIAGAPI */
4971193240Ssam	case SIOCGIFMEDIA:
4972193240Ssam		error = ifmedia_ioctl(ifp, ifr, &ic->ic_media, cmd);
4973193240Ssam		break;
4974193240Ssam	case SIOCGIFADDR:
4975193240Ssam		error = ether_ioctl(ifp, cmd, data);
4976193240Ssam		break;
4977193240Ssam	default:
4978193240Ssam		error = EINVAL;
4979193240Ssam		break;
4980193240Ssam	}
4981193240Ssam	return error;
4982193240Ssam#undef IS_RUNNING
4983193240Ssam}
4984193240Ssam
4985193240Ssam#ifdef	MWL_DEBUG
4986193240Ssamstatic int
4987193240Ssammwl_sysctl_debug(SYSCTL_HANDLER_ARGS)
4988193240Ssam{
4989193240Ssam	struct mwl_softc *sc = arg1;
4990193240Ssam	int debug, error;
4991193240Ssam
4992193240Ssam	debug = sc->sc_debug | (mwl_hal_getdebug(sc->sc_mh) << 24);
4993193240Ssam	error = sysctl_handle_int(oidp, &debug, 0, req);
4994193240Ssam	if (error || !req->newptr)
4995193240Ssam		return error;
4996193240Ssam	mwl_hal_setdebug(sc->sc_mh, debug >> 24);
4997193240Ssam	sc->sc_debug = debug & 0x00ffffff;
4998193240Ssam	return 0;
4999193240Ssam}
5000193240Ssam#endif /* MWL_DEBUG */
5001193240Ssam
5002193240Ssamstatic void
5003193240Ssammwl_sysctlattach(struct mwl_softc *sc)
5004193240Ssam{
5005193240Ssam#ifdef	MWL_DEBUG
5006193240Ssam	struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->sc_dev);
5007193240Ssam	struct sysctl_oid *tree = device_get_sysctl_tree(sc->sc_dev);
5008193240Ssam
5009193240Ssam	sc->sc_debug = mwl_debug;
5010193240Ssam	SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
5011193240Ssam		"debug", CTLTYPE_INT | CTLFLAG_RW, sc, 0,
5012193240Ssam		mwl_sysctl_debug, "I", "control debugging printfs");
5013193240Ssam#endif
5014193240Ssam}
5015193240Ssam
5016193240Ssam/*
5017193240Ssam * Announce various information on device/driver attach.
5018193240Ssam */
5019193240Ssamstatic void
5020193240Ssammwl_announce(struct mwl_softc *sc)
5021193240Ssam{
5022193240Ssam	struct ifnet *ifp = sc->sc_ifp;
5023193240Ssam
5024193240Ssam	if_printf(ifp, "Rev A%d hardware, v%d.%d.%d.%d firmware (regioncode %d)\n",
5025193240Ssam		sc->sc_hwspecs.hwVersion,
5026193240Ssam		(sc->sc_hwspecs.fwReleaseNumber>>24) & 0xff,
5027193240Ssam		(sc->sc_hwspecs.fwReleaseNumber>>16) & 0xff,
5028193240Ssam		(sc->sc_hwspecs.fwReleaseNumber>>8) & 0xff,
5029193240Ssam		(sc->sc_hwspecs.fwReleaseNumber>>0) & 0xff,
5030193240Ssam		sc->sc_hwspecs.regionCode);
5031193240Ssam	sc->sc_fwrelease = sc->sc_hwspecs.fwReleaseNumber;
5032193240Ssam
5033193240Ssam	if (bootverbose) {
5034193240Ssam		int i;
5035193240Ssam		for (i = 0; i <= WME_AC_VO; i++) {
5036193240Ssam			struct mwl_txq *txq = sc->sc_ac2q[i];
5037193240Ssam			if_printf(ifp, "Use hw queue %u for %s traffic\n",
5038193240Ssam				txq->qnum, ieee80211_wme_acnames[i]);
5039193240Ssam		}
5040193240Ssam	}
5041193240Ssam	if (bootverbose || mwl_rxdesc != MWL_RXDESC)
5042193240Ssam		if_printf(ifp, "using %u rx descriptors\n", mwl_rxdesc);
5043193240Ssam	if (bootverbose || mwl_rxbuf != MWL_RXBUF)
5044193240Ssam		if_printf(ifp, "using %u rx buffers\n", mwl_rxbuf);
5045193240Ssam	if (bootverbose || mwl_txbuf != MWL_TXBUF)
5046193240Ssam		if_printf(ifp, "using %u tx buffers\n", mwl_txbuf);
5047193240Ssam	if (bootverbose && mwl_hal_ismbsscapable(sc->sc_mh))
5048193240Ssam		if_printf(ifp, "multi-bss support\n");
5049193240Ssam#ifdef MWL_TX_NODROP
5050193240Ssam	if (bootverbose)
5051193240Ssam		if_printf(ifp, "no tx drop\n");
5052193240Ssam#endif
5053193240Ssam}
5054