1230557Sjimharris/*- 2230557Sjimharris * This file is provided under a dual BSD/GPLv2 license. When using or 3230557Sjimharris * redistributing this file, you may do so under either license. 4230557Sjimharris * 5230557Sjimharris * GPL LICENSE SUMMARY 6230557Sjimharris * 7230557Sjimharris * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved. 8230557Sjimharris * 9230557Sjimharris * This program is free software; you can redistribute it and/or modify 10230557Sjimharris * it under the terms of version 2 of the GNU General Public License as 11230557Sjimharris * published by the Free Software Foundation. 12230557Sjimharris * 13230557Sjimharris * This program is distributed in the hope that it will be useful, but 14230557Sjimharris * WITHOUT ANY WARRANTY; without even the implied warranty of 15230557Sjimharris * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 16230557Sjimharris * General Public License for more details. 17230557Sjimharris * 18230557Sjimharris * You should have received a copy of the GNU General Public License 19230557Sjimharris * along with this program; if not, write to the Free Software 20230557Sjimharris * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. 21230557Sjimharris * The full GNU General Public License is included in this distribution 22230557Sjimharris * in the file called LICENSE.GPL. 23230557Sjimharris * 24230557Sjimharris * BSD LICENSE 25230557Sjimharris * 26230557Sjimharris * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved. 27230557Sjimharris * All rights reserved. 28230557Sjimharris * 29230557Sjimharris * Redistribution and use in source and binary forms, with or without 30230557Sjimharris * modification, are permitted provided that the following conditions 31230557Sjimharris * are met: 32230557Sjimharris * 33230557Sjimharris * * Redistributions of source code must retain the above copyright 34230557Sjimharris * notice, this list of conditions and the following disclaimer. 35230557Sjimharris * * Redistributions in binary form must reproduce the above copyright 36230557Sjimharris * notice, this list of conditions and the following disclaimer in 37230557Sjimharris * the documentation and/or other materials provided with the 38230557Sjimharris * distribution. 39230557Sjimharris * 40230557Sjimharris * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 41230557Sjimharris * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 42230557Sjimharris * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 43230557Sjimharris * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 44230557Sjimharris * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 45230557Sjimharris * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 46230557Sjimharris * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 47230557Sjimharris * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 48230557Sjimharris * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 49230557Sjimharris * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 50230557Sjimharris * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 51230557Sjimharris * 52230557Sjimharris * $FreeBSD$ 53230557Sjimharris */ 54230557Sjimharris#ifndef _SCIC_SDS_PORT_H_ 55230557Sjimharris#define _SCIC_SDS_PORT_H_ 56230557Sjimharris 57230557Sjimharris#ifdef __cplusplus 58230557Sjimharrisextern "C" { 59230557Sjimharris#endif // __cplusplus 60230557Sjimharris 61230557Sjimharris/** 62230557Sjimharris * @file 63230557Sjimharris * 64230557Sjimharris * @brief This file contains the structures, constants and prototypes for the 65230557Sjimharris * SCIC_SDS_PORT_T object. 66230557Sjimharris */ 67230557Sjimharris 68230557Sjimharris#include <dev/isci/scil/sci_controller_constants.h> 69230557Sjimharris#include <dev/isci/scil/intel_sas.h> 70230557Sjimharris#include <dev/isci/scil/sci_base_port.h> 71230557Sjimharris#include <dev/isci/scil/sci_base_phy.h> 72230557Sjimharris#include <dev/isci/scil/scu_registers.h> 73230557Sjimharris 74230557Sjimharris#define SCIC_SDS_DUMMY_PORT 0xFF 75230557Sjimharris 76230557Sjimharris/** 77230557Sjimharris * @enum SCIC_SDS_PORT_READY_SUBSTATES 78230557Sjimharris * 79230557Sjimharris * This enumeration depicts all of the states for the core port ready substate 80230557Sjimharris * machine. 81230557Sjimharris */ 82230557Sjimharrisenum SCIC_SDS_PORT_READY_SUBSTATES 83230557Sjimharris{ 84230557Sjimharris /** 85230557Sjimharris * The substate where the port is started and ready but has no active phys. 86230557Sjimharris */ 87230557Sjimharris SCIC_SDS_PORT_READY_SUBSTATE_WAITING, 88230557Sjimharris 89230557Sjimharris /** 90230557Sjimharris * The substate where the port is started and ready and there is at least one 91230557Sjimharris * phy operational. 92230557Sjimharris */ 93230557Sjimharris SCIC_SDS_PORT_READY_SUBSTATE_OPERATIONAL, 94230557Sjimharris 95230557Sjimharris /** 96230557Sjimharris * The substate where the port is started and there was an add/remove phy 97230557Sjimharris * event. This state is only used in Automatic Port Configuration Mode (APC) 98230557Sjimharris */ 99230557Sjimharris SCIC_SDS_PORT_READY_SUBSTATE_CONFIGURING, 100230557Sjimharris 101230557Sjimharris SCIC_SDS_PORT_READY_MAX_SUBSTATES 102230557Sjimharris}; 103230557Sjimharris 104230557Sjimharrisstruct SCIC_SDS_CONTROLLER; 105230557Sjimharrisstruct SCIC_SDS_PHY; 106230557Sjimharrisstruct SCIC_SDS_REMOTE_DEVICE; 107230557Sjimharrisstruct SCIC_SDS_REQUEST; 108230557Sjimharris 109230557Sjimharris/** 110230557Sjimharris * @struct SCIC_SDS_PORT 111230557Sjimharris * 112240518Seadler * The core port object provides the abstraction for an SCU port. 113230557Sjimharris */ 114230557Sjimharristypedef struct SCIC_SDS_PORT 115230557Sjimharris{ 116230557Sjimharris /** 117230557Sjimharris * This field is the oommon base port object. 118230557Sjimharris */ 119230557Sjimharris SCI_BASE_PORT_T parent; 120230557Sjimharris 121230557Sjimharris /** 122230557Sjimharris * This field is the port index that is reported to the SCI USER. This allows 123230557Sjimharris * the actual hardware physical port to change without the SCI USER getting a 124230557Sjimharris * different answer for the get port index. 125230557Sjimharris */ 126230557Sjimharris U8 logical_port_index; 127230557Sjimharris 128230557Sjimharris /** 129230557Sjimharris * This field is the port index used to program the SCU hardware. 130230557Sjimharris */ 131230557Sjimharris U8 physical_port_index; 132230557Sjimharris 133230557Sjimharris /** 134230557Sjimharris * This field contains the active phy mask for the port. This mask is used in 135230557Sjimharris * conjunction with the phy state to determine which phy to select for some 136230557Sjimharris * port operations. 137230557Sjimharris */ 138230557Sjimharris U8 active_phy_mask; 139230557Sjimharris 140230557Sjimharris /** 141230557Sjimharris * This field contains the phy mask for the port that are already part of the port. 142230557Sjimharris */ 143230557Sjimharris U8 enabled_phy_mask; 144230557Sjimharris 145230557Sjimharris U16 reserved_rni; 146230557Sjimharris U16 reserved_tci; 147230557Sjimharris 148230557Sjimharris /** 149230557Sjimharris * This field contains the count of the io requests started on this port 150230557Sjimharris * object. It is used to control controller shutdown. 151230557Sjimharris */ 152230557Sjimharris U32 started_request_count; 153230557Sjimharris 154230557Sjimharris /** 155230557Sjimharris * This field contains the number of devices assigned to this port. It is 156230557Sjimharris * used to control port start requests. 157230557Sjimharris */ 158230557Sjimharris U32 assigned_device_count; 159230557Sjimharris 160230557Sjimharris /** 161230557Sjimharris * This field contains the reason for the port not going ready. It is 162230557Sjimharris * assigned in the state handlers and used in the state transition. 163230557Sjimharris */ 164230557Sjimharris U32 not_ready_reason; 165230557Sjimharris 166230557Sjimharris /** 167230557Sjimharris * This field is the table of phys assigned to the port. 168230557Sjimharris */ 169230557Sjimharris struct SCIC_SDS_PHY *phy_table[SCI_MAX_PHYS]; 170230557Sjimharris 171230557Sjimharris /** 172230557Sjimharris * This field is a pointer back to the controller that owns this port object. 173230557Sjimharris */ 174230557Sjimharris struct SCIC_SDS_CONTROLLER *owning_controller; 175230557Sjimharris 176230557Sjimharris /** 177230557Sjimharris * This field contains the port start/stop timer handle. 178230557Sjimharris */ 179230557Sjimharris void *timer_handle; 180230557Sjimharris 181230557Sjimharris /** 182230557Sjimharris * This field points to the current set of state handlers for this port 183230557Sjimharris * object. These state handlers are assigned at each enter state of the state 184230557Sjimharris * machine. 185230557Sjimharris */ 186230557Sjimharris struct SCIC_SDS_PORT_STATE_HANDLER *state_handlers; 187230557Sjimharris 188230557Sjimharris /** 189230557Sjimharris * This field is the ready substate machine for the port. 190230557Sjimharris */ 191230557Sjimharris SCI_BASE_STATE_MACHINE_T ready_substate_machine; 192230557Sjimharris 193230557Sjimharris #ifdef SCI_LOGGING 194230557Sjimharris /** 195230557Sjimharris * This field is the ready substate machine logger. It logs each state 196230557Sjimharris * transition request in the ready substate machine. 197230557Sjimharris */ 198230557Sjimharris SCI_BASE_STATE_MACHINE_LOGGER_T ready_substate_machine_logger; 199230557Sjimharris #endif 200230557Sjimharris 201230557Sjimharris /// Memory mapped hardware register space 202230557Sjimharris 203230557Sjimharris /** 204230557Sjimharris * This field is the pointer to the port task scheduler registers for the SCU 205230557Sjimharris * hardware. 206230557Sjimharris */ 207230557Sjimharris SCU_PORT_TASK_SCHEDULER_REGISTERS_T *port_task_scheduler_registers; 208230557Sjimharris 209230557Sjimharris /** 210230557Sjimharris * This field is identical for all port objects and points to the port task 211230557Sjimharris * scheduler group PE configuration registers. It is used to assign PEs to a 212230557Sjimharris * port. 213230557Sjimharris */ 214230557Sjimharris SCU_PORT_PE_CONFIGURATION_REGISTER_T *port_pe_configuration_register; 215230557Sjimharris 216230557Sjimharris /** 217230557Sjimharris * This field is the VIIT register space for ths port object. 218230557Sjimharris */ 219230557Sjimharris SCU_VIIT_ENTRY_T *viit_registers; 220230557Sjimharris 221230557Sjimharris} SCIC_SDS_PORT_T; 222230557Sjimharris 223230557Sjimharris 224230557Sjimharristypedef SCI_STATUS (*SCIC_SDS_PORT_EVENT_HANDLER_T)(struct SCIC_SDS_PORT *, U32); 225230557Sjimharris 226230557Sjimharristypedef SCI_STATUS (*SCIC_SDS_PORT_FRAME_HANDLER_T)(struct SCIC_SDS_PORT *, U32); 227230557Sjimharris 228230557Sjimharristypedef void (*SCIC_SDS_PORT_LINK_HANDLER_T)(struct SCIC_SDS_PORT *, struct SCIC_SDS_PHY *); 229230557Sjimharris 230230557Sjimharristypedef SCI_STATUS (*SCIC_SDS_PORT_IO_REQUEST_HANDLER_T)( 231230557Sjimharris struct SCIC_SDS_PORT *, 232230557Sjimharris struct SCIC_SDS_REMOTE_DEVICE *, 233230557Sjimharris struct SCIC_SDS_REQUEST *); 234230557Sjimharris 235230557Sjimharristypedef struct SCIC_SDS_PORT_STATE_HANDLER 236230557Sjimharris{ 237230557Sjimharris SCI_BASE_PORT_STATE_HANDLER_T parent; 238230557Sjimharris 239230557Sjimharris SCIC_SDS_PORT_FRAME_HANDLER_T frame_handler; 240230557Sjimharris SCIC_SDS_PORT_EVENT_HANDLER_T event_handler; 241230557Sjimharris 242230557Sjimharris SCIC_SDS_PORT_LINK_HANDLER_T link_up_handler; 243230557Sjimharris SCIC_SDS_PORT_LINK_HANDLER_T link_down_handler; 244230557Sjimharris 245230557Sjimharris SCIC_SDS_PORT_IO_REQUEST_HANDLER_T start_io_handler; 246230557Sjimharris SCIC_SDS_PORT_IO_REQUEST_HANDLER_T complete_io_handler; 247230557Sjimharris 248230557Sjimharris} SCIC_SDS_PORT_STATE_HANDLER_T; 249230557Sjimharris 250230557Sjimharrisextern SCI_BASE_STATE_T scic_sds_port_state_table[]; 251230557Sjimharrisextern SCI_BASE_STATE_T scic_sds_port_ready_substate_table[]; 252230557Sjimharris 253230557Sjimharrisextern SCIC_SDS_PORT_STATE_HANDLER_T scic_sds_port_state_handler_table[]; 254230557Sjimharrisextern SCIC_SDS_PORT_STATE_HANDLER_T scic_sds_port_ready_substate_handler_table[]; 255230557Sjimharris 256230557Sjimharris/** 257230557Sjimharris * Helper macro to get the owning controller of this port 258230557Sjimharris */ 259230557Sjimharris#define scic_sds_port_get_controller(this_port) \ 260230557Sjimharris ((this_port)->owning_controller) 261230557Sjimharris 262230557Sjimharris/** 263230557Sjimharris * Helper macro to get the base state machine for this port 264230557Sjimharris */ 265230557Sjimharris#define scic_sds_port_get_base_state_machine(this_port) \ 266230557Sjimharris (&(this_port)->parent.state_machine) 267230557Sjimharris 268230557Sjimharris/** 269230557Sjimharris * This macro will change the state handlers to those of the specified state 270230557Sjimharris * id 271230557Sjimharris */ 272230557Sjimharris#define scic_sds_port_set_base_state_handlers(this_port, state_id) \ 273230557Sjimharris scic_sds_port_set_state_handlers( \ 274230557Sjimharris (this_port), &scic_sds_port_state_handler_table[(state_id)]) 275230557Sjimharris 276230557Sjimharris/** 277230557Sjimharris * Helper macro to get the ready substate machine for this port 278230557Sjimharris */ 279230557Sjimharris#define scic_sds_port_get_ready_substate_machine(this_port) \ 280230557Sjimharris (&(this_port)->ready_substate_machine) 281230557Sjimharris 282230557Sjimharris/** 283230557Sjimharris * Helper macro to set the port object state handlers 284230557Sjimharris */ 285230557Sjimharris#define scic_sds_port_set_state_handlers(this_port, handlers) \ 286230557Sjimharris ((this_port)->state_handlers = (handlers)) 287230557Sjimharris 288230557Sjimharris/** 289230557Sjimharris * This macro returns the physical port index for this port object 290230557Sjimharris */ 291230557Sjimharris#define scic_sds_port_get_index(this_port) \ 292230557Sjimharris ((this_port)->physical_port_index) 293230557Sjimharris 294230557Sjimharris/** 295230557Sjimharris * Helper macro to increment the started request count 296230557Sjimharris */ 297230557Sjimharris#define scic_sds_port_increment_request_count(this_port) \ 298230557Sjimharris ((this_port)->started_request_count++) 299230557Sjimharris 300230557Sjimharris#ifdef SCIC_DEBUG_ENABLED 301230557Sjimharris/** 302230557Sjimharris * @brief This method decrements the started io request count. The method 303230557Sjimharris * will not decrment the started io request count below 0 and will 304230557Sjimharris * log a debug message if this is attempted. 305230557Sjimharris * 306230557Sjimharris * @param[in] this_port 307230557Sjimharris */ 308230557Sjimharrisvoid scic_sds_port_decrement_request_count( 309230557Sjimharris SCIC_SDS_PORT_T *this_port 310230557Sjimharris); 311230557Sjimharris#else 312230557Sjimharris/** 313230557Sjimharris * Helper macro to decrement the started io request count. The macro will 314230557Sjimharris * not decrement the started io request count below 0. 315230557Sjimharris */ 316230557Sjimharris#define scic_sds_port_decrement_request_count(this_port) \ 317230557Sjimharris ( \ 318230557Sjimharris (this_port)->started_request_count = ( \ 319230557Sjimharris ((this_port)->started_request_count == 0) ? \ 320230557Sjimharris (this_port)->started_request_count : \ 321230557Sjimharris ((this_port)->started_request_count - 1) \ 322230557Sjimharris ) \ 323230557Sjimharris ) 324230557Sjimharris#endif 325230557Sjimharris 326230557Sjimharris/** 327230557Sjimharris * Helper macro to write the phys port assignment 328230557Sjimharris */ 329230557Sjimharris#define scic_sds_port_write_phy_assignment(port, phy) \ 330230557Sjimharris SCU_PCSPExCR_WRITE( \ 331230557Sjimharris (port), \ 332230557Sjimharris (phy)->phy_index, \ 333230557Sjimharris (port)->physical_port_index \ 334230557Sjimharris ) 335230557Sjimharris 336230557Sjimharris/** 337230557Sjimharris * Helper macro to read the phys port assignment 338230557Sjimharris */ 339230557Sjimharris#define scic_sds_port_read_phy_assignment(port, phy) \ 340230557Sjimharris SCU_PCSPExCR_READ( \ 341230557Sjimharris (port), \ 342230557Sjimharris (phy)->phy_index \ 343230557Sjimharris ) 344230557Sjimharris 345230557Sjimharris#define scic_sds_port_active_phy(port, phy) \ 346230557Sjimharris (((port)->active_phy_mask & (1 << (phy)->phy_index)) != 0) 347230557Sjimharris 348230557Sjimharris// --------------------------------------------------------------------------- 349230557Sjimharris 350230557SjimharrisU32 scic_sds_port_get_object_size(void); 351230557Sjimharris 352230557SjimharrisU32 scic_sds_port_get_min_timer_count(void); 353230557Sjimharris 354230557SjimharrisU32 scic_sds_port_get_max_timer_count(void); 355230557Sjimharris 356230557Sjimharris// --------------------------------------------------------------------------- 357230557Sjimharris 358230557Sjimharris#ifdef SCI_LOGGING 359230557Sjimharrisvoid scic_sds_port_initialize_state_logging( 360230557Sjimharris SCIC_SDS_PORT_T *this_port 361230557Sjimharris); 362230557Sjimharris#else 363230557Sjimharris#define scic_sds_port_initialize_state_logging(x) 364230557Sjimharris#endif 365230557Sjimharris 366230557Sjimharris// --------------------------------------------------------------------------- 367230557Sjimharris 368230557Sjimharrisvoid scic_sds_port_construct( 369230557Sjimharris SCIC_SDS_PORT_T *this_port, 370230557Sjimharris U8 port_index, 371230557Sjimharris struct SCIC_SDS_CONTROLLER *owning_controller 372230557Sjimharris); 373230557Sjimharris 374230557SjimharrisSCI_STATUS scic_sds_port_initialize( 375230557Sjimharris SCIC_SDS_PORT_T *this_port, 376230557Sjimharris void *port_task_scheduler_registers, 377230557Sjimharris void *port_configuration_regsiter, 378230557Sjimharris void *viit_registers 379230557Sjimharris); 380230557Sjimharris 381230557Sjimharris// --------------------------------------------------------------------------- 382230557Sjimharris 383230557SjimharrisSCI_STATUS scic_sds_port_add_phy( 384230557Sjimharris struct SCIC_SDS_PORT * this_port, 385230557Sjimharris struct SCIC_SDS_PHY * the_phy 386230557Sjimharris); 387230557Sjimharris 388230557SjimharrisSCI_STATUS scic_sds_port_remove_phy( 389230557Sjimharris struct SCIC_SDS_PORT * this_port, 390230557Sjimharris struct SCIC_SDS_PHY * the_phy 391230557Sjimharris); 392230557Sjimharris 393230557Sjimharrisvoid scic_sds_port_setup_transports( 394230557Sjimharris SCIC_SDS_PORT_T * this_port, 395230557Sjimharris U32 device_id 396230557Sjimharris); 397230557Sjimharris 398230557Sjimharrisvoid scic_sds_port_activate_phy( 399230557Sjimharris SCIC_SDS_PORT_T *this_port, 400230557Sjimharris struct SCIC_SDS_PHY *phy, 401230557Sjimharris BOOL do_notify_user, 402230557Sjimharris BOOL do_resume_phy 403230557Sjimharris); 404230557Sjimharris 405230557Sjimharrisvoid scic_sds_port_deactivate_phy( 406230557Sjimharris SCIC_SDS_PORT_T *this_port, 407230557Sjimharris struct SCIC_SDS_PHY *phy, 408230557Sjimharris BOOL do_notify_user 409230557Sjimharris); 410230557Sjimharris 411230557Sjimharrisstruct SCIC_SDS_PHY * scic_sds_port_get_a_connected_phy( 412230557Sjimharris SCIC_SDS_PORT_T * this_port 413230557Sjimharris); 414230557Sjimharris 415230557Sjimharrisvoid scic_sds_port_invalid_link_up( 416230557Sjimharris SCIC_SDS_PORT_T *this_port, 417230557Sjimharris struct SCIC_SDS_PHY *phy 418230557Sjimharris); 419230557Sjimharris 420230557Sjimharrisvoid scic_sds_port_general_link_up_handler( 421230557Sjimharris SCIC_SDS_PORT_T *this_port, 422230557Sjimharris struct SCIC_SDS_PHY *the_phy, 423230557Sjimharris BOOL do_notify_user, 424230557Sjimharris BOOL do_resume_phy 425230557Sjimharris); 426230557Sjimharris 427230557SjimharrisBOOL scic_sds_port_link_detected( 428230557Sjimharris SCIC_SDS_PORT_T *this_port, 429230557Sjimharris struct SCIC_SDS_PHY *phy 430230557Sjimharris); 431230557Sjimharris 432230557Sjimharrisvoid scic_sds_port_link_up( 433230557Sjimharris SCIC_SDS_PORT_T *this_port, 434230557Sjimharris struct SCIC_SDS_PHY *phy 435230557Sjimharris); 436230557Sjimharris 437230557Sjimharrisvoid scic_sds_port_link_down( 438230557Sjimharris SCIC_SDS_PORT_T *this_port, 439230557Sjimharris struct SCIC_SDS_PHY *phy 440230557Sjimharris); 441230557Sjimharris 442230557Sjimharris// --------------------------------------------------------------------------- 443230557Sjimharris 444230557Sjimharrisvoid scic_sds_port_timeout_handler( 445230557Sjimharris void *port 446230557Sjimharris); 447230557Sjimharris 448230557Sjimharris// --------------------------------------------------------------------------- 449230557Sjimharris 450230557SjimharrisSCI_STATUS scic_sds_port_start_io( 451230557Sjimharris SCIC_SDS_PORT_T *this_port, 452230557Sjimharris struct SCIC_SDS_REMOTE_DEVICE *the_device, 453230557Sjimharris struct SCIC_SDS_REQUEST *the_io_request 454230557Sjimharris); 455230557Sjimharris 456230557SjimharrisSCI_STATUS scic_sds_port_complete_io( 457230557Sjimharris SCIC_SDS_PORT_T *this_port, 458230557Sjimharris struct SCIC_SDS_REMOTE_DEVICE *the_device, 459230557Sjimharris struct SCIC_SDS_REQUEST *the_io_request 460230557Sjimharris); 461230557Sjimharris 462230557Sjimharris// --------------------------------------------------------------------------- 463230557Sjimharris 464230557Sjimharrisvoid scic_sds_port_update_viit_entry( 465230557Sjimharris SCIC_SDS_PORT_T *this_port 466230557Sjimharris); 467230557Sjimharris 468230557Sjimharris// --------------------------------------------------------------------------- 469230557Sjimharris 470230557SjimharrisSCI_STATUS scic_sds_port_default_start_handler( 471230557Sjimharris SCI_BASE_PORT_T *port 472230557Sjimharris); 473230557Sjimharris 474230557SjimharrisSCI_STATUS scic_sds_port_default_stop_handler( 475230557Sjimharris SCI_BASE_PORT_T *port 476230557Sjimharris); 477230557Sjimharris 478230557SjimharrisSCI_STATUS scic_sds_port_default_destruct_handler( 479230557Sjimharris SCI_BASE_PORT_T *port 480230557Sjimharris); 481230557Sjimharris 482230557SjimharrisSCI_STATUS scic_sds_port_default_reset_handler( 483230557Sjimharris SCI_BASE_PORT_T * port, 484230557Sjimharris U32 timeout 485230557Sjimharris); 486230557Sjimharris 487230557SjimharrisSCI_STATUS scic_sds_port_default_add_phy_handler( 488230557Sjimharris SCI_BASE_PORT_T *port, 489230557Sjimharris SCI_BASE_PHY_T *phy 490230557Sjimharris); 491230557Sjimharris 492230557SjimharrisSCI_STATUS scic_sds_port_default_remove_phy_handler( 493230557Sjimharris SCI_BASE_PORT_T *port, 494230557Sjimharris SCI_BASE_PHY_T *phy 495230557Sjimharris); 496230557Sjimharris 497230557SjimharrisSCI_STATUS scic_sds_port_default_frame_handler( 498230557Sjimharris struct SCIC_SDS_PORT * port, 499230557Sjimharris U32 frame_index 500230557Sjimharris); 501230557Sjimharris 502230557SjimharrisSCI_STATUS scic_sds_port_default_event_handler( 503230557Sjimharris struct SCIC_SDS_PORT * port, 504230557Sjimharris U32 event_code 505230557Sjimharris); 506230557Sjimharris 507230557Sjimharrisvoid scic_sds_port_default_link_up_handler( 508230557Sjimharris struct SCIC_SDS_PORT *this_port, 509230557Sjimharris struct SCIC_SDS_PHY *phy 510230557Sjimharris); 511230557Sjimharris 512230557Sjimharrisvoid scic_sds_port_default_link_down_handler( 513230557Sjimharris struct SCIC_SDS_PORT *this_port, 514230557Sjimharris struct SCIC_SDS_PHY *phy 515230557Sjimharris); 516230557Sjimharris 517230557SjimharrisSCI_STATUS scic_sds_port_default_start_io_handler( 518230557Sjimharris struct SCIC_SDS_PORT *port, 519230557Sjimharris struct SCIC_SDS_REMOTE_DEVICE *device, 520230557Sjimharris struct SCIC_SDS_REQUEST *io_request 521230557Sjimharris); 522230557Sjimharris 523230557SjimharrisSCI_STATUS scic_sds_port_default_complete_io_handler( 524230557Sjimharris struct SCIC_SDS_PORT *port, 525230557Sjimharris struct SCIC_SDS_REMOTE_DEVICE *device, 526230557Sjimharris struct SCIC_SDS_REQUEST *io_request 527230557Sjimharris); 528230557Sjimharris 529230557SjimharrisSCI_SAS_LINK_RATE scic_sds_port_get_max_allowed_speed( 530230557Sjimharris SCIC_SDS_PORT_T * this_port 531230557Sjimharris); 532230557Sjimharris 533230557Sjimharrisvoid scic_sds_port_broadcast_change_received( 534230557Sjimharris struct SCIC_SDS_PORT * this_port, 535230557Sjimharris struct SCIC_SDS_PHY * this_phy 536230557Sjimharris); 537230557Sjimharris 538230557SjimharrisBOOL scic_sds_port_is_valid_phy_assignment( 539230557Sjimharris SCIC_SDS_PORT_T *this_port, 540230557Sjimharris U32 phy_index 541230557Sjimharris); 542230557Sjimharris 543230557SjimharrisBOOL scic_sds_port_is_phy_mask_valid( 544230557Sjimharris SCIC_SDS_PORT_T * this_port, 545230557Sjimharris U32 phy_mask 546230557Sjimharris); 547230557Sjimharris 548230557SjimharrisU32 scic_sds_port_get_phys( 549230557Sjimharris SCIC_SDS_PORT_T * this_port 550230557Sjimharris); 551230557Sjimharris 552230557Sjimharrisvoid scic_sds_port_get_sas_address( 553230557Sjimharris SCIC_SDS_PORT_T * this_port, 554230557Sjimharris SCI_SAS_ADDRESS_T * sas_address 555230557Sjimharris); 556230557Sjimharris 557230557Sjimharrisvoid scic_sds_port_get_attached_sas_address( 558230557Sjimharris SCIC_SDS_PORT_T * this_port, 559230557Sjimharris SCI_SAS_ADDRESS_T * sas_address 560230557Sjimharris); 561230557Sjimharris 562230557Sjimharrisvoid scic_sds_port_get_attached_protocols( 563230557Sjimharris SCIC_SDS_PORT_T * this_port, 564230557Sjimharris SCI_SAS_IDENTIFY_ADDRESS_FRAME_PROTOCOLS_T * protocols 565230557Sjimharris); 566230557Sjimharris 567230557SjimharrisSCI_STATUS scic_sds_port_set_phy( 568230557Sjimharris struct SCIC_SDS_PORT *port, 569230557Sjimharris struct SCIC_SDS_PHY *phy 570230557Sjimharris); 571230557Sjimharris 572230557SjimharrisSCI_STATUS scic_sds_port_clear_phy( 573230557Sjimharris struct SCIC_SDS_PORT *port, 574230557Sjimharris struct SCIC_SDS_PHY *phy 575230557Sjimharris); 576230557Sjimharris 577230557Sjimharrisvoid scic_sds_port_suspend_port_task_scheduler( 578230557Sjimharris SCIC_SDS_PORT_T *this_port 579230557Sjimharris); 580230557Sjimharris 581230557Sjimharrisvoid scic_sds_port_resume_port_task_scheduler( 582230557Sjimharris SCIC_SDS_PORT_T *this_port 583230557Sjimharris); 584230557Sjimharris 585230557Sjimharrisvoid scic_sds_port_release_resource( 586230557Sjimharris struct SCIC_SDS_CONTROLLER * controller, 587230557Sjimharris struct SCIC_SDS_PORT * port 588230557Sjimharris); 589230557Sjimharris 590230557Sjimharris#ifdef __cplusplus 591230557Sjimharris} 592230557Sjimharris#endif // __cplusplus 593230557Sjimharris 594230557Sjimharris 595230557Sjimharris#endif // _SCIC_SDS_PORT_H_ 596