1254885Sdumbbell/* 2254885Sdumbbell * Copyright 2008 Advanced Micro Devices, Inc. 3254885Sdumbbell * Copyright 2008 Red Hat Inc. 4254885Sdumbbell * Copyright 2009 Jerome Glisse. 5254885Sdumbbell * 6254885Sdumbbell * Permission is hereby granted, free of charge, to any person obtaining a 7254885Sdumbbell * copy of this software and associated documentation files (the "Software"), 8254885Sdumbbell * to deal in the Software without restriction, including without limitation 9254885Sdumbbell * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10254885Sdumbbell * and/or sell copies of the Software, and to permit persons to whom the 11254885Sdumbbell * Software is furnished to do so, subject to the following conditions: 12254885Sdumbbell * 13254885Sdumbbell * The above copyright notice and this permission notice shall be included in 14254885Sdumbbell * all copies or substantial portions of the Software. 15254885Sdumbbell * 16254885Sdumbbell * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17254885Sdumbbell * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18254885Sdumbbell * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19254885Sdumbbell * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 20254885Sdumbbell * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 21254885Sdumbbell * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 22254885Sdumbbell * OTHER DEALINGS IN THE SOFTWARE. 23254885Sdumbbell * 24254885Sdumbbell * Authors: Dave Airlie 25254885Sdumbbell * Alex Deucher 26254885Sdumbbell * Jerome Glisse 27254885Sdumbbell */ 28254885Sdumbbell#ifndef __R300D_H__ 29254885Sdumbbell#define __R300D_H__ 30254885Sdumbbell 31254885Sdumbbell#include <sys/cdefs.h> 32254885Sdumbbell__FBSDID("$FreeBSD$"); 33254885Sdumbbell 34254885Sdumbbell#define CP_PACKET0 0x00000000 35254885Sdumbbell#define PACKET0_BASE_INDEX_SHIFT 0 36254885Sdumbbell#define PACKET0_BASE_INDEX_MASK (0x1ffff << 0) 37254885Sdumbbell#define PACKET0_COUNT_SHIFT 16 38254885Sdumbbell#define PACKET0_COUNT_MASK (0x3fff << 16) 39254885Sdumbbell#define CP_PACKET1 0x40000000 40254885Sdumbbell#define CP_PACKET2 0x80000000 41254885Sdumbbell#define PACKET2_PAD_SHIFT 0 42254885Sdumbbell#define PACKET2_PAD_MASK (0x3fffffff << 0) 43254885Sdumbbell#define CP_PACKET3 0xC0000000 44254885Sdumbbell#define PACKET3_IT_OPCODE_SHIFT 8 45254885Sdumbbell#define PACKET3_IT_OPCODE_MASK (0xff << 8) 46254885Sdumbbell#define PACKET3_COUNT_SHIFT 16 47254885Sdumbbell#define PACKET3_COUNT_MASK (0x3fff << 16) 48254885Sdumbbell/* PACKET3 op code */ 49254885Sdumbbell#define PACKET3_NOP 0x10 50254885Sdumbbell#define PACKET3_3D_DRAW_VBUF 0x28 51254885Sdumbbell#define PACKET3_3D_DRAW_IMMD 0x29 52254885Sdumbbell#define PACKET3_3D_DRAW_INDX 0x2A 53254885Sdumbbell#define PACKET3_3D_LOAD_VBPNTR 0x2F 54254885Sdumbbell#define PACKET3_3D_CLEAR_ZMASK 0x32 55254885Sdumbbell#define PACKET3_INDX_BUFFER 0x33 56254885Sdumbbell#define PACKET3_3D_DRAW_VBUF_2 0x34 57254885Sdumbbell#define PACKET3_3D_DRAW_IMMD_2 0x35 58254885Sdumbbell#define PACKET3_3D_DRAW_INDX_2 0x36 59254885Sdumbbell#define PACKET3_3D_CLEAR_HIZ 0x37 60254885Sdumbbell#define PACKET3_3D_CLEAR_CMASK 0x38 61254885Sdumbbell#define PACKET3_BITBLT_MULTI 0x9B 62254885Sdumbbell 63254885Sdumbbell#define PACKET0(reg, n) (CP_PACKET0 | \ 64254885Sdumbbell REG_SET(PACKET0_BASE_INDEX, (reg) >> 2) | \ 65254885Sdumbbell REG_SET(PACKET0_COUNT, (n))) 66254885Sdumbbell#define PACKET2(v) (CP_PACKET2 | REG_SET(PACKET2_PAD, (v))) 67254885Sdumbbell#define PACKET3(op, n) (CP_PACKET3 | \ 68254885Sdumbbell REG_SET(PACKET3_IT_OPCODE, (op)) | \ 69254885Sdumbbell REG_SET(PACKET3_COUNT, (n))) 70254885Sdumbbell 71254885Sdumbbell#define PACKET_TYPE0 0 72254885Sdumbbell#define PACKET_TYPE1 1 73254885Sdumbbell#define PACKET_TYPE2 2 74254885Sdumbbell#define PACKET_TYPE3 3 75254885Sdumbbell 76254885Sdumbbell#define CP_PACKET_GET_TYPE(h) (((h) >> 30) & 3) 77254885Sdumbbell#define CP_PACKET_GET_COUNT(h) (((h) >> 16) & 0x3FFF) 78254885Sdumbbell#define CP_PACKET0_GET_REG(h) (((h) & 0x1FFF) << 2) 79254885Sdumbbell#define CP_PACKET0_GET_ONE_REG_WR(h) (((h) >> 15) & 1) 80254885Sdumbbell#define CP_PACKET3_GET_OPCODE(h) (((h) >> 8) & 0xFF) 81254885Sdumbbell 82254885Sdumbbell/* Registers */ 83254885Sdumbbell#define R_000148_MC_FB_LOCATION 0x000148 84254885Sdumbbell#define S_000148_MC_FB_START(x) (((x) & 0xFFFF) << 0) 85254885Sdumbbell#define G_000148_MC_FB_START(x) (((x) >> 0) & 0xFFFF) 86254885Sdumbbell#define C_000148_MC_FB_START 0xFFFF0000 87254885Sdumbbell#define S_000148_MC_FB_TOP(x) (((x) & 0xFFFF) << 16) 88254885Sdumbbell#define G_000148_MC_FB_TOP(x) (((x) >> 16) & 0xFFFF) 89254885Sdumbbell#define C_000148_MC_FB_TOP 0x0000FFFF 90254885Sdumbbell#define R_00014C_MC_AGP_LOCATION 0x00014C 91254885Sdumbbell#define S_00014C_MC_AGP_START(x) (((x) & 0xFFFF) << 0) 92254885Sdumbbell#define G_00014C_MC_AGP_START(x) (((x) >> 0) & 0xFFFF) 93254885Sdumbbell#define C_00014C_MC_AGP_START 0xFFFF0000 94254885Sdumbbell#define S_00014C_MC_AGP_TOP(x) (((x) & 0xFFFF) << 16) 95254885Sdumbbell#define G_00014C_MC_AGP_TOP(x) (((x) >> 16) & 0xFFFF) 96254885Sdumbbell#define C_00014C_MC_AGP_TOP 0x0000FFFF 97254885Sdumbbell#define R_00015C_AGP_BASE_2 0x00015C 98254885Sdumbbell#define S_00015C_AGP_BASE_ADDR_2(x) (((x) & 0xF) << 0) 99254885Sdumbbell#define G_00015C_AGP_BASE_ADDR_2(x) (((x) >> 0) & 0xF) 100254885Sdumbbell#define C_00015C_AGP_BASE_ADDR_2 0xFFFFFFF0 101254885Sdumbbell#define R_000170_AGP_BASE 0x000170 102254885Sdumbbell#define S_000170_AGP_BASE_ADDR(x) (((x) & 0xFFFFFFFF) << 0) 103254885Sdumbbell#define G_000170_AGP_BASE_ADDR(x) (((x) >> 0) & 0xFFFFFFFF) 104254885Sdumbbell#define C_000170_AGP_BASE_ADDR 0x00000000 105254885Sdumbbell#define R_0007C0_CP_STAT 0x0007C0 106254885Sdumbbell#define S_0007C0_MRU_BUSY(x) (((x) & 0x1) << 0) 107254885Sdumbbell#define G_0007C0_MRU_BUSY(x) (((x) >> 0) & 0x1) 108254885Sdumbbell#define C_0007C0_MRU_BUSY 0xFFFFFFFE 109254885Sdumbbell#define S_0007C0_MWU_BUSY(x) (((x) & 0x1) << 1) 110254885Sdumbbell#define G_0007C0_MWU_BUSY(x) (((x) >> 1) & 0x1) 111254885Sdumbbell#define C_0007C0_MWU_BUSY 0xFFFFFFFD 112254885Sdumbbell#define S_0007C0_RSIU_BUSY(x) (((x) & 0x1) << 2) 113254885Sdumbbell#define G_0007C0_RSIU_BUSY(x) (((x) >> 2) & 0x1) 114254885Sdumbbell#define C_0007C0_RSIU_BUSY 0xFFFFFFFB 115254885Sdumbbell#define S_0007C0_RCIU_BUSY(x) (((x) & 0x1) << 3) 116254885Sdumbbell#define G_0007C0_RCIU_BUSY(x) (((x) >> 3) & 0x1) 117254885Sdumbbell#define C_0007C0_RCIU_BUSY 0xFFFFFFF7 118254885Sdumbbell#define S_0007C0_CSF_PRIMARY_BUSY(x) (((x) & 0x1) << 9) 119254885Sdumbbell#define G_0007C0_CSF_PRIMARY_BUSY(x) (((x) >> 9) & 0x1) 120254885Sdumbbell#define C_0007C0_CSF_PRIMARY_BUSY 0xFFFFFDFF 121254885Sdumbbell#define S_0007C0_CSF_INDIRECT_BUSY(x) (((x) & 0x1) << 10) 122254885Sdumbbell#define G_0007C0_CSF_INDIRECT_BUSY(x) (((x) >> 10) & 0x1) 123254885Sdumbbell#define C_0007C0_CSF_INDIRECT_BUSY 0xFFFFFBFF 124254885Sdumbbell#define S_0007C0_CSQ_PRIMARY_BUSY(x) (((x) & 0x1) << 11) 125254885Sdumbbell#define G_0007C0_CSQ_PRIMARY_BUSY(x) (((x) >> 11) & 0x1) 126254885Sdumbbell#define C_0007C0_CSQ_PRIMARY_BUSY 0xFFFFF7FF 127254885Sdumbbell#define S_0007C0_CSQ_INDIRECT_BUSY(x) (((x) & 0x1) << 12) 128254885Sdumbbell#define G_0007C0_CSQ_INDIRECT_BUSY(x) (((x) >> 12) & 0x1) 129254885Sdumbbell#define C_0007C0_CSQ_INDIRECT_BUSY 0xFFFFEFFF 130254885Sdumbbell#define S_0007C0_CSI_BUSY(x) (((x) & 0x1) << 13) 131254885Sdumbbell#define G_0007C0_CSI_BUSY(x) (((x) >> 13) & 0x1) 132254885Sdumbbell#define C_0007C0_CSI_BUSY 0xFFFFDFFF 133254885Sdumbbell#define S_0007C0_CSF_INDIRECT2_BUSY(x) (((x) & 0x1) << 14) 134254885Sdumbbell#define G_0007C0_CSF_INDIRECT2_BUSY(x) (((x) >> 14) & 0x1) 135254885Sdumbbell#define C_0007C0_CSF_INDIRECT2_BUSY 0xFFFFBFFF 136254885Sdumbbell#define S_0007C0_CSQ_INDIRECT2_BUSY(x) (((x) & 0x1) << 15) 137254885Sdumbbell#define G_0007C0_CSQ_INDIRECT2_BUSY(x) (((x) >> 15) & 0x1) 138254885Sdumbbell#define C_0007C0_CSQ_INDIRECT2_BUSY 0xFFFF7FFF 139254885Sdumbbell#define S_0007C0_GUIDMA_BUSY(x) (((x) & 0x1) << 28) 140254885Sdumbbell#define G_0007C0_GUIDMA_BUSY(x) (((x) >> 28) & 0x1) 141254885Sdumbbell#define C_0007C0_GUIDMA_BUSY 0xEFFFFFFF 142254885Sdumbbell#define S_0007C0_VIDDMA_BUSY(x) (((x) & 0x1) << 29) 143254885Sdumbbell#define G_0007C0_VIDDMA_BUSY(x) (((x) >> 29) & 0x1) 144254885Sdumbbell#define C_0007C0_VIDDMA_BUSY 0xDFFFFFFF 145254885Sdumbbell#define S_0007C0_CMDSTRM_BUSY(x) (((x) & 0x1) << 30) 146254885Sdumbbell#define G_0007C0_CMDSTRM_BUSY(x) (((x) >> 30) & 0x1) 147254885Sdumbbell#define C_0007C0_CMDSTRM_BUSY 0xBFFFFFFF 148254885Sdumbbell#define S_0007C0_CP_BUSY(x) (((x) & 0x1) << 31) 149254885Sdumbbell#define G_0007C0_CP_BUSY(x) (((x) >> 31) & 0x1) 150254885Sdumbbell#define C_0007C0_CP_BUSY 0x7FFFFFFF 151254885Sdumbbell#define R_000E40_RBBM_STATUS 0x000E40 152254885Sdumbbell#define S_000E40_CMDFIFO_AVAIL(x) (((x) & 0x7F) << 0) 153254885Sdumbbell#define G_000E40_CMDFIFO_AVAIL(x) (((x) >> 0) & 0x7F) 154254885Sdumbbell#define C_000E40_CMDFIFO_AVAIL 0xFFFFFF80 155254885Sdumbbell#define S_000E40_HIRQ_ON_RBB(x) (((x) & 0x1) << 8) 156254885Sdumbbell#define G_000E40_HIRQ_ON_RBB(x) (((x) >> 8) & 0x1) 157254885Sdumbbell#define C_000E40_HIRQ_ON_RBB 0xFFFFFEFF 158254885Sdumbbell#define S_000E40_CPRQ_ON_RBB(x) (((x) & 0x1) << 9) 159254885Sdumbbell#define G_000E40_CPRQ_ON_RBB(x) (((x) >> 9) & 0x1) 160254885Sdumbbell#define C_000E40_CPRQ_ON_RBB 0xFFFFFDFF 161254885Sdumbbell#define S_000E40_CFRQ_ON_RBB(x) (((x) & 0x1) << 10) 162254885Sdumbbell#define G_000E40_CFRQ_ON_RBB(x) (((x) >> 10) & 0x1) 163254885Sdumbbell#define C_000E40_CFRQ_ON_RBB 0xFFFFFBFF 164254885Sdumbbell#define S_000E40_HIRQ_IN_RTBUF(x) (((x) & 0x1) << 11) 165254885Sdumbbell#define G_000E40_HIRQ_IN_RTBUF(x) (((x) >> 11) & 0x1) 166254885Sdumbbell#define C_000E40_HIRQ_IN_RTBUF 0xFFFFF7FF 167254885Sdumbbell#define S_000E40_CPRQ_IN_RTBUF(x) (((x) & 0x1) << 12) 168254885Sdumbbell#define G_000E40_CPRQ_IN_RTBUF(x) (((x) >> 12) & 0x1) 169254885Sdumbbell#define C_000E40_CPRQ_IN_RTBUF 0xFFFFEFFF 170254885Sdumbbell#define S_000E40_CFRQ_IN_RTBUF(x) (((x) & 0x1) << 13) 171254885Sdumbbell#define G_000E40_CFRQ_IN_RTBUF(x) (((x) >> 13) & 0x1) 172254885Sdumbbell#define C_000E40_CFRQ_IN_RTBUF 0xFFFFDFFF 173254885Sdumbbell#define S_000E40_CF_PIPE_BUSY(x) (((x) & 0x1) << 14) 174254885Sdumbbell#define G_000E40_CF_PIPE_BUSY(x) (((x) >> 14) & 0x1) 175254885Sdumbbell#define C_000E40_CF_PIPE_BUSY 0xFFFFBFFF 176254885Sdumbbell#define S_000E40_ENG_EV_BUSY(x) (((x) & 0x1) << 15) 177254885Sdumbbell#define G_000E40_ENG_EV_BUSY(x) (((x) >> 15) & 0x1) 178254885Sdumbbell#define C_000E40_ENG_EV_BUSY 0xFFFF7FFF 179254885Sdumbbell#define S_000E40_CP_CMDSTRM_BUSY(x) (((x) & 0x1) << 16) 180254885Sdumbbell#define G_000E40_CP_CMDSTRM_BUSY(x) (((x) >> 16) & 0x1) 181254885Sdumbbell#define C_000E40_CP_CMDSTRM_BUSY 0xFFFEFFFF 182254885Sdumbbell#define S_000E40_E2_BUSY(x) (((x) & 0x1) << 17) 183254885Sdumbbell#define G_000E40_E2_BUSY(x) (((x) >> 17) & 0x1) 184254885Sdumbbell#define C_000E40_E2_BUSY 0xFFFDFFFF 185254885Sdumbbell#define S_000E40_RB2D_BUSY(x) (((x) & 0x1) << 18) 186254885Sdumbbell#define G_000E40_RB2D_BUSY(x) (((x) >> 18) & 0x1) 187254885Sdumbbell#define C_000E40_RB2D_BUSY 0xFFFBFFFF 188254885Sdumbbell#define S_000E40_RB3D_BUSY(x) (((x) & 0x1) << 19) 189254885Sdumbbell#define G_000E40_RB3D_BUSY(x) (((x) >> 19) & 0x1) 190254885Sdumbbell#define C_000E40_RB3D_BUSY 0xFFF7FFFF 191254885Sdumbbell#define S_000E40_VAP_BUSY(x) (((x) & 0x1) << 20) 192254885Sdumbbell#define G_000E40_VAP_BUSY(x) (((x) >> 20) & 0x1) 193254885Sdumbbell#define C_000E40_VAP_BUSY 0xFFEFFFFF 194254885Sdumbbell#define S_000E40_RE_BUSY(x) (((x) & 0x1) << 21) 195254885Sdumbbell#define G_000E40_RE_BUSY(x) (((x) >> 21) & 0x1) 196254885Sdumbbell#define C_000E40_RE_BUSY 0xFFDFFFFF 197254885Sdumbbell#define S_000E40_TAM_BUSY(x) (((x) & 0x1) << 22) 198254885Sdumbbell#define G_000E40_TAM_BUSY(x) (((x) >> 22) & 0x1) 199254885Sdumbbell#define C_000E40_TAM_BUSY 0xFFBFFFFF 200254885Sdumbbell#define S_000E40_TDM_BUSY(x) (((x) & 0x1) << 23) 201254885Sdumbbell#define G_000E40_TDM_BUSY(x) (((x) >> 23) & 0x1) 202254885Sdumbbell#define C_000E40_TDM_BUSY 0xFF7FFFFF 203254885Sdumbbell#define S_000E40_PB_BUSY(x) (((x) & 0x1) << 24) 204254885Sdumbbell#define G_000E40_PB_BUSY(x) (((x) >> 24) & 0x1) 205254885Sdumbbell#define C_000E40_PB_BUSY 0xFEFFFFFF 206254885Sdumbbell#define S_000E40_TIM_BUSY(x) (((x) & 0x1) << 25) 207254885Sdumbbell#define G_000E40_TIM_BUSY(x) (((x) >> 25) & 0x1) 208254885Sdumbbell#define C_000E40_TIM_BUSY 0xFDFFFFFF 209254885Sdumbbell#define S_000E40_GA_BUSY(x) (((x) & 0x1) << 26) 210254885Sdumbbell#define G_000E40_GA_BUSY(x) (((x) >> 26) & 0x1) 211254885Sdumbbell#define C_000E40_GA_BUSY 0xFBFFFFFF 212254885Sdumbbell#define S_000E40_CBA2D_BUSY(x) (((x) & 0x1) << 27) 213254885Sdumbbell#define G_000E40_CBA2D_BUSY(x) (((x) >> 27) & 0x1) 214254885Sdumbbell#define C_000E40_CBA2D_BUSY 0xF7FFFFFF 215254885Sdumbbell#define S_000E40_GUI_ACTIVE(x) (((x) & 0x1) << 31) 216254885Sdumbbell#define G_000E40_GUI_ACTIVE(x) (((x) >> 31) & 0x1) 217254885Sdumbbell#define C_000E40_GUI_ACTIVE 0x7FFFFFFF 218254885Sdumbbell#define R_0000F0_RBBM_SOFT_RESET 0x0000F0 219254885Sdumbbell#define S_0000F0_SOFT_RESET_CP(x) (((x) & 0x1) << 0) 220254885Sdumbbell#define G_0000F0_SOFT_RESET_CP(x) (((x) >> 0) & 0x1) 221254885Sdumbbell#define C_0000F0_SOFT_RESET_CP 0xFFFFFFFE 222254885Sdumbbell#define S_0000F0_SOFT_RESET_HI(x) (((x) & 0x1) << 1) 223254885Sdumbbell#define G_0000F0_SOFT_RESET_HI(x) (((x) >> 1) & 0x1) 224254885Sdumbbell#define C_0000F0_SOFT_RESET_HI 0xFFFFFFFD 225254885Sdumbbell#define S_0000F0_SOFT_RESET_VAP(x) (((x) & 0x1) << 2) 226254885Sdumbbell#define G_0000F0_SOFT_RESET_VAP(x) (((x) >> 2) & 0x1) 227254885Sdumbbell#define C_0000F0_SOFT_RESET_VAP 0xFFFFFFFB 228254885Sdumbbell#define S_0000F0_SOFT_RESET_RE(x) (((x) & 0x1) << 3) 229254885Sdumbbell#define G_0000F0_SOFT_RESET_RE(x) (((x) >> 3) & 0x1) 230254885Sdumbbell#define C_0000F0_SOFT_RESET_RE 0xFFFFFFF7 231254885Sdumbbell#define S_0000F0_SOFT_RESET_PP(x) (((x) & 0x1) << 4) 232254885Sdumbbell#define G_0000F0_SOFT_RESET_PP(x) (((x) >> 4) & 0x1) 233254885Sdumbbell#define C_0000F0_SOFT_RESET_PP 0xFFFFFFEF 234254885Sdumbbell#define S_0000F0_SOFT_RESET_E2(x) (((x) & 0x1) << 5) 235254885Sdumbbell#define G_0000F0_SOFT_RESET_E2(x) (((x) >> 5) & 0x1) 236254885Sdumbbell#define C_0000F0_SOFT_RESET_E2 0xFFFFFFDF 237254885Sdumbbell#define S_0000F0_SOFT_RESET_RB(x) (((x) & 0x1) << 6) 238254885Sdumbbell#define G_0000F0_SOFT_RESET_RB(x) (((x) >> 6) & 0x1) 239254885Sdumbbell#define C_0000F0_SOFT_RESET_RB 0xFFFFFFBF 240254885Sdumbbell#define S_0000F0_SOFT_RESET_HDP(x) (((x) & 0x1) << 7) 241254885Sdumbbell#define G_0000F0_SOFT_RESET_HDP(x) (((x) >> 7) & 0x1) 242254885Sdumbbell#define C_0000F0_SOFT_RESET_HDP 0xFFFFFF7F 243254885Sdumbbell#define S_0000F0_SOFT_RESET_MC(x) (((x) & 0x1) << 8) 244254885Sdumbbell#define G_0000F0_SOFT_RESET_MC(x) (((x) >> 8) & 0x1) 245254885Sdumbbell#define C_0000F0_SOFT_RESET_MC 0xFFFFFEFF 246254885Sdumbbell#define S_0000F0_SOFT_RESET_AIC(x) (((x) & 0x1) << 9) 247254885Sdumbbell#define G_0000F0_SOFT_RESET_AIC(x) (((x) >> 9) & 0x1) 248254885Sdumbbell#define C_0000F0_SOFT_RESET_AIC 0xFFFFFDFF 249254885Sdumbbell#define S_0000F0_SOFT_RESET_VIP(x) (((x) & 0x1) << 10) 250254885Sdumbbell#define G_0000F0_SOFT_RESET_VIP(x) (((x) >> 10) & 0x1) 251254885Sdumbbell#define C_0000F0_SOFT_RESET_VIP 0xFFFFFBFF 252254885Sdumbbell#define S_0000F0_SOFT_RESET_DISP(x) (((x) & 0x1) << 11) 253254885Sdumbbell#define G_0000F0_SOFT_RESET_DISP(x) (((x) >> 11) & 0x1) 254254885Sdumbbell#define C_0000F0_SOFT_RESET_DISP 0xFFFFF7FF 255254885Sdumbbell#define S_0000F0_SOFT_RESET_CG(x) (((x) & 0x1) << 12) 256254885Sdumbbell#define G_0000F0_SOFT_RESET_CG(x) (((x) >> 12) & 0x1) 257254885Sdumbbell#define C_0000F0_SOFT_RESET_CG 0xFFFFEFFF 258254885Sdumbbell#define S_0000F0_SOFT_RESET_GA(x) (((x) & 0x1) << 13) 259254885Sdumbbell#define G_0000F0_SOFT_RESET_GA(x) (((x) >> 13) & 0x1) 260254885Sdumbbell#define C_0000F0_SOFT_RESET_GA 0xFFFFDFFF 261254885Sdumbbell#define S_0000F0_SOFT_RESET_IDCT(x) (((x) & 0x1) << 14) 262254885Sdumbbell#define G_0000F0_SOFT_RESET_IDCT(x) (((x) >> 14) & 0x1) 263254885Sdumbbell#define C_0000F0_SOFT_RESET_IDCT 0xFFFFBFFF 264254885Sdumbbell 265254885Sdumbbell#define R_00000D_SCLK_CNTL 0x00000D 266254885Sdumbbell#define S_00000D_SCLK_SRC_SEL(x) (((x) & 0x7) << 0) 267254885Sdumbbell#define G_00000D_SCLK_SRC_SEL(x) (((x) >> 0) & 0x7) 268254885Sdumbbell#define C_00000D_SCLK_SRC_SEL 0xFFFFFFF8 269254885Sdumbbell#define S_00000D_CP_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 3) 270254885Sdumbbell#define G_00000D_CP_MAX_DYN_STOP_LAT(x) (((x) >> 3) & 0x1) 271254885Sdumbbell#define C_00000D_CP_MAX_DYN_STOP_LAT 0xFFFFFFF7 272254885Sdumbbell#define S_00000D_HDP_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 4) 273254885Sdumbbell#define G_00000D_HDP_MAX_DYN_STOP_LAT(x) (((x) >> 4) & 0x1) 274254885Sdumbbell#define C_00000D_HDP_MAX_DYN_STOP_LAT 0xFFFFFFEF 275254885Sdumbbell#define S_00000D_TV_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 5) 276254885Sdumbbell#define G_00000D_TV_MAX_DYN_STOP_LAT(x) (((x) >> 5) & 0x1) 277254885Sdumbbell#define C_00000D_TV_MAX_DYN_STOP_LAT 0xFFFFFFDF 278254885Sdumbbell#define S_00000D_E2_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 6) 279254885Sdumbbell#define G_00000D_E2_MAX_DYN_STOP_LAT(x) (((x) >> 6) & 0x1) 280254885Sdumbbell#define C_00000D_E2_MAX_DYN_STOP_LAT 0xFFFFFFBF 281254885Sdumbbell#define S_00000D_SE_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 7) 282254885Sdumbbell#define G_00000D_SE_MAX_DYN_STOP_LAT(x) (((x) >> 7) & 0x1) 283254885Sdumbbell#define C_00000D_SE_MAX_DYN_STOP_LAT 0xFFFFFF7F 284254885Sdumbbell#define S_00000D_IDCT_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 8) 285254885Sdumbbell#define G_00000D_IDCT_MAX_DYN_STOP_LAT(x) (((x) >> 8) & 0x1) 286254885Sdumbbell#define C_00000D_IDCT_MAX_DYN_STOP_LAT 0xFFFFFEFF 287254885Sdumbbell#define S_00000D_VIP_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 9) 288254885Sdumbbell#define G_00000D_VIP_MAX_DYN_STOP_LAT(x) (((x) >> 9) & 0x1) 289254885Sdumbbell#define C_00000D_VIP_MAX_DYN_STOP_LAT 0xFFFFFDFF 290254885Sdumbbell#define S_00000D_RE_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 10) 291254885Sdumbbell#define G_00000D_RE_MAX_DYN_STOP_LAT(x) (((x) >> 10) & 0x1) 292254885Sdumbbell#define C_00000D_RE_MAX_DYN_STOP_LAT 0xFFFFFBFF 293254885Sdumbbell#define S_00000D_PB_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 11) 294254885Sdumbbell#define G_00000D_PB_MAX_DYN_STOP_LAT(x) (((x) >> 11) & 0x1) 295254885Sdumbbell#define C_00000D_PB_MAX_DYN_STOP_LAT 0xFFFFF7FF 296254885Sdumbbell#define S_00000D_TAM_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 12) 297254885Sdumbbell#define G_00000D_TAM_MAX_DYN_STOP_LAT(x) (((x) >> 12) & 0x1) 298254885Sdumbbell#define C_00000D_TAM_MAX_DYN_STOP_LAT 0xFFFFEFFF 299254885Sdumbbell#define S_00000D_TDM_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 13) 300254885Sdumbbell#define G_00000D_TDM_MAX_DYN_STOP_LAT(x) (((x) >> 13) & 0x1) 301254885Sdumbbell#define C_00000D_TDM_MAX_DYN_STOP_LAT 0xFFFFDFFF 302254885Sdumbbell#define S_00000D_RB_MAX_DYN_STOP_LAT(x) (((x) & 0x1) << 14) 303254885Sdumbbell#define G_00000D_RB_MAX_DYN_STOP_LAT(x) (((x) >> 14) & 0x1) 304254885Sdumbbell#define C_00000D_RB_MAX_DYN_STOP_LAT 0xFFFFBFFF 305254885Sdumbbell#define S_00000D_FORCE_DISP2(x) (((x) & 0x1) << 15) 306254885Sdumbbell#define G_00000D_FORCE_DISP2(x) (((x) >> 15) & 0x1) 307254885Sdumbbell#define C_00000D_FORCE_DISP2 0xFFFF7FFF 308254885Sdumbbell#define S_00000D_FORCE_CP(x) (((x) & 0x1) << 16) 309254885Sdumbbell#define G_00000D_FORCE_CP(x) (((x) >> 16) & 0x1) 310254885Sdumbbell#define C_00000D_FORCE_CP 0xFFFEFFFF 311254885Sdumbbell#define S_00000D_FORCE_HDP(x) (((x) & 0x1) << 17) 312254885Sdumbbell#define G_00000D_FORCE_HDP(x) (((x) >> 17) & 0x1) 313254885Sdumbbell#define C_00000D_FORCE_HDP 0xFFFDFFFF 314254885Sdumbbell#define S_00000D_FORCE_DISP1(x) (((x) & 0x1) << 18) 315254885Sdumbbell#define G_00000D_FORCE_DISP1(x) (((x) >> 18) & 0x1) 316254885Sdumbbell#define C_00000D_FORCE_DISP1 0xFFFBFFFF 317254885Sdumbbell#define S_00000D_FORCE_TOP(x) (((x) & 0x1) << 19) 318254885Sdumbbell#define G_00000D_FORCE_TOP(x) (((x) >> 19) & 0x1) 319254885Sdumbbell#define C_00000D_FORCE_TOP 0xFFF7FFFF 320254885Sdumbbell#define S_00000D_FORCE_E2(x) (((x) & 0x1) << 20) 321254885Sdumbbell#define G_00000D_FORCE_E2(x) (((x) >> 20) & 0x1) 322254885Sdumbbell#define C_00000D_FORCE_E2 0xFFEFFFFF 323254885Sdumbbell#define S_00000D_FORCE_SE(x) (((x) & 0x1) << 21) 324254885Sdumbbell#define G_00000D_FORCE_SE(x) (((x) >> 21) & 0x1) 325254885Sdumbbell#define C_00000D_FORCE_SE 0xFFDFFFFF 326254885Sdumbbell#define S_00000D_FORCE_IDCT(x) (((x) & 0x1) << 22) 327254885Sdumbbell#define G_00000D_FORCE_IDCT(x) (((x) >> 22) & 0x1) 328254885Sdumbbell#define C_00000D_FORCE_IDCT 0xFFBFFFFF 329254885Sdumbbell#define S_00000D_FORCE_VIP(x) (((x) & 0x1) << 23) 330254885Sdumbbell#define G_00000D_FORCE_VIP(x) (((x) >> 23) & 0x1) 331254885Sdumbbell#define C_00000D_FORCE_VIP 0xFF7FFFFF 332254885Sdumbbell#define S_00000D_FORCE_RE(x) (((x) & 0x1) << 24) 333254885Sdumbbell#define G_00000D_FORCE_RE(x) (((x) >> 24) & 0x1) 334254885Sdumbbell#define C_00000D_FORCE_RE 0xFEFFFFFF 335254885Sdumbbell#define S_00000D_FORCE_PB(x) (((x) & 0x1) << 25) 336254885Sdumbbell#define G_00000D_FORCE_PB(x) (((x) >> 25) & 0x1) 337254885Sdumbbell#define C_00000D_FORCE_PB 0xFDFFFFFF 338254885Sdumbbell#define S_00000D_FORCE_TAM(x) (((x) & 0x1) << 26) 339254885Sdumbbell#define G_00000D_FORCE_TAM(x) (((x) >> 26) & 0x1) 340254885Sdumbbell#define C_00000D_FORCE_TAM 0xFBFFFFFF 341254885Sdumbbell#define S_00000D_FORCE_TDM(x) (((x) & 0x1) << 27) 342254885Sdumbbell#define G_00000D_FORCE_TDM(x) (((x) >> 27) & 0x1) 343254885Sdumbbell#define C_00000D_FORCE_TDM 0xF7FFFFFF 344254885Sdumbbell#define S_00000D_FORCE_RB(x) (((x) & 0x1) << 28) 345254885Sdumbbell#define G_00000D_FORCE_RB(x) (((x) >> 28) & 0x1) 346254885Sdumbbell#define C_00000D_FORCE_RB 0xEFFFFFFF 347254885Sdumbbell#define S_00000D_FORCE_TV_SCLK(x) (((x) & 0x1) << 29) 348254885Sdumbbell#define G_00000D_FORCE_TV_SCLK(x) (((x) >> 29) & 0x1) 349254885Sdumbbell#define C_00000D_FORCE_TV_SCLK 0xDFFFFFFF 350254885Sdumbbell#define S_00000D_FORCE_SUBPIC(x) (((x) & 0x1) << 30) 351254885Sdumbbell#define G_00000D_FORCE_SUBPIC(x) (((x) >> 30) & 0x1) 352254885Sdumbbell#define C_00000D_FORCE_SUBPIC 0xBFFFFFFF 353254885Sdumbbell#define S_00000D_FORCE_OV0(x) (((x) & 0x1) << 31) 354254885Sdumbbell#define G_00000D_FORCE_OV0(x) (((x) >> 31) & 0x1) 355254885Sdumbbell#define C_00000D_FORCE_OV0 0x7FFFFFFF 356254885Sdumbbell 357254885Sdumbbell#endif 358