1254885Sdumbbell/* 2254885Sdumbbell * Copyright 2010 Advanced Micro Devices, Inc. 3254885Sdumbbell * 4254885Sdumbbell * Permission is hereby granted, free of charge, to any person obtaining a 5254885Sdumbbell * copy of this software and associated documentation files (the "Software"), 6254885Sdumbbell * to deal in the Software without restriction, including without limitation 7254885Sdumbbell * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8254885Sdumbbell * and/or sell copies of the Software, and to permit persons to whom the 9254885Sdumbbell * Software is furnished to do so, subject to the following conditions: 10254885Sdumbbell * 11254885Sdumbbell * The above copyright notice and this permission notice (including the next 12254885Sdumbbell * paragraph) shall be included in all copies or substantial portions of the 13254885Sdumbbell * Software. 14254885Sdumbbell * 15254885Sdumbbell * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16254885Sdumbbell * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17254885Sdumbbell * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18254885Sdumbbell * THE COPYRIGHT HOLDER(S) AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 19254885Sdumbbell * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 20254885Sdumbbell * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 21254885Sdumbbell * DEALINGS IN THE SOFTWARE. 22254885Sdumbbell * 23254885Sdumbbell * Authors: 24254885Sdumbbell * Alex Deucher <alexander.deucher@amd.com> 25254885Sdumbbell */ 26254885Sdumbbell 27254885Sdumbbell#include <sys/cdefs.h> 28254885Sdumbbell__FBSDID("$FreeBSD$"); 29254885Sdumbbell 30254885Sdumbbell#include <dev/drm2/drmP.h> 31254885Sdumbbell 32254885Sdumbbell/* 33254885Sdumbbell * evergreen cards need to use the 3D engine to blit data which requires 34254885Sdumbbell * quite a bit of hw state setup. Rather than pull the whole 3D driver 35254885Sdumbbell * (which normally generates the 3D state) into the DRM, we opt to use 36254885Sdumbbell * statically generated state tables. The regsiter state and shaders 37254885Sdumbbell * were hand generated to support blitting functionality. See the 3D 38254885Sdumbbell * driver or documentation for descriptions of the registers and 39254885Sdumbbell * shader instructions. 40254885Sdumbbell */ 41254885Sdumbbell 42254885Sdumbbellconst u32 evergreen_default_state[] = 43254885Sdumbbell{ 44254885Sdumbbell 0xc0016900, 45254885Sdumbbell 0x0000023b, 46254885Sdumbbell 0x00000000, /* SQ_LDS_ALLOC_PS */ 47254885Sdumbbell 48254885Sdumbbell 0xc0066900, 49254885Sdumbbell 0x00000240, 50254885Sdumbbell 0x00000000, /* SQ_ESGS_RING_ITEMSIZE */ 51254885Sdumbbell 0x00000000, 52254885Sdumbbell 0x00000000, 53254885Sdumbbell 0x00000000, 54254885Sdumbbell 0x00000000, 55254885Sdumbbell 0x00000000, 56254885Sdumbbell 57254885Sdumbbell 0xc0046900, 58254885Sdumbbell 0x00000247, 59254885Sdumbbell 0x00000000, /* SQ_GS_VERT_ITEMSIZE */ 60254885Sdumbbell 0x00000000, 61254885Sdumbbell 0x00000000, 62254885Sdumbbell 0x00000000, 63254885Sdumbbell 64254885Sdumbbell 0xc0026900, 65254885Sdumbbell 0x00000010, 66254885Sdumbbell 0x00000000, /* DB_Z_INFO */ 67254885Sdumbbell 0x00000000, /* DB_STENCIL_INFO */ 68254885Sdumbbell 69254885Sdumbbell 0xc0016900, 70254885Sdumbbell 0x00000200, 71254885Sdumbbell 0x00000000, /* DB_DEPTH_CONTROL */ 72254885Sdumbbell 73254885Sdumbbell 0xc0066900, 74254885Sdumbbell 0x00000000, 75254885Sdumbbell 0x00000060, /* DB_RENDER_CONTROL */ 76254885Sdumbbell 0x00000000, /* DB_COUNT_CONTROL */ 77254885Sdumbbell 0x00000000, /* DB_DEPTH_VIEW */ 78254885Sdumbbell 0x0000002a, /* DB_RENDER_OVERRIDE */ 79254885Sdumbbell 0x00000000, /* DB_RENDER_OVERRIDE2 */ 80254885Sdumbbell 0x00000000, /* DB_HTILE_DATA_BASE */ 81254885Sdumbbell 82254885Sdumbbell 0xc0026900, 83254885Sdumbbell 0x0000000a, 84254885Sdumbbell 0x00000000, /* DB_STENCIL_CLEAR */ 85254885Sdumbbell 0x00000000, /* DB_DEPTH_CLEAR */ 86254885Sdumbbell 87254885Sdumbbell 0xc0016900, 88254885Sdumbbell 0x000002dc, 89254885Sdumbbell 0x0000aa00, /* DB_ALPHA_TO_MASK */ 90254885Sdumbbell 91254885Sdumbbell 0xc0016900, 92254885Sdumbbell 0x00000080, 93254885Sdumbbell 0x00000000, /* PA_SC_WINDOW_OFFSET */ 94254885Sdumbbell 95254885Sdumbbell 0xc00d6900, 96254885Sdumbbell 0x00000083, 97254885Sdumbbell 0x0000ffff, /* PA_SC_CLIPRECT_RULE */ 98254885Sdumbbell 0x00000000, /* PA_SC_CLIPRECT_0_TL */ 99254885Sdumbbell 0x20002000, /* PA_SC_CLIPRECT_0_BR */ 100254885Sdumbbell 0x00000000, 101254885Sdumbbell 0x20002000, 102254885Sdumbbell 0x00000000, 103254885Sdumbbell 0x20002000, 104254885Sdumbbell 0x00000000, 105254885Sdumbbell 0x20002000, 106254885Sdumbbell 0xaaaaaaaa, /* PA_SC_EDGERULE */ 107254885Sdumbbell 0x00000000, /* PA_SU_HARDWARE_SCREEN_OFFSET */ 108254885Sdumbbell 0x0000000f, /* CB_TARGET_MASK */ 109254885Sdumbbell 0x0000000f, /* CB_SHADER_MASK */ 110254885Sdumbbell 111254885Sdumbbell 0xc0226900, 112254885Sdumbbell 0x00000094, 113254885Sdumbbell 0x80000000, /* PA_SC_VPORT_SCISSOR_0_TL */ 114254885Sdumbbell 0x20002000, /* PA_SC_VPORT_SCISSOR_0_BR */ 115254885Sdumbbell 0x80000000, 116254885Sdumbbell 0x20002000, 117254885Sdumbbell 0x80000000, 118254885Sdumbbell 0x20002000, 119254885Sdumbbell 0x80000000, 120254885Sdumbbell 0x20002000, 121254885Sdumbbell 0x80000000, 122254885Sdumbbell 0x20002000, 123254885Sdumbbell 0x80000000, 124254885Sdumbbell 0x20002000, 125254885Sdumbbell 0x80000000, 126254885Sdumbbell 0x20002000, 127254885Sdumbbell 0x80000000, 128254885Sdumbbell 0x20002000, 129254885Sdumbbell 0x80000000, 130254885Sdumbbell 0x20002000, 131254885Sdumbbell 0x80000000, 132254885Sdumbbell 0x20002000, 133254885Sdumbbell 0x80000000, 134254885Sdumbbell 0x20002000, 135254885Sdumbbell 0x80000000, 136254885Sdumbbell 0x20002000, 137254885Sdumbbell 0x80000000, 138254885Sdumbbell 0x20002000, 139254885Sdumbbell 0x80000000, 140254885Sdumbbell 0x20002000, 141254885Sdumbbell 0x80000000, 142254885Sdumbbell 0x20002000, 143254885Sdumbbell 0x80000000, 144254885Sdumbbell 0x20002000, 145254885Sdumbbell 0x00000000, /* PA_SC_VPORT_ZMIN_0 */ 146254885Sdumbbell 0x3f800000, /* PA_SC_VPORT_ZMAX_0 */ 147254885Sdumbbell 148254885Sdumbbell 0xc0016900, 149254885Sdumbbell 0x000000d4, 150254885Sdumbbell 0x00000000, /* SX_MISC */ 151254885Sdumbbell 152254885Sdumbbell 0xc0026900, 153254885Sdumbbell 0x00000292, 154254885Sdumbbell 0x00000000, /* PA_SC_MODE_CNTL_0 */ 155254885Sdumbbell 0x00000000, /* PA_SC_MODE_CNTL_1 */ 156254885Sdumbbell 157254885Sdumbbell 0xc0106900, 158254885Sdumbbell 0x00000300, 159254885Sdumbbell 0x00000000, /* PA_SC_LINE_CNTL */ 160254885Sdumbbell 0x00000000, /* PA_SC_AA_CONFIG */ 161254885Sdumbbell 0x00000005, /* PA_SU_VTX_CNTL */ 162254885Sdumbbell 0x3f800000, /* PA_CL_GB_VERT_CLIP_ADJ */ 163254885Sdumbbell 0x3f800000, /* PA_CL_GB_VERT_DISC_ADJ */ 164254885Sdumbbell 0x3f800000, /* PA_CL_GB_HORZ_CLIP_ADJ */ 165254885Sdumbbell 0x3f800000, /* PA_CL_GB_HORZ_DISC_ADJ */ 166254885Sdumbbell 0x00000000, /* PA_SC_AA_SAMPLE_LOCS_0 */ 167254885Sdumbbell 0x00000000, /* */ 168254885Sdumbbell 0x00000000, /* */ 169254885Sdumbbell 0x00000000, /* */ 170254885Sdumbbell 0x00000000, /* */ 171254885Sdumbbell 0x00000000, /* */ 172254885Sdumbbell 0x00000000, /* */ 173254885Sdumbbell 0x00000000, /* PA_SC_AA_SAMPLE_LOCS_7 */ 174254885Sdumbbell 0xffffffff, /* PA_SC_AA_MASK */ 175254885Sdumbbell 176254885Sdumbbell 0xc00d6900, 177254885Sdumbbell 0x00000202, 178254885Sdumbbell 0x00cc0010, /* CB_COLOR_CONTROL */ 179254885Sdumbbell 0x00000210, /* DB_SHADER_CONTROL */ 180254885Sdumbbell 0x00010000, /* PA_CL_CLIP_CNTL */ 181254885Sdumbbell 0x00000004, /* PA_SU_SC_MODE_CNTL */ 182254885Sdumbbell 0x00000100, /* PA_CL_VTE_CNTL */ 183254885Sdumbbell 0x00000000, /* PA_CL_VS_OUT_CNTL */ 184254885Sdumbbell 0x00000000, /* PA_CL_NANINF_CNTL */ 185254885Sdumbbell 0x00000000, /* PA_SU_LINE_STIPPLE_CNTL */ 186254885Sdumbbell 0x00000000, /* PA_SU_LINE_STIPPLE_SCALE */ 187254885Sdumbbell 0x00000000, /* PA_SU_PRIM_FILTER_CNTL */ 188254885Sdumbbell 0x00000000, /* */ 189254885Sdumbbell 0x00000000, /* */ 190254885Sdumbbell 0x00000000, /* SQ_DYN_GPR_RESOURCE_LIMIT_1 */ 191254885Sdumbbell 192254885Sdumbbell 0xc0066900, 193254885Sdumbbell 0x000002de, 194254885Sdumbbell 0x00000000, /* PA_SU_POLY_OFFSET_DB_FMT_CNTL */ 195254885Sdumbbell 0x00000000, /* */ 196254885Sdumbbell 0x00000000, /* */ 197254885Sdumbbell 0x00000000, /* */ 198254885Sdumbbell 0x00000000, /* */ 199254885Sdumbbell 0x00000000, /* */ 200254885Sdumbbell 201254885Sdumbbell 0xc0016900, 202254885Sdumbbell 0x00000229, 203254885Sdumbbell 0x00000000, /* SQ_PGM_START_FS */ 204254885Sdumbbell 205254885Sdumbbell 0xc0016900, 206254885Sdumbbell 0x0000022a, 207254885Sdumbbell 0x00000000, /* SQ_PGM_RESOURCES_FS */ 208254885Sdumbbell 209254885Sdumbbell 0xc0096900, 210254885Sdumbbell 0x00000100, 211254885Sdumbbell 0x00ffffff, /* VGT_MAX_VTX_INDX */ 212254885Sdumbbell 0x00000000, /* */ 213254885Sdumbbell 0x00000000, /* */ 214254885Sdumbbell 0x00000000, /* */ 215254885Sdumbbell 0x00000000, /* SX_ALPHA_TEST_CONTROL */ 216254885Sdumbbell 0x00000000, /* CB_BLEND_RED */ 217254885Sdumbbell 0x00000000, /* CB_BLEND_GREEN */ 218254885Sdumbbell 0x00000000, /* CB_BLEND_BLUE */ 219254885Sdumbbell 0x00000000, /* CB_BLEND_ALPHA */ 220254885Sdumbbell 221254885Sdumbbell 0xc0026900, 222254885Sdumbbell 0x000002a8, 223254885Sdumbbell 0x00000000, /* VGT_INSTANCE_STEP_RATE_0 */ 224254885Sdumbbell 0x00000000, /* */ 225254885Sdumbbell 226254885Sdumbbell 0xc0026900, 227254885Sdumbbell 0x000002ad, 228254885Sdumbbell 0x00000000, /* VGT_REUSE_OFF */ 229254885Sdumbbell 0x00000000, /* */ 230254885Sdumbbell 231254885Sdumbbell 0xc0116900, 232254885Sdumbbell 0x00000280, 233254885Sdumbbell 0x00000000, /* PA_SU_POINT_SIZE */ 234254885Sdumbbell 0x00000000, /* PA_SU_POINT_MINMAX */ 235254885Sdumbbell 0x00000008, /* PA_SU_LINE_CNTL */ 236254885Sdumbbell 0x00000000, /* PA_SC_LINE_STIPPLE */ 237254885Sdumbbell 0x00000000, /* VGT_OUTPUT_PATH_CNTL */ 238254885Sdumbbell 0x00000000, /* VGT_HOS_CNTL */ 239254885Sdumbbell 0x00000000, /* */ 240254885Sdumbbell 0x00000000, /* */ 241254885Sdumbbell 0x00000000, /* */ 242254885Sdumbbell 0x00000000, /* */ 243254885Sdumbbell 0x00000000, /* */ 244254885Sdumbbell 0x00000000, /* */ 245254885Sdumbbell 0x00000000, /* */ 246254885Sdumbbell 0x00000000, /* */ 247254885Sdumbbell 0x00000000, /* */ 248254885Sdumbbell 0x00000000, /* */ 249254885Sdumbbell 0x00000000, /* VGT_GS_MODE */ 250254885Sdumbbell 251254885Sdumbbell 0xc0016900, 252254885Sdumbbell 0x000002a1, 253254885Sdumbbell 0x00000000, /* VGT_PRIMITIVEID_EN */ 254254885Sdumbbell 255254885Sdumbbell 0xc0016900, 256254885Sdumbbell 0x000002a5, 257254885Sdumbbell 0x00000000, /* VGT_MULTI_PRIM_IB_RESET_EN */ 258254885Sdumbbell 259254885Sdumbbell 0xc0016900, 260254885Sdumbbell 0x000002d5, 261254885Sdumbbell 0x00000000, /* VGT_SHADER_STAGES_EN */ 262254885Sdumbbell 263254885Sdumbbell 0xc0026900, 264254885Sdumbbell 0x000002e5, 265254885Sdumbbell 0x00000000, /* VGT_STRMOUT_CONFIG */ 266254885Sdumbbell 0x00000000, /* */ 267254885Sdumbbell 268254885Sdumbbell 0xc0016900, 269254885Sdumbbell 0x000001e0, 270254885Sdumbbell 0x00000000, /* CB_BLEND0_CONTROL */ 271254885Sdumbbell 272254885Sdumbbell 0xc0016900, 273254885Sdumbbell 0x000001b1, 274254885Sdumbbell 0x00000000, /* SPI_VS_OUT_CONFIG */ 275254885Sdumbbell 276254885Sdumbbell 0xc0016900, 277254885Sdumbbell 0x00000187, 278254885Sdumbbell 0x00000000, /* SPI_VS_OUT_ID_0 */ 279254885Sdumbbell 280254885Sdumbbell 0xc0016900, 281254885Sdumbbell 0x00000191, 282254885Sdumbbell 0x00000100, /* SPI_PS_INPUT_CNTL_0 */ 283254885Sdumbbell 284254885Sdumbbell 0xc00b6900, 285254885Sdumbbell 0x000001b3, 286254885Sdumbbell 0x20000001, /* SPI_PS_IN_CONTROL_0 */ 287254885Sdumbbell 0x00000000, /* SPI_PS_IN_CONTROL_1 */ 288254885Sdumbbell 0x00000000, /* SPI_INTERP_CONTROL_0 */ 289254885Sdumbbell 0x00000000, /* SPI_INPUT_Z */ 290254885Sdumbbell 0x00000000, /* SPI_FOG_CNTL */ 291254885Sdumbbell 0x00100000, /* SPI_BARYC_CNTL */ 292254885Sdumbbell 0x00000000, /* SPI_PS_IN_CONTROL_2 */ 293254885Sdumbbell 0x00000000, /* */ 294254885Sdumbbell 0x00000000, /* */ 295254885Sdumbbell 0x00000000, /* */ 296254885Sdumbbell 0x00000000, /* */ 297254885Sdumbbell 298254885Sdumbbell 0xc0026900, 299254885Sdumbbell 0x00000316, 300254885Sdumbbell 0x0000000e, /* VGT_VERTEX_REUSE_BLOCK_CNTL */ 301254885Sdumbbell 0x00000010, /* */ 302254885Sdumbbell}; 303254885Sdumbbell 304254885Sdumbbellconst u32 evergreen_vs[] = 305254885Sdumbbell{ 306254885Sdumbbell 0x00000004, 307254885Sdumbbell 0x80800400, 308254885Sdumbbell 0x0000a03c, 309254885Sdumbbell 0x95000688, 310254885Sdumbbell 0x00004000, 311254885Sdumbbell 0x15200688, 312254885Sdumbbell 0x00000000, 313254885Sdumbbell 0x00000000, 314254885Sdumbbell 0x3c000000, 315254885Sdumbbell 0x67961001, 316254885Sdumbbell#ifdef __BIG_ENDIAN 317254885Sdumbbell 0x000a0000, 318254885Sdumbbell#else 319254885Sdumbbell 0x00080000, 320254885Sdumbbell#endif 321254885Sdumbbell 0x00000000, 322254885Sdumbbell 0x1c000000, 323254885Sdumbbell 0x67961000, 324254885Sdumbbell#ifdef __BIG_ENDIAN 325254885Sdumbbell 0x00020008, 326254885Sdumbbell#else 327254885Sdumbbell 0x00000008, 328254885Sdumbbell#endif 329254885Sdumbbell 0x00000000, 330254885Sdumbbell}; 331254885Sdumbbell 332254885Sdumbbellconst u32 evergreen_ps[] = 333254885Sdumbbell{ 334254885Sdumbbell 0x00000003, 335254885Sdumbbell 0xa00c0000, 336254885Sdumbbell 0x00000008, 337254885Sdumbbell 0x80400000, 338254885Sdumbbell 0x00000000, 339254885Sdumbbell 0x95200688, 340254885Sdumbbell 0x00380400, 341254885Sdumbbell 0x00146b10, 342254885Sdumbbell 0x00380000, 343254885Sdumbbell 0x20146b10, 344254885Sdumbbell 0x00380400, 345254885Sdumbbell 0x40146b00, 346254885Sdumbbell 0x80380000, 347254885Sdumbbell 0x60146b00, 348254885Sdumbbell 0x00000000, 349254885Sdumbbell 0x00000000, 350254885Sdumbbell 0x00000010, 351254885Sdumbbell 0x000d1000, 352254885Sdumbbell 0xb0800000, 353254885Sdumbbell 0x00000000, 354254885Sdumbbell}; 355254885Sdumbbell 356254885Sdumbbellconst u32 evergreen_ps_size = DRM_ARRAY_SIZE(evergreen_ps); 357254885Sdumbbellconst u32 evergreen_vs_size = DRM_ARRAY_SIZE(evergreen_vs); 358254885Sdumbbellconst u32 evergreen_default_size = DRM_ARRAY_SIZE(evergreen_default_state); 359