1235783Skib/*
2235783Skib * Copyright 2006 Dave Airlie <airlied@linux.ie>
3235783Skib * Copyright �� 2006-2007 Intel Corporation
4235783Skib *   Jesse Barnes <jesse.barnes@intel.com>
5235783Skib *
6235783Skib * Permission is hereby granted, free of charge, to any person obtaining a
7235783Skib * copy of this software and associated documentation files (the "Software"),
8235783Skib * to deal in the Software without restriction, including without limitation
9235783Skib * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10235783Skib * and/or sell copies of the Software, and to permit persons to whom the
11235783Skib * Software is furnished to do so, subject to the following conditions:
12235783Skib *
13235783Skib * The above copyright notice and this permission notice (including the next
14235783Skib * paragraph) shall be included in all copies or substantial portions of the
15235783Skib * Software.
16235783Skib *
17235783Skib * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18235783Skib * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19235783Skib * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
20235783Skib * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21235783Skib * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22235783Skib * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23235783Skib * DEALINGS IN THE SOFTWARE.
24235783Skib *
25235783Skib * Authors:
26235783Skib *	Eric Anholt <eric@anholt.net>
27235783Skib */
28235783Skib
29235783Skib#include <sys/cdefs.h>
30235783Skib__FBSDID("$FreeBSD$");
31235783Skib
32235783Skib#include <dev/drm2/drmP.h>
33235783Skib#include <dev/drm2/drm.h>
34235783Skib#include <dev/drm2/drm_crtc.h>
35235783Skib#include <dev/drm2/drm_edid.h>
36235783Skib#include <dev/drm2/i915/i915_drm.h>
37235783Skib#include <dev/drm2/i915/i915_drv.h>
38235783Skib#include <dev/drm2/i915/intel_sdvo_regs.h>
39235783Skib#include <dev/drm2/i915/intel_drv.h>
40235783Skib#include <dev/iicbus/iic.h>
41235783Skib#include <dev/iicbus/iiconf.h>
42235783Skib#include "iicbus_if.h"
43235783Skib
44235783Skib#define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
45235783Skib#define SDVO_RGB_MASK  (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
46235783Skib#define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
47235783Skib#define SDVO_TV_MASK   (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0)
48235783Skib
49235783Skib#define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
50235783Skib			SDVO_TV_MASK)
51235783Skib
52235783Skib#define IS_TV(c)	(c->output_flag & SDVO_TV_MASK)
53235783Skib#define IS_TMDS(c)	(c->output_flag & SDVO_TMDS_MASK)
54235783Skib#define IS_LVDS(c)	(c->output_flag & SDVO_LVDS_MASK)
55235783Skib#define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
56235783Skib#define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK))
57235783Skib
58235783Skib
59235783Skibstatic const char *tv_format_names[] = {
60235783Skib	"NTSC_M"   , "NTSC_J"  , "NTSC_443",
61235783Skib	"PAL_B"    , "PAL_D"   , "PAL_G"   ,
62235783Skib	"PAL_H"    , "PAL_I"   , "PAL_M"   ,
63235783Skib	"PAL_N"    , "PAL_NC"  , "PAL_60"  ,
64235783Skib	"SECAM_B"  , "SECAM_D" , "SECAM_G" ,
65235783Skib	"SECAM_K"  , "SECAM_K1", "SECAM_L" ,
66235783Skib	"SECAM_60"
67235783Skib};
68235783Skib
69235783Skib#define TV_FORMAT_NUM  (sizeof(tv_format_names) / sizeof(*tv_format_names))
70235783Skib
71235783Skibstruct intel_sdvo {
72235783Skib	struct intel_encoder base;
73235783Skib
74235783Skib	device_t i2c;
75235783Skib	u8 slave_addr;
76235783Skib
77235783Skib	device_t ddc_iic_bus, ddc;
78235783Skib
79235783Skib	/* Register for the SDVO device: SDVOB or SDVOC */
80235783Skib	int sdvo_reg;
81235783Skib
82235783Skib	/* Active outputs controlled by this SDVO output */
83235783Skib	uint16_t controlled_output;
84235783Skib
85235783Skib	/*
86235783Skib	 * Capabilities of the SDVO device returned by
87235783Skib	 * i830_sdvo_get_capabilities()
88235783Skib	 */
89235783Skib	struct intel_sdvo_caps caps;
90235783Skib
91235783Skib	/* Pixel clock limitations reported by the SDVO device, in kHz */
92235783Skib	int pixel_clock_min, pixel_clock_max;
93235783Skib
94235783Skib	/*
95235783Skib	* For multiple function SDVO device,
96235783Skib	* this is for current attached outputs.
97235783Skib	*/
98235783Skib	uint16_t attached_output;
99235783Skib
100235783Skib	/*
101235783Skib	 * Hotplug activation bits for this device
102235783Skib	 */
103235783Skib	uint8_t hotplug_active[2];
104235783Skib
105235783Skib	/**
106235783Skib	 * This is used to select the color range of RBG outputs in HDMI mode.
107235783Skib	 * It is only valid when using TMDS encoding and 8 bit per color mode.
108235783Skib	 */
109235783Skib	uint32_t color_range;
110235783Skib
111235783Skib	/**
112235783Skib	 * This is set if we're going to treat the device as TV-out.
113235783Skib	 *
114235783Skib	 * While we have these nice friendly flags for output types that ought
115235783Skib	 * to decide this for us, the S-Video output on our HDMI+S-Video card
116235783Skib	 * shows up as RGB1 (VGA).
117235783Skib	 */
118235783Skib	bool is_tv;
119235783Skib
120235783Skib	/* This is for current tv format name */
121235783Skib	int tv_format_index;
122235783Skib
123235783Skib	/**
124235783Skib	 * This is set if we treat the device as HDMI, instead of DVI.
125235783Skib	 */
126235783Skib	bool is_hdmi;
127235783Skib	bool has_hdmi_monitor;
128235783Skib	bool has_hdmi_audio;
129235783Skib
130235783Skib	/**
131235783Skib	 * This is set if we detect output of sdvo device as LVDS and
132235783Skib	 * have a valid fixed mode to use with the panel.
133235783Skib	 */
134235783Skib	bool is_lvds;
135235783Skib
136235783Skib	/**
137235783Skib	 * This is sdvo fixed pannel mode pointer
138235783Skib	 */
139235783Skib	struct drm_display_mode *sdvo_lvds_fixed_mode;
140235783Skib
141235783Skib	/* DDC bus used by this SDVO encoder */
142235783Skib	uint8_t ddc_bus;
143235783Skib
144235783Skib	/* Input timings for adjusted_mode */
145235783Skib	struct intel_sdvo_dtd input_dtd;
146235783Skib};
147235783Skib
148235783Skibstruct intel_sdvo_connector {
149235783Skib	struct intel_connector base;
150235783Skib
151235783Skib	/* Mark the type of connector */
152235783Skib	uint16_t output_flag;
153235783Skib
154235783Skib	enum hdmi_force_audio force_audio;
155235783Skib
156235783Skib	/* This contains all current supported TV format */
157235783Skib	u8 tv_format_supported[TV_FORMAT_NUM];
158235783Skib	int   format_supported_num;
159235783Skib	struct drm_property *tv_format;
160235783Skib
161235783Skib	/* add the property for the SDVO-TV */
162235783Skib	struct drm_property *left;
163235783Skib	struct drm_property *right;
164235783Skib	struct drm_property *top;
165235783Skib	struct drm_property *bottom;
166235783Skib	struct drm_property *hpos;
167235783Skib	struct drm_property *vpos;
168235783Skib	struct drm_property *contrast;
169235783Skib	struct drm_property *saturation;
170235783Skib	struct drm_property *hue;
171235783Skib	struct drm_property *sharpness;
172235783Skib	struct drm_property *flicker_filter;
173235783Skib	struct drm_property *flicker_filter_adaptive;
174235783Skib	struct drm_property *flicker_filter_2d;
175235783Skib	struct drm_property *tv_chroma_filter;
176235783Skib	struct drm_property *tv_luma_filter;
177235783Skib	struct drm_property *dot_crawl;
178235783Skib
179235783Skib	/* add the property for the SDVO-TV/LVDS */
180235783Skib	struct drm_property *brightness;
181235783Skib
182235783Skib	/* Add variable to record current setting for the above property */
183235783Skib	u32	left_margin, right_margin, top_margin, bottom_margin;
184235783Skib
185235783Skib	/* this is to get the range of margin.*/
186235783Skib	u32	max_hscan,  max_vscan;
187235783Skib	u32	max_hpos, cur_hpos;
188235783Skib	u32	max_vpos, cur_vpos;
189235783Skib	u32	cur_brightness, max_brightness;
190235783Skib	u32	cur_contrast,	max_contrast;
191235783Skib	u32	cur_saturation, max_saturation;
192235783Skib	u32	cur_hue,	max_hue;
193235783Skib	u32	cur_sharpness,	max_sharpness;
194235783Skib	u32	cur_flicker_filter,		max_flicker_filter;
195235783Skib	u32	cur_flicker_filter_adaptive,	max_flicker_filter_adaptive;
196235783Skib	u32	cur_flicker_filter_2d,		max_flicker_filter_2d;
197235783Skib	u32	cur_tv_chroma_filter,	max_tv_chroma_filter;
198235783Skib	u32	cur_tv_luma_filter,	max_tv_luma_filter;
199235783Skib	u32	cur_dot_crawl,	max_dot_crawl;
200235783Skib};
201235783Skib
202235783Skibstatic struct intel_sdvo *to_intel_sdvo(struct drm_encoder *encoder)
203235783Skib{
204235783Skib	return container_of(encoder, struct intel_sdvo, base.base);
205235783Skib}
206235783Skib
207235783Skibstatic struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
208235783Skib{
209235783Skib	return container_of(intel_attached_encoder(connector),
210235783Skib			    struct intel_sdvo, base);
211235783Skib}
212235783Skib
213235783Skibstatic struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector)
214235783Skib{
215235783Skib	return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base);
216235783Skib}
217235783Skib
218235783Skibstatic bool
219235783Skibintel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
220235783Skibstatic bool
221235783Skibintel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
222235783Skib			      struct intel_sdvo_connector *intel_sdvo_connector,
223235783Skib			      int type);
224235783Skibstatic bool
225235783Skibintel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
226235783Skib				   struct intel_sdvo_connector *intel_sdvo_connector);
227235783Skib
228235783Skib/**
229235783Skib * Writes the SDVOB or SDVOC with the given value, but always writes both
230235783Skib * SDVOB and SDVOC to work around apparent hardware issues (according to
231235783Skib * comments in the BIOS).
232235783Skib */
233235783Skibstatic void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
234235783Skib{
235235783Skib	struct drm_device *dev = intel_sdvo->base.base.dev;
236235783Skib	struct drm_i915_private *dev_priv = dev->dev_private;
237235783Skib	u32 bval = val, cval = val;
238235783Skib	int i;
239235783Skib
240235783Skib	if (intel_sdvo->sdvo_reg == PCH_SDVOB) {
241235783Skib		I915_WRITE(intel_sdvo->sdvo_reg, val);
242235783Skib		I915_READ(intel_sdvo->sdvo_reg);
243235783Skib		return;
244235783Skib	}
245235783Skib
246235783Skib	if (intel_sdvo->sdvo_reg == SDVOB) {
247235783Skib		cval = I915_READ(SDVOC);
248235783Skib	} else {
249235783Skib		bval = I915_READ(SDVOB);
250235783Skib	}
251235783Skib	/*
252235783Skib	 * Write the registers twice for luck. Sometimes,
253235783Skib	 * writing them only once doesn't appear to 'stick'.
254235783Skib	 * The BIOS does this too. Yay, magic
255235783Skib	 */
256235783Skib	for (i = 0; i < 2; i++)
257235783Skib	{
258235783Skib		I915_WRITE(SDVOB, bval);
259235783Skib		I915_READ(SDVOB);
260235783Skib		I915_WRITE(SDVOC, cval);
261235783Skib		I915_READ(SDVOC);
262235783Skib	}
263235783Skib}
264235783Skib
265235783Skibstatic bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
266235783Skib{
267235783Skib	struct iic_msg msgs[] = {
268235783Skib		{
269249041Sdumbbell			.slave = intel_sdvo->slave_addr << 1,
270235783Skib			.flags = 0,
271235783Skib			.len = 1,
272235783Skib			.buf = &addr,
273235783Skib		},
274235783Skib		{
275249041Sdumbbell			.slave = intel_sdvo->slave_addr << 1,
276235783Skib			.flags = IIC_M_RD,
277235783Skib			.len = 1,
278235783Skib			.buf = ch,
279235783Skib		}
280235783Skib	};
281235783Skib	int ret;
282235783Skib
283235783Skib	if ((ret = iicbus_transfer(intel_sdvo->i2c, msgs, 2)) == 0)
284235783Skib		return true;
285235783Skib
286235783Skib	DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
287235783Skib	return false;
288235783Skib}
289235783Skib
290235783Skib#define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
291235783Skib/** Mapping of command numbers to names, for debug output */
292235783Skibstatic const struct _sdvo_cmd_name {
293235783Skib	u8 cmd;
294235783Skib	const char *name;
295235783Skib} sdvo_cmd_names[] = {
296235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
297235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
298235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
299235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
300235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
301235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
302235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
303235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
304235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
305235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
306235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
307235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
308235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
309235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
310235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
311235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
312235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
313235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
314235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
315235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
316235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
317235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
318235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
319235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
320235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
321235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
322235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
323235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
324235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
325235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
326235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
327235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
328235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
329235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
330235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
331235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
332235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
333235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
334235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
335235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
336235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
337235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
338235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
339235783Skib
340235783Skib	/* Add the op code for SDVO enhancements */
341235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
342235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
343235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
344235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
345235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
346235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
347235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
348235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
349235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
350235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
351235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
352235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
353235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
354235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
355235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
356235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
357235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
358235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
359235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
360235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
361235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
362235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
363235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
364235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
365235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
366235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
367235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
368235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
369235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
370235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
371235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
372235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
373235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
374235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
375235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
376235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
377235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
378235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
379235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
380235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
381235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
382235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
383235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
384235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
385235783Skib
386235783Skib	/* HDMI op code */
387235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
388235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
389235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
390235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
391235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
392235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
393235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
394235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
395235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
396235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
397235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
398235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
399235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
400235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
401235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
402235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
403235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
404235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
405235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
406235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
407235783Skib};
408235783Skib
409235783Skib#define IS_SDVOB(reg)	(reg == SDVOB || reg == PCH_SDVOB)
410235783Skib#define SDVO_NAME(svdo) (IS_SDVOB((svdo)->sdvo_reg) ? "SDVOB" : "SDVOC")
411235783Skib
412235783Skibstatic void
413235783Skibintel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
414235783Skib    const void *args, int args_len)
415235783Skib{
416235783Skib	int i;
417235783Skib
418235783Skib	if ((drm_debug_flag & DRM_DEBUGBITS_KMS) == 0)
419235783Skib		return;
420235783Skib	DRM_DEBUG_KMS("%s: W: %02X ", SDVO_NAME(intel_sdvo), cmd);
421235783Skib	for (i = 0; i < args_len; i++)
422235783Skib		printf("%02X ", ((const u8 *)args)[i]);
423235783Skib	for (; i < 8; i++)
424235783Skib		printf("   ");
425235783Skib	for (i = 0; i < DRM_ARRAY_SIZE(sdvo_cmd_names); i++) {
426235783Skib		if (cmd == sdvo_cmd_names[i].cmd) {
427235783Skib			printf("(%s)", sdvo_cmd_names[i].name);
428235783Skib			break;
429235783Skib		}
430235783Skib	}
431235783Skib	if (i == DRM_ARRAY_SIZE(sdvo_cmd_names))
432235783Skib		printf("(%02X)", cmd);
433235783Skib	printf("\n");
434235783Skib}
435235783Skib
436235783Skibstatic const char *cmd_status_names[] = {
437235783Skib	"Power on",
438235783Skib	"Success",
439235783Skib	"Not supported",
440235783Skib	"Invalid arg",
441235783Skib	"Pending",
442235783Skib	"Target not specified",
443235783Skib	"Scaling not supported"
444235783Skib};
445235783Skib
446235783Skibstatic bool
447235783Skibintel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd, const void *args,
448235783Skib    int args_len)
449235783Skib{
450235783Skib	u8 buf[args_len*2 + 2], status;
451235783Skib	struct iic_msg msgs[args_len + 3];
452235783Skib	int i, ret;
453235783Skib
454235783Skib	intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
455235783Skib
456235783Skib	for (i = 0; i < args_len; i++) {
457249041Sdumbbell		msgs[i].slave = intel_sdvo->slave_addr << 1;
458235783Skib		msgs[i].flags = 0;
459235783Skib		msgs[i].len = 2;
460235783Skib		msgs[i].buf = buf + 2 *i;
461235783Skib		buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
462235783Skib		buf[2*i + 1] = ((const u8*)args)[i];
463235783Skib	}
464249041Sdumbbell	msgs[i].slave = intel_sdvo->slave_addr << 1;
465235783Skib	msgs[i].flags = 0;
466235783Skib	msgs[i].len = 2;
467235783Skib	msgs[i].buf = buf + 2*i;
468235783Skib	buf[2*i + 0] = SDVO_I2C_OPCODE;
469235783Skib	buf[2*i + 1] = cmd;
470235783Skib
471235783Skib	/* the following two are to read the response */
472235783Skib	status = SDVO_I2C_CMD_STATUS;
473249041Sdumbbell	msgs[i+1].slave = intel_sdvo->slave_addr << 1;
474235783Skib	msgs[i+1].flags = 0;
475235783Skib	msgs[i+1].len = 1;
476235783Skib	msgs[i+1].buf = &status;
477235783Skib
478249041Sdumbbell	msgs[i+2].slave = intel_sdvo->slave_addr << 1;
479235783Skib	msgs[i+2].flags = IIC_M_RD;
480235783Skib	msgs[i+2].len = 1;
481235783Skib	msgs[i+2].buf = &status;
482235783Skib
483235783Skib	ret = iicbus_transfer(intel_sdvo->i2c, msgs, i+3);
484235783Skib	if (ret != 0) {
485235783Skib		DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
486235783Skib		return (false);
487235783Skib	}
488235783Skib#if 0
489235783Skib	if (ret != i+3) {
490235783Skib		/* failure in I2C transfer */
491235783Skib		DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
492235783Skib		return false;
493235783Skib	}
494235783Skib#endif
495235783Skib
496235783Skib	return true;
497235783Skib}
498235783Skib
499235783Skibstatic bool
500235783Skibintel_sdvo_read_response(struct intel_sdvo *intel_sdvo, void *response,
501235783Skib    int response_len)
502235783Skib{
503235783Skib	u8 retry = 5;
504235783Skib	u8 status;
505235783Skib	int i;
506235783Skib
507235783Skib	DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo));
508235783Skib
509235783Skib	/*
510235783Skib	 * The documentation states that all commands will be
511235783Skib	 * processed within 15��s, and that we need only poll
512235783Skib	 * the status byte a maximum of 3 times in order for the
513235783Skib	 * command to be complete.
514235783Skib	 *
515235783Skib	 * Check 5 times in case the hardware failed to read the docs.
516235783Skib	 */
517235783Skib	if (!intel_sdvo_read_byte(intel_sdvo, SDVO_I2C_CMD_STATUS, &status))
518235783Skib		goto log_fail;
519235783Skib
520235783Skib	while (status == SDVO_CMD_STATUS_PENDING && retry--) {
521235783Skib		DELAY(15);
522235783Skib		if (!intel_sdvo_read_byte(intel_sdvo,
523235783Skib		    SDVO_I2C_CMD_STATUS, &status))
524235783Skib			goto log_fail;
525235783Skib	}
526235783Skib
527235783Skib	if ((drm_debug_flag & DRM_DEBUGBITS_KMS) != 0) {
528235783Skib		if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
529235783Skib			printf("(%s)", cmd_status_names[status]);
530235783Skib		else
531235783Skib			printf("(??? %d)", status);
532235783Skib	}
533235783Skib
534235783Skib	if (status != SDVO_CMD_STATUS_SUCCESS)
535235783Skib		goto log_fail;
536235783Skib
537235783Skib	/* Read the command response */
538235783Skib	for (i = 0; i < response_len; i++) {
539235783Skib		if (!intel_sdvo_read_byte(intel_sdvo,
540235783Skib					  SDVO_I2C_RETURN_0 + i,
541235783Skib					  &((u8 *)response)[i]))
542235783Skib			goto log_fail;
543235783Skib		if ((drm_debug_flag & DRM_DEBUGBITS_KMS) != 0)
544235783Skib			printf(" %02X", ((u8 *)response)[i]);
545235783Skib	}
546235783Skib	if ((drm_debug_flag & DRM_DEBUGBITS_KMS) != 0)
547235783Skib		printf("\n");
548235783Skib	return (true);
549235783Skib
550235783Skiblog_fail:
551235783Skib	if ((drm_debug_flag & DRM_DEBUGBITS_KMS) != 0)
552235783Skib		printf("... failed\n");
553235783Skib	return (false);
554235783Skib}
555235783Skib
556235783Skibstatic int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
557235783Skib{
558235783Skib	if (mode->clock >= 100000)
559235783Skib		return 1;
560235783Skib	else if (mode->clock >= 50000)
561235783Skib		return 2;
562235783Skib	else
563235783Skib		return 4;
564235783Skib}
565235783Skib
566235783Skibstatic bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
567235783Skib					      u8 ddc_bus)
568235783Skib{
569235783Skib	/* This must be the immediately preceding write before the i2c xfer */
570235783Skib	return intel_sdvo_write_cmd(intel_sdvo,
571235783Skib				    SDVO_CMD_SET_CONTROL_BUS_SWITCH,
572235783Skib				    &ddc_bus, 1);
573235783Skib}
574235783Skib
575235783Skibstatic bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
576235783Skib{
577235783Skib	if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
578235783Skib		return false;
579235783Skib
580235783Skib	return intel_sdvo_read_response(intel_sdvo, NULL, 0);
581235783Skib}
582235783Skib
583235783Skibstatic bool
584235783Skibintel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
585235783Skib{
586235783Skib	if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
587235783Skib		return false;
588235783Skib
589235783Skib	return intel_sdvo_read_response(intel_sdvo, value, len);
590235783Skib}
591235783Skib
592235783Skibstatic bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
593235783Skib{
594235783Skib	struct intel_sdvo_set_target_input_args targets = {0};
595235783Skib	return intel_sdvo_set_value(intel_sdvo,
596235783Skib				    SDVO_CMD_SET_TARGET_INPUT,
597235783Skib				    &targets, sizeof(targets));
598235783Skib}
599235783Skib
600235783Skib/**
601235783Skib * Return whether each input is trained.
602235783Skib *
603235783Skib * This function is making an assumption about the layout of the response,
604235783Skib * which should be checked against the docs.
605235783Skib */
606235783Skibstatic bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
607235783Skib{
608235783Skib	struct intel_sdvo_get_trained_inputs_response response;
609235783Skib
610235783Skib	CTASSERT(sizeof(response) == 1);
611235783Skib	if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
612235783Skib				  &response, sizeof(response)))
613235783Skib		return false;
614235783Skib
615235783Skib	*input_1 = response.input0_trained;
616235783Skib	*input_2 = response.input1_trained;
617235783Skib	return true;
618235783Skib}
619235783Skib
620235783Skibstatic bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
621235783Skib					  u16 outputs)
622235783Skib{
623235783Skib	return intel_sdvo_set_value(intel_sdvo,
624235783Skib				    SDVO_CMD_SET_ACTIVE_OUTPUTS,
625235783Skib				    &outputs, sizeof(outputs));
626235783Skib}
627235783Skib
628235783Skibstatic bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
629235783Skib					       int mode)
630235783Skib{
631235783Skib	u8 state = SDVO_ENCODER_STATE_ON;
632235783Skib
633235783Skib	switch (mode) {
634235783Skib	case DRM_MODE_DPMS_ON:
635235783Skib		state = SDVO_ENCODER_STATE_ON;
636235783Skib		break;
637235783Skib	case DRM_MODE_DPMS_STANDBY:
638235783Skib		state = SDVO_ENCODER_STATE_STANDBY;
639235783Skib		break;
640235783Skib	case DRM_MODE_DPMS_SUSPEND:
641235783Skib		state = SDVO_ENCODER_STATE_SUSPEND;
642235783Skib		break;
643235783Skib	case DRM_MODE_DPMS_OFF:
644235783Skib		state = SDVO_ENCODER_STATE_OFF;
645235783Skib		break;
646235783Skib	}
647235783Skib
648235783Skib	return intel_sdvo_set_value(intel_sdvo,
649235783Skib				    SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
650235783Skib}
651235783Skib
652235783Skibstatic bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
653235783Skib						   int *clock_min,
654235783Skib						   int *clock_max)
655235783Skib{
656235783Skib	struct intel_sdvo_pixel_clock_range clocks;
657235783Skib
658235783Skib	CTASSERT(sizeof(clocks) == 4);
659235783Skib	if (!intel_sdvo_get_value(intel_sdvo,
660235783Skib				  SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
661235783Skib				  &clocks, sizeof(clocks)))
662235783Skib		return false;
663235783Skib
664235783Skib	/* Convert the values from units of 10 kHz to kHz. */
665235783Skib	*clock_min = clocks.min * 10;
666235783Skib	*clock_max = clocks.max * 10;
667235783Skib	return true;
668235783Skib}
669235783Skib
670235783Skibstatic bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
671235783Skib					 u16 outputs)
672235783Skib{
673235783Skib	return intel_sdvo_set_value(intel_sdvo,
674235783Skib				    SDVO_CMD_SET_TARGET_OUTPUT,
675235783Skib				    &outputs, sizeof(outputs));
676235783Skib}
677235783Skib
678235783Skibstatic bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
679235783Skib				  struct intel_sdvo_dtd *dtd)
680235783Skib{
681235783Skib	return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
682235783Skib		intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
683235783Skib}
684235783Skib
685235783Skibstatic bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
686235783Skib					 struct intel_sdvo_dtd *dtd)
687235783Skib{
688235783Skib	return intel_sdvo_set_timing(intel_sdvo,
689235783Skib				     SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
690235783Skib}
691235783Skib
692235783Skibstatic bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
693235783Skib					 struct intel_sdvo_dtd *dtd)
694235783Skib{
695235783Skib	return intel_sdvo_set_timing(intel_sdvo,
696235783Skib				     SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
697235783Skib}
698235783Skib
699235783Skibstatic bool
700235783Skibintel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
701235783Skib					 uint16_t clock,
702235783Skib					 uint16_t width,
703235783Skib					 uint16_t height)
704235783Skib{
705235783Skib	struct intel_sdvo_preferred_input_timing_args args;
706235783Skib
707235783Skib	memset(&args, 0, sizeof(args));
708235783Skib	args.clock = clock;
709235783Skib	args.width = width;
710235783Skib	args.height = height;
711235783Skib	args.interlace = 0;
712235783Skib
713235783Skib	if (intel_sdvo->is_lvds &&
714235783Skib	   (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
715235783Skib	    intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
716235783Skib		args.scaled = 1;
717235783Skib
718235783Skib	return intel_sdvo_set_value(intel_sdvo,
719235783Skib				    SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
720235783Skib				    &args, sizeof(args));
721235783Skib}
722235783Skib
723235783Skibstatic bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
724235783Skib						  struct intel_sdvo_dtd *dtd)
725235783Skib{
726235783Skib	CTASSERT(sizeof(dtd->part1) == 8);
727235783Skib	CTASSERT(sizeof(dtd->part2) == 8);
728235783Skib	return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
729235783Skib				    &dtd->part1, sizeof(dtd->part1)) &&
730235783Skib		intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
731235783Skib				     &dtd->part2, sizeof(dtd->part2));
732235783Skib}
733235783Skib
734235783Skibstatic bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
735235783Skib{
736235783Skib	return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
737235783Skib}
738235783Skib
739235783Skibstatic void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
740235783Skib					 const struct drm_display_mode *mode)
741235783Skib{
742235783Skib	uint16_t width, height;
743235783Skib	uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
744235783Skib	uint16_t h_sync_offset, v_sync_offset;
745235783Skib	int mode_clock;
746235783Skib
747235783Skib	width = mode->crtc_hdisplay;
748235783Skib	height = mode->crtc_vdisplay;
749235783Skib
750235783Skib	/* do some mode translations */
751235783Skib	h_blank_len = mode->crtc_hblank_end - mode->crtc_hblank_start;
752235783Skib	h_sync_len = mode->crtc_hsync_end - mode->crtc_hsync_start;
753235783Skib
754235783Skib	v_blank_len = mode->crtc_vblank_end - mode->crtc_vblank_start;
755235783Skib	v_sync_len = mode->crtc_vsync_end - mode->crtc_vsync_start;
756235783Skib
757235783Skib	h_sync_offset = mode->crtc_hsync_start - mode->crtc_hblank_start;
758235783Skib	v_sync_offset = mode->crtc_vsync_start - mode->crtc_vblank_start;
759235783Skib
760235783Skib	mode_clock = mode->clock;
761235783Skib	mode_clock /= intel_mode_get_pixel_multiplier(mode) ?: 1;
762235783Skib	mode_clock /= 10;
763235783Skib	dtd->part1.clock = mode_clock;
764235783Skib
765235783Skib	dtd->part1.h_active = width & 0xff;
766235783Skib	dtd->part1.h_blank = h_blank_len & 0xff;
767235783Skib	dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
768235783Skib		((h_blank_len >> 8) & 0xf);
769235783Skib	dtd->part1.v_active = height & 0xff;
770235783Skib	dtd->part1.v_blank = v_blank_len & 0xff;
771235783Skib	dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
772235783Skib		((v_blank_len >> 8) & 0xf);
773235783Skib
774235783Skib	dtd->part2.h_sync_off = h_sync_offset & 0xff;
775235783Skib	dtd->part2.h_sync_width = h_sync_len & 0xff;
776235783Skib	dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
777235783Skib		(v_sync_len & 0xf);
778235783Skib	dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
779235783Skib		((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
780235783Skib		((v_sync_len & 0x30) >> 4);
781235783Skib
782235783Skib	dtd->part2.dtd_flags = 0x18;
783235783Skib	if (mode->flags & DRM_MODE_FLAG_PHSYNC)
784235783Skib		dtd->part2.dtd_flags |= 0x2;
785235783Skib	if (mode->flags & DRM_MODE_FLAG_PVSYNC)
786235783Skib		dtd->part2.dtd_flags |= 0x4;
787235783Skib
788235783Skib	dtd->part2.sdvo_flags = 0;
789235783Skib	dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
790235783Skib	dtd->part2.reserved = 0;
791235783Skib}
792235783Skib
793235783Skibstatic void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
794235783Skib					 const struct intel_sdvo_dtd *dtd)
795235783Skib{
796235783Skib	mode->hdisplay = dtd->part1.h_active;
797235783Skib	mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
798235783Skib	mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off;
799235783Skib	mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
800235783Skib	mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width;
801235783Skib	mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
802235783Skib	mode->htotal = mode->hdisplay + dtd->part1.h_blank;
803235783Skib	mode->htotal += (dtd->part1.h_high & 0xf) << 8;
804235783Skib
805235783Skib	mode->vdisplay = dtd->part1.v_active;
806235783Skib	mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
807235783Skib	mode->vsync_start = mode->vdisplay;
808235783Skib	mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
809235783Skib	mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
810235783Skib	mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0;
811235783Skib	mode->vsync_end = mode->vsync_start +
812235783Skib		(dtd->part2.v_sync_off_width & 0xf);
813235783Skib	mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
814235783Skib	mode->vtotal = mode->vdisplay + dtd->part1.v_blank;
815235783Skib	mode->vtotal += (dtd->part1.v_high & 0xf) << 8;
816235783Skib
817235783Skib	mode->clock = dtd->part1.clock * 10;
818235783Skib
819235783Skib	mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
820235783Skib	if (dtd->part2.dtd_flags & 0x2)
821235783Skib		mode->flags |= DRM_MODE_FLAG_PHSYNC;
822235783Skib	if (dtd->part2.dtd_flags & 0x4)
823235783Skib		mode->flags |= DRM_MODE_FLAG_PVSYNC;
824235783Skib}
825235783Skib
826235783Skibstatic bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
827235783Skib{
828235783Skib	struct intel_sdvo_encode encode;
829235783Skib
830235783Skib	CTASSERT(sizeof(encode) == 2);
831235783Skib	return intel_sdvo_get_value(intel_sdvo,
832235783Skib				  SDVO_CMD_GET_SUPP_ENCODE,
833235783Skib				  &encode, sizeof(encode));
834235783Skib}
835235783Skib
836235783Skibstatic bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
837235783Skib				  uint8_t mode)
838235783Skib{
839235783Skib	return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
840235783Skib}
841235783Skib
842235783Skibstatic bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
843235783Skib				       uint8_t mode)
844235783Skib{
845235783Skib	return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
846235783Skib}
847235783Skib
848235783Skib#if 0
849235783Skibstatic void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
850235783Skib{
851235783Skib	int i, j;
852235783Skib	uint8_t set_buf_index[2];
853235783Skib	uint8_t av_split;
854235783Skib	uint8_t buf_size;
855235783Skib	uint8_t buf[48];
856235783Skib	uint8_t *pos;
857235783Skib
858235783Skib	intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
859235783Skib
860235783Skib	for (i = 0; i <= av_split; i++) {
861235783Skib		set_buf_index[0] = i; set_buf_index[1] = 0;
862235783Skib		intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
863235783Skib				     set_buf_index, 2);
864235783Skib		intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
865235783Skib		intel_sdvo_read_response(encoder, &buf_size, 1);
866235783Skib
867235783Skib		pos = buf;
868235783Skib		for (j = 0; j <= buf_size; j += 8) {
869235783Skib			intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
870235783Skib					     NULL, 0);
871235783Skib			intel_sdvo_read_response(encoder, pos, 8);
872235783Skib			pos += 8;
873235783Skib		}
874235783Skib	}
875235783Skib}
876235783Skib#endif
877235783Skib
878235783Skibstatic bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo)
879235783Skib{
880235783Skib	struct dip_infoframe avi_if = {
881235783Skib		.type = DIP_TYPE_AVI,
882235783Skib		.ver = DIP_VERSION_AVI,
883235783Skib		.len = DIP_LEN_AVI,
884235783Skib	};
885235783Skib	uint8_t tx_rate = SDVO_HBUF_TX_VSYNC;
886235783Skib	uint8_t set_buf_index[2] = { 1, 0 };
887235783Skib	uint64_t *data = (uint64_t *)&avi_if;
888235783Skib	unsigned i;
889235783Skib
890235783Skib	intel_dip_infoframe_csum(&avi_if);
891235783Skib
892235783Skib	if (!intel_sdvo_set_value(intel_sdvo,
893235783Skib				  SDVO_CMD_SET_HBUF_INDEX,
894235783Skib				  set_buf_index, 2))
895235783Skib		return false;
896235783Skib
897235783Skib	for (i = 0; i < sizeof(avi_if); i += 8) {
898235783Skib		if (!intel_sdvo_set_value(intel_sdvo,
899235783Skib					  SDVO_CMD_SET_HBUF_DATA,
900235783Skib					  data, 8))
901235783Skib			return false;
902235783Skib		data++;
903235783Skib	}
904235783Skib
905235783Skib	return intel_sdvo_set_value(intel_sdvo,
906235783Skib				    SDVO_CMD_SET_HBUF_TXRATE,
907235783Skib				    &tx_rate, 1);
908235783Skib}
909235783Skib
910235783Skibstatic bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo)
911235783Skib{
912235783Skib	struct intel_sdvo_tv_format format;
913235783Skib	uint32_t format_map;
914235783Skib
915235783Skib	format_map = 1 << intel_sdvo->tv_format_index;
916235783Skib	memset(&format, 0, sizeof(format));
917235783Skib	memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
918235783Skib
919235783Skib	CTASSERT(sizeof(format) == 6);
920235783Skib	return intel_sdvo_set_value(intel_sdvo,
921235783Skib				    SDVO_CMD_SET_TV_FORMAT,
922235783Skib				    &format, sizeof(format));
923235783Skib}
924235783Skib
925235783Skibstatic bool
926235783Skibintel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
927254797Sdumbbell					const struct drm_display_mode *mode)
928235783Skib{
929235783Skib	struct intel_sdvo_dtd output_dtd;
930235783Skib
931235783Skib	if (!intel_sdvo_set_target_output(intel_sdvo,
932235783Skib					  intel_sdvo->attached_output))
933235783Skib		return false;
934235783Skib
935235783Skib	intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
936235783Skib	if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
937235783Skib		return false;
938235783Skib
939235783Skib	return true;
940235783Skib}
941235783Skib
942235783Skibstatic bool
943235783Skibintel_sdvo_set_input_timings_for_mode(struct intel_sdvo *intel_sdvo,
944254797Sdumbbell					const struct drm_display_mode *mode,
945235783Skib					struct drm_display_mode *adjusted_mode)
946235783Skib{
947235783Skib	/* Reset the input timing to the screen. Assume always input 0. */
948235783Skib	if (!intel_sdvo_set_target_input(intel_sdvo))
949235783Skib		return false;
950235783Skib
951235783Skib	if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
952235783Skib						      mode->clock / 10,
953235783Skib						      mode->hdisplay,
954235783Skib						      mode->vdisplay))
955235783Skib		return false;
956235783Skib
957235783Skib	if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
958235783Skib						   &intel_sdvo->input_dtd))
959235783Skib		return false;
960235783Skib
961235783Skib	intel_sdvo_get_mode_from_dtd(adjusted_mode, &intel_sdvo->input_dtd);
962235783Skib
963235783Skib	return true;
964235783Skib}
965235783Skib
966235783Skibstatic bool intel_sdvo_mode_fixup(struct drm_encoder *encoder,
967254797Sdumbbell				  const struct drm_display_mode *mode,
968235783Skib				  struct drm_display_mode *adjusted_mode)
969235783Skib{
970235783Skib	struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
971235783Skib	int multiplier;
972235783Skib
973235783Skib	/* We need to construct preferred input timings based on our
974235783Skib	 * output timings.  To do that, we have to set the output
975235783Skib	 * timings, even though this isn't really the right place in
976235783Skib	 * the sequence to do it. Oh well.
977235783Skib	 */
978235783Skib	if (intel_sdvo->is_tv) {
979235783Skib		if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
980235783Skib			return false;
981235783Skib
982235783Skib		(void) intel_sdvo_set_input_timings_for_mode(intel_sdvo,
983235783Skib							     mode,
984235783Skib							     adjusted_mode);
985235783Skib	} else if (intel_sdvo->is_lvds) {
986235783Skib		if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
987235783Skib							     intel_sdvo->sdvo_lvds_fixed_mode))
988235783Skib			return false;
989235783Skib
990235783Skib		(void) intel_sdvo_set_input_timings_for_mode(intel_sdvo,
991235783Skib							     mode,
992235783Skib							     adjusted_mode);
993235783Skib	}
994235783Skib
995235783Skib	/* Make the CRTC code factor in the SDVO pixel multiplier.  The
996235783Skib	 * SDVO device will factor out the multiplier during mode_set.
997235783Skib	 */
998235783Skib	multiplier = intel_sdvo_get_pixel_multiplier(adjusted_mode);
999235783Skib	intel_mode_set_pixel_multiplier(adjusted_mode, multiplier);
1000235783Skib
1001235783Skib	return true;
1002235783Skib}
1003235783Skib
1004235783Skibstatic void intel_sdvo_mode_set(struct drm_encoder *encoder,
1005235783Skib				struct drm_display_mode *mode,
1006235783Skib				struct drm_display_mode *adjusted_mode)
1007235783Skib{
1008235783Skib	struct drm_device *dev = encoder->dev;
1009235783Skib	struct drm_i915_private *dev_priv = dev->dev_private;
1010235783Skib	struct drm_crtc *crtc = encoder->crtc;
1011235783Skib	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
1012235783Skib	struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1013235783Skib	u32 sdvox;
1014235783Skib	struct intel_sdvo_in_out_map in_out;
1015235783Skib	struct intel_sdvo_dtd input_dtd, output_dtd;
1016235783Skib	int pixel_multiplier = intel_mode_get_pixel_multiplier(adjusted_mode);
1017235783Skib	int rate;
1018235783Skib
1019235783Skib	if (!mode)
1020235783Skib		return;
1021235783Skib
1022235783Skib	/* First, set the input mapping for the first input to our controlled
1023235783Skib	 * output. This is only correct if we're a single-input device, in
1024235783Skib	 * which case the first input is the output from the appropriate SDVO
1025235783Skib	 * channel on the motherboard.  In a two-input device, the first input
1026235783Skib	 * will be SDVOB and the second SDVOC.
1027235783Skib	 */
1028235783Skib	in_out.in0 = intel_sdvo->attached_output;
1029235783Skib	in_out.in1 = 0;
1030235783Skib
1031235783Skib	intel_sdvo_set_value(intel_sdvo,
1032235783Skib			     SDVO_CMD_SET_IN_OUT_MAP,
1033235783Skib			     &in_out, sizeof(in_out));
1034235783Skib
1035235783Skib	/* Set the output timings to the screen */
1036235783Skib	if (!intel_sdvo_set_target_output(intel_sdvo,
1037235783Skib					  intel_sdvo->attached_output))
1038235783Skib		return;
1039235783Skib
1040235783Skib	/* lvds has a special fixed output timing. */
1041235783Skib	if (intel_sdvo->is_lvds)
1042235783Skib		intel_sdvo_get_dtd_from_mode(&output_dtd,
1043235783Skib					     intel_sdvo->sdvo_lvds_fixed_mode);
1044235783Skib	else
1045235783Skib		intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1046235783Skib	(void) intel_sdvo_set_output_timing(intel_sdvo, &output_dtd);
1047235783Skib
1048235783Skib	/* Set the input timing to the screen. Assume always input 0. */
1049235783Skib	if (!intel_sdvo_set_target_input(intel_sdvo))
1050235783Skib		return;
1051235783Skib
1052235783Skib	if (intel_sdvo->has_hdmi_monitor) {
1053235783Skib		intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
1054235783Skib		intel_sdvo_set_colorimetry(intel_sdvo,
1055235783Skib					   SDVO_COLORIMETRY_RGB256);
1056235783Skib		intel_sdvo_set_avi_infoframe(intel_sdvo);
1057235783Skib	} else
1058235783Skib		intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
1059235783Skib
1060235783Skib	if (intel_sdvo->is_tv &&
1061235783Skib	    !intel_sdvo_set_tv_format(intel_sdvo))
1062235783Skib		return;
1063235783Skib
1064235783Skib	/* We have tried to get input timing in mode_fixup, and filled into
1065235783Skib	 * adjusted_mode.
1066235783Skib	 */
1067235783Skib	intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
1068235783Skib	(void) intel_sdvo_set_input_timing(intel_sdvo, &input_dtd);
1069235783Skib
1070235783Skib	switch (pixel_multiplier) {
1071235783Skib	default:
1072235783Skib	case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1073235783Skib	case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1074235783Skib	case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
1075235783Skib	}
1076235783Skib	if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
1077235783Skib		return;
1078235783Skib
1079235783Skib	/* Set the SDVO control regs. */
1080235783Skib	if (INTEL_INFO(dev)->gen >= 4) {
1081235783Skib		/* The real mode polarity is set by the SDVO commands, using
1082235783Skib		 * struct intel_sdvo_dtd. */
1083235783Skib		sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH;
1084235783Skib		if (intel_sdvo->is_hdmi)
1085235783Skib			sdvox |= intel_sdvo->color_range;
1086235783Skib		if (INTEL_INFO(dev)->gen < 5)
1087235783Skib			sdvox |= SDVO_BORDER_ENABLE;
1088235783Skib	} else {
1089235783Skib		sdvox = I915_READ(intel_sdvo->sdvo_reg);
1090235783Skib		switch (intel_sdvo->sdvo_reg) {
1091235783Skib		case SDVOB:
1092235783Skib			sdvox &= SDVOB_PRESERVE_MASK;
1093235783Skib			break;
1094235783Skib		case SDVOC:
1095235783Skib			sdvox &= SDVOC_PRESERVE_MASK;
1096235783Skib			break;
1097235783Skib		}
1098235783Skib		sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1099235783Skib	}
1100235783Skib
1101235783Skib	if (INTEL_PCH_TYPE(dev) >= PCH_CPT)
1102235783Skib		sdvox |= TRANSCODER_CPT(intel_crtc->pipe);
1103235783Skib	else
1104235783Skib		sdvox |= TRANSCODER(intel_crtc->pipe);
1105235783Skib
1106235783Skib	if (intel_sdvo->has_hdmi_audio)
1107235783Skib		sdvox |= SDVO_AUDIO_ENABLE;
1108235783Skib
1109235783Skib	if (INTEL_INFO(dev)->gen >= 4) {
1110235783Skib		/* done in crtc_mode_set as the dpll_md reg must be written early */
1111235783Skib	} else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) {
1112235783Skib		/* done in crtc_mode_set as it lives inside the dpll register */
1113235783Skib	} else {
1114235783Skib		sdvox |= (pixel_multiplier - 1) << SDVO_PORT_MULTIPLY_SHIFT;
1115235783Skib	}
1116235783Skib
1117235783Skib	if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
1118235783Skib	    INTEL_INFO(dev)->gen < 5)
1119235783Skib		sdvox |= SDVO_STALL_SELECT;
1120235783Skib	intel_sdvo_write_sdvox(intel_sdvo, sdvox);
1121235783Skib}
1122235783Skib
1123235783Skibstatic void intel_sdvo_dpms(struct drm_encoder *encoder, int mode)
1124235783Skib{
1125235783Skib	struct drm_device *dev = encoder->dev;
1126235783Skib	struct drm_i915_private *dev_priv = dev->dev_private;
1127235783Skib	struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1128235783Skib	struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
1129235783Skib	u32 temp;
1130235783Skib
1131235783Skib	if (mode != DRM_MODE_DPMS_ON) {
1132235783Skib		intel_sdvo_set_active_outputs(intel_sdvo, 0);
1133235783Skib		if (0)
1134235783Skib			intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1135235783Skib
1136235783Skib		if (mode == DRM_MODE_DPMS_OFF) {
1137235783Skib			temp = I915_READ(intel_sdvo->sdvo_reg);
1138235783Skib			if ((temp & SDVO_ENABLE) != 0) {
1139235783Skib				intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE);
1140235783Skib			}
1141235783Skib		}
1142235783Skib	} else {
1143235783Skib		bool input1, input2;
1144235783Skib		int i;
1145235783Skib		u8 status;
1146235783Skib
1147235783Skib		temp = I915_READ(intel_sdvo->sdvo_reg);
1148235783Skib		if ((temp & SDVO_ENABLE) == 0)
1149235783Skib			intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE);
1150235783Skib		for (i = 0; i < 2; i++)
1151235783Skib			intel_wait_for_vblank(dev, intel_crtc->pipe);
1152235783Skib
1153235783Skib		status = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
1154235783Skib		/* Warn if the device reported failure to sync.
1155235783Skib		 * A lot of SDVO devices fail to notify of sync, but it's
1156235783Skib		 * a given it the status is a success, we succeeded.
1157235783Skib		 */
1158235783Skib		if (status == SDVO_CMD_STATUS_SUCCESS && !input1) {
1159235783Skib			DRM_DEBUG_KMS("First %s output reported failure to "
1160235783Skib					"sync\n", SDVO_NAME(intel_sdvo));
1161235783Skib		}
1162235783Skib
1163235783Skib		if (0)
1164235783Skib			intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1165235783Skib		intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
1166235783Skib	}
1167235783Skib	return;
1168235783Skib}
1169235783Skib
1170235783Skibstatic int intel_sdvo_mode_valid(struct drm_connector *connector,
1171235783Skib				 struct drm_display_mode *mode)
1172235783Skib{
1173235783Skib	struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1174235783Skib
1175235783Skib	if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1176235783Skib		return MODE_NO_DBLESCAN;
1177235783Skib
1178235783Skib	if (intel_sdvo->pixel_clock_min > mode->clock)
1179235783Skib		return MODE_CLOCK_LOW;
1180235783Skib
1181235783Skib	if (intel_sdvo->pixel_clock_max < mode->clock)
1182235783Skib		return MODE_CLOCK_HIGH;
1183235783Skib
1184235783Skib	if (intel_sdvo->is_lvds) {
1185235783Skib		if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
1186235783Skib			return MODE_PANEL;
1187235783Skib
1188235783Skib		if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
1189235783Skib			return MODE_PANEL;
1190235783Skib	}
1191235783Skib
1192235783Skib	return MODE_OK;
1193235783Skib}
1194235783Skib
1195235783Skibstatic bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
1196235783Skib{
1197235783Skib	CTASSERT(sizeof(*caps) == 8);
1198235783Skib	if (!intel_sdvo_get_value(intel_sdvo,
1199235783Skib				  SDVO_CMD_GET_DEVICE_CAPS,
1200235783Skib				  caps, sizeof(*caps)))
1201235783Skib		return false;
1202235783Skib
1203235783Skib	DRM_DEBUG_KMS("SDVO capabilities:\n"
1204235783Skib		      "  vendor_id: %d\n"
1205235783Skib		      "  device_id: %d\n"
1206235783Skib		      "  device_rev_id: %d\n"
1207235783Skib		      "  sdvo_version_major: %d\n"
1208235783Skib		      "  sdvo_version_minor: %d\n"
1209235783Skib		      "  sdvo_inputs_mask: %d\n"
1210235783Skib		      "  smooth_scaling: %d\n"
1211235783Skib		      "  sharp_scaling: %d\n"
1212235783Skib		      "  up_scaling: %d\n"
1213235783Skib		      "  down_scaling: %d\n"
1214235783Skib		      "  stall_support: %d\n"
1215235783Skib		      "  output_flags: %d\n",
1216235783Skib		      caps->vendor_id,
1217235783Skib		      caps->device_id,
1218235783Skib		      caps->device_rev_id,
1219235783Skib		      caps->sdvo_version_major,
1220235783Skib		      caps->sdvo_version_minor,
1221235783Skib		      caps->sdvo_inputs_mask,
1222235783Skib		      caps->smooth_scaling,
1223235783Skib		      caps->sharp_scaling,
1224235783Skib		      caps->up_scaling,
1225235783Skib		      caps->down_scaling,
1226235783Skib		      caps->stall_support,
1227235783Skib		      caps->output_flags);
1228235783Skib
1229235783Skib	return true;
1230235783Skib}
1231235783Skib
1232235783Skibstatic int intel_sdvo_supports_hotplug(struct intel_sdvo *intel_sdvo)
1233235783Skib{
1234235783Skib	struct drm_device *dev = intel_sdvo->base.base.dev;
1235235783Skib	u8 response[2];
1236235783Skib
1237235783Skib	/* HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise
1238235783Skib	 * on the line. */
1239235783Skib	if (IS_I945G(dev) || IS_I945GM(dev))
1240235783Skib		return false;
1241235783Skib
1242235783Skib	return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
1243235783Skib				    &response, 2) && response[0];
1244235783Skib}
1245235783Skib
1246235783Skibstatic void intel_sdvo_enable_hotplug(struct intel_encoder *encoder)
1247235783Skib{
1248235783Skib	struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
1249235783Skib
1250235783Skib	intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG,
1251235783Skib			     &intel_sdvo->hotplug_active, 2);
1252235783Skib}
1253235783Skib
1254235783Skibstatic bool
1255235783Skibintel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
1256235783Skib{
1257235783Skib	/* Is there more than one type of output? */
1258235783Skib	return bitcount16(intel_sdvo->caps.output_flags) > 1;
1259235783Skib}
1260235783Skib
1261235783Skibstatic struct edid *
1262235783Skibintel_sdvo_get_edid(struct drm_connector *connector)
1263235783Skib{
1264235783Skib	struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
1265235783Skib	return drm_get_edid(connector, sdvo->ddc);
1266235783Skib}
1267235783Skib
1268235783Skib/* Mac mini hack -- use the same DDC as the analog connector */
1269235783Skibstatic struct edid *
1270235783Skibintel_sdvo_get_analog_edid(struct drm_connector *connector)
1271235783Skib{
1272235783Skib	struct drm_i915_private *dev_priv = connector->dev->dev_private;
1273235783Skib
1274235783Skib	return drm_get_edid(connector,
1275235783Skib			    dev_priv->gmbus[dev_priv->crt_ddc_pin]);
1276235783Skib}
1277235783Skib
1278235783Skibstatic enum drm_connector_status
1279235783Skibintel_sdvo_tmds_sink_detect(struct drm_connector *connector)
1280235783Skib{
1281235783Skib	struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1282235783Skib	enum drm_connector_status status;
1283235783Skib	struct edid *edid;
1284235783Skib
1285235783Skib	edid = intel_sdvo_get_edid(connector);
1286235783Skib
1287235783Skib	if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
1288235783Skib		u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
1289235783Skib
1290235783Skib		/*
1291235783Skib		 * Don't use the 1 as the argument of DDC bus switch to get
1292235783Skib		 * the EDID. It is used for SDVO SPD ROM.
1293235783Skib		 */
1294235783Skib		for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
1295235783Skib			intel_sdvo->ddc_bus = ddc;
1296235783Skib			edid = intel_sdvo_get_edid(connector);
1297235783Skib			if (edid)
1298235783Skib				break;
1299235783Skib		}
1300235783Skib		/*
1301235783Skib		 * If we found the EDID on the other bus,
1302235783Skib		 * assume that is the correct DDC bus.
1303235783Skib		 */
1304235783Skib		if (edid == NULL)
1305235783Skib			intel_sdvo->ddc_bus = saved_ddc;
1306235783Skib	}
1307235783Skib
1308235783Skib	/*
1309235783Skib	 * When there is no edid and no monitor is connected with VGA
1310235783Skib	 * port, try to use the CRT ddc to read the EDID for DVI-connector.
1311235783Skib	 */
1312235783Skib	if (edid == NULL)
1313235783Skib		edid = intel_sdvo_get_analog_edid(connector);
1314235783Skib
1315235783Skib	status = connector_status_unknown;
1316235783Skib	if (edid != NULL) {
1317235783Skib		/* DDC bus is shared, match EDID to connector type */
1318235783Skib		if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1319235783Skib			status = connector_status_connected;
1320235783Skib			if (intel_sdvo->is_hdmi) {
1321235783Skib				intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
1322235783Skib				intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
1323235783Skib			}
1324235783Skib		} else
1325235783Skib			status = connector_status_disconnected;
1326235783Skib		connector->display_info.raw_edid = NULL;
1327235783Skib		free(edid, DRM_MEM_KMS);
1328235783Skib	}
1329235783Skib
1330235783Skib	if (status == connector_status_connected) {
1331235783Skib		struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1332235783Skib		if (intel_sdvo_connector->force_audio != HDMI_AUDIO_AUTO)
1333235783Skib			intel_sdvo->has_hdmi_audio = (intel_sdvo_connector->force_audio == HDMI_AUDIO_ON);
1334235783Skib	}
1335235783Skib
1336235783Skib	return status;
1337235783Skib}
1338235783Skib
1339235783Skibstatic bool
1340235783Skibintel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo,
1341235783Skib				  struct edid *edid)
1342235783Skib{
1343235783Skib	bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
1344235783Skib	bool connector_is_digital = !!IS_DIGITAL(sdvo);
1345235783Skib
1346235783Skib	DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n",
1347235783Skib		      connector_is_digital, monitor_is_digital);
1348235783Skib	return connector_is_digital == monitor_is_digital;
1349235783Skib}
1350235783Skib
1351235783Skibstatic enum drm_connector_status
1352235783Skibintel_sdvo_detect(struct drm_connector *connector, bool force)
1353235783Skib{
1354235783Skib	uint16_t response;
1355235783Skib	struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1356235783Skib	struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1357235783Skib	enum drm_connector_status ret;
1358235783Skib
1359235783Skib	if (!intel_sdvo_write_cmd(intel_sdvo,
1360235783Skib				  SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0))
1361235783Skib		return connector_status_unknown;
1362235783Skib
1363235783Skib	/* add 30ms delay when the output type might be TV */
1364235783Skib	if (intel_sdvo->caps.output_flags &
1365235783Skib	    (SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_CVBS0))
1366235783Skib		drm_msleep(30, "915svo");
1367235783Skib
1368235783Skib	if (!intel_sdvo_read_response(intel_sdvo, &response, 2))
1369235783Skib		return connector_status_unknown;
1370235783Skib
1371235783Skib	DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
1372235783Skib		      response & 0xff, response >> 8,
1373235783Skib		      intel_sdvo_connector->output_flag);
1374235783Skib
1375235783Skib	if (response == 0)
1376235783Skib		return connector_status_disconnected;
1377235783Skib
1378235783Skib	intel_sdvo->attached_output = response;
1379235783Skib
1380235783Skib	intel_sdvo->has_hdmi_monitor = false;
1381235783Skib	intel_sdvo->has_hdmi_audio = false;
1382235783Skib
1383235783Skib	if ((intel_sdvo_connector->output_flag & response) == 0)
1384235783Skib		ret = connector_status_disconnected;
1385235783Skib	else if (IS_TMDS(intel_sdvo_connector))
1386235783Skib		ret = intel_sdvo_tmds_sink_detect(connector);
1387235783Skib	else {
1388235783Skib		struct edid *edid;
1389235783Skib
1390235783Skib		/* if we have an edid check it matches the connection */
1391235783Skib		edid = intel_sdvo_get_edid(connector);
1392235783Skib		if (edid == NULL)
1393235783Skib			edid = intel_sdvo_get_analog_edid(connector);
1394235783Skib		if (edid != NULL) {
1395235783Skib			if (intel_sdvo_connector_matches_edid(intel_sdvo_connector,
1396235783Skib							      edid))
1397235783Skib				ret = connector_status_connected;
1398235783Skib			else
1399235783Skib				ret = connector_status_disconnected;
1400235783Skib
1401235783Skib			connector->display_info.raw_edid = NULL;
1402235783Skib			free(edid, DRM_MEM_KMS);
1403235783Skib		} else
1404235783Skib			ret = connector_status_connected;
1405235783Skib	}
1406235783Skib
1407235783Skib	/* May update encoder flag for like clock for SDVO TV, etc.*/
1408235783Skib	if (ret == connector_status_connected) {
1409235783Skib		intel_sdvo->is_tv = false;
1410235783Skib		intel_sdvo->is_lvds = false;
1411235783Skib		intel_sdvo->base.needs_tv_clock = false;
1412235783Skib
1413235783Skib		if (response & SDVO_TV_MASK) {
1414235783Skib			intel_sdvo->is_tv = true;
1415235783Skib			intel_sdvo->base.needs_tv_clock = true;
1416235783Skib		}
1417235783Skib		if (response & SDVO_LVDS_MASK)
1418235783Skib			intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL;
1419235783Skib	}
1420235783Skib
1421235783Skib	return ret;
1422235783Skib}
1423235783Skib
1424235783Skibstatic void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
1425235783Skib{
1426235783Skib	struct edid *edid;
1427235783Skib
1428235783Skib	/* set the bus switch and get the modes */
1429235783Skib	edid = intel_sdvo_get_edid(connector);
1430235783Skib
1431235783Skib	/*
1432235783Skib	 * Mac mini hack.  On this device, the DVI-I connector shares one DDC
1433235783Skib	 * link between analog and digital outputs. So, if the regular SDVO
1434235783Skib	 * DDC fails, check to see if the analog output is disconnected, in
1435235783Skib	 * which case we'll look there for the digital DDC data.
1436235783Skib	 */
1437235783Skib	if (edid == NULL)
1438235783Skib		edid = intel_sdvo_get_analog_edid(connector);
1439235783Skib
1440235783Skib	if (edid != NULL) {
1441235783Skib		if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector),
1442235783Skib						      edid)) {
1443235783Skib			drm_mode_connector_update_edid_property(connector, edid);
1444235783Skib			drm_add_edid_modes(connector, edid);
1445235783Skib		}
1446235783Skib
1447235783Skib		connector->display_info.raw_edid = NULL;
1448235783Skib		free(edid, DRM_MEM_KMS);
1449235783Skib	}
1450235783Skib}
1451235783Skib
1452235783Skib/*
1453235783Skib * Set of SDVO TV modes.
1454235783Skib * Note!  This is in reply order (see loop in get_tv_modes).
1455235783Skib * XXX: all 60Hz refresh?
1456235783Skib */
1457235783Skibstatic const struct drm_display_mode sdvo_tv_modes[] = {
1458235783Skib	{ DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
1459235783Skib		   416, 0, 200, 201, 232, 233, 0,
1460235783Skib		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1461235783Skib	{ DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
1462235783Skib		   416, 0, 240, 241, 272, 273, 0,
1463235783Skib		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1464235783Skib	{ DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
1465235783Skib		   496, 0, 300, 301, 332, 333, 0,
1466235783Skib		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1467235783Skib	{ DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
1468235783Skib		   736, 0, 350, 351, 382, 383, 0,
1469235783Skib		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1470235783Skib	{ DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
1471235783Skib		   736, 0, 400, 401, 432, 433, 0,
1472235783Skib		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1473235783Skib	{ DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
1474235783Skib		   736, 0, 480, 481, 512, 513, 0,
1475235783Skib		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1476235783Skib	{ DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
1477235783Skib		   800, 0, 480, 481, 512, 513, 0,
1478235783Skib		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1479235783Skib	{ DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
1480235783Skib		   800, 0, 576, 577, 608, 609, 0,
1481235783Skib		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1482235783Skib	{ DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
1483235783Skib		   816, 0, 350, 351, 382, 383, 0,
1484235783Skib		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1485235783Skib	{ DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
1486235783Skib		   816, 0, 400, 401, 432, 433, 0,
1487235783Skib		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1488235783Skib	{ DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
1489235783Skib		   816, 0, 480, 481, 512, 513, 0,
1490235783Skib		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1491235783Skib	{ DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
1492235783Skib		   816, 0, 540, 541, 572, 573, 0,
1493235783Skib		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1494235783Skib	{ DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
1495235783Skib		   816, 0, 576, 577, 608, 609, 0,
1496235783Skib		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1497235783Skib	{ DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
1498235783Skib		   864, 0, 576, 577, 608, 609, 0,
1499235783Skib		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1500235783Skib	{ DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
1501235783Skib		   896, 0, 600, 601, 632, 633, 0,
1502235783Skib		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1503235783Skib	{ DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
1504235783Skib		   928, 0, 624, 625, 656, 657, 0,
1505235783Skib		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1506235783Skib	{ DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
1507235783Skib		   1016, 0, 766, 767, 798, 799, 0,
1508235783Skib		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1509235783Skib	{ DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
1510235783Skib		   1120, 0, 768, 769, 800, 801, 0,
1511235783Skib		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1512235783Skib	{ DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
1513235783Skib		   1376, 0, 1024, 1025, 1056, 1057, 0,
1514235783Skib		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1515235783Skib};
1516235783Skib
1517235783Skibstatic void intel_sdvo_get_tv_modes(struct drm_connector *connector)
1518235783Skib{
1519235783Skib	struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1520235783Skib	struct intel_sdvo_sdtv_resolution_request tv_res;
1521235783Skib	uint32_t reply = 0, format_map = 0;
1522235783Skib	int i;
1523235783Skib
1524235783Skib	/* Read the list of supported input resolutions for the selected TV
1525235783Skib	 * format.
1526235783Skib	 */
1527235783Skib	format_map = 1 << intel_sdvo->tv_format_index;
1528235783Skib	memcpy(&tv_res, &format_map,
1529235783Skib	       min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
1530235783Skib
1531235783Skib	if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
1532235783Skib		return;
1533235783Skib
1534235783Skib	CTASSERT(sizeof(tv_res) == 3);
1535235783Skib	if (!intel_sdvo_write_cmd(intel_sdvo,
1536235783Skib				  SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
1537235783Skib				  &tv_res, sizeof(tv_res)))
1538235783Skib		return;
1539235783Skib	if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
1540235783Skib		return;
1541235783Skib
1542235783Skib	for (i = 0; i < DRM_ARRAY_SIZE(sdvo_tv_modes); i++)
1543235783Skib		if (reply & (1 << i)) {
1544235783Skib			struct drm_display_mode *nmode;
1545235783Skib			nmode = drm_mode_duplicate(connector->dev,
1546235783Skib						   &sdvo_tv_modes[i]);
1547235783Skib			if (nmode)
1548235783Skib				drm_mode_probed_add(connector, nmode);
1549235783Skib		}
1550235783Skib}
1551235783Skib
1552235783Skibstatic void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
1553235783Skib{
1554235783Skib	struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1555235783Skib	struct drm_i915_private *dev_priv = connector->dev->dev_private;
1556235783Skib	struct drm_display_mode *newmode;
1557235783Skib
1558235783Skib	/*
1559235783Skib	 * Attempt to get the mode list from DDC.
1560235783Skib	 * Assume that the preferred modes are
1561235783Skib	 * arranged in priority order.
1562235783Skib	 */
1563235783Skib	intel_ddc_get_modes(connector, intel_sdvo->i2c);
1564235783Skib	if (!list_empty(&connector->probed_modes))
1565235783Skib		goto end;
1566235783Skib
1567235783Skib	/* Fetch modes from VBT */
1568235783Skib	if (dev_priv->sdvo_lvds_vbt_mode != NULL) {
1569235783Skib		newmode = drm_mode_duplicate(connector->dev,
1570235783Skib					     dev_priv->sdvo_lvds_vbt_mode);
1571235783Skib		if (newmode != NULL) {
1572235783Skib			/* Guarantee the mode is preferred */
1573235783Skib			newmode->type = (DRM_MODE_TYPE_PREFERRED |
1574235783Skib					 DRM_MODE_TYPE_DRIVER);
1575235783Skib			drm_mode_probed_add(connector, newmode);
1576235783Skib		}
1577235783Skib	}
1578235783Skib
1579235783Skibend:
1580235783Skib	list_for_each_entry(newmode, &connector->probed_modes, head) {
1581235783Skib		if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
1582235783Skib			intel_sdvo->sdvo_lvds_fixed_mode =
1583235783Skib				drm_mode_duplicate(connector->dev, newmode);
1584235783Skib
1585235783Skib			drm_mode_set_crtcinfo(intel_sdvo->sdvo_lvds_fixed_mode,
1586235783Skib					      0);
1587235783Skib
1588235783Skib			intel_sdvo->is_lvds = true;
1589235783Skib			break;
1590235783Skib		}
1591235783Skib	}
1592235783Skib
1593235783Skib}
1594235783Skib
1595235783Skibstatic int intel_sdvo_get_modes(struct drm_connector *connector)
1596235783Skib{
1597235783Skib	struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1598235783Skib
1599235783Skib	if (IS_TV(intel_sdvo_connector))
1600235783Skib		intel_sdvo_get_tv_modes(connector);
1601235783Skib	else if (IS_LVDS(intel_sdvo_connector))
1602235783Skib		intel_sdvo_get_lvds_modes(connector);
1603235783Skib	else
1604235783Skib		intel_sdvo_get_ddc_modes(connector);
1605235783Skib
1606235783Skib	return !list_empty(&connector->probed_modes);
1607235783Skib}
1608235783Skib
1609235783Skibstatic void
1610235783Skibintel_sdvo_destroy_enhance_property(struct drm_connector *connector)
1611235783Skib{
1612235783Skib	struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1613235783Skib	struct drm_device *dev = connector->dev;
1614235783Skib
1615235783Skib	if (intel_sdvo_connector->left)
1616235783Skib		drm_property_destroy(dev, intel_sdvo_connector->left);
1617235783Skib	if (intel_sdvo_connector->right)
1618235783Skib		drm_property_destroy(dev, intel_sdvo_connector->right);
1619235783Skib	if (intel_sdvo_connector->top)
1620235783Skib		drm_property_destroy(dev, intel_sdvo_connector->top);
1621235783Skib	if (intel_sdvo_connector->bottom)
1622235783Skib		drm_property_destroy(dev, intel_sdvo_connector->bottom);
1623235783Skib	if (intel_sdvo_connector->hpos)
1624235783Skib		drm_property_destroy(dev, intel_sdvo_connector->hpos);
1625235783Skib	if (intel_sdvo_connector->vpos)
1626235783Skib		drm_property_destroy(dev, intel_sdvo_connector->vpos);
1627235783Skib	if (intel_sdvo_connector->saturation)
1628235783Skib		drm_property_destroy(dev, intel_sdvo_connector->saturation);
1629235783Skib	if (intel_sdvo_connector->contrast)
1630235783Skib		drm_property_destroy(dev, intel_sdvo_connector->contrast);
1631235783Skib	if (intel_sdvo_connector->hue)
1632235783Skib		drm_property_destroy(dev, intel_sdvo_connector->hue);
1633235783Skib	if (intel_sdvo_connector->sharpness)
1634235783Skib		drm_property_destroy(dev, intel_sdvo_connector->sharpness);
1635235783Skib	if (intel_sdvo_connector->flicker_filter)
1636235783Skib		drm_property_destroy(dev, intel_sdvo_connector->flicker_filter);
1637235783Skib	if (intel_sdvo_connector->flicker_filter_2d)
1638235783Skib		drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_2d);
1639235783Skib	if (intel_sdvo_connector->flicker_filter_adaptive)
1640235783Skib		drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_adaptive);
1641235783Skib	if (intel_sdvo_connector->tv_luma_filter)
1642235783Skib		drm_property_destroy(dev, intel_sdvo_connector->tv_luma_filter);
1643235783Skib	if (intel_sdvo_connector->tv_chroma_filter)
1644235783Skib		drm_property_destroy(dev, intel_sdvo_connector->tv_chroma_filter);
1645235783Skib	if (intel_sdvo_connector->dot_crawl)
1646235783Skib		drm_property_destroy(dev, intel_sdvo_connector->dot_crawl);
1647235783Skib	if (intel_sdvo_connector->brightness)
1648235783Skib		drm_property_destroy(dev, intel_sdvo_connector->brightness);
1649235783Skib}
1650235783Skib
1651235783Skibstatic void intel_sdvo_destroy(struct drm_connector *connector)
1652235783Skib{
1653235783Skib	struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1654235783Skib
1655235783Skib	if (intel_sdvo_connector->tv_format)
1656235783Skib		drm_property_destroy(connector->dev,
1657235783Skib				     intel_sdvo_connector->tv_format);
1658235783Skib
1659235783Skib	intel_sdvo_destroy_enhance_property(connector);
1660235783Skib#if 0
1661235783Skib	drm_sysfs_connector_remove(connector);
1662235783Skib#endif
1663235783Skib	drm_connector_cleanup(connector);
1664235783Skib	free(connector, DRM_MEM_KMS);
1665235783Skib}
1666235783Skib
1667235783Skibstatic bool intel_sdvo_detect_hdmi_audio(struct drm_connector *connector)
1668235783Skib{
1669235783Skib	struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1670235783Skib	struct edid *edid;
1671235783Skib	bool has_audio = false;
1672235783Skib
1673235783Skib	if (!intel_sdvo->is_hdmi)
1674235783Skib		return false;
1675235783Skib
1676235783Skib	edid = intel_sdvo_get_edid(connector);
1677235783Skib	if (edid != NULL && edid->input & DRM_EDID_INPUT_DIGITAL)
1678235783Skib		has_audio = drm_detect_monitor_audio(edid);
1679235783Skib
1680235783Skib	return has_audio;
1681235783Skib}
1682235783Skib
1683235783Skibstatic int
1684235783Skibintel_sdvo_set_property(struct drm_connector *connector,
1685235783Skib			struct drm_property *property,
1686235783Skib			uint64_t val)
1687235783Skib{
1688235783Skib	struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1689235783Skib	struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1690235783Skib	struct drm_i915_private *dev_priv = connector->dev->dev_private;
1691235783Skib	uint16_t temp_value;
1692235783Skib	uint8_t cmd;
1693235783Skib	int ret;
1694235783Skib
1695235783Skib	ret = drm_connector_property_set_value(connector, property, val);
1696235783Skib	if (ret)
1697235783Skib		return ret;
1698235783Skib
1699235783Skib	if (property == dev_priv->force_audio_property) {
1700235783Skib		int i = val;
1701235783Skib		bool has_audio;
1702235783Skib
1703235783Skib		if (i == intel_sdvo_connector->force_audio)
1704235783Skib			return 0;
1705235783Skib
1706235783Skib		intel_sdvo_connector->force_audio = i;
1707235783Skib
1708235783Skib		if (i == HDMI_AUDIO_AUTO)
1709235783Skib			has_audio = intel_sdvo_detect_hdmi_audio(connector);
1710235783Skib		else
1711235783Skib			has_audio = (i == HDMI_AUDIO_ON);
1712235783Skib
1713235783Skib		if (has_audio == intel_sdvo->has_hdmi_audio)
1714235783Skib			return 0;
1715235783Skib
1716235783Skib		intel_sdvo->has_hdmi_audio = has_audio;
1717235783Skib		goto done;
1718235783Skib	}
1719235783Skib
1720235783Skib	if (property == dev_priv->broadcast_rgb_property) {
1721235783Skib		if (val == !!intel_sdvo->color_range)
1722235783Skib			return 0;
1723235783Skib
1724235783Skib		intel_sdvo->color_range = val ? SDVO_COLOR_RANGE_16_235 : 0;
1725235783Skib		goto done;
1726235783Skib	}
1727235783Skib
1728235783Skib#define CHECK_PROPERTY(name, NAME) \
1729235783Skib	if (intel_sdvo_connector->name == property) { \
1730235783Skib		if (intel_sdvo_connector->cur_##name == temp_value) return 0; \
1731235783Skib		if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
1732235783Skib		cmd = SDVO_CMD_SET_##NAME; \
1733235783Skib		intel_sdvo_connector->cur_##name = temp_value; \
1734235783Skib		goto set_value; \
1735235783Skib	}
1736235783Skib
1737235783Skib	if (property == intel_sdvo_connector->tv_format) {
1738235783Skib		if (val >= TV_FORMAT_NUM)
1739235783Skib			return -EINVAL;
1740235783Skib
1741235783Skib		if (intel_sdvo->tv_format_index ==
1742235783Skib		    intel_sdvo_connector->tv_format_supported[val])
1743235783Skib			return 0;
1744235783Skib
1745235783Skib		intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val];
1746235783Skib		goto done;
1747235783Skib	} else if (IS_TV_OR_LVDS(intel_sdvo_connector)) {
1748235783Skib		temp_value = val;
1749235783Skib		if (intel_sdvo_connector->left == property) {
1750235783Skib			drm_connector_property_set_value(connector,
1751235783Skib							 intel_sdvo_connector->right, val);
1752235783Skib			if (intel_sdvo_connector->left_margin == temp_value)
1753235783Skib				return 0;
1754235783Skib
1755235783Skib			intel_sdvo_connector->left_margin = temp_value;
1756235783Skib			intel_sdvo_connector->right_margin = temp_value;
1757235783Skib			temp_value = intel_sdvo_connector->max_hscan -
1758235783Skib				intel_sdvo_connector->left_margin;
1759235783Skib			cmd = SDVO_CMD_SET_OVERSCAN_H;
1760235783Skib			goto set_value;
1761235783Skib		} else if (intel_sdvo_connector->right == property) {
1762235783Skib			drm_connector_property_set_value(connector,
1763235783Skib							 intel_sdvo_connector->left, val);
1764235783Skib			if (intel_sdvo_connector->right_margin == temp_value)
1765235783Skib				return 0;
1766235783Skib
1767235783Skib			intel_sdvo_connector->left_margin = temp_value;
1768235783Skib			intel_sdvo_connector->right_margin = temp_value;
1769235783Skib			temp_value = intel_sdvo_connector->max_hscan -
1770235783Skib				intel_sdvo_connector->left_margin;
1771235783Skib			cmd = SDVO_CMD_SET_OVERSCAN_H;
1772235783Skib			goto set_value;
1773235783Skib		} else if (intel_sdvo_connector->top == property) {
1774235783Skib			drm_connector_property_set_value(connector,
1775235783Skib							 intel_sdvo_connector->bottom, val);
1776235783Skib			if (intel_sdvo_connector->top_margin == temp_value)
1777235783Skib				return 0;
1778235783Skib
1779235783Skib			intel_sdvo_connector->top_margin = temp_value;
1780235783Skib			intel_sdvo_connector->bottom_margin = temp_value;
1781235783Skib			temp_value = intel_sdvo_connector->max_vscan -
1782235783Skib				intel_sdvo_connector->top_margin;
1783235783Skib			cmd = SDVO_CMD_SET_OVERSCAN_V;
1784235783Skib			goto set_value;
1785235783Skib		} else if (intel_sdvo_connector->bottom == property) {
1786235783Skib			drm_connector_property_set_value(connector,
1787235783Skib							 intel_sdvo_connector->top, val);
1788235783Skib			if (intel_sdvo_connector->bottom_margin == temp_value)
1789235783Skib				return 0;
1790235783Skib
1791235783Skib			intel_sdvo_connector->top_margin = temp_value;
1792235783Skib			intel_sdvo_connector->bottom_margin = temp_value;
1793235783Skib			temp_value = intel_sdvo_connector->max_vscan -
1794235783Skib				intel_sdvo_connector->top_margin;
1795235783Skib			cmd = SDVO_CMD_SET_OVERSCAN_V;
1796235783Skib			goto set_value;
1797235783Skib		}
1798235783Skib		CHECK_PROPERTY(hpos, HPOS)
1799235783Skib		CHECK_PROPERTY(vpos, VPOS)
1800235783Skib		CHECK_PROPERTY(saturation, SATURATION)
1801235783Skib		CHECK_PROPERTY(contrast, CONTRAST)
1802235783Skib		CHECK_PROPERTY(hue, HUE)
1803235783Skib		CHECK_PROPERTY(brightness, BRIGHTNESS)
1804235783Skib		CHECK_PROPERTY(sharpness, SHARPNESS)
1805235783Skib		CHECK_PROPERTY(flicker_filter, FLICKER_FILTER)
1806235783Skib		CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D)
1807235783Skib		CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE)
1808235783Skib		CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER)
1809235783Skib		CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER)
1810235783Skib		CHECK_PROPERTY(dot_crawl, DOT_CRAWL)
1811235783Skib	}
1812235783Skib
1813235783Skib	return -EINVAL; /* unknown property */
1814235783Skib
1815235783Skibset_value:
1816235783Skib	if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2))
1817235783Skib		return -EIO;
1818235783Skib
1819235783Skib
1820235783Skibdone:
1821235783Skib	if (intel_sdvo->base.base.crtc) {
1822235783Skib		struct drm_crtc *crtc = intel_sdvo->base.base.crtc;
1823235783Skib		drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc->x,
1824235783Skib					 crtc->y, crtc->fb);
1825235783Skib	}
1826235783Skib
1827235783Skib	return 0;
1828235783Skib#undef CHECK_PROPERTY
1829235783Skib}
1830235783Skib
1831235783Skibstatic const struct drm_encoder_helper_funcs intel_sdvo_helper_funcs = {
1832235783Skib	.dpms = intel_sdvo_dpms,
1833235783Skib	.mode_fixup = intel_sdvo_mode_fixup,
1834235783Skib	.prepare = intel_encoder_prepare,
1835235783Skib	.mode_set = intel_sdvo_mode_set,
1836235783Skib	.commit = intel_encoder_commit,
1837235783Skib};
1838235783Skib
1839235783Skibstatic const struct drm_connector_funcs intel_sdvo_connector_funcs = {
1840235783Skib	.dpms = drm_helper_connector_dpms,
1841235783Skib	.detect = intel_sdvo_detect,
1842235783Skib	.fill_modes = drm_helper_probe_single_connector_modes,
1843235783Skib	.set_property = intel_sdvo_set_property,
1844235783Skib	.destroy = intel_sdvo_destroy,
1845235783Skib};
1846235783Skib
1847235783Skibstatic const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
1848235783Skib	.get_modes = intel_sdvo_get_modes,
1849235783Skib	.mode_valid = intel_sdvo_mode_valid,
1850235783Skib	.best_encoder = intel_best_encoder,
1851235783Skib};
1852235783Skib
1853235783Skibstatic void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
1854235783Skib{
1855235783Skib	struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1856235783Skib
1857235783Skib	if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
1858235783Skib		drm_mode_destroy(encoder->dev,
1859235783Skib				 intel_sdvo->sdvo_lvds_fixed_mode);
1860235783Skib
1861235783Skib	device_delete_child(intel_sdvo->base.base.dev->device,
1862235783Skib	    intel_sdvo->ddc_iic_bus);
1863235783Skib	intel_encoder_destroy(encoder);
1864235783Skib}
1865235783Skib
1866235783Skibstatic const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
1867235783Skib	.destroy = intel_sdvo_enc_destroy,
1868235783Skib};
1869235783Skib
1870235783Skibstatic void
1871235783Skibintel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
1872235783Skib{
1873235783Skib	uint16_t mask = 0;
1874235783Skib	unsigned int num_bits;
1875235783Skib
1876235783Skib	/* Make a mask of outputs less than or equal to our own priority in the
1877235783Skib	 * list.
1878235783Skib	 */
1879235783Skib	switch (sdvo->controlled_output) {
1880235783Skib	case SDVO_OUTPUT_LVDS1:
1881235783Skib		mask |= SDVO_OUTPUT_LVDS1;
1882235783Skib	case SDVO_OUTPUT_LVDS0:
1883235783Skib		mask |= SDVO_OUTPUT_LVDS0;
1884235783Skib	case SDVO_OUTPUT_TMDS1:
1885235783Skib		mask |= SDVO_OUTPUT_TMDS1;
1886235783Skib	case SDVO_OUTPUT_TMDS0:
1887235783Skib		mask |= SDVO_OUTPUT_TMDS0;
1888235783Skib	case SDVO_OUTPUT_RGB1:
1889235783Skib		mask |= SDVO_OUTPUT_RGB1;
1890235783Skib	case SDVO_OUTPUT_RGB0:
1891235783Skib		mask |= SDVO_OUTPUT_RGB0;
1892235783Skib		break;
1893235783Skib	}
1894235783Skib
1895235783Skib	/* Count bits to find what number we are in the priority list. */
1896235783Skib	mask &= sdvo->caps.output_flags;
1897235783Skib	num_bits = bitcount16(mask);
1898235783Skib	/* If more than 3 outputs, default to DDC bus 3 for now. */
1899235783Skib	if (num_bits > 3)
1900235783Skib		num_bits = 3;
1901235783Skib
1902235783Skib	/* Corresponds to SDVO_CONTROL_BUS_DDCx */
1903235783Skib	sdvo->ddc_bus = 1 << num_bits;
1904235783Skib}
1905235783Skib
1906235783Skib/**
1907235783Skib * Choose the appropriate DDC bus for control bus switch command for this
1908235783Skib * SDVO output based on the controlled output.
1909235783Skib *
1910235783Skib * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
1911235783Skib * outputs, then LVDS outputs.
1912235783Skib */
1913235783Skibstatic void
1914235783Skibintel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
1915235783Skib			  struct intel_sdvo *sdvo, u32 reg)
1916235783Skib{
1917235783Skib	struct sdvo_device_mapping *mapping;
1918235783Skib
1919235783Skib	if (IS_SDVOB(reg))
1920235783Skib		mapping = &(dev_priv->sdvo_mappings[0]);
1921235783Skib	else
1922235783Skib		mapping = &(dev_priv->sdvo_mappings[1]);
1923235783Skib
1924235783Skib	if (mapping->initialized)
1925235783Skib		sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
1926235783Skib	else
1927235783Skib		intel_sdvo_guess_ddc_bus(sdvo);
1928235783Skib}
1929235783Skib
1930235783Skibstatic void
1931235783Skibintel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
1932235783Skib			  struct intel_sdvo *sdvo, u32 reg)
1933235783Skib{
1934235783Skib	struct sdvo_device_mapping *mapping;
1935235783Skib	u8 pin;
1936235783Skib
1937235783Skib	if (IS_SDVOB(reg))
1938235783Skib		mapping = &dev_priv->sdvo_mappings[0];
1939235783Skib	else
1940235783Skib		mapping = &dev_priv->sdvo_mappings[1];
1941235783Skib
1942235783Skib	pin = GMBUS_PORT_DPB;
1943235783Skib	if (mapping->initialized)
1944235783Skib		pin = mapping->i2c_pin;
1945235783Skib
1946235783Skib	if (pin < GMBUS_NUM_PORTS) {
1947235783Skib		sdvo->i2c = dev_priv->gmbus[pin];
1948235783Skib		intel_gmbus_set_speed(sdvo->i2c, GMBUS_RATE_1MHZ);
1949235783Skib		intel_gmbus_force_bit(sdvo->i2c, true);
1950235783Skib	} else {
1951235783Skib		sdvo->i2c = dev_priv->gmbus[GMBUS_PORT_DPB];
1952235783Skib	}
1953235783Skib}
1954235783Skib
1955235783Skibstatic bool
1956235783Skibintel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
1957235783Skib{
1958235783Skib	return intel_sdvo_check_supp_encode(intel_sdvo);
1959235783Skib}
1960235783Skib
1961235783Skibstatic u8
1962235783Skibintel_sdvo_get_slave_addr(struct drm_device *dev, int sdvo_reg)
1963235783Skib{
1964235783Skib	struct drm_i915_private *dev_priv = dev->dev_private;
1965235783Skib	struct sdvo_device_mapping *my_mapping, *other_mapping;
1966235783Skib
1967235783Skib	if (IS_SDVOB(sdvo_reg)) {
1968235783Skib		my_mapping = &dev_priv->sdvo_mappings[0];
1969235783Skib		other_mapping = &dev_priv->sdvo_mappings[1];
1970235783Skib	} else {
1971235783Skib		my_mapping = &dev_priv->sdvo_mappings[1];
1972235783Skib		other_mapping = &dev_priv->sdvo_mappings[0];
1973235783Skib	}
1974235783Skib
1975235783Skib	/* If the BIOS described our SDVO device, take advantage of it. */
1976235783Skib	if (my_mapping->slave_addr)
1977235783Skib		return my_mapping->slave_addr;
1978235783Skib
1979235783Skib	/* If the BIOS only described a different SDVO device, use the
1980235783Skib	 * address that it isn't using.
1981235783Skib	 */
1982235783Skib	if (other_mapping->slave_addr) {
1983235783Skib		if (other_mapping->slave_addr == 0x70)
1984235783Skib			return 0x72;
1985235783Skib		else
1986235783Skib			return 0x70;
1987235783Skib	}
1988235783Skib
1989235783Skib	/* No SDVO device info is found for another DVO port,
1990235783Skib	 * so use mapping assumption we had before BIOS parsing.
1991235783Skib	 */
1992235783Skib	if (IS_SDVOB(sdvo_reg))
1993235783Skib		return 0x70;
1994235783Skib	else
1995235783Skib		return 0x72;
1996235783Skib}
1997235783Skib
1998235783Skibstatic void
1999235783Skibintel_sdvo_connector_init(struct intel_sdvo_connector *connector,
2000235783Skib			  struct intel_sdvo *encoder)
2001235783Skib{
2002235783Skib	drm_connector_init(encoder->base.base.dev,
2003235783Skib			   &connector->base.base,
2004235783Skib			   &intel_sdvo_connector_funcs,
2005235783Skib			   connector->base.base.connector_type);
2006235783Skib
2007235783Skib	drm_connector_helper_add(&connector->base.base,
2008235783Skib				 &intel_sdvo_connector_helper_funcs);
2009235783Skib
2010235783Skib	connector->base.base.interlace_allowed = 1;
2011235783Skib	connector->base.base.doublescan_allowed = 0;
2012235783Skib	connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
2013235783Skib
2014235783Skib	intel_connector_attach_encoder(&connector->base, &encoder->base);
2015235783Skib#if 0
2016235783Skib	drm_sysfs_connector_add(&connector->base.base);
2017235783Skib#endif
2018235783Skib}
2019235783Skib
2020235783Skibstatic void
2021235783Skibintel_sdvo_add_hdmi_properties(struct intel_sdvo_connector *connector)
2022235783Skib{
2023235783Skib	struct drm_device *dev = connector->base.base.dev;
2024235783Skib
2025235783Skib	intel_attach_force_audio_property(&connector->base.base);
2026235783Skib	if (INTEL_INFO(dev)->gen >= 4 && IS_MOBILE(dev))
2027235783Skib		intel_attach_broadcast_rgb_property(&connector->base.base);
2028235783Skib}
2029235783Skib
2030235783Skibstatic bool
2031235783Skibintel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
2032235783Skib{
2033235783Skib	struct drm_encoder *encoder = &intel_sdvo->base.base;
2034235783Skib	struct drm_connector *connector;
2035235783Skib	struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
2036235783Skib	struct intel_connector *intel_connector;
2037235783Skib	struct intel_sdvo_connector *intel_sdvo_connector;
2038235783Skib
2039235783Skib	intel_sdvo_connector = malloc(sizeof(struct intel_sdvo_connector),
2040235783Skib	    DRM_MEM_KMS, M_WAITOK | M_ZERO);
2041235783Skib
2042235783Skib	if (device == 0) {
2043235783Skib		intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
2044235783Skib		intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
2045235783Skib	} else if (device == 1) {
2046235783Skib		intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
2047235783Skib		intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
2048235783Skib	}
2049235783Skib
2050235783Skib	intel_connector = &intel_sdvo_connector->base;
2051235783Skib	connector = &intel_connector->base;
2052235783Skib	if (intel_sdvo_supports_hotplug(intel_sdvo) & (1 << device)) {
2053235783Skib		connector->polled = DRM_CONNECTOR_POLL_HPD;
2054235783Skib		intel_sdvo->hotplug_active[0] |= 1 << device;
2055235783Skib		/* Some SDVO devices have one-shot hotplug interrupts.
2056235783Skib		 * Ensure that they get re-enabled when an interrupt happens.
2057235783Skib		 */
2058235783Skib		intel_encoder->hot_plug = intel_sdvo_enable_hotplug;
2059235783Skib		intel_sdvo_enable_hotplug(intel_encoder);
2060235783Skib	}
2061235783Skib	else
2062235783Skib		connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
2063235783Skib	encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2064235783Skib	connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2065235783Skib
2066235783Skib	if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
2067235783Skib		connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
2068235783Skib		intel_sdvo->is_hdmi = true;
2069235783Skib	}
2070235783Skib	intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2071235783Skib				       (1 << INTEL_ANALOG_CLONE_BIT));
2072235783Skib
2073235783Skib	intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2074235783Skib	if (intel_sdvo->is_hdmi)
2075235783Skib		intel_sdvo_add_hdmi_properties(intel_sdvo_connector);
2076235783Skib
2077235783Skib	return true;
2078235783Skib}
2079235783Skib
2080235783Skibstatic bool
2081235783Skibintel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
2082235783Skib{
2083235783Skib	struct drm_encoder *encoder = &intel_sdvo->base.base;
2084235783Skib	struct drm_connector *connector;
2085235783Skib	struct intel_connector *intel_connector;
2086235783Skib	struct intel_sdvo_connector *intel_sdvo_connector;
2087235783Skib
2088235783Skib	intel_sdvo_connector = malloc(sizeof(struct intel_sdvo_connector),
2089235783Skib	    DRM_MEM_KMS, M_WAITOK | M_ZERO);
2090235783Skib	if (!intel_sdvo_connector)
2091235783Skib		return false;
2092235783Skib
2093235783Skib	intel_connector = &intel_sdvo_connector->base;
2094235783Skib	connector = &intel_connector->base;
2095235783Skib	encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2096235783Skib	connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
2097235783Skib
2098235783Skib	intel_sdvo->controlled_output |= type;
2099235783Skib	intel_sdvo_connector->output_flag = type;
2100235783Skib
2101235783Skib	intel_sdvo->is_tv = true;
2102235783Skib	intel_sdvo->base.needs_tv_clock = true;
2103235783Skib	intel_sdvo->base.clone_mask = 1 << INTEL_SDVO_TV_CLONE_BIT;
2104235783Skib
2105235783Skib	intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2106235783Skib
2107235783Skib	if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
2108235783Skib		goto err;
2109235783Skib
2110235783Skib	if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2111235783Skib		goto err;
2112235783Skib
2113235783Skib	return true;
2114235783Skib
2115235783Skiberr:
2116235783Skib	intel_sdvo_destroy(connector);
2117235783Skib	return false;
2118235783Skib}
2119235783Skib
2120235783Skibstatic bool
2121235783Skibintel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
2122235783Skib{
2123235783Skib	struct drm_encoder *encoder = &intel_sdvo->base.base;
2124235783Skib	struct drm_connector *connector;
2125235783Skib	struct intel_connector *intel_connector;
2126235783Skib	struct intel_sdvo_connector *intel_sdvo_connector;
2127235783Skib
2128235783Skib	intel_sdvo_connector = malloc(sizeof(struct intel_sdvo_connector),
2129235783Skib	    DRM_MEM_KMS, M_WAITOK | M_ZERO);
2130235783Skib
2131235783Skib	intel_connector = &intel_sdvo_connector->base;
2132235783Skib	connector = &intel_connector->base;
2133235783Skib	connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2134235783Skib	encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2135235783Skib	connector->connector_type = DRM_MODE_CONNECTOR_VGA;
2136235783Skib
2137235783Skib	if (device == 0) {
2138235783Skib		intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
2139235783Skib		intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
2140235783Skib	} else if (device == 1) {
2141235783Skib		intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
2142235783Skib		intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
2143235783Skib	}
2144235783Skib
2145235783Skib	intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2146235783Skib				       (1 << INTEL_ANALOG_CLONE_BIT));
2147235783Skib
2148235783Skib	intel_sdvo_connector_init(intel_sdvo_connector,
2149235783Skib				  intel_sdvo);
2150235783Skib	return true;
2151235783Skib}
2152235783Skib
2153235783Skibstatic bool
2154235783Skibintel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
2155235783Skib{
2156235783Skib	struct drm_encoder *encoder = &intel_sdvo->base.base;
2157235783Skib	struct drm_connector *connector;
2158235783Skib	struct intel_connector *intel_connector;
2159235783Skib	struct intel_sdvo_connector *intel_sdvo_connector;
2160235783Skib
2161235783Skib	intel_sdvo_connector = malloc(sizeof(struct intel_sdvo_connector),
2162235783Skib	    DRM_MEM_KMS, M_WAITOK | M_ZERO);
2163235783Skib
2164235783Skib	intel_connector = &intel_sdvo_connector->base;
2165235783Skib	connector = &intel_connector->base;
2166235783Skib	encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2167235783Skib	connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2168235783Skib
2169235783Skib	if (device == 0) {
2170235783Skib		intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
2171235783Skib		intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
2172235783Skib	} else if (device == 1) {
2173235783Skib		intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
2174235783Skib		intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
2175235783Skib	}
2176235783Skib
2177235783Skib	intel_sdvo->base.clone_mask = ((1 << INTEL_ANALOG_CLONE_BIT) |
2178235783Skib				       (1 << INTEL_SDVO_LVDS_CLONE_BIT));
2179235783Skib
2180235783Skib	intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2181235783Skib	if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2182235783Skib		goto err;
2183235783Skib
2184235783Skib	return true;
2185235783Skib
2186235783Skiberr:
2187235783Skib	intel_sdvo_destroy(connector);
2188235783Skib	return false;
2189235783Skib}
2190235783Skib
2191235783Skibstatic bool
2192235783Skibintel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
2193235783Skib{
2194235783Skib	intel_sdvo->is_tv = false;
2195235783Skib	intel_sdvo->base.needs_tv_clock = false;
2196235783Skib	intel_sdvo->is_lvds = false;
2197235783Skib
2198235783Skib	/* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
2199235783Skib
2200235783Skib	if (flags & SDVO_OUTPUT_TMDS0)
2201235783Skib		if (!intel_sdvo_dvi_init(intel_sdvo, 0))
2202235783Skib			return false;
2203235783Skib
2204235783Skib	if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
2205235783Skib		if (!intel_sdvo_dvi_init(intel_sdvo, 1))
2206235783Skib			return false;
2207235783Skib
2208235783Skib	/* TV has no XXX1 function block */
2209235783Skib	if (flags & SDVO_OUTPUT_SVID0)
2210235783Skib		if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
2211235783Skib			return false;
2212235783Skib
2213235783Skib	if (flags & SDVO_OUTPUT_CVBS0)
2214235783Skib		if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
2215235783Skib			return false;
2216235783Skib
2217235783Skib	if (flags & SDVO_OUTPUT_RGB0)
2218235783Skib		if (!intel_sdvo_analog_init(intel_sdvo, 0))
2219235783Skib			return false;
2220235783Skib
2221235783Skib	if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
2222235783Skib		if (!intel_sdvo_analog_init(intel_sdvo, 1))
2223235783Skib			return false;
2224235783Skib
2225235783Skib	if (flags & SDVO_OUTPUT_LVDS0)
2226235783Skib		if (!intel_sdvo_lvds_init(intel_sdvo, 0))
2227235783Skib			return false;
2228235783Skib
2229235783Skib	if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
2230235783Skib		if (!intel_sdvo_lvds_init(intel_sdvo, 1))
2231235783Skib			return false;
2232235783Skib
2233235783Skib	if ((flags & SDVO_OUTPUT_MASK) == 0) {
2234235783Skib		unsigned char bytes[2];
2235235783Skib
2236235783Skib		intel_sdvo->controlled_output = 0;
2237235783Skib		memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
2238235783Skib		DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
2239235783Skib			      SDVO_NAME(intel_sdvo),
2240235783Skib			      bytes[0], bytes[1]);
2241235783Skib		return false;
2242235783Skib	}
2243235783Skib	intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
2244235783Skib
2245235783Skib	return true;
2246235783Skib}
2247235783Skib
2248235783Skibstatic bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
2249235783Skib					  struct intel_sdvo_connector *intel_sdvo_connector,
2250235783Skib					  int type)
2251235783Skib{
2252235783Skib	struct drm_device *dev = intel_sdvo->base.base.dev;
2253235783Skib	struct intel_sdvo_tv_format format;
2254235783Skib	uint32_t format_map, i;
2255235783Skib
2256235783Skib	if (!intel_sdvo_set_target_output(intel_sdvo, type))
2257235783Skib		return false;
2258235783Skib
2259235783Skib	CTASSERT(sizeof(format) == 6);
2260235783Skib	if (!intel_sdvo_get_value(intel_sdvo,
2261235783Skib				  SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
2262235783Skib				  &format, sizeof(format)))
2263235783Skib		return false;
2264235783Skib
2265235783Skib	memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
2266235783Skib
2267235783Skib	if (format_map == 0)
2268235783Skib		return false;
2269235783Skib
2270235783Skib	intel_sdvo_connector->format_supported_num = 0;
2271235783Skib	for (i = 0 ; i < TV_FORMAT_NUM; i++)
2272235783Skib		if (format_map & (1 << i))
2273235783Skib			intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
2274235783Skib
2275235783Skib
2276235783Skib	intel_sdvo_connector->tv_format =
2277235783Skib			drm_property_create(dev, DRM_MODE_PROP_ENUM,
2278235783Skib					    "mode", intel_sdvo_connector->format_supported_num);
2279235783Skib	if (!intel_sdvo_connector->tv_format)
2280235783Skib		return false;
2281235783Skib
2282235783Skib	for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
2283235783Skib		drm_property_add_enum(
2284235783Skib				intel_sdvo_connector->tv_format, i,
2285235783Skib				i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
2286235783Skib
2287235783Skib	intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0];
2288235783Skib	drm_connector_attach_property(&intel_sdvo_connector->base.base,
2289235783Skib				      intel_sdvo_connector->tv_format, 0);
2290235783Skib	return true;
2291235783Skib
2292235783Skib}
2293235783Skib
2294235783Skib#define ENHANCEMENT(name, NAME) do { \
2295235783Skib	if (enhancements.name) { \
2296235783Skib		if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2297235783Skib		    !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2298235783Skib			return false; \
2299235783Skib		intel_sdvo_connector->max_##name = data_value[0]; \
2300235783Skib		intel_sdvo_connector->cur_##name = response; \
2301235783Skib		intel_sdvo_connector->name = \
2302235783Skib			drm_property_create_range(dev, 0, #name, 0, data_value[0]); \
2303235783Skib		if (!intel_sdvo_connector->name) return false; \
2304235783Skib		drm_connector_attach_property(connector, \
2305235783Skib					      intel_sdvo_connector->name, \
2306235783Skib					      intel_sdvo_connector->cur_##name); \
2307235783Skib		DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2308235783Skib			      data_value[0], data_value[1], response); \
2309235783Skib	} \
2310235783Skib} while (0)
2311235783Skib
2312235783Skibstatic bool
2313235783Skibintel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
2314235783Skib				      struct intel_sdvo_connector *intel_sdvo_connector,
2315235783Skib				      struct intel_sdvo_enhancements_reply enhancements)
2316235783Skib{
2317235783Skib	struct drm_device *dev = intel_sdvo->base.base.dev;
2318235783Skib	struct drm_connector *connector = &intel_sdvo_connector->base.base;
2319235783Skib	uint16_t response, data_value[2];
2320235783Skib
2321235783Skib	/* when horizontal overscan is supported, Add the left/right  property */
2322235783Skib	if (enhancements.overscan_h) {
2323235783Skib		if (!intel_sdvo_get_value(intel_sdvo,
2324235783Skib					  SDVO_CMD_GET_MAX_OVERSCAN_H,
2325235783Skib					  &data_value, 4))
2326235783Skib			return false;
2327235783Skib
2328235783Skib		if (!intel_sdvo_get_value(intel_sdvo,
2329235783Skib					  SDVO_CMD_GET_OVERSCAN_H,
2330235783Skib					  &response, 2))
2331235783Skib			return false;
2332235783Skib
2333235783Skib		intel_sdvo_connector->max_hscan = data_value[0];
2334235783Skib		intel_sdvo_connector->left_margin = data_value[0] - response;
2335235783Skib		intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin;
2336235783Skib		intel_sdvo_connector->left =
2337235783Skib			drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]);
2338235783Skib		if (!intel_sdvo_connector->left)
2339235783Skib			return false;
2340235783Skib
2341235783Skib		drm_connector_attach_property(connector,
2342235783Skib					      intel_sdvo_connector->left,
2343235783Skib					      intel_sdvo_connector->left_margin);
2344235783Skib
2345235783Skib		intel_sdvo_connector->right =
2346235783Skib			drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]);
2347235783Skib		if (!intel_sdvo_connector->right)
2348235783Skib			return false;
2349235783Skib
2350235783Skib		drm_connector_attach_property(connector,
2351235783Skib					      intel_sdvo_connector->right,
2352235783Skib					      intel_sdvo_connector->right_margin);
2353235783Skib		DRM_DEBUG_KMS("h_overscan: max %d, "
2354235783Skib			      "default %d, current %d\n",
2355235783Skib			      data_value[0], data_value[1], response);
2356235783Skib	}
2357235783Skib
2358235783Skib	if (enhancements.overscan_v) {
2359235783Skib		if (!intel_sdvo_get_value(intel_sdvo,
2360235783Skib					  SDVO_CMD_GET_MAX_OVERSCAN_V,
2361235783Skib					  &data_value, 4))
2362235783Skib			return false;
2363235783Skib
2364235783Skib		if (!intel_sdvo_get_value(intel_sdvo,
2365235783Skib					  SDVO_CMD_GET_OVERSCAN_V,
2366235783Skib					  &response, 2))
2367235783Skib			return false;
2368235783Skib
2369235783Skib		intel_sdvo_connector->max_vscan = data_value[0];
2370235783Skib		intel_sdvo_connector->top_margin = data_value[0] - response;
2371235783Skib		intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin;
2372235783Skib		intel_sdvo_connector->top =
2373235783Skib			drm_property_create_range(dev, 0,
2374235783Skib					    "top_margin", 0, data_value[0]);
2375235783Skib		if (!intel_sdvo_connector->top)
2376235783Skib			return false;
2377235783Skib
2378235783Skib		drm_connector_attach_property(connector,
2379235783Skib					      intel_sdvo_connector->top,
2380235783Skib					      intel_sdvo_connector->top_margin);
2381235783Skib
2382235783Skib		intel_sdvo_connector->bottom =
2383235783Skib			drm_property_create_range(dev, 0,
2384235783Skib					    "bottom_margin", 0, data_value[0]);
2385235783Skib		if (!intel_sdvo_connector->bottom)
2386235783Skib			return false;
2387235783Skib
2388235783Skib		drm_connector_attach_property(connector,
2389235783Skib					      intel_sdvo_connector->bottom,
2390235783Skib					      intel_sdvo_connector->bottom_margin);
2391235783Skib		DRM_DEBUG_KMS("v_overscan: max %d, "
2392235783Skib			      "default %d, current %d\n",
2393235783Skib			      data_value[0], data_value[1], response);
2394235783Skib	}
2395235783Skib
2396235783Skib	ENHANCEMENT(hpos, HPOS);
2397235783Skib	ENHANCEMENT(vpos, VPOS);
2398235783Skib	ENHANCEMENT(saturation, SATURATION);
2399235783Skib	ENHANCEMENT(contrast, CONTRAST);
2400235783Skib	ENHANCEMENT(hue, HUE);
2401235783Skib	ENHANCEMENT(sharpness, SHARPNESS);
2402235783Skib	ENHANCEMENT(brightness, BRIGHTNESS);
2403235783Skib	ENHANCEMENT(flicker_filter, FLICKER_FILTER);
2404235783Skib	ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
2405235783Skib	ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D);
2406235783Skib	ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER);
2407235783Skib	ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER);
2408235783Skib
2409235783Skib	if (enhancements.dot_crawl) {
2410235783Skib		if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
2411235783Skib			return false;
2412235783Skib
2413235783Skib		intel_sdvo_connector->max_dot_crawl = 1;
2414235783Skib		intel_sdvo_connector->cur_dot_crawl = response & 0x1;
2415235783Skib		intel_sdvo_connector->dot_crawl =
2416235783Skib			drm_property_create_range(dev, 0, "dot_crawl", 0, 1);
2417235783Skib		if (!intel_sdvo_connector->dot_crawl)
2418235783Skib			return false;
2419235783Skib
2420235783Skib		drm_connector_attach_property(connector,
2421235783Skib					      intel_sdvo_connector->dot_crawl,
2422235783Skib					      intel_sdvo_connector->cur_dot_crawl);
2423235783Skib		DRM_DEBUG_KMS("dot crawl: current %d\n", response);
2424235783Skib	}
2425235783Skib
2426235783Skib	return true;
2427235783Skib}
2428235783Skib
2429235783Skibstatic bool
2430235783Skibintel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
2431235783Skib					struct intel_sdvo_connector *intel_sdvo_connector,
2432235783Skib					struct intel_sdvo_enhancements_reply enhancements)
2433235783Skib{
2434235783Skib	struct drm_device *dev = intel_sdvo->base.base.dev;
2435235783Skib	struct drm_connector *connector = &intel_sdvo_connector->base.base;
2436235783Skib	uint16_t response, data_value[2];
2437235783Skib
2438235783Skib	ENHANCEMENT(brightness, BRIGHTNESS);
2439235783Skib
2440235783Skib	return true;
2441235783Skib}
2442235783Skib#undef ENHANCEMENT
2443235783Skib
2444235783Skibstatic bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
2445235783Skib					       struct intel_sdvo_connector *intel_sdvo_connector)
2446235783Skib{
2447235783Skib	union {
2448235783Skib		struct intel_sdvo_enhancements_reply reply;
2449235783Skib		uint16_t response;
2450235783Skib	} enhancements;
2451235783Skib
2452235783Skib	CTASSERT(sizeof(enhancements) == 2);
2453235783Skib
2454235783Skib	enhancements.response = 0;
2455235783Skib	intel_sdvo_get_value(intel_sdvo,
2456235783Skib			     SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
2457235783Skib			     &enhancements, sizeof(enhancements));
2458235783Skib	if (enhancements.response == 0) {
2459235783Skib		DRM_DEBUG_KMS("No enhancement is supported\n");
2460235783Skib		return true;
2461235783Skib	}
2462235783Skib
2463235783Skib	if (IS_TV(intel_sdvo_connector))
2464235783Skib		return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2465235783Skib	else if (IS_LVDS(intel_sdvo_connector))
2466235783Skib		return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2467235783Skib	else
2468235783Skib		return true;
2469235783Skib}
2470235783Skib
2471235783Skibstruct intel_sdvo_ddc_proxy_sc {
2472235783Skib	struct intel_sdvo *intel_sdvo;
2473235783Skib	device_t port;
2474235783Skib};
2475235783Skib
2476235783Skibstatic int
2477235783Skibintel_sdvo_ddc_proxy_probe(device_t idev)
2478235783Skib{
2479235783Skib
2480235783Skib	return (BUS_PROBE_DEFAULT);
2481235783Skib}
2482235783Skib
2483235783Skibstatic int
2484235783Skibintel_sdvo_ddc_proxy_attach(device_t idev)
2485235783Skib{
2486235783Skib	struct intel_sdvo_ddc_proxy_sc *sc;
2487235783Skib
2488235783Skib	sc = device_get_softc(idev);
2489235783Skib	sc->port = device_add_child(idev, "iicbus", -1);
2490235783Skib	if (sc->port == NULL)
2491235783Skib		return (ENXIO);
2492235783Skib	device_quiet(sc->port);
2493235783Skib	bus_generic_attach(idev);
2494235783Skib	return (0);
2495235783Skib}
2496235783Skib
2497235783Skibstatic int
2498235783Skibintel_sdvo_ddc_proxy_detach(device_t idev)
2499235783Skib{
2500235783Skib	struct intel_sdvo_ddc_proxy_sc *sc;
2501235783Skib	device_t port;
2502235783Skib
2503235783Skib	sc = device_get_softc(idev);
2504235783Skib	port = sc->port;
2505235783Skib	bus_generic_detach(idev);
2506235783Skib	if (port != NULL)
2507235783Skib		device_delete_child(idev, port);
2508235783Skib	return (0);
2509235783Skib}
2510235783Skib
2511235783Skibstatic int
2512235783Skibintel_sdvo_ddc_proxy_reset(device_t idev, u_char speed, u_char addr,
2513235783Skib    u_char *oldaddr)
2514235783Skib{
2515235783Skib	struct intel_sdvo_ddc_proxy_sc *sc;
2516235783Skib	struct intel_sdvo *sdvo;
2517235783Skib
2518235783Skib	sc = device_get_softc(idev);
2519235783Skib	sdvo = sc->intel_sdvo;
2520235783Skib
2521235783Skib	return (IICBUS_RESET(device_get_parent(sdvo->i2c), speed, addr,
2522235783Skib	    oldaddr));
2523235783Skib}
2524235783Skib
2525235783Skibstatic int
2526235783Skibintel_sdvo_ddc_proxy_transfer(device_t idev, struct iic_msg *msgs, uint32_t num)
2527235783Skib{
2528235783Skib	struct intel_sdvo_ddc_proxy_sc *sc;
2529235783Skib	struct intel_sdvo *sdvo;
2530235783Skib
2531235783Skib	sc = device_get_softc(idev);
2532235783Skib	sdvo = sc->intel_sdvo;
2533235783Skib
2534235783Skib	if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
2535235783Skib		return (EIO);
2536235783Skib
2537235783Skib	return (iicbus_transfer(sdvo->i2c, msgs, num));
2538235783Skib}
2539235783Skib
2540235783Skibstatic bool
2541235783Skibintel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo, struct drm_device *dev,
2542235783Skib    int sdvo_reg)
2543235783Skib{
2544235783Skib	struct intel_sdvo_ddc_proxy_sc *sc;
2545235783Skib	int ret;
2546235783Skib
2547235783Skib	sdvo->ddc_iic_bus = device_add_child(dev->device,
2548235783Skib	    "intel_sdvo_ddc_proxy", sdvo_reg);
2549235783Skib	if (sdvo->ddc_iic_bus == NULL) {
2550235783Skib		DRM_ERROR("cannot create ddc proxy bus %d\n", sdvo_reg);
2551235783Skib		return (false);
2552235783Skib	}
2553235783Skib	device_quiet(sdvo->ddc_iic_bus);
2554235783Skib	ret = device_probe_and_attach(sdvo->ddc_iic_bus);
2555235783Skib	if (ret != 0) {
2556235783Skib		DRM_ERROR("cannot attach proxy bus %d error %d\n",
2557235783Skib		    sdvo_reg, ret);
2558235783Skib		device_delete_child(dev->device, sdvo->ddc_iic_bus);
2559235783Skib		return (false);
2560235783Skib	}
2561235783Skib	sc = device_get_softc(sdvo->ddc_iic_bus);
2562235783Skib	sc->intel_sdvo = sdvo;
2563235783Skib
2564235783Skib	sdvo->ddc = sc->port;
2565235783Skib	return (true);
2566235783Skib}
2567235783Skib
2568235783Skibstatic device_method_t intel_sdvo_ddc_proxy_methods[] = {
2569235783Skib	DEVMETHOD(device_probe,		intel_sdvo_ddc_proxy_probe),
2570235783Skib	DEVMETHOD(device_attach,	intel_sdvo_ddc_proxy_attach),
2571235783Skib	DEVMETHOD(device_detach,	intel_sdvo_ddc_proxy_detach),
2572235783Skib	DEVMETHOD(iicbus_reset,		intel_sdvo_ddc_proxy_reset),
2573235783Skib	DEVMETHOD(iicbus_transfer,	intel_sdvo_ddc_proxy_transfer),
2574235783Skib	DEVMETHOD_END
2575235783Skib};
2576235783Skibstatic driver_t intel_sdvo_ddc_proxy_driver = {
2577235783Skib	"intel_sdvo_ddc_proxy",
2578235783Skib	intel_sdvo_ddc_proxy_methods,
2579235783Skib	sizeof(struct intel_sdvo_ddc_proxy_sc)
2580235783Skib};
2581235783Skibstatic devclass_t intel_sdvo_devclass;
2582235783SkibDRIVER_MODULE_ORDERED(intel_sdvo_ddc_proxy, drmn, intel_sdvo_ddc_proxy_driver,
2583235783Skib    intel_sdvo_devclass, 0, 0, SI_ORDER_FIRST);
2584235783Skib
2585235783Skib
2586235783Skibbool intel_sdvo_init(struct drm_device *dev, int sdvo_reg)
2587235783Skib{
2588235783Skib	struct drm_i915_private *dev_priv = dev->dev_private;
2589235783Skib	struct intel_encoder *intel_encoder;
2590235783Skib	struct intel_sdvo *intel_sdvo;
2591235783Skib	int i;
2592235783Skib
2593235783Skib	intel_sdvo = malloc(sizeof(struct intel_sdvo), DRM_MEM_KMS,
2594235783Skib	    M_WAITOK | M_ZERO);
2595235783Skib
2596235783Skib	intel_sdvo->sdvo_reg = sdvo_reg;
2597235783Skib	intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, sdvo_reg) >> 1;
2598235783Skib	intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo, sdvo_reg);
2599235783Skib	if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev, sdvo_reg)) {
2600235783Skib		free(intel_sdvo, DRM_MEM_KMS);
2601235783Skib		return false;
2602235783Skib	}
2603235783Skib
2604235783Skib	/* encoder type will be decided later */
2605235783Skib	intel_encoder = &intel_sdvo->base;
2606235783Skib	intel_encoder->type = INTEL_OUTPUT_SDVO;
2607235783Skib	drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0);
2608235783Skib
2609235783Skib	/* Read the regs to test if we can talk to the device */
2610235783Skib	for (i = 0; i < 0x40; i++) {
2611235783Skib		u8 byte;
2612235783Skib
2613235783Skib		if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
2614235783Skib			DRM_DEBUG_KMS("No SDVO device found on SDVO%c\n",
2615235783Skib				      IS_SDVOB(sdvo_reg) ? 'B' : 'C');
2616235783Skib			goto err;
2617235783Skib		}
2618235783Skib	}
2619235783Skib
2620235783Skib	if (IS_SDVOB(sdvo_reg))
2621235783Skib		dev_priv->hotplug_supported_mask |= SDVOB_HOTPLUG_INT_STATUS;
2622235783Skib	else
2623235783Skib		dev_priv->hotplug_supported_mask |= SDVOC_HOTPLUG_INT_STATUS;
2624235783Skib
2625235783Skib	drm_encoder_helper_add(&intel_encoder->base, &intel_sdvo_helper_funcs);
2626235783Skib
2627235783Skib	/* In default case sdvo lvds is false */
2628235783Skib	if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
2629235783Skib		goto err;
2630235783Skib
2631235783Skib	/* Set up hotplug command - note paranoia about contents of reply.
2632235783Skib	 * We assume that the hardware is in a sane state, and only touch
2633235783Skib	 * the bits we think we understand.
2634235783Skib	 */
2635235783Skib	intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG,
2636235783Skib			     &intel_sdvo->hotplug_active, 2);
2637235783Skib	intel_sdvo->hotplug_active[0] &= ~0x3;
2638235783Skib
2639235783Skib	if (!intel_sdvo_output_setup(intel_sdvo,
2640235783Skib	    intel_sdvo->caps.output_flags)) {
2641235783Skib		DRM_DEBUG_KMS("SDVO output failed to setup on SDVO%c\n",
2642235783Skib			      IS_SDVOB(sdvo_reg) ? 'B' : 'C');
2643235783Skib		goto err;
2644235783Skib	}
2645235783Skib
2646235783Skib	intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg);
2647235783Skib
2648235783Skib	/* Set the input timing to the screen. Assume always input 0. */
2649235783Skib	if (!intel_sdvo_set_target_input(intel_sdvo))
2650235783Skib		goto err;
2651235783Skib
2652235783Skib	if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
2653235783Skib						    &intel_sdvo->pixel_clock_min,
2654235783Skib						    &intel_sdvo->pixel_clock_max))
2655235783Skib		goto err;
2656235783Skib
2657235783Skib	DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
2658235783Skib			"clock range %dMHz - %dMHz, "
2659235783Skib			"input 1: %c, input 2: %c, "
2660235783Skib			"output 1: %c, output 2: %c\n",
2661235783Skib			SDVO_NAME(intel_sdvo),
2662235783Skib			intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
2663235783Skib			intel_sdvo->caps.device_rev_id,
2664235783Skib			intel_sdvo->pixel_clock_min / 1000,
2665235783Skib			intel_sdvo->pixel_clock_max / 1000,
2666235783Skib			(intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
2667235783Skib			(intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
2668235783Skib			/* check currently supported outputs */
2669235783Skib			intel_sdvo->caps.output_flags &
2670235783Skib			(SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
2671235783Skib			intel_sdvo->caps.output_flags &
2672235783Skib			(SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
2673235783Skib	return true;
2674235783Skib
2675235783Skiberr:
2676235783Skib	drm_encoder_cleanup(&intel_encoder->base);
2677235783Skib	free(intel_sdvo, DRM_MEM_KMS);
2678235783Skib
2679235783Skib	return false;
2680235783Skib}
2681