1235676Sadrian/*- 2235676Sadrian * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting 3235676Sadrian * All rights reserved. 4235676Sadrian * 5235676Sadrian * Redistribution and use in source and binary forms, with or without 6235676Sadrian * modification, are permitted provided that the following conditions 7235676Sadrian * are met: 8235676Sadrian * 1. Redistributions of source code must retain the above copyright 9235676Sadrian * notice, this list of conditions and the following disclaimer, 10235676Sadrian * without modification. 11235676Sadrian * 2. Redistributions in binary form must reproduce at minimum a disclaimer 12235676Sadrian * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 13235676Sadrian * redistribution must be conditioned upon including a substantially 14235676Sadrian * similar Disclaimer requirement for further binary redistribution. 15235676Sadrian * 16235676Sadrian * NO WARRANTY 17235676Sadrian * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18235676Sadrian * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19235676Sadrian * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 20235676Sadrian * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 21235676Sadrian * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 22235676Sadrian * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23235676Sadrian * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24235676Sadrian * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 25235676Sadrian * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26235676Sadrian * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 27235676Sadrian * THE POSSIBILITY OF SUCH DAMAGES. 28235676Sadrian */ 29235676Sadrian 30235676Sadrian#include <sys/cdefs.h> 31235676Sadrian__FBSDID("$FreeBSD$"); 32235676Sadrian 33235676Sadrian/* 34235676Sadrian * Driver for the Atheros Wireless LAN controller. 35235676Sadrian * 36235676Sadrian * This software is derived from work of Atsushi Onoe; his contribution 37235676Sadrian * is greatly appreciated. 38235676Sadrian */ 39235676Sadrian 40235676Sadrian#include "opt_inet.h" 41235676Sadrian#include "opt_ath.h" 42235676Sadrian/* 43235676Sadrian * This is needed for register operations which are performed 44235676Sadrian * by the driver - eg, calls to ath_hal_gettsf32(). 45235676Sadrian * 46235676Sadrian * It's also required for any AH_DEBUG checks in here, eg the 47235676Sadrian * module dependencies. 48235676Sadrian */ 49235676Sadrian#include "opt_ah.h" 50235676Sadrian#include "opt_wlan.h" 51235676Sadrian 52235676Sadrian#include <sys/param.h> 53235676Sadrian#include <sys/systm.h> 54235676Sadrian#include <sys/sysctl.h> 55235676Sadrian#include <sys/mbuf.h> 56235676Sadrian#include <sys/malloc.h> 57235676Sadrian#include <sys/lock.h> 58235676Sadrian#include <sys/mutex.h> 59235676Sadrian#include <sys/kernel.h> 60235676Sadrian#include <sys/socket.h> 61235676Sadrian#include <sys/sockio.h> 62235676Sadrian#include <sys/errno.h> 63235676Sadrian#include <sys/callout.h> 64235676Sadrian#include <sys/bus.h> 65235676Sadrian#include <sys/endian.h> 66235676Sadrian#include <sys/kthread.h> 67235676Sadrian#include <sys/taskqueue.h> 68235676Sadrian#include <sys/priv.h> 69235676Sadrian#include <sys/module.h> 70235676Sadrian#include <sys/ktr.h> 71235676Sadrian#include <sys/smp.h> /* for mp_ncpus */ 72235676Sadrian 73235676Sadrian#include <machine/bus.h> 74235676Sadrian 75235676Sadrian#include <net/if.h> 76235676Sadrian#include <net/if_dl.h> 77235676Sadrian#include <net/if_media.h> 78235676Sadrian#include <net/if_types.h> 79235676Sadrian#include <net/if_arp.h> 80235676Sadrian#include <net/ethernet.h> 81235676Sadrian#include <net/if_llc.h> 82235676Sadrian 83235676Sadrian#include <net80211/ieee80211_var.h> 84235676Sadrian#include <net80211/ieee80211_regdomain.h> 85235676Sadrian#ifdef IEEE80211_SUPPORT_SUPERG 86235676Sadrian#include <net80211/ieee80211_superg.h> 87235676Sadrian#endif 88235676Sadrian#ifdef IEEE80211_SUPPORT_TDMA 89235676Sadrian#include <net80211/ieee80211_tdma.h> 90235676Sadrian#endif 91235676Sadrian 92235676Sadrian#include <net/bpf.h> 93235676Sadrian 94235676Sadrian#ifdef INET 95235676Sadrian#include <netinet/in.h> 96235676Sadrian#include <netinet/if_ether.h> 97235676Sadrian#endif 98235676Sadrian 99235676Sadrian#include <dev/ath/if_athvar.h> 100235676Sadrian#include <dev/ath/ath_hal/ah_devid.h> /* XXX for softled */ 101235676Sadrian#include <dev/ath/ath_hal/ah_diagcodes.h> 102235676Sadrian 103235676Sadrian#include <dev/ath/if_ath_debug.h> 104235676Sadrian#include <dev/ath/if_ath_misc.h> 105235676Sadrian#include <dev/ath/if_ath_tsf.h> 106235676Sadrian#include <dev/ath/if_ath_tx.h> 107235676Sadrian#include <dev/ath/if_ath_sysctl.h> 108235676Sadrian#include <dev/ath/if_ath_led.h> 109235676Sadrian#include <dev/ath/if_ath_keycache.h> 110235676Sadrian#include <dev/ath/if_ath_rx.h> 111235679Sadrian#include <dev/ath/if_ath_beacon.h> 112235676Sadrian#include <dev/ath/if_athdfs.h> 113235676Sadrian 114235676Sadrian#ifdef ATH_TX99_DIAG 115235676Sadrian#include <dev/ath/ath_tx99/ath_tx99.h> 116235676Sadrian#endif 117235676Sadrian 118242782Sadrian#ifdef ATH_DEBUG_ALQ 119242782Sadrian#include <dev/ath/if_ath_alq.h> 120242782Sadrian#endif 121242782Sadrian 122251655Sadrian#include <dev/ath/if_ath_lna_div.h> 123251655Sadrian 124235676Sadrian/* 125235676Sadrian * Calculate the receive filter according to the 126235676Sadrian * operating mode and state: 127235676Sadrian * 128235676Sadrian * o always accept unicast, broadcast, and multicast traffic 129235676Sadrian * o accept PHY error frames when hardware doesn't have MIB support 130235676Sadrian * to count and we need them for ANI (sta mode only until recently) 131235676Sadrian * and we are not scanning (ANI is disabled) 132235676Sadrian * NB: older hal's add rx filter bits out of sight and we need to 133235676Sadrian * blindly preserve them 134235676Sadrian * o probe request frames are accepted only when operating in 135235676Sadrian * hostap, adhoc, mesh, or monitor modes 136235676Sadrian * o enable promiscuous mode 137235676Sadrian * - when in monitor mode 138235676Sadrian * - if interface marked PROMISC (assumes bridge setting is filtered) 139235676Sadrian * o accept beacons: 140235676Sadrian * - when operating in station mode for collecting rssi data when 141235676Sadrian * the station is otherwise quiet, or 142235676Sadrian * - when operating in adhoc mode so the 802.11 layer creates 143235676Sadrian * node table entries for peers, 144235676Sadrian * - when scanning 145235676Sadrian * - when doing s/w beacon miss (e.g. for ap+sta) 146235676Sadrian * - when operating in ap mode in 11g to detect overlapping bss that 147235676Sadrian * require protection 148235676Sadrian * - when operating in mesh mode to detect neighbors 149235676Sadrian * o accept control frames: 150235676Sadrian * - when in monitor mode 151235676Sadrian * XXX HT protection for 11n 152235676Sadrian */ 153235676Sadrianu_int32_t 154235676Sadrianath_calcrxfilter(struct ath_softc *sc) 155235676Sadrian{ 156235676Sadrian struct ifnet *ifp = sc->sc_ifp; 157235676Sadrian struct ieee80211com *ic = ifp->if_l2com; 158235676Sadrian u_int32_t rfilt; 159235676Sadrian 160235676Sadrian rfilt = HAL_RX_FILTER_UCAST | HAL_RX_FILTER_BCAST | HAL_RX_FILTER_MCAST; 161235676Sadrian if (!sc->sc_needmib && !sc->sc_scanning) 162235676Sadrian rfilt |= HAL_RX_FILTER_PHYERR; 163235676Sadrian if (ic->ic_opmode != IEEE80211_M_STA) 164235676Sadrian rfilt |= HAL_RX_FILTER_PROBEREQ; 165235676Sadrian /* XXX ic->ic_monvaps != 0? */ 166235676Sadrian if (ic->ic_opmode == IEEE80211_M_MONITOR || (ifp->if_flags & IFF_PROMISC)) 167235676Sadrian rfilt |= HAL_RX_FILTER_PROM; 168235676Sadrian if (ic->ic_opmode == IEEE80211_M_STA || 169235676Sadrian ic->ic_opmode == IEEE80211_M_IBSS || 170235676Sadrian sc->sc_swbmiss || sc->sc_scanning) 171235676Sadrian rfilt |= HAL_RX_FILTER_BEACON; 172235676Sadrian /* 173235676Sadrian * NB: We don't recalculate the rx filter when 174235676Sadrian * ic_protmode changes; otherwise we could do 175235676Sadrian * this only when ic_protmode != NONE. 176235676Sadrian */ 177235676Sadrian if (ic->ic_opmode == IEEE80211_M_HOSTAP && 178235676Sadrian IEEE80211_IS_CHAN_ANYG(ic->ic_curchan)) 179235676Sadrian rfilt |= HAL_RX_FILTER_BEACON; 180235676Sadrian 181235676Sadrian /* 182235676Sadrian * Enable hardware PS-POLL RX only for hostap mode; 183235676Sadrian * STA mode sends PS-POLL frames but never 184235676Sadrian * receives them. 185235676Sadrian */ 186235676Sadrian if (ath_hal_getcapability(sc->sc_ah, HAL_CAP_PSPOLL, 187235676Sadrian 0, NULL) == HAL_OK && 188235676Sadrian ic->ic_opmode == IEEE80211_M_HOSTAP) 189235676Sadrian rfilt |= HAL_RX_FILTER_PSPOLL; 190235676Sadrian 191235676Sadrian if (sc->sc_nmeshvaps) { 192235676Sadrian rfilt |= HAL_RX_FILTER_BEACON; 193235676Sadrian if (sc->sc_hasbmatch) 194235676Sadrian rfilt |= HAL_RX_FILTER_BSSID; 195235676Sadrian else 196235676Sadrian rfilt |= HAL_RX_FILTER_PROM; 197235676Sadrian } 198235676Sadrian if (ic->ic_opmode == IEEE80211_M_MONITOR) 199235676Sadrian rfilt |= HAL_RX_FILTER_CONTROL; 200235676Sadrian 201235676Sadrian /* 202235676Sadrian * Enable RX of compressed BAR frames only when doing 203235676Sadrian * 802.11n. Required for A-MPDU. 204235676Sadrian */ 205235676Sadrian if (IEEE80211_IS_CHAN_HT(ic->ic_curchan)) 206235676Sadrian rfilt |= HAL_RX_FILTER_COMPBAR; 207235676Sadrian 208235676Sadrian /* 209235676Sadrian * Enable radar PHY errors if requested by the 210235676Sadrian * DFS module. 211235676Sadrian */ 212235676Sadrian if (sc->sc_dodfs) 213235676Sadrian rfilt |= HAL_RX_FILTER_PHYRADAR; 214235676Sadrian 215245183Sadrian /* 216245183Sadrian * Enable spectral PHY errors if requested by the 217245183Sadrian * spectral module. 218245183Sadrian */ 219245183Sadrian if (sc->sc_dospectral) 220245183Sadrian rfilt |= HAL_RX_FILTER_PHYRADAR; 221245183Sadrian 222235676Sadrian DPRINTF(sc, ATH_DEBUG_MODE, "%s: RX filter 0x%x, %s if_flags 0x%x\n", 223235676Sadrian __func__, rfilt, ieee80211_opmode_name[ic->ic_opmode], ifp->if_flags); 224235676Sadrian return rfilt; 225235676Sadrian} 226235676Sadrian 227238055Sadrianstatic int 228238055Sadrianath_legacy_rxbuf_init(struct ath_softc *sc, struct ath_buf *bf) 229235676Sadrian{ 230235676Sadrian struct ath_hal *ah = sc->sc_ah; 231235676Sadrian int error; 232235676Sadrian struct mbuf *m; 233235676Sadrian struct ath_desc *ds; 234235676Sadrian 235235676Sadrian m = bf->bf_m; 236235676Sadrian if (m == NULL) { 237235676Sadrian /* 238235676Sadrian * NB: by assigning a page to the rx dma buffer we 239235676Sadrian * implicitly satisfy the Atheros requirement that 240235676Sadrian * this buffer be cache-line-aligned and sized to be 241235676Sadrian * multiple of the cache line size. Not doing this 242235676Sadrian * causes weird stuff to happen (for the 5210 at least). 243235676Sadrian */ 244243857Sglebius m = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR); 245235676Sadrian if (m == NULL) { 246235676Sadrian DPRINTF(sc, ATH_DEBUG_ANY, 247235676Sadrian "%s: no mbuf/cluster\n", __func__); 248235676Sadrian sc->sc_stats.ast_rx_nombuf++; 249235676Sadrian return ENOMEM; 250235676Sadrian } 251235676Sadrian m->m_pkthdr.len = m->m_len = m->m_ext.ext_size; 252235676Sadrian 253235676Sadrian error = bus_dmamap_load_mbuf_sg(sc->sc_dmat, 254235676Sadrian bf->bf_dmamap, m, 255235676Sadrian bf->bf_segs, &bf->bf_nseg, 256235676Sadrian BUS_DMA_NOWAIT); 257235676Sadrian if (error != 0) { 258235676Sadrian DPRINTF(sc, ATH_DEBUG_ANY, 259235676Sadrian "%s: bus_dmamap_load_mbuf_sg failed; error %d\n", 260235676Sadrian __func__, error); 261235676Sadrian sc->sc_stats.ast_rx_busdma++; 262235676Sadrian m_freem(m); 263235676Sadrian return error; 264235676Sadrian } 265235676Sadrian KASSERT(bf->bf_nseg == 1, 266235676Sadrian ("multi-segment packet; nseg %u", bf->bf_nseg)); 267235676Sadrian bf->bf_m = m; 268235676Sadrian } 269235676Sadrian bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, BUS_DMASYNC_PREREAD); 270235676Sadrian 271235676Sadrian /* 272235676Sadrian * Setup descriptors. For receive we always terminate 273235676Sadrian * the descriptor list with a self-linked entry so we'll 274235676Sadrian * not get overrun under high load (as can happen with a 275235676Sadrian * 5212 when ANI processing enables PHY error frames). 276235676Sadrian * 277235676Sadrian * To insure the last descriptor is self-linked we create 278235676Sadrian * each descriptor as self-linked and add it to the end. As 279235676Sadrian * each additional descriptor is added the previous self-linked 280235676Sadrian * entry is ``fixed'' naturally. This should be safe even 281235676Sadrian * if DMA is happening. When processing RX interrupts we 282235676Sadrian * never remove/process the last, self-linked, entry on the 283235676Sadrian * descriptor list. This insures the hardware always has 284235676Sadrian * someplace to write a new frame. 285235676Sadrian */ 286235676Sadrian /* 287235676Sadrian * 11N: we can no longer afford to self link the last descriptor. 288235676Sadrian * MAC acknowledges BA status as long as it copies frames to host 289235676Sadrian * buffer (or rx fifo). This can incorrectly acknowledge packets 290235676Sadrian * to a sender if last desc is self-linked. 291235676Sadrian */ 292235676Sadrian ds = bf->bf_desc; 293235676Sadrian if (sc->sc_rxslink) 294235676Sadrian ds->ds_link = bf->bf_daddr; /* link to self */ 295235676Sadrian else 296235676Sadrian ds->ds_link = 0; /* terminate the list */ 297235676Sadrian ds->ds_data = bf->bf_segs[0].ds_addr; 298235676Sadrian ath_hal_setuprxdesc(ah, ds 299235676Sadrian , m->m_len /* buffer size */ 300235676Sadrian , 0 301235676Sadrian ); 302235676Sadrian 303235676Sadrian if (sc->sc_rxlink != NULL) 304235676Sadrian *sc->sc_rxlink = bf->bf_daddr; 305235676Sadrian sc->sc_rxlink = &ds->ds_link; 306235676Sadrian return 0; 307235676Sadrian} 308235676Sadrian 309235676Sadrian/* 310235676Sadrian * Intercept management frames to collect beacon rssi data 311235676Sadrian * and to do ibss merges. 312235676Sadrian */ 313235676Sadrianvoid 314235676Sadrianath_recv_mgmt(struct ieee80211_node *ni, struct mbuf *m, 315235676Sadrian int subtype, int rssi, int nf) 316235676Sadrian{ 317235676Sadrian struct ieee80211vap *vap = ni->ni_vap; 318235676Sadrian struct ath_softc *sc = vap->iv_ic->ic_ifp->if_softc; 319235676Sadrian 320235676Sadrian /* 321235676Sadrian * Call up first so subsequent work can use information 322235676Sadrian * potentially stored in the node (e.g. for ibss merge). 323235676Sadrian */ 324235676Sadrian ATH_VAP(vap)->av_recv_mgmt(ni, m, subtype, rssi, nf); 325235676Sadrian switch (subtype) { 326235676Sadrian case IEEE80211_FC0_SUBTYPE_BEACON: 327235676Sadrian /* update rssi statistics for use by the hal */ 328235676Sadrian /* XXX unlocked check against vap->iv_bss? */ 329235676Sadrian ATH_RSSI_LPF(sc->sc_halstats.ns_avgbrssi, rssi); 330235676Sadrian if (sc->sc_syncbeacon && 331235676Sadrian ni == vap->iv_bss && vap->iv_state == IEEE80211_S_RUN) { 332235676Sadrian /* 333235676Sadrian * Resync beacon timers using the tsf of the beacon 334235676Sadrian * frame we just received. 335235676Sadrian */ 336235676Sadrian ath_beacon_config(sc, vap); 337235676Sadrian } 338235676Sadrian /* fall thru... */ 339235676Sadrian case IEEE80211_FC0_SUBTYPE_PROBE_RESP: 340235676Sadrian if (vap->iv_opmode == IEEE80211_M_IBSS && 341235676Sadrian vap->iv_state == IEEE80211_S_RUN) { 342235676Sadrian uint32_t rstamp = sc->sc_lastrs->rs_tstamp; 343235676Sadrian uint64_t tsf = ath_extend_tsf(sc, rstamp, 344235676Sadrian ath_hal_gettsf64(sc->sc_ah)); 345235676Sadrian /* 346235676Sadrian * Handle ibss merge as needed; check the tsf on the 347235676Sadrian * frame before attempting the merge. The 802.11 spec 348235676Sadrian * says the station should change it's bssid to match 349235676Sadrian * the oldest station with the same ssid, where oldest 350235676Sadrian * is determined by the tsf. Note that hardware 351235676Sadrian * reconfiguration happens through callback to 352235676Sadrian * ath_newstate as the state machine will go from 353235676Sadrian * RUN -> RUN when this happens. 354235676Sadrian */ 355235676Sadrian if (le64toh(ni->ni_tstamp.tsf) >= tsf) { 356235676Sadrian DPRINTF(sc, ATH_DEBUG_STATE, 357235676Sadrian "ibss merge, rstamp %u tsf %ju " 358235676Sadrian "tstamp %ju\n", rstamp, (uintmax_t)tsf, 359235676Sadrian (uintmax_t)ni->ni_tstamp.tsf); 360235676Sadrian (void) ieee80211_ibss_merge(ni); 361235676Sadrian } 362235676Sadrian } 363235676Sadrian break; 364235676Sadrian } 365235676Sadrian} 366235676Sadrian 367237522Sadrian#ifdef ATH_ENABLE_RADIOTAP_VENDOR_EXT 368235676Sadrianstatic void 369237522Sadrianath_rx_tap_vendor(struct ifnet *ifp, struct mbuf *m, 370237522Sadrian const struct ath_rx_status *rs, u_int64_t tsf, int16_t nf) 371237522Sadrian{ 372237522Sadrian struct ath_softc *sc = ifp->if_softc; 373237522Sadrian 374237522Sadrian /* Fill in the extension bitmap */ 375237522Sadrian sc->sc_rx_th.wr_ext_bitmap = htole32(1 << ATH_RADIOTAP_VENDOR_HEADER); 376237522Sadrian 377237522Sadrian /* Fill in the vendor header */ 378237522Sadrian sc->sc_rx_th.wr_vh.vh_oui[0] = 0x7f; 379237522Sadrian sc->sc_rx_th.wr_vh.vh_oui[1] = 0x03; 380237522Sadrian sc->sc_rx_th.wr_vh.vh_oui[2] = 0x00; 381237522Sadrian 382237522Sadrian /* XXX what should this be? */ 383237522Sadrian sc->sc_rx_th.wr_vh.vh_sub_ns = 0; 384237522Sadrian sc->sc_rx_th.wr_vh.vh_skip_len = 385237522Sadrian htole16(sizeof(struct ath_radiotap_vendor_hdr)); 386237522Sadrian 387237522Sadrian /* General version info */ 388237522Sadrian sc->sc_rx_th.wr_v.vh_version = 1; 389237522Sadrian 390237522Sadrian sc->sc_rx_th.wr_v.vh_rx_chainmask = sc->sc_rxchainmask; 391237522Sadrian 392237522Sadrian /* rssi */ 393237522Sadrian sc->sc_rx_th.wr_v.rssi_ctl[0] = rs->rs_rssi_ctl[0]; 394237522Sadrian sc->sc_rx_th.wr_v.rssi_ctl[1] = rs->rs_rssi_ctl[1]; 395237522Sadrian sc->sc_rx_th.wr_v.rssi_ctl[2] = rs->rs_rssi_ctl[2]; 396237522Sadrian sc->sc_rx_th.wr_v.rssi_ext[0] = rs->rs_rssi_ext[0]; 397237522Sadrian sc->sc_rx_th.wr_v.rssi_ext[1] = rs->rs_rssi_ext[1]; 398237522Sadrian sc->sc_rx_th.wr_v.rssi_ext[2] = rs->rs_rssi_ext[2]; 399237522Sadrian 400237522Sadrian /* evm */ 401237522Sadrian sc->sc_rx_th.wr_v.evm[0] = rs->rs_evm0; 402237522Sadrian sc->sc_rx_th.wr_v.evm[1] = rs->rs_evm1; 403237522Sadrian sc->sc_rx_th.wr_v.evm[2] = rs->rs_evm2; 404248142Sadrian /* These are only populated from the AR9300 or later */ 405248142Sadrian sc->sc_rx_th.wr_v.evm[3] = rs->rs_evm3; 406248142Sadrian sc->sc_rx_th.wr_v.evm[4] = rs->rs_evm4; 407237522Sadrian 408248146Sadrian /* direction */ 409248146Sadrian sc->sc_rx_th.wr_v.vh_flags = ATH_VENDOR_PKT_RX; 410248146Sadrian 411248146Sadrian /* RX rate */ 412248146Sadrian sc->sc_rx_th.wr_v.vh_rx_hwrate = rs->rs_rate; 413248146Sadrian 414248146Sadrian /* RX flags */ 415248146Sadrian sc->sc_rx_th.wr_v.vh_rs_flags = rs->rs_flags; 416248146Sadrian 417248146Sadrian if (rs->rs_isaggr) 418248146Sadrian sc->sc_rx_th.wr_v.vh_flags |= ATH_VENDOR_PKT_ISAGGR; 419248146Sadrian if (rs->rs_moreaggr) 420248146Sadrian sc->sc_rx_th.wr_v.vh_flags |= ATH_VENDOR_PKT_MOREAGGR; 421248146Sadrian 422237522Sadrian /* phyerr info */ 423248146Sadrian if (rs->rs_status & HAL_RXERR_PHY) { 424237522Sadrian sc->sc_rx_th.wr_v.vh_phyerr_code = rs->rs_phyerr; 425248146Sadrian sc->sc_rx_th.wr_v.vh_flags |= ATH_VENDOR_PKT_RXPHYERR; 426248146Sadrian } else { 427237522Sadrian sc->sc_rx_th.wr_v.vh_phyerr_code = 0xff; 428248146Sadrian } 429237522Sadrian sc->sc_rx_th.wr_v.vh_rs_status = rs->rs_status; 430237522Sadrian sc->sc_rx_th.wr_v.vh_rssi = rs->rs_rssi; 431237522Sadrian} 432237522Sadrian#endif /* ATH_ENABLE_RADIOTAP_VENDOR_EXT */ 433237522Sadrian 434237522Sadrianstatic void 435235676Sadrianath_rx_tap(struct ifnet *ifp, struct mbuf *m, 436235676Sadrian const struct ath_rx_status *rs, u_int64_t tsf, int16_t nf) 437235676Sadrian{ 438235676Sadrian#define CHAN_HT20 htole32(IEEE80211_CHAN_HT20) 439235676Sadrian#define CHAN_HT40U htole32(IEEE80211_CHAN_HT40U) 440235676Sadrian#define CHAN_HT40D htole32(IEEE80211_CHAN_HT40D) 441235676Sadrian#define CHAN_HT (CHAN_HT20|CHAN_HT40U|CHAN_HT40D) 442235676Sadrian struct ath_softc *sc = ifp->if_softc; 443235676Sadrian const HAL_RATE_TABLE *rt; 444235676Sadrian uint8_t rix; 445235676Sadrian 446235676Sadrian rt = sc->sc_currates; 447235676Sadrian KASSERT(rt != NULL, ("no rate table, mode %u", sc->sc_curmode)); 448235676Sadrian rix = rt->rateCodeToIndex[rs->rs_rate]; 449235676Sadrian sc->sc_rx_th.wr_rate = sc->sc_hwmap[rix].ieeerate; 450235676Sadrian sc->sc_rx_th.wr_flags = sc->sc_hwmap[rix].rxflags; 451235676Sadrian#ifdef AH_SUPPORT_AR5416 452235676Sadrian sc->sc_rx_th.wr_chan_flags &= ~CHAN_HT; 453245031Sadrian if (rs->rs_status & HAL_RXERR_PHY) { 454245031Sadrian /* 455245031Sadrian * PHY error - make sure the channel flags 456245031Sadrian * reflect the actual channel configuration, 457245031Sadrian * not the received frame. 458245031Sadrian */ 459246141Sadrian if (IEEE80211_IS_CHAN_HT40U(sc->sc_curchan)) 460245031Sadrian sc->sc_rx_th.wr_chan_flags |= CHAN_HT40U; 461246141Sadrian else if (IEEE80211_IS_CHAN_HT40D(sc->sc_curchan)) 462245031Sadrian sc->sc_rx_th.wr_chan_flags |= CHAN_HT40D; 463246141Sadrian else if (IEEE80211_IS_CHAN_HT20(sc->sc_curchan)) 464245031Sadrian sc->sc_rx_th.wr_chan_flags |= CHAN_HT20; 465245031Sadrian } else if (sc->sc_rx_th.wr_rate & IEEE80211_RATE_MCS) { /* HT rate */ 466245031Sadrian struct ieee80211com *ic = ifp->if_l2com; 467245031Sadrian 468235676Sadrian if ((rs->rs_flags & HAL_RX_2040) == 0) 469235676Sadrian sc->sc_rx_th.wr_chan_flags |= CHAN_HT20; 470235676Sadrian else if (IEEE80211_IS_CHAN_HT40U(ic->ic_curchan)) 471235676Sadrian sc->sc_rx_th.wr_chan_flags |= CHAN_HT40U; 472235676Sadrian else 473235676Sadrian sc->sc_rx_th.wr_chan_flags |= CHAN_HT40D; 474235676Sadrian if ((rs->rs_flags & HAL_RX_GI) == 0) 475235676Sadrian sc->sc_rx_th.wr_flags |= IEEE80211_RADIOTAP_F_SHORTGI; 476235676Sadrian } 477245031Sadrian 478235676Sadrian#endif 479235676Sadrian sc->sc_rx_th.wr_tsf = htole64(ath_extend_tsf(sc, rs->rs_tstamp, tsf)); 480235676Sadrian if (rs->rs_status & HAL_RXERR_CRC) 481235676Sadrian sc->sc_rx_th.wr_flags |= IEEE80211_RADIOTAP_F_BADFCS; 482235676Sadrian /* XXX propagate other error flags from descriptor */ 483235676Sadrian sc->sc_rx_th.wr_antnoise = nf; 484235676Sadrian sc->sc_rx_th.wr_antsignal = nf + rs->rs_rssi; 485235676Sadrian sc->sc_rx_th.wr_antenna = rs->rs_antenna; 486235676Sadrian#undef CHAN_HT 487235676Sadrian#undef CHAN_HT20 488235676Sadrian#undef CHAN_HT40U 489235676Sadrian#undef CHAN_HT40D 490235676Sadrian} 491235676Sadrian 492235676Sadrianstatic void 493235676Sadrianath_handle_micerror(struct ieee80211com *ic, 494235676Sadrian struct ieee80211_frame *wh, int keyix) 495235676Sadrian{ 496235676Sadrian struct ieee80211_node *ni; 497235676Sadrian 498235676Sadrian /* XXX recheck MIC to deal w/ chips that lie */ 499235676Sadrian /* XXX discard MIC errors on !data frames */ 500235676Sadrian ni = ieee80211_find_rxnode(ic, (const struct ieee80211_frame_min *) wh); 501235676Sadrian if (ni != NULL) { 502235676Sadrian ieee80211_notify_michael_failure(ni->ni_vap, wh, keyix); 503235676Sadrian ieee80211_free_node(ni); 504235676Sadrian } 505235676Sadrian} 506235676Sadrian 507249085Sadrian/* 508249085Sadrian * Process a single packet. 509249085Sadrian * 510249085Sadrian * The mbuf must already be synced, unmapped and removed from bf->bf_m 511249085Sadrian * by this stage. 512249085Sadrian * 513249085Sadrian * The mbuf must be consumed by this routine - either passed up the 514249085Sadrian * net80211 stack, put on the holding queue, or freed. 515249085Sadrian */ 516238316Sadrianint 517235682Sadrianath_rx_pkt(struct ath_softc *sc, struct ath_rx_status *rs, HAL_STATUS status, 518249085Sadrian uint64_t tsf, int nf, HAL_RX_QUEUE qtype, struct ath_buf *bf, 519249085Sadrian struct mbuf *m) 520235682Sadrian{ 521235682Sadrian uint64_t rstamp; 522235682Sadrian int len, type; 523235682Sadrian struct ifnet *ifp = sc->sc_ifp; 524235682Sadrian struct ieee80211com *ic = ifp->if_l2com; 525235682Sadrian struct ieee80211_node *ni; 526235682Sadrian int is_good = 0; 527238316Sadrian struct ath_rx_edma *re = &sc->sc_rxedma[qtype]; 528235682Sadrian 529235682Sadrian /* 530235682Sadrian * Calculate the correct 64 bit TSF given 531235682Sadrian * the TSF64 register value and rs_tstamp. 532235682Sadrian */ 533235682Sadrian rstamp = ath_extend_tsf(sc, rs->rs_tstamp, tsf); 534235682Sadrian 535235682Sadrian /* These aren't specifically errors */ 536235682Sadrian#ifdef AH_SUPPORT_AR5416 537235682Sadrian if (rs->rs_flags & HAL_RX_GI) 538235682Sadrian sc->sc_stats.ast_rx_halfgi++; 539235682Sadrian if (rs->rs_flags & HAL_RX_2040) 540235682Sadrian sc->sc_stats.ast_rx_2040++; 541235682Sadrian if (rs->rs_flags & HAL_RX_DELIM_CRC_PRE) 542235682Sadrian sc->sc_stats.ast_rx_pre_crc_err++; 543235682Sadrian if (rs->rs_flags & HAL_RX_DELIM_CRC_POST) 544235682Sadrian sc->sc_stats.ast_rx_post_crc_err++; 545235682Sadrian if (rs->rs_flags & HAL_RX_DECRYPT_BUSY) 546235682Sadrian sc->sc_stats.ast_rx_decrypt_busy_err++; 547235682Sadrian if (rs->rs_flags & HAL_RX_HI_RX_CHAIN) 548235682Sadrian sc->sc_stats.ast_rx_hi_rx_chain++; 549250346Sadrian if (rs->rs_flags & HAL_RX_STBC) 550250346Sadrian sc->sc_stats.ast_rx_stbc++; 551235682Sadrian#endif /* AH_SUPPORT_AR5416 */ 552235682Sadrian 553235682Sadrian if (rs->rs_status != 0) { 554235682Sadrian if (rs->rs_status & HAL_RXERR_CRC) 555235682Sadrian sc->sc_stats.ast_rx_crcerr++; 556235682Sadrian if (rs->rs_status & HAL_RXERR_FIFO) 557235682Sadrian sc->sc_stats.ast_rx_fifoerr++; 558235682Sadrian if (rs->rs_status & HAL_RXERR_PHY) { 559235682Sadrian sc->sc_stats.ast_rx_phyerr++; 560235682Sadrian /* Process DFS radar events */ 561235682Sadrian if ((rs->rs_phyerr == HAL_PHYERR_RADAR) || 562235682Sadrian (rs->rs_phyerr == HAL_PHYERR_FALSE_RADAR_EXT)) { 563235682Sadrian /* Now pass it to the radar processing code */ 564237526Sadrian ath_dfs_process_phy_err(sc, m, rstamp, rs); 565235682Sadrian } 566235682Sadrian 567235682Sadrian /* Be suitably paranoid about receiving phy errors out of the stats array bounds */ 568235682Sadrian if (rs->rs_phyerr < 64) 569235682Sadrian sc->sc_stats.ast_rx_phy[rs->rs_phyerr]++; 570235682Sadrian goto rx_error; /* NB: don't count in ierrors */ 571235682Sadrian } 572235682Sadrian if (rs->rs_status & HAL_RXERR_DECRYPT) { 573235682Sadrian /* 574235682Sadrian * Decrypt error. If the error occurred 575235682Sadrian * because there was no hardware key, then 576235682Sadrian * let the frame through so the upper layers 577235682Sadrian * can process it. This is necessary for 5210 578235682Sadrian * parts which have no way to setup a ``clear'' 579235682Sadrian * key cache entry. 580235682Sadrian * 581235682Sadrian * XXX do key cache faulting 582235682Sadrian */ 583235682Sadrian if (rs->rs_keyix == HAL_RXKEYIX_INVALID) 584235682Sadrian goto rx_accept; 585235682Sadrian sc->sc_stats.ast_rx_badcrypt++; 586235682Sadrian } 587238507Sadrian /* 588238507Sadrian * Similar as above - if the failure was a keymiss 589238507Sadrian * just punt it up to the upper layers for now. 590238507Sadrian */ 591238507Sadrian if (rs->rs_status & HAL_RXERR_KEYMISS) { 592238507Sadrian sc->sc_stats.ast_rx_keymiss++; 593238507Sadrian goto rx_accept; 594238507Sadrian } 595235682Sadrian if (rs->rs_status & HAL_RXERR_MIC) { 596235682Sadrian sc->sc_stats.ast_rx_badmic++; 597235682Sadrian /* 598235682Sadrian * Do minimal work required to hand off 599235682Sadrian * the 802.11 header for notification. 600235682Sadrian */ 601235682Sadrian /* XXX frag's and qos frames */ 602235682Sadrian len = rs->rs_datalen; 603235682Sadrian if (len >= sizeof (struct ieee80211_frame)) { 604235682Sadrian ath_handle_micerror(ic, 605235682Sadrian mtod(m, struct ieee80211_frame *), 606235682Sadrian sc->sc_splitmic ? 607235682Sadrian rs->rs_keyix-32 : rs->rs_keyix); 608235682Sadrian } 609235682Sadrian } 610235682Sadrian ifp->if_ierrors++; 611235682Sadrianrx_error: 612235682Sadrian /* 613235682Sadrian * Cleanup any pending partial frame. 614235682Sadrian */ 615238316Sadrian if (re->m_rxpending != NULL) { 616238316Sadrian m_freem(re->m_rxpending); 617238316Sadrian re->m_rxpending = NULL; 618235682Sadrian } 619235682Sadrian /* 620235682Sadrian * When a tap is present pass error frames 621235682Sadrian * that have been requested. By default we 622235682Sadrian * pass decrypt+mic errors but others may be 623235682Sadrian * interesting (e.g. crc). 624235682Sadrian */ 625235682Sadrian if (ieee80211_radiotap_active(ic) && 626235682Sadrian (rs->rs_status & sc->sc_monpass)) { 627235682Sadrian /* NB: bpf needs the mbuf length setup */ 628235682Sadrian len = rs->rs_datalen; 629235682Sadrian m->m_pkthdr.len = m->m_len = len; 630235682Sadrian ath_rx_tap(ifp, m, rs, rstamp, nf); 631237522Sadrian#ifdef ATH_ENABLE_RADIOTAP_VENDOR_EXT 632237522Sadrian ath_rx_tap_vendor(ifp, m, rs, rstamp, nf); 633237522Sadrian#endif /* ATH_ENABLE_RADIOTAP_VENDOR_EXT */ 634235682Sadrian ieee80211_radiotap_rx_all(ic, m); 635235682Sadrian } 636235682Sadrian /* XXX pass MIC errors up for s/w reclaculation */ 637249085Sadrian m_freem(m); m = NULL; 638235682Sadrian goto rx_next; 639235682Sadrian } 640235682Sadrianrx_accept: 641235682Sadrian len = rs->rs_datalen; 642235682Sadrian m->m_len = len; 643235682Sadrian 644235682Sadrian if (rs->rs_more) { 645235682Sadrian /* 646235682Sadrian * Frame spans multiple descriptors; save 647235682Sadrian * it for the next completed descriptor, it 648235682Sadrian * will be used to construct a jumbogram. 649235682Sadrian */ 650238316Sadrian if (re->m_rxpending != NULL) { 651235682Sadrian /* NB: max frame size is currently 2 clusters */ 652235682Sadrian sc->sc_stats.ast_rx_toobig++; 653238316Sadrian m_freem(re->m_rxpending); 654235682Sadrian } 655235682Sadrian m->m_pkthdr.rcvif = ifp; 656235682Sadrian m->m_pkthdr.len = len; 657238316Sadrian re->m_rxpending = m; 658249085Sadrian m = NULL; 659235682Sadrian goto rx_next; 660238316Sadrian } else if (re->m_rxpending != NULL) { 661235682Sadrian /* 662235682Sadrian * This is the second part of a jumbogram, 663235682Sadrian * chain it to the first mbuf, adjust the 664235682Sadrian * frame length, and clear the rxpending state. 665235682Sadrian */ 666238316Sadrian re->m_rxpending->m_next = m; 667238316Sadrian re->m_rxpending->m_pkthdr.len += len; 668238316Sadrian m = re->m_rxpending; 669238316Sadrian re->m_rxpending = NULL; 670235682Sadrian } else { 671235682Sadrian /* 672235682Sadrian * Normal single-descriptor receive; setup 673235682Sadrian * the rcvif and packet length. 674235682Sadrian */ 675235682Sadrian m->m_pkthdr.rcvif = ifp; 676235682Sadrian m->m_pkthdr.len = len; 677235682Sadrian } 678235682Sadrian 679235682Sadrian /* 680235682Sadrian * Validate rs->rs_antenna. 681235682Sadrian * 682235682Sadrian * Some users w/ AR9285 NICs have reported crashes 683235682Sadrian * here because rs_antenna field is bogusly large. 684235682Sadrian * Let's enforce the maximum antenna limit of 8 685235682Sadrian * (and it shouldn't be hard coded, but that's a 686235682Sadrian * separate problem) and if there's an issue, print 687235682Sadrian * out an error and adjust rs_antenna to something 688235682Sadrian * sensible. 689235682Sadrian * 690235682Sadrian * This code should be removed once the actual 691235682Sadrian * root cause of the issue has been identified. 692235682Sadrian * For example, it may be that the rs_antenna 693235682Sadrian * field is only valid for the lsat frame of 694235682Sadrian * an aggregate and it just happens that it is 695235682Sadrian * "mostly" right. (This is a general statement - 696235682Sadrian * the majority of the statistics are only valid 697235682Sadrian * for the last frame in an aggregate. 698235682Sadrian */ 699235682Sadrian if (rs->rs_antenna > 7) { 700235682Sadrian device_printf(sc->sc_dev, "%s: rs_antenna > 7 (%d)\n", 701235682Sadrian __func__, rs->rs_antenna); 702235682Sadrian#ifdef ATH_DEBUG 703235682Sadrian ath_printrxbuf(sc, bf, 0, status == HAL_OK); 704235682Sadrian#endif /* ATH_DEBUG */ 705235682Sadrian rs->rs_antenna = 0; /* XXX better than nothing */ 706235682Sadrian } 707235682Sadrian 708251401Sadrian /* 709251401Sadrian * If this is an AR9285/AR9485, then the receive and LNA 710251401Sadrian * configuration is stored in RSSI[2] / EXTRSSI[2]. 711251401Sadrian * We can extract this out to build a much better 712251401Sadrian * receive antenna profile. 713251401Sadrian * 714251401Sadrian * Yes, this just blurts over the above RX antenna field 715251401Sadrian * for now. It's fine, the AR9285 doesn't really use 716251401Sadrian * that. 717251401Sadrian * 718251401Sadrian * Later on we should store away the fine grained LNA 719251401Sadrian * information and keep separate counters just for 720251401Sadrian * that. It'll help when debugging the AR9285/AR9485 721251401Sadrian * combined diversity code. 722251401Sadrian */ 723251401Sadrian if (sc->sc_rx_lnamixer) { 724251401Sadrian rs->rs_antenna = 0; 725251401Sadrian 726251401Sadrian /* Bits 0:1 - the LNA configuration used */ 727251401Sadrian rs->rs_antenna |= 728251401Sadrian ((rs->rs_rssi_ctl[2] & HAL_RX_LNA_CFG_USED) 729251401Sadrian >> HAL_RX_LNA_CFG_USED_S); 730251401Sadrian 731251401Sadrian /* Bit 2 - the external RX antenna switch */ 732251401Sadrian if (rs->rs_rssi_ctl[2] & HAL_RX_LNA_EXTCFG) 733251401Sadrian rs->rs_antenna |= 0x4; 734251401Sadrian } 735251401Sadrian 736235682Sadrian ifp->if_ipackets++; 737235682Sadrian sc->sc_stats.ast_ant_rx[rs->rs_antenna]++; 738235682Sadrian 739235682Sadrian /* 740235682Sadrian * Populate the rx status block. When there are bpf 741235682Sadrian * listeners we do the additional work to provide 742235682Sadrian * complete status. Otherwise we fill in only the 743235682Sadrian * material required by ieee80211_input. Note that 744235682Sadrian * noise setting is filled in above. 745235682Sadrian */ 746237522Sadrian if (ieee80211_radiotap_active(ic)) { 747235682Sadrian ath_rx_tap(ifp, m, rs, rstamp, nf); 748237522Sadrian#ifdef ATH_ENABLE_RADIOTAP_VENDOR_EXT 749237522Sadrian ath_rx_tap_vendor(ifp, m, rs, rstamp, nf); 750237522Sadrian#endif /* ATH_ENABLE_RADIOTAP_VENDOR_EXT */ 751237522Sadrian } 752235682Sadrian 753235682Sadrian /* 754235682Sadrian * From this point on we assume the frame is at least 755235682Sadrian * as large as ieee80211_frame_min; verify that. 756235682Sadrian */ 757235682Sadrian if (len < IEEE80211_MIN_LEN) { 758235682Sadrian if (!ieee80211_radiotap_active(ic)) { 759235682Sadrian DPRINTF(sc, ATH_DEBUG_RECV, 760235682Sadrian "%s: short packet %d\n", __func__, len); 761235682Sadrian sc->sc_stats.ast_rx_tooshort++; 762235682Sadrian } else { 763235682Sadrian /* NB: in particular this captures ack's */ 764235682Sadrian ieee80211_radiotap_rx_all(ic, m); 765235682Sadrian } 766249085Sadrian m_freem(m); m = NULL; 767235682Sadrian goto rx_next; 768235682Sadrian } 769235682Sadrian 770235682Sadrian if (IFF_DUMPPKTS(sc, ATH_DEBUG_RECV)) { 771235682Sadrian const HAL_RATE_TABLE *rt = sc->sc_currates; 772235682Sadrian uint8_t rix = rt->rateCodeToIndex[rs->rs_rate]; 773235682Sadrian 774235682Sadrian ieee80211_dump_pkt(ic, mtod(m, caddr_t), len, 775235682Sadrian sc->sc_hwmap[rix].ieeerate, rs->rs_rssi); 776235682Sadrian } 777235682Sadrian 778235682Sadrian m_adj(m, -IEEE80211_CRC_LEN); 779235682Sadrian 780235682Sadrian /* 781235682Sadrian * Locate the node for sender, track state, and then 782235682Sadrian * pass the (referenced) node up to the 802.11 layer 783235682Sadrian * for its use. 784235682Sadrian */ 785235682Sadrian ni = ieee80211_find_rxnode_withkey(ic, 786235682Sadrian mtod(m, const struct ieee80211_frame_min *), 787235682Sadrian rs->rs_keyix == HAL_RXKEYIX_INVALID ? 788235682Sadrian IEEE80211_KEYIX_NONE : rs->rs_keyix); 789235682Sadrian sc->sc_lastrs = rs; 790235682Sadrian 791235682Sadrian#ifdef AH_SUPPORT_AR5416 792235682Sadrian if (rs->rs_isaggr) 793235682Sadrian sc->sc_stats.ast_rx_agg++; 794235682Sadrian#endif /* AH_SUPPORT_AR5416 */ 795235682Sadrian 796235682Sadrian if (ni != NULL) { 797235682Sadrian /* 798235682Sadrian * Only punt packets for ampdu reorder processing for 799235682Sadrian * 11n nodes; net80211 enforces that M_AMPDU is only 800235682Sadrian * set for 11n nodes. 801235682Sadrian */ 802235682Sadrian if (ni->ni_flags & IEEE80211_NODE_HT) 803235682Sadrian m->m_flags |= M_AMPDU; 804235682Sadrian 805235682Sadrian /* 806235682Sadrian * Sending station is known, dispatch directly. 807235682Sadrian */ 808235682Sadrian type = ieee80211_input(ni, m, rs->rs_rssi, nf); 809235682Sadrian ieee80211_free_node(ni); 810249085Sadrian m = NULL; 811235682Sadrian /* 812235682Sadrian * Arrange to update the last rx timestamp only for 813235682Sadrian * frames from our ap when operating in station mode. 814235682Sadrian * This assumes the rx key is always setup when 815235682Sadrian * associated. 816235682Sadrian */ 817235682Sadrian if (ic->ic_opmode == IEEE80211_M_STA && 818235682Sadrian rs->rs_keyix != HAL_RXKEYIX_INVALID) 819235682Sadrian is_good = 1; 820235682Sadrian } else { 821235682Sadrian type = ieee80211_input_all(ic, m, rs->rs_rssi, nf); 822249085Sadrian m = NULL; 823235682Sadrian } 824249085Sadrian 825235682Sadrian /* 826249085Sadrian * At this point we have passed the frame up the stack; thus 827249085Sadrian * the mbuf is no longer ours. 828249085Sadrian */ 829249085Sadrian 830249085Sadrian /* 831235682Sadrian * Track rx rssi and do any rx antenna management. 832235682Sadrian */ 833235682Sadrian ATH_RSSI_LPF(sc->sc_halstats.ns_avgrssi, rs->rs_rssi); 834235682Sadrian if (sc->sc_diversity) { 835235682Sadrian /* 836235682Sadrian * When using fast diversity, change the default rx 837235682Sadrian * antenna if diversity chooses the other antenna 3 838235682Sadrian * times in a row. 839235682Sadrian */ 840235682Sadrian if (sc->sc_defant != rs->rs_antenna) { 841235682Sadrian if (++sc->sc_rxotherant >= 3) 842235682Sadrian ath_setdefantenna(sc, rs->rs_antenna); 843235682Sadrian } else 844235682Sadrian sc->sc_rxotherant = 0; 845235682Sadrian } 846235682Sadrian 847251655Sadrian /* Handle slow diversity if enabled */ 848251655Sadrian if (sc->sc_dolnadiv) { 849251655Sadrian ath_lna_rx_comb_scan(sc, rs, ticks, hz); 850251655Sadrian } 851235682Sadrian 852235682Sadrian if (sc->sc_softled) { 853235682Sadrian /* 854235682Sadrian * Blink for any data frame. Otherwise do a 855235682Sadrian * heartbeat-style blink when idle. The latter 856235682Sadrian * is mainly for station mode where we depend on 857235682Sadrian * periodic beacon frames to trigger the poll event. 858235682Sadrian */ 859235682Sadrian if (type == IEEE80211_FC0_TYPE_DATA) { 860235682Sadrian const HAL_RATE_TABLE *rt = sc->sc_currates; 861235682Sadrian ath_led_event(sc, 862235682Sadrian rt->rateCodeToIndex[rs->rs_rate]); 863235682Sadrian } else if (ticks - sc->sc_ledevent >= sc->sc_ledidle) 864235682Sadrian ath_led_event(sc, 0); 865235682Sadrian } 866235682Sadrianrx_next: 867249085Sadrian /* 868249085Sadrian * Debugging - complain if we didn't NULL the mbuf pointer 869249085Sadrian * here. 870249085Sadrian */ 871249085Sadrian if (m != NULL) { 872249085Sadrian device_printf(sc->sc_dev, 873249085Sadrian "%s: mbuf %p should've been freed!\n", 874249085Sadrian __func__, 875249085Sadrian m); 876249085Sadrian } 877235682Sadrian return (is_good); 878235682Sadrian} 879235682Sadrian 880241558Sadrian#define ATH_RX_MAX 128 881241558Sadrian 882238055Sadrianstatic void 883235676Sadrianath_rx_proc(struct ath_softc *sc, int resched) 884235676Sadrian{ 885235676Sadrian#define PA2DESC(_sc, _pa) \ 886235676Sadrian ((struct ath_desc *)((caddr_t)(_sc)->sc_rxdma.dd_desc + \ 887235676Sadrian ((_pa) - (_sc)->sc_rxdma.dd_desc_paddr))) 888235676Sadrian struct ath_buf *bf; 889235676Sadrian struct ifnet *ifp = sc->sc_ifp; 890235676Sadrian struct ath_hal *ah = sc->sc_ah; 891235728Sadrian#ifdef IEEE80211_SUPPORT_SUPERG 892235728Sadrian struct ieee80211com *ic = ifp->if_l2com; 893235728Sadrian#endif 894235676Sadrian struct ath_desc *ds; 895235676Sadrian struct ath_rx_status *rs; 896235676Sadrian struct mbuf *m; 897235682Sadrian int ngood; 898235676Sadrian HAL_STATUS status; 899235676Sadrian int16_t nf; 900235682Sadrian u_int64_t tsf; 901235676Sadrian int npkts = 0; 902245396Sadrian int kickpcu = 0; 903235676Sadrian 904235676Sadrian /* XXX we must not hold the ATH_LOCK here */ 905235676Sadrian ATH_UNLOCK_ASSERT(sc); 906235676Sadrian ATH_PCU_UNLOCK_ASSERT(sc); 907235676Sadrian 908235676Sadrian ATH_PCU_LOCK(sc); 909235676Sadrian sc->sc_rxproc_cnt++; 910245396Sadrian kickpcu = sc->sc_kickpcu; 911235676Sadrian ATH_PCU_UNLOCK(sc); 912235676Sadrian 913235676Sadrian DPRINTF(sc, ATH_DEBUG_RX_PROC, "%s: called\n", __func__); 914235676Sadrian ngood = 0; 915235676Sadrian nf = ath_hal_getchannoise(ah, sc->sc_curchan); 916235676Sadrian sc->sc_stats.ast_rx_noise = nf; 917235676Sadrian tsf = ath_hal_gettsf64(ah); 918235676Sadrian do { 919241558Sadrian /* 920241558Sadrian * Don't process too many packets at a time; give the 921241558Sadrian * TX thread time to also run - otherwise the TX 922241558Sadrian * latency can jump by quite a bit, causing throughput 923241558Sadrian * degredation. 924241558Sadrian */ 925245396Sadrian if (!kickpcu && npkts >= ATH_RX_MAX) 926241558Sadrian break; 927241558Sadrian 928235676Sadrian bf = TAILQ_FIRST(&sc->sc_rxbuf); 929235676Sadrian if (sc->sc_rxslink && bf == NULL) { /* NB: shouldn't happen */ 930235676Sadrian if_printf(ifp, "%s: no buffer!\n", __func__); 931235676Sadrian break; 932235676Sadrian } else if (bf == NULL) { 933235676Sadrian /* 934235676Sadrian * End of List: 935235676Sadrian * this can happen for non-self-linked RX chains 936235676Sadrian */ 937235676Sadrian sc->sc_stats.ast_rx_hitqueueend++; 938235676Sadrian break; 939235676Sadrian } 940235676Sadrian m = bf->bf_m; 941235676Sadrian if (m == NULL) { /* NB: shouldn't happen */ 942235676Sadrian /* 943235676Sadrian * If mbuf allocation failed previously there 944235676Sadrian * will be no mbuf; try again to re-populate it. 945235676Sadrian */ 946235676Sadrian /* XXX make debug msg */ 947235676Sadrian if_printf(ifp, "%s: no mbuf!\n", __func__); 948235676Sadrian TAILQ_REMOVE(&sc->sc_rxbuf, bf, bf_list); 949235682Sadrian goto rx_proc_next; 950235676Sadrian } 951235676Sadrian ds = bf->bf_desc; 952235676Sadrian if (ds->ds_link == bf->bf_daddr) { 953235676Sadrian /* NB: never process the self-linked entry at the end */ 954235676Sadrian sc->sc_stats.ast_rx_hitqueueend++; 955235676Sadrian break; 956235676Sadrian } 957235676Sadrian /* XXX sync descriptor memory */ 958235676Sadrian /* 959235676Sadrian * Must provide the virtual address of the current 960235676Sadrian * descriptor, the physical address, and the virtual 961235676Sadrian * address of the next descriptor in the h/w chain. 962235676Sadrian * This allows the HAL to look ahead to see if the 963235676Sadrian * hardware is done with a descriptor by checking the 964235676Sadrian * done bit in the following descriptor and the address 965235676Sadrian * of the current descriptor the DMA engine is working 966235676Sadrian * on. All this is necessary because of our use of 967235676Sadrian * a self-linked list to avoid rx overruns. 968235676Sadrian */ 969235676Sadrian rs = &bf->bf_status.ds_rxstat; 970235676Sadrian status = ath_hal_rxprocdesc(ah, ds, 971235676Sadrian bf->bf_daddr, PA2DESC(sc, ds->ds_link), rs); 972235676Sadrian#ifdef ATH_DEBUG 973235676Sadrian if (sc->sc_debug & ATH_DEBUG_RECV_DESC) 974235676Sadrian ath_printrxbuf(sc, bf, 0, status == HAL_OK); 975235676Sadrian#endif 976243162Sadrian 977243162Sadrian#ifdef ATH_DEBUG_ALQ 978243162Sadrian if (if_ath_alq_checkdebug(&sc->sc_alq, ATH_ALQ_EDMA_RXSTATUS)) 979243162Sadrian if_ath_alq_post(&sc->sc_alq, ATH_ALQ_EDMA_RXSTATUS, 980243162Sadrian sc->sc_rx_statuslen, (char *) ds); 981243162Sadrian#endif /* ATH_DEBUG_ALQ */ 982243162Sadrian 983235676Sadrian if (status == HAL_EINPROGRESS) 984235676Sadrian break; 985235676Sadrian 986235676Sadrian TAILQ_REMOVE(&sc->sc_rxbuf, bf, bf_list); 987235676Sadrian npkts++; 988235676Sadrian 989235676Sadrian /* 990235682Sadrian * Process a single frame. 991235676Sadrian */ 992249085Sadrian bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, BUS_DMASYNC_POSTREAD); 993249085Sadrian bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap); 994249085Sadrian bf->bf_m = NULL; 995249085Sadrian if (ath_rx_pkt(sc, rs, status, tsf, nf, HAL_RX_QUEUE_HP, bf, m)) 996235682Sadrian ngood++; 997235682Sadrianrx_proc_next: 998235676Sadrian TAILQ_INSERT_TAIL(&sc->sc_rxbuf, bf, bf_list); 999235676Sadrian } while (ath_rxbuf_init(sc, bf) == 0); 1000235676Sadrian 1001235676Sadrian /* rx signal state monitoring */ 1002235676Sadrian ath_hal_rxmonitor(ah, &sc->sc_halstats, sc->sc_curchan); 1003235676Sadrian if (ngood) 1004235676Sadrian sc->sc_lastrx = tsf; 1005235676Sadrian 1006240899Sadrian ATH_KTR(sc, ATH_KTR_RXPROC, 2, "ath_rx_proc: npkts=%d, ngood=%d", npkts, ngood); 1007235676Sadrian /* Queue DFS tasklet if needed */ 1008235676Sadrian if (resched && ath_dfs_tasklet_needed(sc, sc->sc_curchan)) 1009235676Sadrian taskqueue_enqueue(sc->sc_tq, &sc->sc_dfstask); 1010235676Sadrian 1011235676Sadrian /* 1012235676Sadrian * Now that all the RX frames were handled that 1013235676Sadrian * need to be handled, kick the PCU if there's 1014235676Sadrian * been an RXEOL condition. 1015235676Sadrian */ 1016246879Sadrian if (resched && kickpcu) { 1017246879Sadrian ATH_PCU_LOCK(sc); 1018240899Sadrian ATH_KTR(sc, ATH_KTR_ERROR, 0, "ath_rx_proc: kickpcu"); 1019235676Sadrian device_printf(sc->sc_dev, "%s: kickpcu; handled %d packets\n", 1020235676Sadrian __func__, npkts); 1021235676Sadrian 1022246879Sadrian /* 1023246879Sadrian * Go through the process of fully tearing down 1024246879Sadrian * the RX buffers and reinitialising them. 1025246879Sadrian * 1026246879Sadrian * There's a hardware bug that causes the RX FIFO 1027246879Sadrian * to get confused under certain conditions and 1028246879Sadrian * constantly write over the same frame, leading 1029246879Sadrian * the RX driver code here to get heavily confused. 1030246879Sadrian */ 1031246879Sadrian#if 1 1032245396Sadrian ath_startrecv(sc); 1033245396Sadrian#else 1034235676Sadrian /* 1035246879Sadrian * Disabled for now - it'd be nice to be able to do 1036246879Sadrian * this in order to limit the amount of CPU time spent 1037246879Sadrian * reinitialising the RX side (and thus minimise RX 1038246879Sadrian * drops) however there's a hardware issue that 1039246879Sadrian * causes things to get too far out of whack. 1040246879Sadrian */ 1041246879Sadrian /* 1042235676Sadrian * XXX can we hold the PCU lock here? 1043235676Sadrian * Are there any net80211 buffer calls involved? 1044235676Sadrian */ 1045235676Sadrian bf = TAILQ_FIRST(&sc->sc_rxbuf); 1046238278Sadrian ath_hal_putrxbuf(ah, bf->bf_daddr, HAL_RX_QUEUE_HP); 1047235676Sadrian ath_hal_rxena(ah); /* enable recv descriptors */ 1048235676Sadrian ath_mode_init(sc); /* set filters, etc. */ 1049235676Sadrian ath_hal_startpcurecv(ah); /* re-enable PCU/DMA engine */ 1050245396Sadrian#endif 1051235676Sadrian 1052235676Sadrian ath_hal_intrset(ah, sc->sc_imask); 1053235676Sadrian sc->sc_kickpcu = 0; 1054246879Sadrian ATH_PCU_UNLOCK(sc); 1055235676Sadrian } 1056235676Sadrian 1057235676Sadrian /* XXX check this inside of IF_LOCK? */ 1058235676Sadrian if (resched && (ifp->if_drv_flags & IFF_DRV_OACTIVE) == 0) { 1059235676Sadrian#ifdef IEEE80211_SUPPORT_SUPERG 1060235676Sadrian ieee80211_ff_age_all(ic, 100); 1061235676Sadrian#endif 1062235676Sadrian if (!IFQ_IS_EMPTY(&ifp->if_snd)) 1063236597Sadrian ath_tx_kick(sc); 1064235676Sadrian } 1065235676Sadrian#undef PA2DESC 1066235676Sadrian 1067241558Sadrian /* 1068241558Sadrian * If we hit the maximum number of frames in this round, 1069241558Sadrian * reschedule for another immediate pass. This gives 1070241558Sadrian * the TX and TX completion routines time to run, which 1071241558Sadrian * will reduce latency. 1072241558Sadrian */ 1073241558Sadrian if (npkts >= ATH_RX_MAX) 1074248529Sadrian sc->sc_rx.recv_sched(sc, resched); 1075241558Sadrian 1076235676Sadrian ATH_PCU_LOCK(sc); 1077235676Sadrian sc->sc_rxproc_cnt--; 1078235676Sadrian ATH_PCU_UNLOCK(sc); 1079235676Sadrian} 1080235676Sadrian 1081241558Sadrian#undef ATH_RX_MAX 1082241558Sadrian 1083235676Sadrian/* 1084238055Sadrian * Only run the RX proc if it's not already running. 1085238055Sadrian * Since this may get run as part of the reset/flush path, 1086238055Sadrian * the task can't clash with an existing, running tasklet. 1087238055Sadrian */ 1088238055Sadrianstatic void 1089238055Sadrianath_legacy_rx_tasklet(void *arg, int npending) 1090238055Sadrian{ 1091238055Sadrian struct ath_softc *sc = arg; 1092238055Sadrian 1093240899Sadrian ATH_KTR(sc, ATH_KTR_RXPROC, 1, "ath_rx_proc: pending=%d", npending); 1094238055Sadrian DPRINTF(sc, ATH_DEBUG_RX_PROC, "%s: pending %u\n", __func__, npending); 1095238055Sadrian ATH_PCU_LOCK(sc); 1096238055Sadrian if (sc->sc_inreset_cnt > 0) { 1097238055Sadrian device_printf(sc->sc_dev, 1098238055Sadrian "%s: sc_inreset_cnt > 0; skipping\n", __func__); 1099238055Sadrian ATH_PCU_UNLOCK(sc); 1100238055Sadrian return; 1101238055Sadrian } 1102238055Sadrian ATH_PCU_UNLOCK(sc); 1103238055Sadrian 1104238055Sadrian ath_rx_proc(sc, 1); 1105238055Sadrian} 1106238055Sadrian 1107238055Sadrianstatic void 1108238055Sadrianath_legacy_flushrecv(struct ath_softc *sc) 1109238055Sadrian{ 1110238055Sadrian 1111238055Sadrian ath_rx_proc(sc, 0); 1112238055Sadrian} 1113238055Sadrian 1114238055Sadrian/* 1115235676Sadrian * Disable the receive h/w in preparation for a reset. 1116235676Sadrian */ 1117238055Sadrianstatic void 1118238055Sadrianath_legacy_stoprecv(struct ath_softc *sc, int dodelay) 1119235676Sadrian{ 1120235676Sadrian#define PA2DESC(_sc, _pa) \ 1121235676Sadrian ((struct ath_desc *)((caddr_t)(_sc)->sc_rxdma.dd_desc + \ 1122235676Sadrian ((_pa) - (_sc)->sc_rxdma.dd_desc_paddr))) 1123235676Sadrian struct ath_hal *ah = sc->sc_ah; 1124235676Sadrian 1125235676Sadrian ath_hal_stoppcurecv(ah); /* disable PCU */ 1126235676Sadrian ath_hal_setrxfilter(ah, 0); /* clear recv filter */ 1127235676Sadrian ath_hal_stopdmarecv(ah); /* disable DMA engine */ 1128235676Sadrian /* 1129235676Sadrian * TODO: see if this particular DELAY() is required; it may be 1130235676Sadrian * masking some missing FIFO flush or DMA sync. 1131235676Sadrian */ 1132235676Sadrian#if 0 1133235676Sadrian if (dodelay) 1134235676Sadrian#endif 1135235676Sadrian DELAY(3000); /* 3ms is long enough for 1 frame */ 1136235676Sadrian#ifdef ATH_DEBUG 1137235676Sadrian if (sc->sc_debug & (ATH_DEBUG_RESET | ATH_DEBUG_FATAL)) { 1138235676Sadrian struct ath_buf *bf; 1139235676Sadrian u_int ix; 1140235676Sadrian 1141235676Sadrian device_printf(sc->sc_dev, 1142235676Sadrian "%s: rx queue %p, link %p\n", 1143235676Sadrian __func__, 1144238278Sadrian (caddr_t)(uintptr_t) ath_hal_getrxbuf(ah, HAL_RX_QUEUE_HP), 1145235676Sadrian sc->sc_rxlink); 1146235676Sadrian ix = 0; 1147235676Sadrian TAILQ_FOREACH(bf, &sc->sc_rxbuf, bf_list) { 1148235676Sadrian struct ath_desc *ds = bf->bf_desc; 1149235676Sadrian struct ath_rx_status *rs = &bf->bf_status.ds_rxstat; 1150235676Sadrian HAL_STATUS status = ath_hal_rxprocdesc(ah, ds, 1151235676Sadrian bf->bf_daddr, PA2DESC(sc, ds->ds_link), rs); 1152235676Sadrian if (status == HAL_OK || (sc->sc_debug & ATH_DEBUG_FATAL)) 1153235676Sadrian ath_printrxbuf(sc, bf, ix, status == HAL_OK); 1154235676Sadrian ix++; 1155235676Sadrian } 1156235676Sadrian } 1157235676Sadrian#endif 1158238316Sadrian /* 1159238316Sadrian * Free both high/low RX pending, just in case. 1160238316Sadrian */ 1161238316Sadrian if (sc->sc_rxedma[HAL_RX_QUEUE_LP].m_rxpending != NULL) { 1162238316Sadrian m_freem(sc->sc_rxedma[HAL_RX_QUEUE_LP].m_rxpending); 1163238316Sadrian sc->sc_rxedma[HAL_RX_QUEUE_LP].m_rxpending = NULL; 1164235676Sadrian } 1165238316Sadrian if (sc->sc_rxedma[HAL_RX_QUEUE_HP].m_rxpending != NULL) { 1166238316Sadrian m_freem(sc->sc_rxedma[HAL_RX_QUEUE_HP].m_rxpending); 1167238316Sadrian sc->sc_rxedma[HAL_RX_QUEUE_HP].m_rxpending = NULL; 1168238316Sadrian } 1169235676Sadrian sc->sc_rxlink = NULL; /* just in case */ 1170235676Sadrian#undef PA2DESC 1171235676Sadrian} 1172235676Sadrian 1173235676Sadrian/* 1174235676Sadrian * Enable the receive h/w following a reset. 1175235676Sadrian */ 1176238055Sadrianstatic int 1177238055Sadrianath_legacy_startrecv(struct ath_softc *sc) 1178235676Sadrian{ 1179235676Sadrian struct ath_hal *ah = sc->sc_ah; 1180235676Sadrian struct ath_buf *bf; 1181235676Sadrian 1182235676Sadrian sc->sc_rxlink = NULL; 1183238316Sadrian sc->sc_rxedma[HAL_RX_QUEUE_LP].m_rxpending = NULL; 1184238316Sadrian sc->sc_rxedma[HAL_RX_QUEUE_HP].m_rxpending = NULL; 1185235676Sadrian TAILQ_FOREACH(bf, &sc->sc_rxbuf, bf_list) { 1186235676Sadrian int error = ath_rxbuf_init(sc, bf); 1187235676Sadrian if (error != 0) { 1188235676Sadrian DPRINTF(sc, ATH_DEBUG_RECV, 1189235676Sadrian "%s: ath_rxbuf_init failed %d\n", 1190235676Sadrian __func__, error); 1191235676Sadrian return error; 1192235676Sadrian } 1193235676Sadrian } 1194235676Sadrian 1195235676Sadrian bf = TAILQ_FIRST(&sc->sc_rxbuf); 1196238278Sadrian ath_hal_putrxbuf(ah, bf->bf_daddr, HAL_RX_QUEUE_HP); 1197235676Sadrian ath_hal_rxena(ah); /* enable recv descriptors */ 1198235676Sadrian ath_mode_init(sc); /* set filters, etc. */ 1199235676Sadrian ath_hal_startpcurecv(ah); /* re-enable PCU/DMA engine */ 1200235676Sadrian return 0; 1201235676Sadrian} 1202238055Sadrian 1203238284Sadrianstatic int 1204238284Sadrianath_legacy_dma_rxsetup(struct ath_softc *sc) 1205238284Sadrian{ 1206238284Sadrian int error; 1207238055Sadrian 1208238284Sadrian error = ath_descdma_setup(sc, &sc->sc_rxdma, &sc->sc_rxbuf, 1209238729Sadrian "rx", sizeof(struct ath_desc), ath_rxbuf, 1); 1210238284Sadrian if (error != 0) 1211238284Sadrian return (error); 1212238284Sadrian 1213238284Sadrian return (0); 1214238284Sadrian} 1215238284Sadrian 1216238284Sadrianstatic int 1217238284Sadrianath_legacy_dma_rxteardown(struct ath_softc *sc) 1218238284Sadrian{ 1219238284Sadrian 1220238284Sadrian if (sc->sc_rxdma.dd_desc_len != 0) 1221238284Sadrian ath_descdma_cleanup(sc, &sc->sc_rxdma, &sc->sc_rxbuf); 1222238284Sadrian return (0); 1223238284Sadrian} 1224238284Sadrian 1225248529Sadrianstatic void 1226248529Sadrianath_legacy_recv_sched(struct ath_softc *sc, int dosched) 1227248529Sadrian{ 1228248529Sadrian 1229248529Sadrian taskqueue_enqueue(sc->sc_tq, &sc->sc_rxtask); 1230248529Sadrian} 1231248529Sadrian 1232248529Sadrianstatic void 1233248529Sadrianath_legacy_recv_sched_queue(struct ath_softc *sc, HAL_RX_QUEUE q, 1234248529Sadrian int dosched) 1235248529Sadrian{ 1236248529Sadrian 1237248529Sadrian taskqueue_enqueue(sc->sc_tq, &sc->sc_rxtask); 1238248529Sadrian} 1239248529Sadrian 1240238055Sadrianvoid 1241238055Sadrianath_recv_setup_legacy(struct ath_softc *sc) 1242238055Sadrian{ 1243238055Sadrian 1244238729Sadrian /* Sensible legacy defaults */ 1245243162Sadrian /* 1246243162Sadrian * XXX this should be changed to properly support the 1247243162Sadrian * exact RX descriptor size for each HAL. 1248243162Sadrian */ 1249243162Sadrian sc->sc_rx_statuslen = sizeof(struct ath_desc); 1250238729Sadrian 1251238055Sadrian sc->sc_rx.recv_start = ath_legacy_startrecv; 1252238055Sadrian sc->sc_rx.recv_stop = ath_legacy_stoprecv; 1253238055Sadrian sc->sc_rx.recv_flush = ath_legacy_flushrecv; 1254238055Sadrian sc->sc_rx.recv_tasklet = ath_legacy_rx_tasklet; 1255238055Sadrian sc->sc_rx.recv_rxbuf_init = ath_legacy_rxbuf_init; 1256238284Sadrian 1257238284Sadrian sc->sc_rx.recv_setup = ath_legacy_dma_rxsetup; 1258238284Sadrian sc->sc_rx.recv_teardown = ath_legacy_dma_rxteardown; 1259248529Sadrian sc->sc_rx.recv_sched = ath_legacy_recv_sched; 1260248529Sadrian sc->sc_rx.recv_sched_queue = ath_legacy_recv_sched_queue; 1261238055Sadrian} 1262