if_ath.c revision 121057
1/*-
2 * Copyright (c) 2002, 2003 Sam Leffler, Errno Consulting
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer,
10 *    without modification.
11 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
12 *    similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
13 *    redistribution must be conditioned upon including a substantially
14 *    similar Disclaimer requirement for further binary redistribution.
15 * 3. Neither the names of the above-listed copyright holders nor the names
16 *    of any contributors may be used to endorse or promote products derived
17 *    from this software without specific prior written permission.
18 *
19 * Alternatively, this software may be distributed under the terms of the
20 * GNU General Public License ("GPL") version 2 as published by the Free
21 * Software Foundation.
22 *
23 * NO WARRANTY
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
25 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
26 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
27 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
28 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
29 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
32 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
34 * THE POSSIBILITY OF SUCH DAMAGES.
35 */
36
37#include <sys/cdefs.h>
38__FBSDID("$FreeBSD: head/sys/dev/ath/if_ath.c 121057 2003-10-13 03:39:38Z sam $");
39
40/*
41 * Driver for the Atheros Wireless LAN controller.
42 *
43 * This software is derived from work of Atsushi Onoe; his contribution
44 * is greatly appreciated.
45 */
46
47#include "opt_inet.h"
48
49#include <sys/param.h>
50#include <sys/systm.h>
51#include <sys/sysctl.h>
52#include <sys/mbuf.h>
53#include <sys/malloc.h>
54#include <sys/lock.h>
55#include <sys/mutex.h>
56#include <sys/kernel.h>
57#include <sys/socket.h>
58#include <sys/sockio.h>
59#include <sys/errno.h>
60#include <sys/callout.h>
61#include <sys/bus.h>
62#include <sys/endian.h>
63
64#include <machine/bus.h>
65
66#include <net/if.h>
67#include <net/if_dl.h>
68#include <net/if_media.h>
69#include <net/if_arp.h>
70#include <net/ethernet.h>
71#include <net/if_llc.h>
72
73#include <net80211/ieee80211_var.h>
74
75#include <net/bpf.h>
76
77#ifdef INET
78#include <netinet/in.h>
79#include <netinet/if_ether.h>
80#endif
81
82#define	AR_DEBUG
83#include <dev/ath/if_athvar.h>
84#include <contrib/dev/ath/ah_desc.h>
85
86/* unalligned little endian access */
87#define LE_READ_2(p)							\
88	((u_int16_t)							\
89	 ((((u_int8_t *)(p))[0]      ) | (((u_int8_t *)(p))[1] <<  8)))
90#define LE_READ_4(p)							\
91	((u_int32_t)							\
92	 ((((u_int8_t *)(p))[0]      ) | (((u_int8_t *)(p))[1] <<  8) |	\
93	  (((u_int8_t *)(p))[2] << 16) | (((u_int8_t *)(p))[3] << 24)))
94
95static void	ath_init(void *);
96static void	ath_stop(struct ifnet *);
97static void	ath_start(struct ifnet *);
98static void	ath_reset(struct ath_softc *);
99static int	ath_media_change(struct ifnet *);
100static void	ath_watchdog(struct ifnet *);
101static int	ath_ioctl(struct ifnet *, u_long, caddr_t);
102static void	ath_fatal_proc(void *, int);
103static void	ath_rxorn_proc(void *, int);
104static void	ath_bmiss_proc(void *, int);
105static void	ath_initkeytable(struct ath_softc *);
106static void	ath_mode_init(struct ath_softc *);
107static int	ath_beacon_alloc(struct ath_softc *, struct ieee80211_node *);
108static void	ath_beacon_proc(void *, int);
109static void	ath_beacon_free(struct ath_softc *);
110static void	ath_beacon_config(struct ath_softc *);
111static int	ath_desc_alloc(struct ath_softc *);
112static void	ath_desc_free(struct ath_softc *);
113static struct ieee80211_node *ath_node_alloc(struct ieee80211com *);
114static void	ath_node_free(struct ieee80211com *, struct ieee80211_node *);
115static void	ath_node_copy(struct ieee80211com *,
116			struct ieee80211_node *, const struct ieee80211_node *);
117static u_int8_t	ath_node_getrssi(struct ieee80211com *,
118			struct ieee80211_node *);
119static int	ath_rxbuf_init(struct ath_softc *, struct ath_buf *);
120static void	ath_rx_proc(void *, int);
121static int	ath_tx_start(struct ath_softc *, struct ieee80211_node *,
122			     struct ath_buf *, struct mbuf *);
123static void	ath_tx_proc(void *, int);
124static int	ath_chan_set(struct ath_softc *, struct ieee80211_channel *);
125static void	ath_draintxq(struct ath_softc *);
126static void	ath_stoprecv(struct ath_softc *);
127static int	ath_startrecv(struct ath_softc *);
128static void	ath_next_scan(void *);
129static void	ath_calibrate(void *);
130static int	ath_newstate(struct ieee80211com *, enum ieee80211_state, int);
131static void	ath_newassoc(struct ieee80211com *,
132			struct ieee80211_node *, int);
133static int	ath_getchannels(struct ath_softc *, u_int cc, HAL_BOOL outdoor);
134
135static int	ath_rate_setup(struct ath_softc *sc, u_int mode);
136static void	ath_setcurmode(struct ath_softc *, enum ieee80211_phymode);
137static void	ath_rate_ctl_reset(struct ath_softc *, enum ieee80211_state);
138static void	ath_rate_ctl(void *, struct ieee80211_node *);
139
140SYSCTL_DECL(_hw_ath);
141
142/* XXX validate sysctl values */
143static	int ath_dwelltime = 200;		/* 5 channels/second */
144SYSCTL_INT(_hw_ath, OID_AUTO, dwell, CTLFLAG_RW, &ath_dwelltime,
145	    0, "channel dwell time (ms) for AP/station scanning");
146static	int ath_calinterval = 30;		/* calibrate every 30 secs */
147SYSCTL_INT(_hw_ath, OID_AUTO, calibrate, CTLFLAG_RW, &ath_calinterval,
148	    0, "chip calibration interval (secs)");
149static	int ath_outdoor = AH_TRUE;		/* outdoor operation */
150SYSCTL_INT(_hw_ath, OID_AUTO, outdoor, CTLFLAG_RD, &ath_outdoor,
151	    0, "enable/disable outdoor operation");
152static	int ath_countrycode = CTRY_DEFAULT;	/* country code */
153SYSCTL_INT(_hw_ath, OID_AUTO, countrycode, CTLFLAG_RD, &ath_countrycode,
154	    0, "country code");
155static	int ath_regdomain = 0;			/* regulatory domain */
156SYSCTL_INT(_hw_ath, OID_AUTO, regdomain, CTLFLAG_RD, &ath_regdomain,
157	    0, "regulatory domain");
158
159#ifdef AR_DEBUG
160int	ath_debug = 0;
161SYSCTL_INT(_hw_ath, OID_AUTO, debug, CTLFLAG_RW, &ath_debug,
162	    0, "control debugging printfs");
163#define	IFF_DUMPPKTS(_ifp) \
164	(ath_debug || \
165	    ((_ifp)->if_flags & (IFF_DEBUG|IFF_LINK2)) == (IFF_DEBUG|IFF_LINK2))
166static	void ath_printrxbuf(struct ath_buf *bf, int);
167static	void ath_printtxbuf(struct ath_buf *bf, int);
168#define	DPRINTF(X)	if (ath_debug) printf X
169#define	DPRINTF2(X)	if (ath_debug > 1) printf X
170#else
171#define	IFF_DUMPPKTS(_ifp) \
172	(((_ifp)->if_flags & (IFF_DEBUG|IFF_LINK2)) == (IFF_DEBUG|IFF_LINK2))
173#define	DPRINTF(X)
174#define	DPRINTF2(X)
175#endif
176
177int
178ath_attach(u_int16_t devid, struct ath_softc *sc)
179{
180	struct ieee80211com *ic = &sc->sc_ic;
181	struct ifnet *ifp = &ic->ic_if;
182	struct ath_hal *ah;
183	HAL_STATUS status;
184	int error = 0;
185
186	DPRINTF(("ath_attach: devid 0x%x\n", devid));
187
188	/* set these up early for if_printf use */
189	ifp->if_unit = device_get_unit(sc->sc_dev);
190	ifp->if_name = "ath";
191
192	ah = ath_hal_attach(devid, sc, sc->sc_st, sc->sc_sh, &status);
193	if (ah == NULL) {
194		if_printf(ifp, "unable to attach hardware; HAL status %u\n",
195			status);
196		error = ENXIO;
197		goto bad;
198	}
199	sc->sc_ah = ah;
200	sc->sc_invalid = 0;	/* ready to go, enable interrupt handling */
201
202	/*
203	 * Collect the channel list using the default country
204	 * code and including outdoor channels.  The 802.11 layer
205	 * is resposible for filtering this list based on settings
206	 * like the phy mode.
207	 */
208	error = ath_getchannels(sc, ath_countrycode, ath_outdoor);
209	if (error != 0)
210		goto bad;
211	/*
212	 * Copy these back; they are set as a side effect
213	 * of constructing the channel list.
214	 */
215	ath_regdomain = ath_hal_getregdomain(ah);
216	ath_countrycode = ath_hal_getcountrycode(ah);
217
218	/*
219	 * Setup rate tables for all potential media types.
220	 */
221	ath_rate_setup(sc, IEEE80211_MODE_11A);
222	ath_rate_setup(sc, IEEE80211_MODE_11B);
223	ath_rate_setup(sc, IEEE80211_MODE_11G);
224	ath_rate_setup(sc, IEEE80211_MODE_TURBO);
225
226	error = ath_desc_alloc(sc);
227	if (error != 0) {
228		if_printf(ifp, "failed to allocate descriptors: %d\n", error);
229		goto bad;
230	}
231	callout_init(&sc->sc_scan_ch, CALLOUT_MPSAFE);
232	callout_init(&sc->sc_cal_ch, CALLOUT_MPSAFE);
233
234	mtx_init(&sc->sc_txbuflock,
235		device_get_nameunit(sc->sc_dev), "xmit buf q", MTX_DEF);
236	mtx_init(&sc->sc_txqlock,
237		device_get_nameunit(sc->sc_dev), "xmit q", MTX_DEF);
238
239	TASK_INIT(&sc->sc_txtask, 0, ath_tx_proc, sc);
240	TASK_INIT(&sc->sc_rxtask, 0, ath_rx_proc, sc);
241	TASK_INIT(&sc->sc_swbatask, 0, ath_beacon_proc, sc);
242	TASK_INIT(&sc->sc_rxorntask, 0, ath_rxorn_proc, sc);
243	TASK_INIT(&sc->sc_fataltask, 0, ath_fatal_proc, sc);
244	TASK_INIT(&sc->sc_bmisstask, 0, ath_bmiss_proc, sc);
245
246	/*
247	 * For now just pre-allocate one data queue and one
248	 * beacon queue.  Note that the HAL handles resetting
249	 * them at the needed time.  Eventually we'll want to
250	 * allocate more tx queues for splitting management
251	 * frames and for QOS support.
252	 */
253	sc->sc_txhalq = ath_hal_setuptxqueue(ah,
254		HAL_TX_QUEUE_DATA,
255		AH_TRUE			/* enable interrupts */
256	);
257	if (sc->sc_txhalq == (u_int) -1) {
258		if_printf(ifp, "unable to setup a data xmit queue!\n");
259		goto bad;
260	}
261	sc->sc_bhalq = ath_hal_setuptxqueue(ah,
262		HAL_TX_QUEUE_BEACON,
263		AH_TRUE			/* enable interrupts */
264	);
265	if (sc->sc_bhalq == (u_int) -1) {
266		if_printf(ifp, "unable to setup a beacon xmit queue!\n");
267		goto bad;
268	}
269
270	ifp->if_softc = sc;
271	ifp->if_flags = IFF_SIMPLEX | IFF_BROADCAST | IFF_MULTICAST;
272	ifp->if_start = ath_start;
273	ifp->if_watchdog = ath_watchdog;
274	ifp->if_ioctl = ath_ioctl;
275	ifp->if_init = ath_init;
276	ifp->if_snd.ifq_maxlen = IFQ_MAXLEN;
277
278	ic->ic_softc = sc;
279	ic->ic_newassoc = ath_newassoc;
280	/* XXX not right but it's not used anywhere important */
281	ic->ic_phytype = IEEE80211_T_OFDM;
282	ic->ic_opmode = IEEE80211_M_STA;
283	ic->ic_caps = IEEE80211_C_WEP | IEEE80211_C_IBSS | IEEE80211_C_HOSTAP
284		| IEEE80211_C_MONITOR | IEEE80211_C_SHPREAMBLE;
285
286	/* get mac address from hardware */
287	ath_hal_getmac(ah, ic->ic_myaddr);
288
289	/* call MI attach routine. */
290	ieee80211_ifattach(ifp);
291	/* override default methods */
292	ic->ic_node_alloc = ath_node_alloc;
293	ic->ic_node_free = ath_node_free;
294	ic->ic_node_copy = ath_node_copy;
295	ic->ic_node_getrssi = ath_node_getrssi;
296	sc->sc_newstate = ic->ic_newstate;
297	ic->ic_newstate = ath_newstate;
298	/* complete initialization */
299	ieee80211_media_init(ifp, ath_media_change, ieee80211_media_status);
300
301	bpfattach2(ifp, DLT_IEEE802_11_RADIO,
302		sizeof(struct ieee80211_frame) + sizeof(sc->sc_tx_th),
303		&sc->sc_drvbpf);
304	/*
305	 * Initialize constant fields.
306	 *
307	 * NB: the channel is setup each time we transition to the
308	 *     RUN state to avoid filling it in for each frame.
309	 */
310	sc->sc_tx_th.wt_ihdr.it_len = sizeof(sc->sc_tx_th);
311	sc->sc_tx_th.wt_ihdr.it_present = ATH_TX_RADIOTAP_PRESENT;
312
313	sc->sc_rx_th.wr_ihdr.it_len = sizeof(sc->sc_rx_th);
314	sc->sc_rx_th.wr_ihdr.it_present = ATH_RX_RADIOTAP_PRESENT;
315
316	if_printf(ifp, "802.11 address: %s\n", ether_sprintf(ic->ic_myaddr));
317
318	return 0;
319bad:
320	if (ah)
321		ath_hal_detach(ah);
322	sc->sc_invalid = 1;
323	return error;
324}
325
326int
327ath_detach(struct ath_softc *sc)
328{
329	struct ifnet *ifp = &sc->sc_ic.ic_if;
330
331	DPRINTF(("ath_detach: if_flags %x\n", ifp->if_flags));
332
333	ath_stop(ifp);
334	bpfdetach(ifp);
335	ath_desc_free(sc);
336	ath_hal_detach(sc->sc_ah);
337	ieee80211_ifdetach(ifp);
338	mtx_unlock(&sc->sc_mtx);
339	return 0;
340}
341
342void
343ath_suspend(struct ath_softc *sc)
344{
345	struct ifnet *ifp = &sc->sc_ic.ic_if;
346
347	DPRINTF(("ath_suspend: if_flags %x\n", ifp->if_flags));
348
349	ath_stop(ifp);
350}
351
352void
353ath_resume(struct ath_softc *sc)
354{
355	struct ifnet *ifp = &sc->sc_ic.ic_if;
356
357	DPRINTF(("ath_resume: if_flags %x\n", ifp->if_flags));
358
359	if (ifp->if_flags & IFF_UP) {
360		ath_init(ifp);
361		if (ifp->if_flags & IFF_RUNNING)
362			ath_start(ifp);
363	}
364}
365
366void
367ath_shutdown(struct ath_softc *sc)
368{
369	struct ifnet *ifp = &sc->sc_ic.ic_if;
370
371	DPRINTF(("ath_shutdown: if_flags %x\n", ifp->if_flags));
372
373	ath_stop(ifp);
374}
375
376void
377ath_intr(void *arg)
378{
379	struct ath_softc *sc = arg;
380	struct ieee80211com *ic = &sc->sc_ic;
381	struct ifnet *ifp = &ic->ic_if;
382	struct ath_hal *ah = sc->sc_ah;
383	HAL_INT status;
384
385	if (sc->sc_invalid) {
386		/*
387		 * The hardware is not ready/present, don't touch anything.
388		 * Note this can happen early on if the IRQ is shared.
389		 */
390		DPRINTF(("ath_intr: invalid; ignored\n"));
391		return;
392	}
393	if ((ifp->if_flags & (IFF_RUNNING|IFF_UP)) != (IFF_RUNNING|IFF_UP)) {
394		DPRINTF(("ath_intr: if_flags 0x%x\n", ifp->if_flags));
395		ath_hal_getisr(ah, &status);	/* clear ISR */
396		ath_hal_intrset(ah, 0);		/* disable further intr's */
397		return;
398	}
399	ath_hal_getisr(ah, &status);		/* NB: clears ISR too */
400	DPRINTF2(("ath_intr: status 0x%x\n", status));
401#ifdef AR_DEBUG
402	if (ath_debug &&
403	    (status & (HAL_INT_FATAL|HAL_INT_RXORN|HAL_INT_BMISS))) {
404		if_printf(ifp, "ath_intr: status 0x%x\n", status);
405		ath_hal_dumpstate(ah);
406	}
407#endif /* AR_DEBUG */
408	status &= sc->sc_imask;			/* discard unasked for bits */
409	if (status & HAL_INT_FATAL) {
410		sc->sc_stats.ast_hardware++;
411		ath_hal_intrset(ah, 0);		/* disable intr's until reset */
412		taskqueue_enqueue(taskqueue_swi, &sc->sc_fataltask);
413	} else if (status & HAL_INT_RXORN) {
414		sc->sc_stats.ast_rxorn++;
415		ath_hal_intrset(ah, 0);		/* disable intr's until reset */
416		taskqueue_enqueue(taskqueue_swi, &sc->sc_rxorntask);
417	} else {
418		if (status & HAL_INT_RXEOL) {
419			/*
420			 * NB: the hardware should re-read the link when
421			 *     RXE bit is written, but it doesn't work at
422			 *     least on older hardware revs.
423			 */
424			sc->sc_stats.ast_rxeol++;
425			sc->sc_rxlink = NULL;
426		}
427		if (status & HAL_INT_TXURN) {
428			sc->sc_stats.ast_txurn++;
429			/* bump tx trigger level */
430			ath_hal_updatetxtriglevel(ah, AH_TRUE);
431		}
432		if (status & HAL_INT_RX)
433			taskqueue_enqueue(taskqueue_swi, &sc->sc_rxtask);
434		if (status & HAL_INT_TX)
435			taskqueue_enqueue(taskqueue_swi, &sc->sc_txtask);
436		if (status & HAL_INT_SWBA)
437			taskqueue_enqueue(taskqueue_swi, &sc->sc_swbatask);
438		if (status & HAL_INT_BMISS) {
439			sc->sc_stats.ast_bmiss++;
440			taskqueue_enqueue(taskqueue_swi, &sc->sc_bmisstask);
441		}
442	}
443}
444
445static void
446ath_fatal_proc(void *arg, int pending)
447{
448	struct ath_softc *sc = arg;
449
450	device_printf(sc->sc_dev, "hardware error; resetting\n");
451	ath_reset(sc);
452}
453
454static void
455ath_rxorn_proc(void *arg, int pending)
456{
457	struct ath_softc *sc = arg;
458
459	device_printf(sc->sc_dev, "rx FIFO overrun; resetting\n");
460	ath_reset(sc);
461}
462
463static void
464ath_bmiss_proc(void *arg, int pending)
465{
466	struct ath_softc *sc = arg;
467	struct ieee80211com *ic = &sc->sc_ic;
468
469	DPRINTF(("ath_bmiss_proc: pending %u\n", pending));
470	KASSERT(ic->ic_opmode == IEEE80211_M_STA,
471		("unexpect operating mode %u", ic->ic_opmode));
472	if (ic->ic_state == IEEE80211_S_RUN)
473		ieee80211_new_state(ic, IEEE80211_S_SCAN, -1);
474}
475
476static u_int
477ath_chan2flags(struct ieee80211com *ic, struct ieee80211_channel *chan)
478{
479	static const u_int modeflags[] = {
480		0,			/* IEEE80211_MODE_AUTO */
481		CHANNEL_A,		/* IEEE80211_MODE_11A */
482		CHANNEL_B,		/* IEEE80211_MODE_11B */
483		CHANNEL_PUREG,		/* IEEE80211_MODE_11G */
484		CHANNEL_T		/* IEEE80211_MODE_TURBO */
485	};
486	return modeflags[ieee80211_chan2mode(ic, chan)];
487}
488
489static void
490ath_init(void *arg)
491{
492	struct ath_softc *sc = (struct ath_softc *) arg;
493	struct ieee80211com *ic = &sc->sc_ic;
494	struct ifnet *ifp = &ic->ic_if;
495	struct ieee80211_node *ni;
496	enum ieee80211_phymode mode;
497	struct ath_hal *ah = sc->sc_ah;
498	HAL_STATUS status;
499	HAL_CHANNEL hchan;
500
501	DPRINTF(("ath_init: if_flags 0x%x\n", ifp->if_flags));
502
503	mtx_lock(&sc->sc_mtx);
504	/*
505	 * Stop anything previously setup.  This is safe
506	 * whether this is the first time through or not.
507	 */
508	ath_stop(ifp);
509
510	/*
511	 * The basic interface to setting the hardware in a good
512	 * state is ``reset''.  On return the hardware is known to
513	 * be powered up and with interrupts disabled.  This must
514	 * be followed by initialization of the appropriate bits
515	 * and then setup of the interrupt mask.
516	 */
517	hchan.channel = ic->ic_ibss_chan->ic_freq;
518	hchan.channelFlags = ath_chan2flags(ic, ic->ic_ibss_chan);
519	if (!ath_hal_reset(ah, ic->ic_opmode, &hchan, AH_FALSE, &status)) {
520		if_printf(ifp, "unable to reset hardware; hal status %u\n",
521			status);
522		goto done;
523	}
524
525	/*
526	 * Setup the hardware after reset: the key cache
527	 * is filled as needed and the receive engine is
528	 * set going.  Frame transmit is handled entirely
529	 * in the frame output path; there's nothing to do
530	 * here except setup the interrupt mask.
531	 */
532	if (ic->ic_flags & IEEE80211_F_WEPON)
533		ath_initkeytable(sc);
534	if (ath_startrecv(sc) != 0) {
535		if_printf(ifp, "unable to start recv logic\n");
536		goto done;
537	}
538
539	/*
540	 * Enable interrupts.
541	 */
542	sc->sc_imask = HAL_INT_RX | HAL_INT_TX
543		  | HAL_INT_RXEOL | HAL_INT_RXORN
544		  | HAL_INT_FATAL | HAL_INT_GLOBAL;
545	ath_hal_intrset(ah, sc->sc_imask);
546
547	ifp->if_flags |= IFF_RUNNING;
548	ic->ic_state = IEEE80211_S_INIT;
549
550	/*
551	 * The hardware should be ready to go now so it's safe
552	 * to kick the 802.11 state machine as it's likely to
553	 * immediately call back to us to send mgmt frames.
554	 */
555	ni = ic->ic_bss;
556	ni->ni_chan = ic->ic_ibss_chan;
557	mode = ieee80211_chan2mode(ic, ni->ni_chan);
558	if (mode != sc->sc_curmode)
559		ath_setcurmode(sc, mode);
560	if (ic->ic_opmode != IEEE80211_M_MONITOR)
561		ieee80211_new_state(ic, IEEE80211_S_SCAN, -1);
562	else
563		ieee80211_new_state(ic, IEEE80211_S_RUN, -1);
564done:
565	mtx_unlock(&sc->sc_mtx);
566}
567
568static void
569ath_stop(struct ifnet *ifp)
570{
571	struct ieee80211com *ic = (struct ieee80211com *) ifp;
572	struct ath_softc *sc = ifp->if_softc;
573	struct ath_hal *ah = sc->sc_ah;
574
575	DPRINTF(("ath_stop: invalid %u if_flags 0x%x\n",
576		sc->sc_invalid, ifp->if_flags));
577
578	mtx_lock(&sc->sc_mtx);
579	if (ifp->if_flags & IFF_RUNNING) {
580		/*
581		 * Shutdown the hardware and driver:
582		 *    disable interrupts
583		 *    turn off timers
584		 *    clear transmit machinery
585		 *    clear receive machinery
586		 *    drain and release tx queues
587		 *    reclaim beacon resources
588		 *    reset 802.11 state machine
589		 *    power down hardware
590		 *
591		 * Note that some of this work is not possible if the
592		 * hardware is gone (invalid).
593		 */
594		ifp->if_flags &= ~IFF_RUNNING;
595		ifp->if_timer = 0;
596		if (!sc->sc_invalid)
597			ath_hal_intrset(ah, 0);
598		ath_draintxq(sc);
599		if (!sc->sc_invalid)
600			ath_stoprecv(sc);
601		else
602			sc->sc_rxlink = NULL;
603		IF_DRAIN(&ifp->if_snd);
604		ath_beacon_free(sc);
605		ieee80211_new_state(ic, IEEE80211_S_INIT, -1);
606		if (!sc->sc_invalid)
607			ath_hal_setpower(ah, HAL_PM_FULL_SLEEP, 0);
608	}
609	mtx_unlock(&sc->sc_mtx);
610}
611
612/*
613 * Reset the hardware w/o losing operational state.  This is
614 * basically a more efficient way of doing ath_stop, ath_init,
615 * followed by state transitions to the current 802.11
616 * operational state.  Used to recover from errors rx overrun
617 * and to reset the hardware when rf gain settings must be reset.
618 */
619static void
620ath_reset(struct ath_softc *sc)
621{
622	struct ieee80211com *ic = &sc->sc_ic;
623	struct ifnet *ifp = &ic->ic_if;
624	struct ath_hal *ah = sc->sc_ah;
625	struct ieee80211_channel *c;
626	HAL_STATUS status;
627	HAL_CHANNEL hchan;
628
629	/*
630	 * Convert to a HAL channel description with the flags
631	 * constrained to reflect the current operating mode.
632	 */
633	c = ic->ic_ibss_chan;
634	hchan.channel = c->ic_freq;
635	hchan.channelFlags = ath_chan2flags(ic, c);
636
637	ath_hal_intrset(ah, 0);		/* disable interrupts */
638	ath_draintxq(sc);		/* stop xmit side */
639	ath_stoprecv(sc);		/* stop recv side */
640	/* NB: indicate channel change so we do a full reset */
641	if (!ath_hal_reset(ah, ic->ic_opmode, &hchan, AH_TRUE, &status))
642		if_printf(ifp, "%s: unable to reset hardware; hal status %u\n",
643			__func__, status);
644	ath_hal_intrset(ah, sc->sc_imask);
645	if (ath_startrecv(sc) != 0)	/* restart recv */
646		if_printf(ifp, "%s: unable to start recv logic\n", __func__);
647	ath_start(ifp);			/* restart xmit */
648	if (ic->ic_state == IEEE80211_S_RUN)
649		ath_beacon_config(sc);	/* restart beacons */
650}
651
652static void
653ath_start(struct ifnet *ifp)
654{
655	struct ath_softc *sc = ifp->if_softc;
656	struct ath_hal *ah = sc->sc_ah;
657	struct ieee80211com *ic = &sc->sc_ic;
658	struct ieee80211_node *ni;
659	struct ath_buf *bf;
660	struct mbuf *m;
661	struct ieee80211_frame *wh;
662
663	if ((ifp->if_flags & IFF_RUNNING) == 0 || sc->sc_invalid)
664		return;
665	for (;;) {
666		/*
667		 * Grab a TX buffer and associated resources.
668		 */
669		mtx_lock(&sc->sc_txbuflock);
670		bf = TAILQ_FIRST(&sc->sc_txbuf);
671		if (bf != NULL)
672			TAILQ_REMOVE(&sc->sc_txbuf, bf, bf_list);
673		mtx_unlock(&sc->sc_txbuflock);
674		if (bf == NULL) {
675			DPRINTF(("ath_start: out of xmit buffers\n"));
676			sc->sc_stats.ast_tx_qstop++;
677			ifp->if_flags |= IFF_OACTIVE;
678			break;
679		}
680		/*
681		 * Poll the management queue for frames; they
682		 * have priority over normal data frames.
683		 */
684		IF_DEQUEUE(&ic->ic_mgtq, m);
685		if (m == NULL) {
686			/*
687			 * No data frames go out unless we're associated.
688			 */
689			if (ic->ic_state != IEEE80211_S_RUN) {
690				DPRINTF(("ath_start: ignore data packet, "
691					"state %u\n", ic->ic_state));
692				sc->sc_stats.ast_tx_discard++;
693				mtx_lock(&sc->sc_txbuflock);
694				TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list);
695				mtx_unlock(&sc->sc_txbuflock);
696				break;
697			}
698			IF_DEQUEUE(&ifp->if_snd, m);
699			if (m == NULL) {
700				mtx_lock(&sc->sc_txbuflock);
701				TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list);
702				mtx_unlock(&sc->sc_txbuflock);
703				break;
704			}
705			ifp->if_opackets++;
706			BPF_MTAP(ifp, m);
707			/*
708			 * Encapsulate the packet in prep for transmission.
709			 */
710			m = ieee80211_encap(ifp, m, &ni);
711			if (m == NULL) {
712				DPRINTF(("ath_start: encapsulation failure\n"));
713				sc->sc_stats.ast_tx_encap++;
714				goto bad;
715			}
716			wh = mtod(m, struct ieee80211_frame *);
717			if (ic->ic_flags & IEEE80211_F_WEPON)
718				wh->i_fc[1] |= IEEE80211_FC1_WEP;
719		} else {
720			/*
721			 * Hack!  The referenced node pointer is in the
722			 * rcvif field of the packet header.  This is
723			 * placed there by ieee80211_mgmt_output because
724			 * we need to hold the reference with the frame
725			 * and there's no other way (other than packet
726			 * tags which we consider too expensive to use)
727			 * to pass it along.
728			 */
729			ni = (struct ieee80211_node *) m->m_pkthdr.rcvif;
730			m->m_pkthdr.rcvif = NULL;
731
732			wh = mtod(m, struct ieee80211_frame *);
733			if ((wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) ==
734			    IEEE80211_FC0_SUBTYPE_PROBE_RESP) {
735				/* fill time stamp */
736				u_int64_t tsf;
737				u_int32_t *tstamp;
738
739				tsf = ath_hal_gettsf64(ah);
740				/* XXX: adjust 100us delay to xmit */
741				tsf += 100;
742				tstamp = (u_int32_t *)&wh[1];
743				tstamp[0] = htole32(tsf & 0xffffffff);
744				tstamp[1] = htole32(tsf >> 32);
745			}
746			sc->sc_stats.ast_tx_mgmt++;
747		}
748		if (ic->ic_rawbpf)
749			bpf_mtap(ic->ic_rawbpf, m);
750
751		if (sc->sc_drvbpf) {
752			struct mbuf *mb;
753
754			MGETHDR(mb, M_DONTWAIT, m->m_type);
755			if (mb != NULL) {
756				sc->sc_tx_th.wt_rate =
757					ni->ni_rates.rs_rates[ni->ni_txrate];
758
759				mb->m_next = m;
760				mb->m_data = (caddr_t)&sc->sc_tx_th;
761				mb->m_len = sizeof(sc->sc_tx_th);
762				mb->m_pkthdr.len += mb->m_len;
763				bpf_mtap(sc->sc_drvbpf, mb);
764				m_free(mb);
765			}
766		}
767
768		if (ath_tx_start(sc, ni, bf, m)) {
769	bad:
770			mtx_lock(&sc->sc_txbuflock);
771			TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list);
772			mtx_unlock(&sc->sc_txbuflock);
773			ifp->if_oerrors++;
774			if (ni && ni != ic->ic_bss)
775				ieee80211_free_node(ic, ni);
776			continue;
777		}
778
779		sc->sc_tx_timer = 5;
780		ifp->if_timer = 1;
781	}
782}
783
784static int
785ath_media_change(struct ifnet *ifp)
786{
787	int error;
788
789	error = ieee80211_media_change(ifp);
790	if (error == ENETRESET) {
791		if ((ifp->if_flags & (IFF_RUNNING|IFF_UP)) ==
792		    (IFF_RUNNING|IFF_UP))
793			ath_init(ifp);		/* XXX lose error */
794		error = 0;
795	}
796	return error;
797}
798
799static void
800ath_watchdog(struct ifnet *ifp)
801{
802	struct ath_softc *sc = ifp->if_softc;
803	struct ieee80211com *ic = &sc->sc_ic;
804
805	ifp->if_timer = 0;
806	if ((ifp->if_flags & IFF_RUNNING) == 0 || sc->sc_invalid)
807		return;
808	if (sc->sc_tx_timer) {
809		if (--sc->sc_tx_timer == 0) {
810			if_printf(ifp, "device timeout\n");
811#ifdef AR_DEBUG
812			if (ath_debug)
813				ath_hal_dumpstate(sc->sc_ah);
814#endif /* AR_DEBUG */
815			ath_init(ifp);		/* XXX ath_reset??? */
816			ifp->if_oerrors++;
817			sc->sc_stats.ast_watchdog++;
818			return;
819		}
820		ifp->if_timer = 1;
821	}
822	if (ic->ic_fixed_rate == -1) {
823		/*
824		 * Run the rate control algorithm if we're not
825		 * locked at a fixed rate.
826		 */
827		if (ic->ic_opmode == IEEE80211_M_STA)
828			ath_rate_ctl(sc, ic->ic_bss);
829		else
830			ieee80211_iterate_nodes(ic, ath_rate_ctl, sc);
831	}
832	ieee80211_watchdog(ifp);
833}
834
835static int
836ath_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
837{
838	struct ath_softc *sc = ifp->if_softc;
839	struct ifreq *ifr = (struct ifreq *)data;
840	int error = 0;
841
842	mtx_lock(&sc->sc_mtx);
843	switch (cmd) {
844	case SIOCSIFFLAGS:
845		if (ifp->if_flags & IFF_UP) {
846			if (ifp->if_flags & IFF_RUNNING) {
847				/*
848				 * To avoid rescanning another access point,
849				 * do not call ath_init() here.  Instead,
850				 * only reflect promisc mode settings.
851				 */
852				ath_mode_init(sc);
853			} else {
854				/*
855				 * Beware of being called during detach to
856				 * reset promiscuous mode.  In that case we
857				 * will still be marked UP but not RUNNING.
858				 * However trying to re-init the interface
859				 * is the wrong thing to do as we've already
860				 * torn down much of our state.  There's
861				 * probably a better way to deal with this.
862				 */
863				if (!sc->sc_invalid)
864					ath_init(ifp);	/* XXX lose error */
865			}
866		} else
867			ath_stop(ifp);
868		break;
869	case SIOCADDMULTI:
870	case SIOCDELMULTI:
871		/*
872		 * The upper layer has already installed/removed
873		 * the multicast address(es), just recalculate the
874		 * multicast filter for the card.
875		 */
876		if (ifp->if_flags & IFF_RUNNING)
877			ath_mode_init(sc);
878		break;
879	case SIOCGATHSTATS:
880		copyout(&sc->sc_stats, ifr->ifr_data, sizeof (sc->sc_stats));
881		break;
882	default:
883		error = ieee80211_ioctl(ifp, cmd, data);
884		if (error == ENETRESET) {
885			if ((ifp->if_flags & (IFF_RUNNING|IFF_UP)) ==
886			    (IFF_RUNNING|IFF_UP))
887				ath_init(ifp);		/* XXX lose error */
888			error = 0;
889		}
890		break;
891	}
892	mtx_unlock(&sc->sc_mtx);
893	return error;
894}
895
896/*
897 * Fill the hardware key cache with key entries.
898 */
899static void
900ath_initkeytable(struct ath_softc *sc)
901{
902	struct ieee80211com *ic = &sc->sc_ic;
903	struct ath_hal *ah = sc->sc_ah;
904	int i;
905
906	for (i = 0; i < IEEE80211_WEP_NKID; i++) {
907		struct ieee80211_wepkey *k = &ic->ic_nw_keys[i];
908		if (k->wk_len == 0)
909			ath_hal_keyreset(ah, i);
910		else
911			/* XXX return value */
912			/* NB: this uses HAL_KEYVAL == ieee80211_wepkey */
913			ath_hal_keyset(ah, i, (const HAL_KEYVAL *) k);
914	}
915}
916
917static void
918ath_mode_init(struct ath_softc *sc)
919{
920	struct ieee80211com *ic = &sc->sc_ic;
921	struct ath_hal *ah = sc->sc_ah;
922	struct ifnet *ifp = &ic->ic_if;
923	u_int32_t rfilt, mfilt[2], val;
924	u_int8_t pos;
925	struct ifmultiaddr *ifma;
926
927	/* configure operational mode */
928	ath_hal_setopmode(ah, ic->ic_opmode);
929
930	/* receive filter */
931	rfilt = (ath_hal_getrxfilter(ah) & HAL_RX_FILTER_PHYERR)
932	      | HAL_RX_FILTER_UCAST | HAL_RX_FILTER_BCAST | HAL_RX_FILTER_MCAST;
933	if (ic->ic_opmode != IEEE80211_M_STA)
934		rfilt |= HAL_RX_FILTER_PROBEREQ;
935	if (ic->ic_opmode != IEEE80211_M_HOSTAP &&
936	    (ifp->if_flags & IFF_PROMISC))
937		rfilt |= HAL_RX_FILTER_PROM;
938	if (ic->ic_opmode == IEEE80211_M_STA ||
939	    ic->ic_state == IEEE80211_S_SCAN)
940		rfilt |= HAL_RX_FILTER_BEACON;
941	ath_hal_setrxfilter(ah, rfilt);
942
943	/* calculate and install multicast filter */
944	if ((ifp->if_flags & IFF_ALLMULTI) == 0) {
945		mfilt[0] = mfilt[1] = 0;
946		TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
947			caddr_t dl;
948
949			/* calculate XOR of eight 6bit values */
950			dl = LLADDR((struct sockaddr_dl *) ifma->ifma_addr);
951			val = LE_READ_4(dl + 0);
952			pos = (val >> 18) ^ (val >> 12) ^ (val >> 6) ^ val;
953			val = LE_READ_4(dl + 3);
954			pos ^= (val >> 18) ^ (val >> 12) ^ (val >> 6) ^ val;
955			pos &= 0x3f;
956			mfilt[pos / 32] |= (1 << (pos % 32));
957		}
958	} else {
959		mfilt[0] = mfilt[1] = ~0;
960	}
961	ath_hal_setmcastfilter(ah, mfilt[0], mfilt[1]);
962	DPRINTF(("ath_mode_init: RX filter 0x%x, MC filter %08x:%08x\n",
963		rfilt, mfilt[0], mfilt[1]));
964}
965
966static void
967ath_mbuf_load_cb(void *arg, bus_dma_segment_t *seg, int nseg, bus_size_t mapsize, int error)
968{
969	struct ath_buf *bf = arg;
970
971	KASSERT(nseg <= ATH_MAX_SCATTER,
972		("ath_mbuf_load_cb: too many DMA segments %u", nseg));
973	bf->bf_mapsize = mapsize;
974	bf->bf_nseg = nseg;
975	bcopy(seg, bf->bf_segs, nseg * sizeof (seg[0]));
976}
977
978static int
979ath_beacon_alloc(struct ath_softc *sc, struct ieee80211_node *ni)
980{
981	struct ieee80211com *ic = &sc->sc_ic;
982	struct ifnet *ifp = &ic->ic_if;
983	struct ath_hal *ah = sc->sc_ah;
984	struct ieee80211_frame *wh;
985	struct ath_buf *bf;
986	struct ath_desc *ds;
987	struct mbuf *m;
988	int error, pktlen;
989	u_int8_t *frm, rate;
990	u_int16_t capinfo;
991	struct ieee80211_rateset *rs;
992	const HAL_RATE_TABLE *rt;
993
994	bf = sc->sc_bcbuf;
995	if (bf->bf_m != NULL) {
996		bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
997		m_freem(bf->bf_m);
998		bf->bf_m = NULL;
999		bf->bf_node = NULL;
1000	}
1001	/*
1002	 * NB: the beacon data buffer must be 32-bit aligned;
1003	 * we assume the mbuf routines will return us something
1004	 * with this alignment (perhaps should assert).
1005	 */
1006	rs = &ni->ni_rates;
1007	pktlen = sizeof (struct ieee80211_frame)
1008	       + 8 + 2 + 2 + 2+ni->ni_esslen + 2+rs->rs_nrates + 3 + 6;
1009	if (rs->rs_nrates > IEEE80211_RATE_SIZE)
1010		pktlen += 2;
1011	if (pktlen <= MHLEN)
1012		MGETHDR(m, M_DONTWAIT, MT_DATA);
1013	else
1014		m = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR);
1015	if (m == NULL) {
1016		DPRINTF(("ath_beacon_alloc: cannot get mbuf/cluster; size %u\n",
1017			pktlen));
1018		sc->sc_stats.ast_be_nombuf++;
1019		return ENOMEM;
1020	}
1021
1022	wh = mtod(m, struct ieee80211_frame *);
1023	wh->i_fc[0] = IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_MGT |
1024	    IEEE80211_FC0_SUBTYPE_BEACON;
1025	wh->i_fc[1] = IEEE80211_FC1_DIR_NODS;
1026	*(u_int16_t *)wh->i_dur = 0;
1027	memcpy(wh->i_addr1, ifp->if_broadcastaddr, IEEE80211_ADDR_LEN);
1028	memcpy(wh->i_addr2, ic->ic_myaddr, IEEE80211_ADDR_LEN);
1029	memcpy(wh->i_addr3, ni->ni_bssid, IEEE80211_ADDR_LEN);
1030	*(u_int16_t *)wh->i_seq = 0;
1031
1032	/*
1033	 * beacon frame format
1034	 *	[8] time stamp
1035	 *	[2] beacon interval
1036	 *	[2] cabability information
1037	 *	[tlv] ssid
1038	 *	[tlv] supported rates
1039	 *	[tlv] parameter set (IBSS)
1040	 *	[tlv] extended supported rates
1041	 */
1042	frm = (u_int8_t *)&wh[1];
1043	memset(frm, 0, 8);	/* timestamp is set by hardware */
1044	frm += 8;
1045	*(u_int16_t *)frm = htole16(ni->ni_intval);
1046	frm += 2;
1047	if (ic->ic_opmode == IEEE80211_M_IBSS)
1048		capinfo = IEEE80211_CAPINFO_IBSS;
1049	else
1050		capinfo = IEEE80211_CAPINFO_ESS;
1051	if (ic->ic_flags & IEEE80211_F_WEPON)
1052		capinfo |= IEEE80211_CAPINFO_PRIVACY;
1053	if ((ic->ic_flags & IEEE80211_F_SHPREAMBLE) &&
1054	    IEEE80211_IS_CHAN_2GHZ(ni->ni_chan))
1055		capinfo |= IEEE80211_CAPINFO_SHORT_PREAMBLE;
1056	if (ic->ic_flags & IEEE80211_F_SHSLOT)
1057		capinfo |= IEEE80211_CAPINFO_SHORT_SLOTTIME;
1058	*(u_int16_t *)frm = htole16(capinfo);
1059	frm += 2;
1060	*frm++ = IEEE80211_ELEMID_SSID;
1061	*frm++ = ni->ni_esslen;
1062	memcpy(frm, ni->ni_essid, ni->ni_esslen);
1063	frm += ni->ni_esslen;
1064	frm = ieee80211_add_rates(frm, rs);
1065	*frm++ = IEEE80211_ELEMID_DSPARMS;
1066	*frm++ = 1;
1067	*frm++ = ieee80211_chan2ieee(ic, ni->ni_chan);
1068	if (ic->ic_opmode == IEEE80211_M_IBSS) {
1069		*frm++ = IEEE80211_ELEMID_IBSSPARMS;
1070		*frm++ = 2;
1071		*frm++ = 0; *frm++ = 0;		/* TODO: ATIM window */
1072	} else {
1073		/* TODO: TIM */
1074		*frm++ = IEEE80211_ELEMID_TIM;
1075		*frm++ = 4;	/* length */
1076		*frm++ = 0;	/* DTIM count */
1077		*frm++ = 1;	/* DTIM period */
1078		*frm++ = 0;	/* bitmap control */
1079		*frm++ = 0;	/* Partial Virtual Bitmap (variable length) */
1080	}
1081	frm = ieee80211_add_xrates(frm, rs);
1082	m->m_pkthdr.len = m->m_len = frm - mtod(m, u_int8_t *);
1083	KASSERT(m->m_pkthdr.len <= pktlen,
1084		("beacon bigger than expected, len %u calculated %u",
1085		m->m_pkthdr.len, pktlen));
1086
1087	DPRINTF2(("ath_beacon_alloc: m %p len %u\n", m, m->m_len));
1088	error = bus_dmamap_load_mbuf(sc->sc_dmat, bf->bf_dmamap, m,
1089				     ath_mbuf_load_cb, bf,
1090				     BUS_DMA_NOWAIT);
1091	if (error != 0) {
1092		m_freem(m);
1093		return error;
1094	}
1095	KASSERT(bf->bf_nseg == 1,
1096		("ath_beacon_alloc: multi-segment packet; nseg %u",
1097		bf->bf_nseg));
1098	bf->bf_m = m;
1099
1100	/* setup descriptors */
1101	ds = bf->bf_desc;
1102
1103	ds->ds_link = 0;
1104	ds->ds_data = bf->bf_segs[0].ds_addr;
1105	/*
1106	 * Calculate rate code.
1107	 * XXX everything at min xmit rate
1108	 */
1109	rt = sc->sc_currates;
1110	KASSERT(rt != NULL, ("no rate table, mode %u", sc->sc_curmode));
1111	if (ic->ic_flags & IEEE80211_F_SHPREAMBLE)
1112		rate = rt->info[0].rateCode | rt->info[0].shortPreamble;
1113	else
1114		rate = rt->info[0].rateCode;
1115	ath_hal_setuptxdesc(ah, ds
1116		, m->m_pkthdr.len + IEEE80211_CRC_LEN	/* packet length */
1117		, sizeof(struct ieee80211_frame)	/* header length */
1118		, HAL_PKT_TYPE_BEACON		/* Atheros packet type */
1119		, 0x20				/* txpower XXX */
1120		, rate, 1			/* series 0 rate/tries */
1121		, HAL_TXKEYIX_INVALID		/* no encryption */
1122		, 0				/* antenna mode */
1123		, HAL_TXDESC_NOACK		/* no ack for beacons */
1124		, 0				/* rts/cts rate */
1125		, 0				/* rts/cts duration */
1126	);
1127	/* NB: beacon's BufLen must be a multiple of 4 bytes */
1128	/* XXX verify mbuf data area covers this roundup */
1129	ath_hal_filltxdesc(ah, ds
1130		, roundup(bf->bf_segs[0].ds_len, 4)	/* buffer length */
1131		, AH_TRUE				/* first segment */
1132		, AH_TRUE				/* last segment */
1133	);
1134
1135	return 0;
1136}
1137
1138static void
1139ath_beacon_proc(void *arg, int pending)
1140{
1141	struct ath_softc *sc = arg;
1142	struct ieee80211com *ic = &sc->sc_ic;
1143	struct ath_buf *bf = sc->sc_bcbuf;
1144	struct ath_hal *ah = sc->sc_ah;
1145
1146	DPRINTF2(("%s: pending %u\n", __func__, pending));
1147	if (ic->ic_opmode == IEEE80211_M_STA ||
1148	    bf == NULL || bf->bf_m == NULL) {
1149		DPRINTF(("%s: ic_flags=%x bf=%p bf_m=%p\n",
1150			__func__, ic->ic_flags, bf, bf ? bf->bf_m : NULL));
1151		return;
1152	}
1153	/* TODO: update beacon to reflect PS poll state */
1154	if (!ath_hal_stoptxdma(ah, sc->sc_bhalq)) {
1155		DPRINTF(("%s: beacon queue %u did not stop?",
1156			__func__, sc->sc_bhalq));
1157		return;			/* busy, XXX is this right? */
1158	}
1159	bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE);
1160
1161	ath_hal_puttxbuf(ah, sc->sc_bhalq, bf->bf_daddr);
1162	ath_hal_txstart(ah, sc->sc_bhalq);
1163	DPRINTF2(("%s: TXDP%u = %p (%p)\n", __func__,
1164		sc->sc_bhalq, (caddr_t)bf->bf_daddr, bf->bf_desc));
1165}
1166
1167static void
1168ath_beacon_free(struct ath_softc *sc)
1169{
1170	struct ath_buf *bf = sc->sc_bcbuf;
1171
1172	if (bf->bf_m != NULL) {
1173		bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
1174		m_freem(bf->bf_m);
1175		bf->bf_m = NULL;
1176		bf->bf_node = NULL;
1177	}
1178}
1179
1180/*
1181 * Configure the beacon and sleep timers.
1182 *
1183 * When operating as an AP this resets the TSF and sets
1184 * up the hardware to notify us when we need to issue beacons.
1185 *
1186 * When operating in station mode this sets up the beacon
1187 * timers according to the timestamp of the last received
1188 * beacon and the current TSF, configures PCF and DTIM
1189 * handling, programs the sleep registers so the hardware
1190 * will wakeup in time to receive beacons, and configures
1191 * the beacon miss handling so we'll receive a BMISS
1192 * interrupt when we stop seeing beacons from the AP
1193 * we've associated with.
1194 */
1195static void
1196ath_beacon_config(struct ath_softc *sc)
1197{
1198	struct ath_hal *ah = sc->sc_ah;
1199	struct ieee80211com *ic = &sc->sc_ic;
1200	struct ieee80211_node *ni = ic->ic_bss;
1201	u_int32_t nexttbtt;
1202
1203	nexttbtt = (LE_READ_4(ni->ni_tstamp + 4) << 22) |
1204	    (LE_READ_4(ni->ni_tstamp) >> 10);
1205	DPRINTF(("%s: nexttbtt=%u\n", __func__, nexttbtt));
1206	nexttbtt += ni->ni_intval;
1207	if (ic->ic_opmode == IEEE80211_M_STA) {
1208		HAL_BEACON_STATE bs;
1209		u_int32_t bmisstime;
1210
1211		/* NB: no PCF support right now */
1212		memset(&bs, 0, sizeof(bs));
1213		bs.bs_intval = ni->ni_intval;
1214		bs.bs_nexttbtt = nexttbtt;
1215		bs.bs_dtimperiod = bs.bs_intval;
1216		bs.bs_nextdtim = nexttbtt;
1217		/*
1218		 * Calculate the number of consecutive beacons to miss
1219		 * before taking a BMISS interrupt.  The configuration
1220		 * is specified in ms, so we need to convert that to
1221		 * TU's and then calculate based on the beacon interval.
1222		 * Note that we clamp the result to at most 10 beacons.
1223		 */
1224		bmisstime = (ic->ic_bmisstimeout * 1000) / 1024;
1225		bs.bs_bmissthreshold = howmany(bmisstime,ni->ni_intval);
1226		if (bs.bs_bmissthreshold > 10)
1227			bs.bs_bmissthreshold = 10;
1228		else if (bs.bs_bmissthreshold <= 0)
1229			bs.bs_bmissthreshold = 1;
1230
1231		/*
1232		 * Calculate sleep duration.  The configuration is
1233		 * given in ms.  We insure a multiple of the beacon
1234		 * period is used.  Also, if the sleep duration is
1235		 * greater than the DTIM period then it makes senses
1236		 * to make it a multiple of that.
1237		 *
1238		 * XXX fixed at 100ms
1239		 */
1240		bs.bs_sleepduration =
1241			roundup((100 * 1000) / 1024, bs.bs_intval);
1242		if (bs.bs_sleepduration > bs.bs_dtimperiod)
1243			bs.bs_sleepduration = roundup(bs.bs_sleepduration, bs.bs_dtimperiod);
1244
1245		DPRINTF(("%s: intval %u nexttbtt %u dtim %u nextdtim %u bmiss %u sleep %u\n"
1246			, __func__
1247			, bs.bs_intval
1248			, bs.bs_nexttbtt
1249			, bs.bs_dtimperiod
1250			, bs.bs_nextdtim
1251			, bs.bs_bmissthreshold
1252			, bs.bs_sleepduration
1253		));
1254		ath_hal_intrset(ah, 0);
1255		/*
1256		 * Reset our tsf so the hardware will update the
1257		 * tsf register to reflect timestamps found in
1258		 * received beacons.
1259		 */
1260		ath_hal_resettsf(ah);
1261		ath_hal_beacontimers(ah, &bs, 0/*XXX*/, 0, 0);
1262		sc->sc_imask |= HAL_INT_BMISS;
1263		ath_hal_intrset(ah, sc->sc_imask);
1264	} else {
1265		DPRINTF(("%s: intval %u nexttbtt %u\n",
1266			__func__, ni->ni_intval, nexttbtt));
1267		ath_hal_intrset(ah, 0);
1268		ath_hal_beaconinit(ah, ic->ic_opmode,
1269			nexttbtt, ni->ni_intval);
1270		if (ic->ic_opmode != IEEE80211_M_MONITOR)
1271			sc->sc_imask |= HAL_INT_SWBA;	/* beacon prepare */
1272		ath_hal_intrset(ah, sc->sc_imask);
1273	}
1274}
1275
1276static void
1277ath_load_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
1278{
1279	bus_addr_t *paddr = (bus_addr_t*) arg;
1280	*paddr = segs->ds_addr;
1281}
1282
1283static int
1284ath_desc_alloc(struct ath_softc *sc)
1285{
1286	int i, bsize, error;
1287	struct ath_desc *ds;
1288	struct ath_buf *bf;
1289
1290	/* allocate descriptors */
1291	sc->sc_desc_len = sizeof(struct ath_desc) *
1292				(ATH_TXBUF * ATH_TXDESC + ATH_RXBUF + 1);
1293	error = bus_dmamap_create(sc->sc_dmat, BUS_DMA_NOWAIT, &sc->sc_ddmamap);
1294	if (error != 0)
1295		return error;
1296
1297	error = bus_dmamem_alloc(sc->sc_dmat, (void**) &sc->sc_desc,
1298				 BUS_DMA_NOWAIT, &sc->sc_ddmamap);
1299	if (error != 0)
1300		goto fail0;
1301
1302	error = bus_dmamap_load(sc->sc_dmat, sc->sc_ddmamap,
1303				sc->sc_desc, sc->sc_desc_len,
1304				ath_load_cb, &sc->sc_desc_paddr,
1305				BUS_DMA_NOWAIT);
1306	if (error != 0)
1307		goto fail1;
1308
1309	ds = sc->sc_desc;
1310	DPRINTF(("ath_desc_alloc: DMA map: %p (%d) -> %p (%lu)\n",
1311	    ds, sc->sc_desc_len,
1312	    (caddr_t) sc->sc_desc_paddr, /*XXX*/ (u_long) sc->sc_desc_len));
1313
1314	/* allocate buffers */
1315	bsize = sizeof(struct ath_buf) * (ATH_TXBUF + ATH_RXBUF + 1);
1316	bf = malloc(bsize, M_DEVBUF, M_NOWAIT | M_ZERO);
1317	if (bf == NULL)
1318		goto fail2;
1319	sc->sc_bufptr = bf;
1320
1321	TAILQ_INIT(&sc->sc_rxbuf);
1322	for (i = 0; i < ATH_RXBUF; i++, bf++, ds++) {
1323		bf->bf_desc = ds;
1324		bf->bf_daddr = sc->sc_desc_paddr +
1325		    ((caddr_t)ds - (caddr_t)sc->sc_desc);
1326		error = bus_dmamap_create(sc->sc_dmat, BUS_DMA_NOWAIT,
1327					  &bf->bf_dmamap);
1328		if (error != 0)
1329			break;
1330		TAILQ_INSERT_TAIL(&sc->sc_rxbuf, bf, bf_list);
1331	}
1332
1333	TAILQ_INIT(&sc->sc_txbuf);
1334	for (i = 0; i < ATH_TXBUF; i++, bf++, ds += ATH_TXDESC) {
1335		bf->bf_desc = ds;
1336		bf->bf_daddr = sc->sc_desc_paddr +
1337		    ((caddr_t)ds - (caddr_t)sc->sc_desc);
1338		error = bus_dmamap_create(sc->sc_dmat, BUS_DMA_NOWAIT,
1339					  &bf->bf_dmamap);
1340		if (error != 0)
1341			break;
1342		TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list);
1343	}
1344	TAILQ_INIT(&sc->sc_txq);
1345
1346	/* beacon buffer */
1347	bf->bf_desc = ds;
1348	bf->bf_daddr = sc->sc_desc_paddr + ((caddr_t)ds - (caddr_t)sc->sc_desc);
1349	error = bus_dmamap_create(sc->sc_dmat, BUS_DMA_NOWAIT, &bf->bf_dmamap);
1350	if (error != 0)
1351		return error;
1352	sc->sc_bcbuf = bf;
1353	return 0;
1354
1355fail2:
1356	bus_dmamap_unload(sc->sc_dmat, sc->sc_ddmamap);
1357fail1:
1358	bus_dmamem_free(sc->sc_dmat, sc->sc_desc, sc->sc_ddmamap);
1359fail0:
1360	bus_dmamap_destroy(sc->sc_dmat, sc->sc_ddmamap);
1361	sc->sc_ddmamap = NULL;
1362	return error;
1363}
1364
1365static void
1366ath_desc_free(struct ath_softc *sc)
1367{
1368	struct ath_buf *bf;
1369
1370	bus_dmamap_unload(sc->sc_dmat, sc->sc_ddmamap);
1371	bus_dmamem_free(sc->sc_dmat, sc->sc_desc, sc->sc_ddmamap);
1372	bus_dmamap_destroy(sc->sc_dmat, sc->sc_ddmamap);
1373
1374	TAILQ_FOREACH(bf, &sc->sc_txq, bf_list) {
1375		bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
1376		bus_dmamap_destroy(sc->sc_dmat, bf->bf_dmamap);
1377		m_freem(bf->bf_m);
1378	}
1379	TAILQ_FOREACH(bf, &sc->sc_txbuf, bf_list)
1380		bus_dmamap_destroy(sc->sc_dmat, bf->bf_dmamap);
1381	TAILQ_FOREACH(bf, &sc->sc_rxbuf, bf_list) {
1382		if (bf->bf_m) {
1383			bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
1384			bus_dmamap_destroy(sc->sc_dmat, bf->bf_dmamap);
1385			m_freem(bf->bf_m);
1386			bf->bf_m = NULL;
1387		}
1388	}
1389	if (sc->sc_bcbuf != NULL) {
1390		bus_dmamap_unload(sc->sc_dmat, sc->sc_bcbuf->bf_dmamap);
1391		bus_dmamap_destroy(sc->sc_dmat, sc->sc_bcbuf->bf_dmamap);
1392		sc->sc_bcbuf = NULL;
1393	}
1394
1395	TAILQ_INIT(&sc->sc_rxbuf);
1396	TAILQ_INIT(&sc->sc_txbuf);
1397	TAILQ_INIT(&sc->sc_txq);
1398	free(sc->sc_bufptr, M_DEVBUF);
1399	sc->sc_bufptr = NULL;
1400}
1401
1402static struct ieee80211_node *
1403ath_node_alloc(struct ieee80211com *ic)
1404{
1405	struct ath_node *an =
1406		malloc(sizeof(struct ath_node), M_DEVBUF, M_NOWAIT | M_ZERO);
1407	if (an) {
1408		int i;
1409		for (i = 0; i < ATH_RHIST_SIZE; i++)
1410			an->an_rx_hist[i].arh_ticks = ATH_RHIST_NOTIME;
1411		an->an_rx_hist_next = ATH_RHIST_SIZE-1;
1412		return &an->an_node;
1413	} else
1414		return NULL;
1415}
1416
1417static void
1418ath_node_free(struct ieee80211com *ic, struct ieee80211_node *ni)
1419{
1420        struct ath_softc *sc = ic->ic_if.if_softc;
1421	struct ath_buf *bf;
1422
1423	TAILQ_FOREACH(bf, &sc->sc_txq, bf_list) {
1424		if (bf->bf_node == ni)
1425			bf->bf_node = NULL;
1426	}
1427	free(ni, M_DEVBUF);
1428}
1429
1430static void
1431ath_node_copy(struct ieee80211com *ic,
1432	struct ieee80211_node *dst, const struct ieee80211_node *src)
1433{
1434	*(struct ath_node *)dst = *(const struct ath_node *)src;
1435}
1436
1437
1438static u_int8_t
1439ath_node_getrssi(struct ieee80211com *ic, struct ieee80211_node *ni)
1440{
1441	struct ath_node *an = ATH_NODE(ni);
1442	int i, now, nsamples, rssi;
1443
1444	/*
1445	 * Calculate the average over the last second of sampled data.
1446	 */
1447	now = ticks;
1448	nsamples = 0;
1449	rssi = 0;
1450	i = an->an_rx_hist_next;
1451	do {
1452		struct ath_recv_hist *rh = &an->an_rx_hist[i];
1453		if (rh->arh_ticks == ATH_RHIST_NOTIME)
1454			goto done;
1455		if (now - rh->arh_ticks > hz)
1456			goto done;
1457		rssi += rh->arh_rssi;
1458		nsamples++;
1459		if (i == 0)
1460			i = ATH_RHIST_SIZE-1;
1461		else
1462			i--;
1463	} while (i != an->an_rx_hist_next);
1464done:
1465	/*
1466	 * Return either the average or the last known
1467	 * value if there is no recent data.
1468	 */
1469	return (nsamples ? rssi / nsamples : an->an_rx_hist[i].arh_rssi);
1470}
1471
1472static int
1473ath_rxbuf_init(struct ath_softc *sc, struct ath_buf *bf)
1474{
1475	struct ath_hal *ah = sc->sc_ah;
1476	int error;
1477	struct mbuf *m;
1478	struct ath_desc *ds;
1479
1480	m = bf->bf_m;
1481	if (m == NULL) {
1482		/*
1483		 * NB: by assigning a page to the rx dma buffer we
1484		 * implicitly satisfy the Atheros requirement that
1485		 * this buffer be cache-line-aligned and sized to be
1486		 * multiple of the cache line size.  Not doing this
1487		 * causes weird stuff to happen (for the 5210 at least).
1488		 */
1489		m = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR);
1490		if (m == NULL) {
1491			DPRINTF(("ath_rxbuf_init: no mbuf/cluster\n"));
1492			sc->sc_stats.ast_rx_nombuf++;
1493			return ENOMEM;
1494		}
1495		bf->bf_m = m;
1496		m->m_pkthdr.len = m->m_len = m->m_ext.ext_size;
1497
1498		error = bus_dmamap_load_mbuf(sc->sc_dmat, bf->bf_dmamap, m,
1499					     ath_mbuf_load_cb, bf,
1500					     BUS_DMA_NOWAIT);
1501		if (error != 0) {
1502			DPRINTF(("ath_rxbuf_init: bus_dmamap_load_mbuf failed;"
1503				" error %d\n", error));
1504			sc->sc_stats.ast_rx_busdma++;
1505			return error;
1506		}
1507		KASSERT(bf->bf_nseg == 1,
1508			("ath_rxbuf_init: multi-segment packet; nseg %u",
1509			bf->bf_nseg));
1510	}
1511	bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, BUS_DMASYNC_PREREAD);
1512
1513	/* setup descriptors */
1514	ds = bf->bf_desc;
1515	ds->ds_link = 0;
1516	ds->ds_data = bf->bf_segs[0].ds_addr;
1517	ath_hal_setuprxdesc(ah, ds
1518		, m->m_len		/* buffer size */
1519		, 0
1520	);
1521
1522	if (sc->sc_rxlink != NULL)
1523		*sc->sc_rxlink = bf->bf_daddr;
1524	sc->sc_rxlink = &ds->ds_link;
1525	return 0;
1526}
1527
1528static void
1529ath_rx_proc(void *arg, int npending)
1530{
1531	struct ath_softc *sc = arg;
1532	struct ath_buf *bf;
1533	struct ieee80211com *ic = &sc->sc_ic;
1534	struct ifnet *ifp = &ic->ic_if;
1535	struct ath_hal *ah = sc->sc_ah;
1536	struct ath_desc *ds;
1537	struct mbuf *m;
1538	struct ieee80211_frame *wh, whbuf;
1539	struct ieee80211_node *ni;
1540	struct ath_node *an;
1541	struct ath_recv_hist *rh;
1542	int len;
1543	u_int phyerr;
1544	HAL_STATUS status;
1545
1546	DPRINTF2(("ath_rx_proc: pending %u\n", npending));
1547	do {
1548		bf = TAILQ_FIRST(&sc->sc_rxbuf);
1549		if (bf == NULL) {		/* NB: shouldn't happen */
1550			if_printf(ifp, "ath_rx_proc: no buffer!\n");
1551			break;
1552		}
1553		m = bf->bf_m;
1554		if (m == NULL) {		/* NB: shouldn't happen */
1555			if_printf(ifp, "ath_rx_proc: no mbuf!\n");
1556			continue;
1557		}
1558		ds = bf->bf_desc;
1559		status = ath_hal_rxprocdesc(ah, ds);
1560#ifdef AR_DEBUG
1561		if (ath_debug > 1)
1562			ath_printrxbuf(bf, status == HAL_OK);
1563#endif
1564		if (status == HAL_EINPROGRESS)
1565			break;
1566		TAILQ_REMOVE(&sc->sc_rxbuf, bf, bf_list);
1567		if (ds->ds_rxstat.rs_status != 0) {
1568			ifp->if_ierrors++;
1569			if (ds->ds_rxstat.rs_status & HAL_RXERR_CRC)
1570				sc->sc_stats.ast_rx_crcerr++;
1571			if (ds->ds_rxstat.rs_status & HAL_RXERR_FIFO)
1572				sc->sc_stats.ast_rx_fifoerr++;
1573			if (ds->ds_rxstat.rs_status & HAL_RXERR_DECRYPT)
1574				sc->sc_stats.ast_rx_badcrypt++;
1575			if (ds->ds_rxstat.rs_status & HAL_RXERR_PHY) {
1576				sc->sc_stats.ast_rx_phyerr++;
1577				phyerr = ds->ds_rxstat.rs_phyerr & 0x1f;
1578				sc->sc_stats.ast_rx_phy[phyerr]++;
1579			}
1580			goto rx_next;
1581		}
1582
1583		len = ds->ds_rxstat.rs_datalen;
1584		if (len < IEEE80211_MIN_LEN) {
1585			DPRINTF(("ath_rx_proc: short packet %d\n", len));
1586			sc->sc_stats.ast_rx_tooshort++;
1587			goto rx_next;
1588		}
1589
1590		bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap,
1591		    BUS_DMASYNC_POSTREAD);
1592
1593		bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
1594		bf->bf_m = NULL;
1595		m->m_pkthdr.rcvif = ifp;
1596		m->m_pkthdr.len = m->m_len = len;
1597
1598		if (sc->sc_drvbpf) {
1599			struct mbuf *mb;
1600
1601			/* XXX pre-allocate space when setting up recv's */
1602			MGETHDR(mb, M_DONTWAIT, m->m_type);
1603			if (mb != NULL) {
1604				sc->sc_rx_th.wr_rate =
1605					sc->sc_hwmap[ds->ds_rxstat.rs_rate];
1606				sc->sc_rx_th.wr_antsignal =
1607					ds->ds_rxstat.rs_rssi;
1608				sc->sc_rx_th.wr_antenna =
1609					ds->ds_rxstat.rs_antenna;
1610				/* XXX TSF */
1611
1612				(void) m_dup_pkthdr(mb, m, M_DONTWAIT);
1613				mb->m_next = m;
1614				mb->m_data = (caddr_t)&sc->sc_rx_th;
1615				mb->m_len = sizeof(sc->sc_rx_th);
1616				mb->m_pkthdr.len += mb->m_len;
1617				bpf_mtap(sc->sc_drvbpf, mb);
1618				m_free(mb);
1619			}
1620		}
1621
1622		m_adj(m, -IEEE80211_CRC_LEN);
1623		wh = mtod(m, struct ieee80211_frame *);
1624		if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
1625			/*
1626			 * WEP is decrypted by hardware. Clear WEP bit
1627			 * and trim WEP header for ieee80211_input().
1628			 */
1629			wh->i_fc[1] &= ~IEEE80211_FC1_WEP;
1630			memcpy(&whbuf, wh, sizeof(whbuf));
1631			m_adj(m, IEEE80211_WEP_IVLEN + IEEE80211_WEP_KIDLEN);
1632			memcpy(mtod(m, caddr_t), &whbuf, sizeof(whbuf));
1633			/*
1634			 * Also trim WEP ICV from the tail.
1635			 */
1636			m_adj(m, -IEEE80211_WEP_CRCLEN);
1637		}
1638
1639		/*
1640		 * Locate the node for sender, track state, and
1641		 * then pass this node (referenced) up to the 802.11
1642		 * layer for its use.  We are required to pass
1643		 * something so we fall back to ic_bss when this frame
1644		 * is from an unknown sender.
1645		 */
1646		if (ic->ic_opmode != IEEE80211_M_STA) {
1647			ni = ieee80211_find_node(ic, wh->i_addr2);
1648			if (ni == NULL)
1649				ni = ieee80211_ref_node(ic->ic_bss);
1650		} else
1651			ni = ieee80211_ref_node(ic->ic_bss);
1652
1653		/*
1654		 * Record driver-specific state.
1655		 */
1656		an = ATH_NODE(ni);
1657		if (++(an->an_rx_hist_next) == ATH_RHIST_SIZE)
1658			an->an_rx_hist_next = 0;
1659		rh = &an->an_rx_hist[an->an_rx_hist_next];
1660		rh->arh_ticks = ticks;
1661		rh->arh_rssi = ds->ds_rxstat.rs_rssi;
1662		rh->arh_antenna = ds->ds_rxstat.rs_antenna;
1663
1664		/*
1665		 * Send frame up for processing.
1666		 */
1667		ieee80211_input(ifp, m, ni,
1668			ds->ds_rxstat.rs_rssi, ds->ds_rxstat.rs_tstamp);
1669
1670		/*
1671		 * The frame may have caused the node to be marked for
1672		 * reclamation (e.g. in response to a DEAUTH message)
1673		 * so use free_node here instead of unref_node.
1674		 */
1675		if (ni == ic->ic_bss)
1676			ieee80211_unref_node(&ni);
1677		else
1678			ieee80211_free_node(ic, ni);
1679  rx_next:
1680		TAILQ_INSERT_TAIL(&sc->sc_rxbuf, bf, bf_list);
1681	} while (ath_rxbuf_init(sc, bf) == 0);
1682
1683	ath_hal_rxmonitor(ah);			/* rx signal state monitoring */
1684	ath_hal_rxena(ah);			/* in case of RXEOL */
1685}
1686
1687/*
1688 * XXX Size of an ACK control frame in bytes.
1689 */
1690#define	IEEE80211_ACK_SIZE	(2+2+IEEE80211_ADDR_LEN+4)
1691
1692static int
1693ath_tx_start(struct ath_softc *sc, struct ieee80211_node *ni, struct ath_buf *bf,
1694    struct mbuf *m0)
1695{
1696	struct ieee80211com *ic = &sc->sc_ic;
1697	struct ath_hal *ah = sc->sc_ah;
1698	struct ifnet *ifp = &sc->sc_ic.ic_if;
1699	int i, error, iswep, hdrlen, pktlen;
1700	u_int8_t rix, cix, txrate, ctsrate;
1701	struct ath_desc *ds;
1702	struct mbuf *m;
1703	struct ieee80211_frame *wh;
1704	u_int32_t iv;
1705	u_int8_t *ivp;
1706	u_int8_t hdrbuf[sizeof(struct ieee80211_frame) +
1707	    IEEE80211_WEP_IVLEN + IEEE80211_WEP_KIDLEN];
1708	u_int subtype, flags, ctsduration, antenna;
1709	HAL_PKT_TYPE atype;
1710	const HAL_RATE_TABLE *rt;
1711	HAL_BOOL shortPreamble;
1712	struct ath_node *an;
1713
1714	wh = mtod(m0, struct ieee80211_frame *);
1715	iswep = wh->i_fc[1] & IEEE80211_FC1_WEP;
1716	hdrlen = sizeof(struct ieee80211_frame);
1717	pktlen = m0->m_pkthdr.len;
1718
1719	if (iswep) {
1720		memcpy(hdrbuf, mtod(m0, caddr_t), hdrlen);
1721		m_adj(m0, hdrlen);
1722		M_PREPEND(m0, sizeof(hdrbuf), M_DONTWAIT);
1723		if (m0 == NULL) {
1724			sc->sc_stats.ast_tx_nombuf++;
1725			return ENOMEM;
1726		}
1727		ivp = hdrbuf + hdrlen;
1728		/*
1729		 * XXX
1730		 * IV must not duplicate during the lifetime of the key.
1731		 * But no mechanism to renew keys is defined in IEEE 802.11
1732		 * WEP.  And IV may be duplicated between other stations
1733		 * because of the session key itself is shared.
1734		 * So we use pseudo random IV for now, though it is not the
1735		 * right way.
1736		 */
1737		iv = arc4random();
1738		for (i = 0; i < IEEE80211_WEP_IVLEN; i++) {
1739			ivp[i] = iv;
1740			iv >>= 8;
1741		}
1742		ivp[i] = sc->sc_ic.ic_wep_txkey << 6;	/* Key ID and pad */
1743		memcpy(mtod(m0, caddr_t), hdrbuf, sizeof(hdrbuf));
1744		/*
1745		 * The ICV length must be included into hdrlen and pktlen.
1746		 */
1747		hdrlen = sizeof(hdrbuf) + IEEE80211_WEP_CRCLEN;
1748		pktlen = m0->m_pkthdr.len + IEEE80211_WEP_CRCLEN;
1749	}
1750	pktlen += IEEE80211_CRC_LEN;
1751
1752	/*
1753	 * Load the DMA map so any coalescing is done.  This
1754	 * also calculates the number of descriptors we need.
1755	 */
1756	error = bus_dmamap_load_mbuf(sc->sc_dmat, bf->bf_dmamap, m0,
1757				     ath_mbuf_load_cb, bf,
1758				     BUS_DMA_NOWAIT);
1759	if (error != 0) {
1760		sc->sc_stats.ast_tx_busdma++;
1761		m_freem(m0);
1762		return error;
1763	}
1764	/*
1765	 * Discard null packets and check for packets that
1766	 * require too many TX descriptors.  We try to convert
1767	 * the latter to a cluster.
1768	 */
1769	if (bf->bf_nseg > ATH_TXDESC) {		/* too many desc's, linearize */
1770		sc->sc_stats.ast_tx_linear++;
1771		MGETHDR(m, M_DONTWAIT, MT_DATA);
1772		if (m == NULL) {
1773			sc->sc_stats.ast_tx_nombuf++;
1774			m_freem(m0);
1775			return ENOMEM;
1776		}
1777		M_MOVE_PKTHDR(m, m0);
1778		MCLGET(m, M_DONTWAIT);
1779		if ((m->m_flags & M_EXT) == 0) {
1780			sc->sc_stats.ast_tx_nomcl++;
1781			m_freem(m0);
1782			m_free(m);
1783			return ENOMEM;
1784		}
1785		m_copydata(m0, 0, m0->m_pkthdr.len, mtod(m, caddr_t));
1786		m_freem(m0);
1787		m->m_len = m->m_pkthdr.len;
1788		m0 = m;
1789		error = bus_dmamap_load_mbuf(sc->sc_dmat, bf->bf_dmamap, m0,
1790					     ath_mbuf_load_cb, bf,
1791					     BUS_DMA_NOWAIT);
1792		if (error != 0) {
1793			sc->sc_stats.ast_tx_busdma++;
1794			m_freem(m0);
1795			return error;
1796		}
1797		KASSERT(bf->bf_nseg == 1,
1798			("ath_tx_start: packet not one segment; nseg %u",
1799			bf->bf_nseg));
1800	} else if (bf->bf_nseg == 0) {		/* null packet, discard */
1801		sc->sc_stats.ast_tx_nodata++;
1802		m_freem(m0);
1803		return EIO;
1804	}
1805	DPRINTF2(("ath_tx_start: m %p len %u\n", m0, pktlen));
1806	bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE);
1807	bf->bf_m = m0;
1808	bf->bf_node = ni;			/* NB: held reference */
1809
1810	/* setup descriptors */
1811	ds = bf->bf_desc;
1812	rt = sc->sc_currates;
1813	KASSERT(rt != NULL, ("no rate table, mode %u", sc->sc_curmode));
1814
1815	/*
1816	 * Calculate Atheros packet type from IEEE80211 packet header
1817	 * and setup for rate calculations.
1818	 */
1819	atype = HAL_PKT_TYPE_NORMAL;			/* default */
1820	switch (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) {
1821	case IEEE80211_FC0_TYPE_MGT:
1822		subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
1823		if (subtype == IEEE80211_FC0_SUBTYPE_BEACON)
1824			atype = HAL_PKT_TYPE_BEACON;
1825		else if (subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP)
1826			atype = HAL_PKT_TYPE_PROBE_RESP;
1827		else if (subtype == IEEE80211_FC0_SUBTYPE_ATIM)
1828			atype = HAL_PKT_TYPE_ATIM;
1829		rix = 0;			/* XXX lowest rate */
1830		break;
1831	case IEEE80211_FC0_TYPE_CTL:
1832		subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
1833		if (subtype == IEEE80211_FC0_SUBTYPE_PS_POLL)
1834			atype = HAL_PKT_TYPE_PSPOLL;
1835		rix = 0;			/* XXX lowest rate */
1836		break;
1837	default:
1838		rix = sc->sc_rixmap[ni->ni_rates.rs_rates[ni->ni_txrate] &
1839				IEEE80211_RATE_VAL];
1840		if (rix == 0xff) {
1841			if_printf(ifp, "bogus xmit rate 0x%x\n",
1842				ni->ni_rates.rs_rates[ni->ni_txrate]);
1843			sc->sc_stats.ast_tx_badrate++;
1844			m_freem(m0);
1845			return EIO;
1846		}
1847		break;
1848	}
1849	/*
1850	 * NB: the 802.11 layer marks whether or not we should
1851	 * use short preamble based on the current mode and
1852	 * negotiated parameters.
1853	 */
1854	if ((ic->ic_flags & IEEE80211_F_SHPREAMBLE) &&
1855	    (ni->ni_capinfo & IEEE80211_CAPINFO_SHORT_PREAMBLE)) {
1856		txrate = rt->info[rix].rateCode | rt->info[rix].shortPreamble;
1857		shortPreamble = AH_TRUE;
1858		sc->sc_stats.ast_tx_shortpre++;
1859	} else {
1860		txrate = rt->info[rix].rateCode;
1861		shortPreamble = AH_FALSE;
1862	}
1863
1864	/*
1865	 * Calculate miscellaneous flags.
1866	 */
1867	flags = HAL_TXDESC_CLRDMASK;		/* XXX needed for wep errors */
1868	if (IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1869		flags |= HAL_TXDESC_NOACK;	/* no ack on broad/multicast */
1870		sc->sc_stats.ast_tx_noack++;
1871	} else if (pktlen > ic->ic_rtsthreshold) {
1872		flags |= HAL_TXDESC_RTSENA;	/* RTS based on frame length */
1873		sc->sc_stats.ast_tx_rts++;
1874	}
1875
1876	/*
1877	 * Calculate duration.  This logically belongs in the 802.11
1878	 * layer but it lacks sufficient information to calculate it.
1879	 */
1880	if ((flags & HAL_TXDESC_NOACK) == 0 &&
1881	    (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) != IEEE80211_FC0_TYPE_CTL) {
1882		u_int16_t dur;
1883		/*
1884		 * XXX not right with fragmentation.
1885		 */
1886		dur = ath_hal_computetxtime(ah, rt, IEEE80211_ACK_SIZE,
1887				rix, shortPreamble);
1888		*((u_int16_t*) wh->i_dur) = htole16(dur);
1889	}
1890
1891	/*
1892	 * Calculate RTS/CTS rate and duration if needed.
1893	 */
1894	ctsduration = 0;
1895	if (flags & (HAL_TXDESC_RTSENA|HAL_TXDESC_CTSENA)) {
1896		/*
1897		 * CTS transmit rate is derived from the transmit rate
1898		 * by looking in the h/w rate table.  We must also factor
1899		 * in whether or not a short preamble is to be used.
1900		 */
1901		cix = rt->info[rix].controlRate;
1902		ctsrate = rt->info[cix].rateCode;
1903		if (shortPreamble)
1904			ctsrate |= rt->info[cix].shortPreamble;
1905		/*
1906		 * Compute the transmit duration based on the size
1907		 * of an ACK frame.  We call into the HAL to do the
1908		 * computation since it depends on the characteristics
1909		 * of the actual PHY being used.
1910		 */
1911		if (flags & HAL_TXDESC_RTSENA) {	/* SIFS + CTS */
1912			ctsduration += ath_hal_computetxtime(ah,
1913				rt, IEEE80211_ACK_SIZE, cix, shortPreamble);
1914		}
1915		/* SIFS + data */
1916		ctsduration += ath_hal_computetxtime(ah,
1917			rt, pktlen, rix, shortPreamble);
1918		if ((flags & HAL_TXDESC_NOACK) == 0) {	/* SIFS + ACK */
1919			ctsduration += ath_hal_computetxtime(ah,
1920				rt, IEEE80211_ACK_SIZE, cix, shortPreamble);
1921		}
1922	} else
1923		ctsrate = 0;
1924
1925	/*
1926	 * For now use the antenna on which the last good
1927	 * frame was received on.  We assume this field is
1928	 * initialized to 0 which gives us ``auto'' or the
1929	 * ``default'' antenna.
1930	 */
1931	an = (struct ath_node *) ni;
1932	if (an->an_tx_antenna)
1933		antenna = an->an_tx_antenna;
1934	else
1935		antenna = an->an_rx_hist[an->an_rx_hist_next].arh_antenna;
1936
1937	/*
1938	 * Formulate first tx descriptor with tx controls.
1939	 */
1940	/* XXX check return value? */
1941	ath_hal_setuptxdesc(ah, ds
1942		, pktlen		/* packet length */
1943		, hdrlen		/* header length */
1944		, atype			/* Atheros packet type */
1945		, 60			/* txpower XXX */
1946		, txrate, 1+10		/* series 0 rate/tries */
1947		, iswep ? sc->sc_ic.ic_wep_txkey : HAL_TXKEYIX_INVALID
1948		, antenna		/* antenna mode */
1949		, flags			/* flags */
1950		, ctsrate		/* rts/cts rate */
1951		, ctsduration		/* rts/cts duration */
1952	);
1953#ifdef notyet
1954	ath_hal_setupxtxdesc(ah, ds
1955		, AH_FALSE		/* short preamble */
1956		, 0, 0			/* series 1 rate/tries */
1957		, 0, 0			/* series 2 rate/tries */
1958		, 0, 0			/* series 3 rate/tries */
1959	);
1960#endif
1961	/*
1962	 * Fillin the remainder of the descriptor info.
1963	 */
1964	for (i = 0; i < bf->bf_nseg; i++, ds++) {
1965		ds->ds_data = bf->bf_segs[i].ds_addr;
1966		if (i == bf->bf_nseg - 1)
1967			ds->ds_link = 0;
1968		else
1969			ds->ds_link = bf->bf_daddr + sizeof(*ds) * (i + 1);
1970		ath_hal_filltxdesc(ah, ds
1971			, bf->bf_segs[i].ds_len	/* segment length */
1972			, i == 0		/* first segment */
1973			, i == bf->bf_nseg - 1	/* last segment */
1974		);
1975		DPRINTF2(("ath_tx_start: %d: %08x %08x %08x %08x %08x %08x\n",
1976		    i, ds->ds_link, ds->ds_data, ds->ds_ctl0, ds->ds_ctl1,
1977		    ds->ds_hw[0], ds->ds_hw[1]));
1978	}
1979
1980	/*
1981	 * Insert the frame on the outbound list and
1982	 * pass it on to the hardware.
1983	 */
1984	mtx_lock(&sc->sc_txqlock);
1985	TAILQ_INSERT_TAIL(&sc->sc_txq, bf, bf_list);
1986	if (sc->sc_txlink == NULL) {
1987		ath_hal_puttxbuf(ah, sc->sc_txhalq, bf->bf_daddr);
1988		DPRINTF2(("ath_tx_start: TXDP0 = %p (%p)\n",
1989		    (caddr_t)bf->bf_daddr, bf->bf_desc));
1990	} else {
1991		*sc->sc_txlink = bf->bf_daddr;
1992		DPRINTF2(("ath_tx_start: link(%p)=%p (%p)\n",
1993		    sc->sc_txlink, (caddr_t)bf->bf_daddr, bf->bf_desc));
1994	}
1995	sc->sc_txlink = &bf->bf_desc[bf->bf_nseg - 1].ds_link;
1996	mtx_unlock(&sc->sc_txqlock);
1997
1998	ath_hal_txstart(ah, sc->sc_txhalq);
1999	return 0;
2000}
2001
2002static void
2003ath_tx_proc(void *arg, int npending)
2004{
2005	struct ath_softc *sc = arg;
2006	struct ath_hal *ah = sc->sc_ah;
2007	struct ath_buf *bf;
2008	struct ieee80211com *ic = &sc->sc_ic;
2009	struct ifnet *ifp = &ic->ic_if;
2010	struct ath_desc *ds;
2011	struct ieee80211_node *ni;
2012	struct ath_node *an;
2013	int sr, lr;
2014	HAL_STATUS status;
2015
2016	DPRINTF2(("ath_tx_proc: pending %u tx queue %p, link %p\n",
2017		npending, (caddr_t) ath_hal_gettxbuf(sc->sc_ah, sc->sc_txhalq),
2018		sc->sc_txlink));
2019	for (;;) {
2020		mtx_lock(&sc->sc_txqlock);
2021		bf = TAILQ_FIRST(&sc->sc_txq);
2022		if (bf == NULL) {
2023			sc->sc_txlink = NULL;
2024			mtx_unlock(&sc->sc_txqlock);
2025			break;
2026		}
2027		/* only the last descriptor is needed */
2028		ds = &bf->bf_desc[bf->bf_nseg - 1];
2029		status = ath_hal_txprocdesc(ah, ds);
2030#ifdef AR_DEBUG
2031		if (ath_debug > 1)
2032			ath_printtxbuf(bf, status == HAL_OK);
2033#endif
2034		if (status == HAL_EINPROGRESS) {
2035			mtx_unlock(&sc->sc_txqlock);
2036			break;
2037		}
2038		TAILQ_REMOVE(&sc->sc_txq, bf, bf_list);
2039		mtx_unlock(&sc->sc_txqlock);
2040
2041		ni = bf->bf_node;
2042		if (ni != NULL) {
2043			an = (struct ath_node *) ni;
2044			if (ds->ds_txstat.ts_status == 0) {
2045				an->an_tx_ok++;
2046				an->an_tx_antenna = ds->ds_txstat.ts_antenna;
2047			} else {
2048				an->an_tx_err++;
2049				ifp->if_oerrors++;
2050				if (ds->ds_txstat.ts_status & HAL_TXERR_XRETRY)
2051					sc->sc_stats.ast_tx_xretries++;
2052				if (ds->ds_txstat.ts_status & HAL_TXERR_FIFO)
2053					sc->sc_stats.ast_tx_fifoerr++;
2054				if (ds->ds_txstat.ts_status & HAL_TXERR_FILT)
2055					sc->sc_stats.ast_tx_filtered++;
2056				an->an_tx_antenna = 0;	/* invalidate */
2057			}
2058			sr = ds->ds_txstat.ts_shortretry;
2059			lr = ds->ds_txstat.ts_longretry;
2060			sc->sc_stats.ast_tx_shortretry += sr;
2061			sc->sc_stats.ast_tx_longretry += lr;
2062			if (sr + lr)
2063				an->an_tx_retr++;
2064			/*
2065			 * Reclaim reference to node.
2066			 *
2067			 * NB: the node may be reclaimed here if, for example
2068			 *     this is a DEAUTH message that was sent and the
2069			 *     node was timed out due to inactivity.
2070			 */
2071			if (ni != ic->ic_bss)
2072				ieee80211_free_node(ic, ni);
2073		}
2074		bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap,
2075		    BUS_DMASYNC_POSTWRITE);
2076		bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
2077		m_freem(bf->bf_m);
2078		bf->bf_m = NULL;
2079		bf->bf_node = NULL;
2080
2081		mtx_lock(&sc->sc_txbuflock);
2082		TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list);
2083		mtx_unlock(&sc->sc_txbuflock);
2084	}
2085	ifp->if_flags &= ~IFF_OACTIVE;
2086	sc->sc_tx_timer = 0;
2087
2088	ath_start(ifp);
2089}
2090
2091/*
2092 * Drain the transmit queue and reclaim resources.
2093 */
2094static void
2095ath_draintxq(struct ath_softc *sc)
2096{
2097	struct ath_hal *ah = sc->sc_ah;
2098	struct ifnet *ifp = &sc->sc_ic.ic_if;
2099	struct ath_buf *bf;
2100
2101	/* XXX return value */
2102	if (!sc->sc_invalid) {
2103		/* don't touch the hardware if marked invalid */
2104		(void) ath_hal_stoptxdma(ah, sc->sc_txhalq);
2105		DPRINTF(("ath_draintxq: tx queue %p, link %p\n",
2106		    (caddr_t) ath_hal_gettxbuf(ah, sc->sc_txhalq),
2107		    sc->sc_txlink));
2108		(void) ath_hal_stoptxdma(ah, sc->sc_bhalq);
2109		DPRINTF(("ath_draintxq: beacon queue %p\n",
2110		    (caddr_t) ath_hal_gettxbuf(ah, sc->sc_bhalq)));
2111	}
2112	for (;;) {
2113		mtx_lock(&sc->sc_txqlock);
2114		bf = TAILQ_FIRST(&sc->sc_txq);
2115		if (bf == NULL) {
2116			sc->sc_txlink = NULL;
2117			mtx_unlock(&sc->sc_txqlock);
2118			break;
2119		}
2120		TAILQ_REMOVE(&sc->sc_txq, bf, bf_list);
2121		mtx_unlock(&sc->sc_txqlock);
2122#ifdef AR_DEBUG
2123		if (ath_debug)
2124			ath_printtxbuf(bf,
2125				ath_hal_txprocdesc(ah, bf->bf_desc) == HAL_OK);
2126#endif /* AR_DEBUG */
2127		bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
2128		m_freem(bf->bf_m);
2129		bf->bf_m = NULL;
2130		bf->bf_node = NULL;
2131		mtx_lock(&sc->sc_txbuflock);
2132		TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list);
2133		mtx_unlock(&sc->sc_txbuflock);
2134	}
2135	ifp->if_flags &= ~IFF_OACTIVE;
2136	sc->sc_tx_timer = 0;
2137}
2138
2139/*
2140 * Disable the receive h/w in preparation for a reset.
2141 */
2142static void
2143ath_stoprecv(struct ath_softc *sc)
2144{
2145	struct ath_hal *ah = sc->sc_ah;
2146
2147	ath_hal_stoppcurecv(ah);	/* disable PCU */
2148	ath_hal_setrxfilter(ah, 0);	/* clear recv filter */
2149	ath_hal_stopdmarecv(ah);	/* disable DMA engine */
2150	DELAY(3000);			/* long enough for 1 frame */
2151#ifdef AR_DEBUG
2152	if (ath_debug) {
2153		struct ath_buf *bf;
2154
2155		DPRINTF(("ath_stoprecv: rx queue %p, link %p\n",
2156		    (caddr_t) ath_hal_getrxbuf(ah), sc->sc_rxlink));
2157		TAILQ_FOREACH(bf, &sc->sc_rxbuf, bf_list) {
2158			if (ath_hal_rxprocdesc(ah, bf->bf_desc) == HAL_OK)
2159				ath_printrxbuf(bf, 1);
2160		}
2161	}
2162#endif
2163	sc->sc_rxlink = NULL;		/* just in case */
2164}
2165
2166/*
2167 * Enable the receive h/w following a reset.
2168 */
2169static int
2170ath_startrecv(struct ath_softc *sc)
2171{
2172	struct ath_hal *ah = sc->sc_ah;
2173	struct ath_buf *bf;
2174
2175	sc->sc_rxlink = NULL;
2176	TAILQ_FOREACH(bf, &sc->sc_rxbuf, bf_list) {
2177		int error = ath_rxbuf_init(sc, bf);
2178		if (error != 0) {
2179			DPRINTF(("ath_startrecv: ath_rxbuf_init failed %d\n",
2180				error));
2181			return error;
2182		}
2183	}
2184
2185	bf = TAILQ_FIRST(&sc->sc_rxbuf);
2186	ath_hal_putrxbuf(ah, bf->bf_daddr);
2187	ath_hal_rxena(ah);		/* enable recv descriptors */
2188	ath_mode_init(sc);		/* set filters, etc. */
2189	ath_hal_startpcurecv(ah);	/* re-enable PCU/DMA engine */
2190	return 0;
2191}
2192
2193/*
2194 * Set/change channels.  If the channel is really being changed,
2195 * it's done by resetting the chip.  To accomplish this we must
2196 * first cleanup any pending DMA, then restart stuff after a la
2197 * ath_init.
2198 */
2199static int
2200ath_chan_set(struct ath_softc *sc, struct ieee80211_channel *chan)
2201{
2202	struct ath_hal *ah = sc->sc_ah;
2203	struct ieee80211com *ic = &sc->sc_ic;
2204
2205	DPRINTF(("ath_chan_set: %u (%u MHz) -> %u (%u MHz)\n",
2206	    ieee80211_chan2ieee(ic, ic->ic_ibss_chan),
2207		ic->ic_ibss_chan->ic_freq,
2208	    ieee80211_chan2ieee(ic, chan), chan->ic_freq));
2209	if (chan != ic->ic_ibss_chan) {
2210		HAL_STATUS status;
2211		HAL_CHANNEL hchan;
2212		enum ieee80211_phymode mode;
2213
2214		/*
2215		 * To switch channels clear any pending DMA operations;
2216		 * wait long enough for the RX fifo to drain, reset the
2217		 * hardware at the new frequency, and then re-enable
2218		 * the relevant bits of the h/w.
2219		 */
2220		ath_hal_intrset(ah, 0);		/* disable interrupts */
2221		ath_draintxq(sc);		/* clear pending tx frames */
2222		ath_stoprecv(sc);		/* turn off frame recv */
2223		/*
2224		 * Convert to a HAL channel description with
2225		 * the flags constrained to reflect the current
2226		 * operating mode.
2227		 */
2228		hchan.channel = chan->ic_freq;
2229		hchan.channelFlags = ath_chan2flags(ic, chan);
2230		if (!ath_hal_reset(ah, ic->ic_opmode, &hchan, AH_TRUE, &status)) {
2231			if_printf(&ic->ic_if, "ath_chan_set: unable to reset "
2232				"channel %u (%u Mhz)\n",
2233				ieee80211_chan2ieee(ic, chan), chan->ic_freq);
2234			return EIO;
2235		}
2236		/*
2237		 * Re-enable rx framework.
2238		 */
2239		if (ath_startrecv(sc) != 0) {
2240			if_printf(&ic->ic_if,
2241				"ath_chan_set: unable to restart recv logic\n");
2242			return EIO;
2243		}
2244
2245		/*
2246		 * Update BPF state.
2247		 */
2248		sc->sc_tx_th.wt_chan_freq = sc->sc_rx_th.wr_chan_freq =
2249			htole16(chan->ic_freq);
2250		sc->sc_tx_th.wt_chan_flags = sc->sc_rx_th.wr_chan_flags =
2251			htole16(chan->ic_flags);
2252
2253		/*
2254		 * Change channels and update the h/w rate map
2255		 * if we're switching; e.g. 11a to 11b/g.
2256		 */
2257		ic->ic_ibss_chan = chan;
2258		mode = ieee80211_chan2mode(ic, chan);
2259		if (mode != sc->sc_curmode)
2260			ath_setcurmode(sc, mode);
2261
2262		/*
2263		 * Re-enable interrupts.
2264		 */
2265		ath_hal_intrset(ah, sc->sc_imask);
2266	}
2267	return 0;
2268}
2269
2270static void
2271ath_next_scan(void *arg)
2272{
2273	struct ath_softc *sc = arg;
2274	struct ieee80211com *ic = &sc->sc_ic;
2275	struct ifnet *ifp = &ic->ic_if;
2276
2277	if (ic->ic_state == IEEE80211_S_SCAN)
2278		ieee80211_next_scan(ifp);
2279}
2280
2281/*
2282 * Periodically recalibrate the PHY to account
2283 * for temperature/environment changes.
2284 */
2285static void
2286ath_calibrate(void *arg)
2287{
2288	struct ath_softc *sc = arg;
2289	struct ath_hal *ah = sc->sc_ah;
2290	struct ieee80211com *ic = &sc->sc_ic;
2291	struct ieee80211_channel *c;
2292	HAL_CHANNEL hchan;
2293
2294	sc->sc_stats.ast_per_cal++;
2295
2296	/*
2297	 * Convert to a HAL channel description with the flags
2298	 * constrained to reflect the current operating mode.
2299	 */
2300	c = ic->ic_ibss_chan;
2301	hchan.channel = c->ic_freq;
2302	hchan.channelFlags = ath_chan2flags(ic, c);
2303
2304	DPRINTF(("%s: channel %u/%x\n", __func__, c->ic_freq, c->ic_flags));
2305
2306	if (ath_hal_getrfgain(ah) == HAL_RFGAIN_NEED_CHANGE) {
2307		/*
2308		 * Rfgain is out of bounds, reset the chip
2309		 * to load new gain values.
2310		 */
2311		sc->sc_stats.ast_per_rfgain++;
2312		ath_reset(sc);
2313	}
2314	if (!ath_hal_calibrate(ah, &hchan)) {
2315		DPRINTF(("%s: calibration of channel %u failed\n",
2316			__func__, c->ic_freq));
2317		sc->sc_stats.ast_per_calfail++;
2318	}
2319	callout_reset(&sc->sc_cal_ch, hz * ath_calinterval, ath_calibrate, sc);
2320}
2321
2322static int
2323ath_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg)
2324{
2325	struct ifnet *ifp = &ic->ic_if;
2326	struct ath_softc *sc = ifp->if_softc;
2327	struct ath_hal *ah = sc->sc_ah;
2328	struct ieee80211_node *ni;
2329	int i, error;
2330	u_int8_t *bssid;
2331	u_int32_t rfilt;
2332	static const HAL_LED_STATE leds[] = {
2333	    HAL_LED_INIT,	/* IEEE80211_S_INIT */
2334	    HAL_LED_SCAN,	/* IEEE80211_S_SCAN */
2335	    HAL_LED_AUTH,	/* IEEE80211_S_AUTH */
2336	    HAL_LED_ASSOC, 	/* IEEE80211_S_ASSOC */
2337	    HAL_LED_RUN, 	/* IEEE80211_S_RUN */
2338	};
2339
2340	DPRINTF(("%s: %s -> %s\n", __func__,
2341		ieee80211_state_name[ic->ic_state],
2342		ieee80211_state_name[nstate]));
2343
2344	ath_hal_setledstate(ah, leds[nstate]);	/* set LED */
2345
2346	if (nstate == IEEE80211_S_INIT) {
2347		sc->sc_imask &= ~(HAL_INT_SWBA | HAL_INT_BMISS);
2348		ath_hal_intrset(ah, sc->sc_imask);
2349		callout_stop(&sc->sc_scan_ch);
2350		callout_stop(&sc->sc_cal_ch);
2351		return (*sc->sc_newstate)(ic, nstate, arg);
2352	}
2353	ni = ic->ic_bss;
2354	error = ath_chan_set(sc, ni->ni_chan);
2355	if (error != 0)
2356		goto bad;
2357	rfilt = (ath_hal_getrxfilter(ah) & HAL_RX_FILTER_PHYERR)
2358	      | HAL_RX_FILTER_UCAST | HAL_RX_FILTER_BCAST | HAL_RX_FILTER_MCAST;
2359	if (ic->ic_opmode != IEEE80211_M_STA)
2360		rfilt |= HAL_RX_FILTER_PROBEREQ;
2361	if (ic->ic_opmode != IEEE80211_M_HOSTAP &&
2362	    (ifp->if_flags & IFF_PROMISC))
2363		rfilt |= HAL_RX_FILTER_PROM;
2364	if (ic->ic_opmode == IEEE80211_M_STA ||
2365	    ic->ic_state == IEEE80211_S_SCAN)
2366		rfilt |= HAL_RX_FILTER_BEACON;
2367	if (nstate == IEEE80211_S_SCAN) {
2368		callout_reset(&sc->sc_scan_ch, (hz * ath_dwelltime) / 1000,
2369			ath_next_scan, sc);
2370		bssid = ifp->if_broadcastaddr;
2371	} else {
2372		callout_stop(&sc->sc_scan_ch);
2373		bssid = ni->ni_bssid;
2374	}
2375	ath_hal_setrxfilter(ah, rfilt);
2376	DPRINTF(("%s: RX filter 0x%x bssid %s\n",
2377		 __func__, rfilt, ether_sprintf(bssid)));
2378
2379	if (nstate == IEEE80211_S_RUN && ic->ic_opmode == IEEE80211_M_STA)
2380		ath_hal_setassocid(ah, bssid, ni->ni_associd);
2381	else
2382		ath_hal_setassocid(ah, bssid, 0);
2383	if (ic->ic_flags & IEEE80211_F_WEPON) {
2384		for (i = 0; i < IEEE80211_WEP_NKID; i++)
2385			if (ath_hal_keyisvalid(ah, i))
2386				ath_hal_keysetmac(ah, i, bssid);
2387	}
2388
2389	if (nstate == IEEE80211_S_RUN) {
2390		DPRINTF(("%s(RUN): ic_flags=0x%08x iv=%d bssid=%s "
2391			"capinfo=0x%04x chan=%d\n"
2392			 , __func__
2393			 , ic->ic_flags
2394			 , ni->ni_intval
2395			 , ether_sprintf(ni->ni_bssid)
2396			 , ni->ni_capinfo
2397			 , ieee80211_chan2ieee(ic, ni->ni_chan)));
2398
2399		/*
2400		 * Allocate and setup the beacon frame for AP or adhoc mode.
2401		 */
2402		if (ic->ic_opmode == IEEE80211_M_HOSTAP ||
2403		    ic->ic_opmode == IEEE80211_M_IBSS) {
2404			error = ath_beacon_alloc(sc, ni);
2405			if (error != 0)
2406				goto bad;
2407		}
2408
2409		/*
2410		 * Configure the beacon and sleep timers.
2411		 */
2412		ath_beacon_config(sc);
2413
2414		/* start periodic recalibration timer */
2415		callout_reset(&sc->sc_cal_ch, hz * ath_calinterval,
2416			ath_calibrate, sc);
2417	} else {
2418		sc->sc_imask &= ~(HAL_INT_SWBA | HAL_INT_BMISS);
2419		ath_hal_intrset(ah, sc->sc_imask);
2420		callout_stop(&sc->sc_cal_ch);		/* no calibration */
2421	}
2422	/*
2423	 * Reset the rate control state.
2424	 */
2425	ath_rate_ctl_reset(sc, nstate);
2426	/*
2427	 * Invoke the parent method to complete the work.
2428	 */
2429	return (*sc->sc_newstate)(ic, nstate, arg);
2430bad:
2431	callout_stop(&sc->sc_scan_ch);
2432	callout_stop(&sc->sc_cal_ch);
2433	/* NB: do not invoke the parent */
2434	return error;
2435}
2436
2437/*
2438 * Setup driver-specific state for a newly associated node.
2439 * Note that we're called also on a re-associate, the isnew
2440 * param tells us if this is the first time or not.
2441 */
2442static void
2443ath_newassoc(struct ieee80211com *ic, struct ieee80211_node *ni, int isnew)
2444{
2445	if (isnew) {
2446		struct ath_node *an = (struct ath_node *) ni;
2447
2448		an->an_tx_ok = an->an_tx_err =
2449			an->an_tx_retr = an->an_tx_upper = 0;
2450		/* start with highest negotiated rate */
2451		/*
2452		 * XXX should do otherwise but only when
2453		 * the rate control algorithm is better.
2454		 */
2455		KASSERT(ni->ni_rates.rs_nrates > 0,
2456			("new association w/ no rates!"));
2457		ni->ni_txrate = ni->ni_rates.rs_nrates - 1;
2458	}
2459}
2460
2461static int
2462ath_getchannels(struct ath_softc *sc, u_int cc, HAL_BOOL outdoor)
2463{
2464	struct ieee80211com *ic = &sc->sc_ic;
2465	struct ifnet *ifp = &ic->ic_if;
2466	struct ath_hal *ah = sc->sc_ah;
2467	HAL_CHANNEL *chans;
2468	int i, ix, nchan;
2469
2470	chans = malloc(IEEE80211_CHAN_MAX * sizeof(HAL_CHANNEL),
2471			M_TEMP, M_NOWAIT);
2472	if (chans == NULL) {
2473		if_printf(ifp, "unable to allocate channel table\n");
2474		return ENOMEM;
2475	}
2476	if (!ath_hal_init_channels(ah, chans, IEEE80211_CHAN_MAX, &nchan,
2477	    cc, HAL_MODE_ALL, outdoor)) {
2478		if_printf(ifp, "unable to collect channel list from hal\n");
2479		free(chans, M_TEMP);
2480		return EINVAL;
2481	}
2482
2483	/*
2484	 * Convert HAL channels to ieee80211 ones and insert
2485	 * them in the table according to their channel number.
2486	 */
2487	for (i = 0; i < nchan; i++) {
2488		HAL_CHANNEL *c = &chans[i];
2489		ix = ath_hal_mhz2ieee(c->channel, c->channelFlags);
2490		if (ix > IEEE80211_CHAN_MAX) {
2491			if_printf(ifp, "bad hal channel %u (%u/%x) ignored\n",
2492				ix, c->channel, c->channelFlags);
2493			continue;
2494		}
2495		/* NB: flags are known to be compatible */
2496		if (ic->ic_channels[ix].ic_freq == 0) {
2497			ic->ic_channels[ix].ic_freq = c->channel;
2498			ic->ic_channels[ix].ic_flags = c->channelFlags;
2499		} else {
2500			/* channels overlap; e.g. 11g and 11b */
2501			ic->ic_channels[ix].ic_flags |= c->channelFlags;
2502		}
2503	}
2504	free(chans, M_TEMP);
2505	return 0;
2506}
2507
2508static int
2509ath_rate_setup(struct ath_softc *sc, u_int mode)
2510{
2511	struct ath_hal *ah = sc->sc_ah;
2512	struct ieee80211com *ic = &sc->sc_ic;
2513	const HAL_RATE_TABLE *rt;
2514	struct ieee80211_rateset *rs;
2515	int i, maxrates;
2516
2517	switch (mode) {
2518	case IEEE80211_MODE_11A:
2519		sc->sc_rates[mode] = ath_hal_getratetable(ah, HAL_MODE_11A);
2520		break;
2521	case IEEE80211_MODE_11B:
2522		sc->sc_rates[mode] = ath_hal_getratetable(ah, HAL_MODE_11B);
2523		break;
2524	case IEEE80211_MODE_11G:
2525		sc->sc_rates[mode] = ath_hal_getratetable(ah, HAL_MODE_11G);
2526		break;
2527	case IEEE80211_MODE_TURBO:
2528		sc->sc_rates[mode] = ath_hal_getratetable(ah, HAL_MODE_TURBO);
2529		break;
2530	default:
2531		DPRINTF(("%s: invalid mode %u\n", __func__, mode));
2532		return 0;
2533	}
2534	rt = sc->sc_rates[mode];
2535	if (rt == NULL)
2536		return 0;
2537	if (rt->rateCount > IEEE80211_RATE_MAXSIZE) {
2538		DPRINTF(("%s: rate table too small (%u > %u)\n",
2539			__func__, rt->rateCount, IEEE80211_RATE_MAXSIZE));
2540		maxrates = IEEE80211_RATE_MAXSIZE;
2541	} else
2542		maxrates = rt->rateCount;
2543	rs = &ic->ic_sup_rates[mode];
2544	for (i = 0; i < maxrates; i++)
2545		rs->rs_rates[i] = rt->info[i].dot11Rate;
2546	rs->rs_nrates = maxrates;
2547	return 1;
2548}
2549
2550static void
2551ath_setcurmode(struct ath_softc *sc, enum ieee80211_phymode mode)
2552{
2553	const HAL_RATE_TABLE *rt;
2554	int i;
2555
2556	memset(sc->sc_rixmap, 0xff, sizeof(sc->sc_rixmap));
2557	rt = sc->sc_rates[mode];
2558	KASSERT(rt != NULL, ("no h/w rate set for phy mode %u", mode));
2559	for (i = 0; i < rt->rateCount; i++)
2560		sc->sc_rixmap[rt->info[i].dot11Rate & IEEE80211_RATE_VAL] = i;
2561	memset(sc->sc_hwmap, 0, sizeof(sc->sc_hwmap));
2562	for (i = 0; i < 32; i++)
2563		sc->sc_hwmap[i] = rt->info[rt->rateCodeToIndex[i]].dot11Rate;
2564	sc->sc_currates = rt;
2565	sc->sc_curmode = mode;
2566}
2567
2568/*
2569 * Reset the rate control state for each 802.11 state transition.
2570 */
2571static void
2572ath_rate_ctl_reset(struct ath_softc *sc, enum ieee80211_state state)
2573{
2574	struct ieee80211com *ic = &sc->sc_ic;
2575	struct ieee80211_node *ni;
2576	struct ath_node *an;
2577
2578	if (ic->ic_opmode != IEEE80211_M_STA) {
2579		/*
2580		 * When operating as a station the node table holds
2581		 * the AP's that were discovered during scanning.
2582		 * For any other operating mode we want to reset the
2583		 * tx rate state of each node.
2584		 */
2585		TAILQ_FOREACH(ni, &ic->ic_node, ni_list) {
2586			ni->ni_txrate = 0;		/* use lowest rate */
2587			an = (struct ath_node *) ni;
2588			an->an_tx_ok = an->an_tx_err = an->an_tx_retr =
2589			    an->an_tx_upper = 0;
2590		}
2591	}
2592	/*
2593	 * Reset local xmit state; this is really only meaningful
2594	 * when operating in station or adhoc mode.
2595	 */
2596	ni = ic->ic_bss;
2597	an = (struct ath_node *) ni;
2598	an->an_tx_ok = an->an_tx_err = an->an_tx_retr = an->an_tx_upper = 0;
2599	if (state == IEEE80211_S_RUN) {
2600		/* start with highest negotiated rate */
2601		KASSERT(ni->ni_rates.rs_nrates > 0,
2602			("transition to RUN state w/ no rates!"));
2603		ni->ni_txrate = ni->ni_rates.rs_nrates - 1;
2604	} else {
2605		/* use lowest rate */
2606		ni->ni_txrate = 0;
2607	}
2608}
2609
2610/*
2611 * Examine and potentially adjust the transmit rate.
2612 */
2613static void
2614ath_rate_ctl(void *arg, struct ieee80211_node *ni)
2615{
2616	struct ath_softc *sc = arg;
2617	struct ath_node *an = (struct ath_node *) ni;
2618	struct ieee80211_rateset *rs = &ni->ni_rates;
2619	int mod = 0, orate, enough;
2620
2621	/*
2622	 * Rate control
2623	 * XXX: very primitive version.
2624	 */
2625	sc->sc_stats.ast_rate_calls++;
2626
2627	enough = (an->an_tx_ok + an->an_tx_err >= 10);
2628
2629	/* no packet reached -> down */
2630	if (an->an_tx_err > 0 && an->an_tx_ok == 0)
2631		mod = -1;
2632
2633	/* all packets needs retry in average -> down */
2634	if (enough && an->an_tx_ok < an->an_tx_retr)
2635		mod = -1;
2636
2637	/* no error and less than 10% of packets needs retry -> up */
2638	if (enough && an->an_tx_err == 0 && an->an_tx_ok > an->an_tx_retr * 10)
2639		mod = 1;
2640
2641	orate = ni->ni_txrate;
2642	switch (mod) {
2643	case 0:
2644		if (enough && an->an_tx_upper > 0)
2645			an->an_tx_upper--;
2646		break;
2647	case -1:
2648		if (ni->ni_txrate > 0) {
2649			ni->ni_txrate--;
2650			sc->sc_stats.ast_rate_drop++;
2651		}
2652		an->an_tx_upper = 0;
2653		break;
2654	case 1:
2655		if (++an->an_tx_upper < 2)
2656			break;
2657		an->an_tx_upper = 0;
2658		if (ni->ni_txrate + 1 < rs->rs_nrates) {
2659			ni->ni_txrate++;
2660			sc->sc_stats.ast_rate_raise++;
2661		}
2662		break;
2663	}
2664
2665	if (ni->ni_txrate != orate) {
2666		printf("%s: %dM -> %dM (%d ok, %d err, %d retr)\n",
2667		    __func__,
2668		    (rs->rs_rates[orate] & IEEE80211_RATE_VAL) / 2,
2669		    (rs->rs_rates[ni->ni_txrate] & IEEE80211_RATE_VAL) / 2,
2670		    an->an_tx_ok, an->an_tx_err, an->an_tx_retr);
2671	}
2672	if (ni->ni_txrate != orate || enough)
2673		an->an_tx_ok = an->an_tx_err = an->an_tx_retr = 0;
2674}
2675
2676#ifdef AR_DEBUG
2677static int
2678sysctl_hw_ath_dump(SYSCTL_HANDLER_ARGS)
2679{
2680	char dmode[64];
2681	int error;
2682
2683	strncpy(dmode, "", sizeof(dmode) - 1);
2684	dmode[sizeof(dmode) - 1] = '\0';
2685	error = sysctl_handle_string(oidp, &dmode[0], sizeof(dmode), req);
2686
2687	if (error == 0 && req->newptr != NULL) {
2688		struct ifnet *ifp;
2689		struct ath_softc *sc;
2690
2691		ifp = ifunit("ath0");		/* XXX */
2692		if (!ifp)
2693			return EINVAL;
2694		sc = ifp->if_softc;
2695		if (strcmp(dmode, "hal") == 0)
2696			ath_hal_dumpstate(sc->sc_ah);
2697		else if (strcmp(dmode, "eeprom") == 0)
2698			ath_hal_dumpeeprom(sc->sc_ah);
2699		else if (strcmp(dmode, "rfgain") == 0)
2700			ath_hal_dumprfgain(sc->sc_ah);
2701		else if (strcmp(dmode, "ani") == 0)
2702			ath_hal_dumpani(sc->sc_ah);
2703		else
2704			return EINVAL;
2705	}
2706	return error;
2707}
2708SYSCTL_PROC(_hw_ath, OID_AUTO, dump, CTLTYPE_STRING | CTLFLAG_RW,
2709	0, 0, sysctl_hw_ath_dump, "A", "Dump driver state");
2710
2711static void
2712ath_printrxbuf(struct ath_buf *bf, int done)
2713{
2714	struct ath_desc *ds;
2715	int i;
2716
2717	for (i = 0, ds = bf->bf_desc; i < bf->bf_nseg; i++, ds++) {
2718		printf("R%d (%p %p) %08x %08x %08x %08x %08x %08x %c\n",
2719		    i, ds, (struct ath_desc *)bf->bf_daddr + i,
2720		    ds->ds_link, ds->ds_data,
2721		    ds->ds_ctl0, ds->ds_ctl1,
2722		    ds->ds_hw[0], ds->ds_hw[1],
2723		    !done ? ' ' : (ds->ds_rxstat.rs_status == 0) ? '*' : '!');
2724	}
2725}
2726
2727static void
2728ath_printtxbuf(struct ath_buf *bf, int done)
2729{
2730	struct ath_desc *ds;
2731	int i;
2732
2733	for (i = 0, ds = bf->bf_desc; i < bf->bf_nseg; i++, ds++) {
2734		printf("T%d (%p %p) %08x %08x %08x %08x %08x %08x %08x %08x %c\n",
2735		    i, ds, (struct ath_desc *)bf->bf_daddr + i,
2736		    ds->ds_link, ds->ds_data,
2737		    ds->ds_ctl0, ds->ds_ctl1,
2738		    ds->ds_hw[0], ds->ds_hw[1], ds->ds_hw[2], ds->ds_hw[3],
2739		    !done ? ' ' : (ds->ds_txstat.ts_status == 0) ? '*' : '!');
2740	}
2741}
2742#endif /* AR_DEBUG */
2743