main.c revision 223719
1139738Simp/*- 284996Srobert * Initial implementation: 384996Srobert * Copyright (c) 2001 Robert Drehmel 484996Srobert * All rights reserved. 584996Srobert * 684996Srobert * As long as the above copyright statement and this notice remain 7181398Smarius * unchanged, you can do what ever you want with this file. 884996Srobert */ 9182916Smarius/*- 10182916Smarius * Copyright (c) 2008 Marius Strobl <marius@FreeBSD.org> 11182916Smarius * All rights reserved. 12182916Smarius * 13182916Smarius * Redistribution and use in source and binary forms, with or without 14182916Smarius * modification, are permitted provided that the following conditions 15182916Smarius * are met: 16182916Smarius * 1. Redistributions of source code must retain the above copyright 17182916Smarius * notice, this list of conditions and the following disclaimer. 18182916Smarius * 2. Redistributions in binary form must reproduce the above copyright 19182916Smarius * notice, this list of conditions and the following disclaimer in the 20182916Smarius * documentation and/or other materials provided with the distribution. 21182916Smarius * 22182916Smarius * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 23182916Smarius * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24182916Smarius * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25182916Smarius * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 26182916Smarius * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27182916Smarius * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28182916Smarius * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29182916Smarius * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30182916Smarius * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31182916Smarius * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32182916Smarius * SUCH DAMAGE. 33182916Smarius */ 34124139Sobrien 35124139Sobrien#include <sys/cdefs.h> 36124139Sobrien__FBSDID("$FreeBSD: head/sys/boot/sparc64/loader/main.c 223719 2011-07-02 11:14:54Z marius $"); 37182020Smarius 3884996Srobert/* 3984996Srobert * FreeBSD/sparc64 kernel loader - machine dependent part 4084996Srobert * 4184996Srobert * - implements copyin and readin functions that map kernel 4284996Srobert * pages on demand. The machine independent code does not 4384996Srobert * know the size of the kernel early enough to pre-enter 4484996Srobert * TTEs and install just one 4MB mapping seemed to limiting 4584996Srobert * to me. 4684996Srobert */ 4791139Sjake 4884996Srobert#include <stand.h> 49203829Smarius#include <sys/param.h> 5084996Srobert#include <sys/exec.h> 51203829Smarius#include <sys/linker.h> 52102219Srobert#include <sys/queue.h> 53163145Skmacy#include <sys/types.h> 5484996Srobert 55163145Skmacy#include <vm/vm.h> 5684996Srobert#include <machine/asi.h> 57203829Smarius#include <machine/cmt.h> 5891139Sjake#include <machine/cpufunc.h> 5984996Srobert#include <machine/elf.h> 60203829Smarius#include <machine/fireplane.h> 61203829Smarius#include <machine/jbus.h> 6291110Sjake#include <machine/lsu.h> 6391110Sjake#include <machine/metadata.h> 6484996Srobert#include <machine/tte.h> 65181398Smarius#include <machine/tlb.h> 6691139Sjake#include <machine/upa.h> 67182478Smarius#include <machine/ver.h> 68182877Smarius#include <machine/vmparam.h> 6984996Srobert 7084996Srobert#include "bootstrap.h" 7184996Srobert#include "libofw.h" 7285719Sjake#include "dev_net.h" 7384996Srobert 74203829Smarius#ifndef CTASSERT 75203829Smarius#define CTASSERT(x) _CTASSERT(x, __LINE__) 76203829Smarius#define _CTASSERT(x, y) __CTASSERT(x, y) 77203829Smarius#define __CTASSERT(x, y) typedef char __assert ## y[(x) ? 1 : -1] 78203829Smarius#endif 79203829Smarius 80170839Smariusextern char bootprog_name[], bootprog_rev[], bootprog_date[], bootprog_maker[]; 81170839Smarius 8284996Srobertenum { 8384996Srobert HEAPVA = 0x800000, 8484996Srobert HEAPSZ = 0x1000000, 8584996Srobert LOADSZ = 0x1000000 /* for kernel and modules */ 8684996Srobert}; 8784996Srobert 88203829Smarius/* At least Sun Fire V1280 require page sized allocations to be claimed. */ 89203829SmariusCTASSERT(HEAPSZ % PAGE_SIZE == 0); 90203829Smarius 91170839Smariusstatic struct mmu_ops { 92163145Skmacy void (*tlb_init)(void); 93163145Skmacy int (*mmu_mapin)(vm_offset_t va, vm_size_t len); 94163145Skmacy} *mmu_ops; 95163145Skmacy 9685719Sjaketypedef void kernel_entry_t(vm_offset_t mdp, u_long o1, u_long o2, u_long o3, 97170839Smarius void *openfirmware); 9885719Sjake 99223719Smariusstatic inline u_long dtlb_get_data_sun4u(u_int, u_int); 100203830Smariusstatic int dtlb_enter_sun4u(u_int, u_long data, vm_offset_t); 101181398Smariusstatic vm_offset_t dtlb_va_to_pa_sun4u(vm_offset_t); 102223719Smariusstatic inline u_long itlb_get_data_sun4u(u_int, u_int); 103203830Smariusstatic int itlb_enter_sun4u(u_int, u_long data, vm_offset_t); 104181398Smariusstatic vm_offset_t itlb_va_to_pa_sun4u(vm_offset_t); 105182916Smariusstatic void itlb_relocate_locked0_sun4u(void); 10685719Sjakeextern vm_offset_t md_load(char *, vm_offset_t *); 107170839Smariusstatic int sparc64_autoload(void); 108170839Smariusstatic ssize_t sparc64_readin(const int, vm_offset_t, const size_t); 109170839Smariusstatic ssize_t sparc64_copyin(const void *, vm_offset_t, size_t); 110170854Smariusstatic vm_offset_t claim_virt(vm_offset_t, size_t, int); 111170854Smariusstatic vm_offset_t alloc_phys(size_t, int); 112170854Smariusstatic int map_phys(int, size_t, vm_offset_t, vm_offset_t); 113170854Smariusstatic void release_phys(vm_offset_t, u_int); 114114386Speterstatic int __elfN(exec)(struct preloaded_file *); 115163145Skmacystatic int mmu_mapin_sun4u(vm_offset_t, vm_size_t); 116170839Smariusstatic vm_offset_t init_heap(void); 117203829Smariusstatic phandle_t find_bsp_sun4u(phandle_t, uint32_t); 118203829Smariusconst char *cpu_cpuid_prop_sun4u(void); 119203829Smariusuint32_t cpu_get_mid_sun4u(void); 120163145Skmacystatic void tlb_init_sun4u(void); 12184996Srobert 122181398Smarius#ifdef LOADER_DEBUG 123181398Smariustypedef u_int64_t tte_t; 124181398Smarius 125181398Smariusstatic void pmap_print_tlb_sun4u(void); 126181398Smariusstatic void pmap_print_tte_sun4u(tte_t, tte_t); 127181398Smarius#endif 128181398Smarius 129170839Smariusstatic struct mmu_ops mmu_ops_sun4u = { tlb_init_sun4u, mmu_mapin_sun4u }; 130163145Skmacy 131163145Skmacy/* sun4u */ 13297445Sjakestruct tlb_entry *dtlb_store; 13397445Sjakestruct tlb_entry *itlb_store; 134203829Smariusu_int dtlb_slot; 135203829Smariusu_int itlb_slot; 136204152Smariusstatic int cpu_impl; 137203829Smariusstatic u_int dtlb_slot_max; 138203829Smariusstatic u_int itlb_slot_max; 139223719Smariusstatic u_int tlb_locked; 14091139Sjake 141170839Smariusstatic vm_offset_t curkva = 0; 142170839Smariusstatic vm_offset_t heapva; 143163145Skmacy 144170854Smariusstatic phandle_t root; 14584996Srobert 14684996Srobert/* 14784996Srobert * Machine dependent structures that the machine independent 14884996Srobert * loader part uses. 14984996Srobert */ 15084996Srobertstruct devsw *devsw[] = { 15185719Sjake#ifdef LOADER_DISK_SUPPORT 15284996Srobert &ofwdisk, 15385719Sjake#endif 15485719Sjake#ifdef LOADER_NET_SUPPORT 15585719Sjake &netdev, 15685719Sjake#endif 15784996Srobert 0 15884996Srobert}; 15984996Srobertstruct arch_switch archsw; 16084996Srobert 161170839Smariusstatic struct file_format sparc64_elf = { 162114386Speter __elfN(loadfile), 163114386Speter __elfN(exec) 16484996Srobert}; 16584996Srobertstruct file_format *file_formats[] = { 16684996Srobert &sparc64_elf, 16784996Srobert 0 16884996Srobert}; 16984996Srobertstruct fs_ops *file_system[] = { 17091110Sjake#ifdef LOADER_UFS_SUPPORT 17184996Srobert &ufs_fsops, 17285719Sjake#endif 17393606Stmm#ifdef LOADER_CD9660_SUPPORT 17493606Stmm &cd9660_fsops, 17593606Stmm#endif 176108100Sjake#ifdef LOADER_ZIP_SUPPORT 177105065Sjake &zipfs_fsops, 178105065Sjake#endif 179108100Sjake#ifdef LOADER_GZIP_SUPPORT 180108100Sjake &gzipfs_fsops, 181108100Sjake#endif 182105065Sjake#ifdef LOADER_BZIP2_SUPPORT 183105065Sjake &bzipfs_fsops, 184105065Sjake#endif 185117448Stmm#ifdef LOADER_NFS_SUPPORT 18685719Sjake &nfs_fsops, 18785719Sjake#endif 18891110Sjake#ifdef LOADER_TFTP_SUPPORT 18991110Sjake &tftp_fsops, 19091110Sjake#endif 19184996Srobert 0 19284996Srobert}; 19385719Sjakestruct netif_driver *netif_drivers[] = { 19485719Sjake#ifdef LOADER_NET_SUPPORT 19585719Sjake &ofwnet, 19685719Sjake#endif 19785719Sjake 0 19885719Sjake}; 19984996Srobert 20084996Srobertextern struct console ofwconsole; 20184996Srobertstruct console *consoles[] = { 20284996Srobert &ofwconsole, 20384996Srobert 0 20484996Srobert}; 20584996Srobert 20691110Sjake#ifdef LOADER_DEBUG 20791110Sjakestatic int 20891110Sjakewatch_phys_set_mask(vm_offset_t pa, u_long mask) 20991110Sjake{ 21091110Sjake u_long lsucr; 21191110Sjake 21291110Sjake stxa(AA_DMMU_PWPR, ASI_DMMU, pa & (((2UL << 38) - 1) << 3)); 21391110Sjake lsucr = ldxa(0, ASI_LSU_CTL_REG); 21491110Sjake lsucr = ((lsucr | LSU_PW) & ~LSU_PM_MASK) | 21591110Sjake (mask << LSU_PM_SHIFT); 21691110Sjake stxa(0, ASI_LSU_CTL_REG, lsucr); 21791110Sjake return (0); 21891110Sjake} 21991110Sjake 22091110Sjakestatic int 22191110Sjakewatch_phys_set(vm_offset_t pa, int sz) 22291110Sjake{ 22391110Sjake u_long off; 22491110Sjake 22591110Sjake off = (u_long)pa & 7; 22691110Sjake /* Test for misaligned watch points. */ 22791110Sjake if (off + sz > 8) 22891110Sjake return (-1); 22991110Sjake return (watch_phys_set_mask(pa, ((1 << sz) - 1) << off)); 23091110Sjake} 23191110Sjake 23291110Sjake 23391110Sjakestatic int 23491110Sjakewatch_virt_set_mask(vm_offset_t va, u_long mask) 23591110Sjake{ 23691110Sjake u_long lsucr; 23791110Sjake 23891110Sjake stxa(AA_DMMU_VWPR, ASI_DMMU, va & (((2UL << 41) - 1) << 3)); 23991110Sjake lsucr = ldxa(0, ASI_LSU_CTL_REG); 24091110Sjake lsucr = ((lsucr | LSU_VW) & ~LSU_VM_MASK) | 24191110Sjake (mask << LSU_VM_SHIFT); 24291110Sjake stxa(0, ASI_LSU_CTL_REG, lsucr); 24391110Sjake return (0); 24491110Sjake} 24591110Sjake 24691110Sjakestatic int 24791110Sjakewatch_virt_set(vm_offset_t va, int sz) 24891110Sjake{ 24991110Sjake u_long off; 25091110Sjake 25191110Sjake off = (u_long)va & 7; 25291110Sjake /* Test for misaligned watch points. */ 25391110Sjake if (off + sz > 8) 25491110Sjake return (-1); 25591110Sjake return (watch_virt_set_mask(va, ((1 << sz) - 1) << off)); 25691110Sjake} 25791110Sjake#endif 25891110Sjake 25984996Srobert/* 26084996Srobert * archsw functions 26184996Srobert */ 26284996Srobertstatic int 26384996Srobertsparc64_autoload(void) 26484996Srobert{ 265170839Smarius 266170839Smarius return (0); 26784996Srobert} 26884996Srobert 26984996Srobertstatic ssize_t 27084996Srobertsparc64_readin(const int fd, vm_offset_t va, const size_t len) 27184996Srobert{ 272170839Smarius 273163145Skmacy mmu_ops->mmu_mapin(va, len); 274170839Smarius return (read(fd, (void *)va, len)); 27584996Srobert} 27684996Srobert 27784996Srobertstatic ssize_t 27884996Srobertsparc64_copyin(const void *src, vm_offset_t dest, size_t len) 27984996Srobert{ 280170839Smarius 281163145Skmacy mmu_ops->mmu_mapin(dest, len); 28284996Srobert memcpy((void *)dest, src, len); 283170839Smarius return (len); 28484996Srobert} 28584996Srobert 28684996Srobert/* 28784996Srobert * other MD functions 28884996Srobert */ 289170854Smariusstatic vm_offset_t 290170854Smariusclaim_virt(vm_offset_t virt, size_t size, int align) 291170854Smarius{ 292170854Smarius vm_offset_t mva; 293170854Smarius 294170854Smarius if (OF_call_method("claim", mmu, 3, 1, virt, size, align, &mva) == -1) 295170854Smarius return ((vm_offset_t)-1); 296170854Smarius return (mva); 297170854Smarius} 298170854Smarius 299170854Smariusstatic vm_offset_t 300170854Smariusalloc_phys(size_t size, int align) 301170854Smarius{ 302170854Smarius cell_t phys_hi, phys_low; 303170854Smarius 304170854Smarius if (OF_call_method("claim", memory, 2, 2, size, align, &phys_low, 305170854Smarius &phys_hi) == -1) 306170854Smarius return ((vm_offset_t)-1); 307170854Smarius return ((vm_offset_t)phys_hi << 32 | phys_low); 308170854Smarius} 309170854Smarius 31084996Srobertstatic int 311170854Smariusmap_phys(int mode, size_t size, vm_offset_t virt, vm_offset_t phys) 312170854Smarius{ 313170854Smarius 314170854Smarius return (OF_call_method("map", mmu, 5, 0, (uint32_t)phys, 315170854Smarius (uint32_t)(phys >> 32), virt, size, mode)); 316170854Smarius} 317170854Smarius 318170854Smariusstatic void 319170854Smariusrelease_phys(vm_offset_t phys, u_int size) 320170854Smarius{ 321170854Smarius 322170854Smarius (void)OF_call_method("release", memory, 3, 0, (uint32_t)phys, 323170854Smarius (uint32_t)(phys >> 32), size); 324170854Smarius} 325170854Smarius 326170854Smariusstatic int 327114386Speter__elfN(exec)(struct preloaded_file *fp) 32884996Srobert{ 32984996Srobert struct file_metadata *fmp; 33085719Sjake vm_offset_t mdp; 331116415Sjake Elf_Addr entry; 33291139Sjake Elf_Ehdr *e; 33385719Sjake int error; 33484996Srobert 335170839Smarius if ((fmp = file_findmetadata(fp, MODINFOMD_ELFHDR)) == 0) 336170839Smarius return (EFTYPE); 33791139Sjake e = (Elf_Ehdr *)&fmp->md_data; 33884996Srobert 33985719Sjake if ((error = md_load(fp->f_args, &mdp)) != 0) 340170839Smarius return (error); 34184996Srobert 34291139Sjake printf("jumping to kernel entry at %#lx.\n", e->e_entry); 343188455Smarius#ifdef LOADER_DEBUG 344181398Smarius pmap_print_tlb_sun4u(); 34584996Srobert#endif 34685719Sjake 347200946Smarius dev_cleanup(); 348200946Smarius 349116415Sjake entry = e->e_entry; 350116415Sjake 351165325Skmacy OF_release((void *)heapva, HEAPSZ); 352116415Sjake 353116415Sjake ((kernel_entry_t *)entry)(mdp, 0, 0, 0, openfirmware); 354116415Sjake 355170854Smarius panic("%s: exec returned", __func__); 35684996Srobert} 35784996Srobert 358182478Smariusstatic inline u_long 359223719Smariusdtlb_get_data_sun4u(u_int tlb, u_int slot) 360182478Smarius{ 361223719Smarius u_long data, pstate; 362182478Smarius 363223719Smarius slot = TLB_DAR_SLOT(tlb, slot); 364182478Smarius /* 365223719Smarius * We read ASI_DTLB_DATA_ACCESS_REG twice back-to-back in order to 366223719Smarius * work around errata of USIII and beyond. 367182478Smarius */ 368223719Smarius pstate = rdpr(pstate); 369223719Smarius wrpr(pstate, pstate & ~PSTATE_IE, 0); 370223719Smarius (void)ldxa(slot, ASI_DTLB_DATA_ACCESS_REG); 371223719Smarius data = ldxa(slot, ASI_DTLB_DATA_ACCESS_REG); 372223719Smarius wrpr(pstate, pstate, 0); 373223719Smarius return (data); 374182478Smarius} 375182478Smarius 376182478Smariusstatic inline u_long 377223719Smariusitlb_get_data_sun4u(u_int tlb, u_int slot) 378182478Smarius{ 379223719Smarius u_long data, pstate; 380182478Smarius 381223719Smarius slot = TLB_DAR_SLOT(tlb, slot); 382182478Smarius /* 383223719Smarius * We read ASI_DTLB_DATA_ACCESS_REG twice back-to-back in order to 384223719Smarius * work around errata of USIII and beyond. 385182478Smarius */ 386223719Smarius pstate = rdpr(pstate); 387223719Smarius wrpr(pstate, pstate & ~PSTATE_IE, 0); 388223719Smarius (void)ldxa(slot, ASI_ITLB_DATA_ACCESS_REG); 389223719Smarius data = ldxa(slot, ASI_ITLB_DATA_ACCESS_REG); 390223719Smarius wrpr(pstate, pstate, 0); 391223719Smarius return (data); 392182478Smarius} 393182478Smarius 394181398Smariusstatic vm_offset_t 395181398Smariusdtlb_va_to_pa_sun4u(vm_offset_t va) 396181398Smarius{ 397182766Smarius u_long pstate, reg; 398223719Smarius u_int i, tlb; 399181398Smarius 400182766Smarius pstate = rdpr(pstate); 401182766Smarius wrpr(pstate, pstate & ~PSTATE_IE, 0); 402181398Smarius for (i = 0; i < dtlb_slot_max; i++) { 403223719Smarius reg = ldxa(TLB_DAR_SLOT(tlb_locked, i), 404223719Smarius ASI_DTLB_TAG_READ_REG); 405181398Smarius if (TLB_TAR_VA(reg) != va) 406181398Smarius continue; 407223719Smarius reg = dtlb_get_data_sun4u(tlb_locked, i); 408182766Smarius wrpr(pstate, pstate, 0); 409191071Smarius reg >>= TD_PA_SHIFT; 410207537Smarius if (cpu_impl == CPU_IMPL_SPARC64V || 411207537Smarius cpu_impl >= CPU_IMPL_ULTRASPARCIII) 412191071Smarius return (reg & TD_PA_CH_MASK); 413191071Smarius return (reg & TD_PA_SF_MASK); 414181398Smarius } 415182766Smarius wrpr(pstate, pstate, 0); 416181398Smarius return (-1); 417181398Smarius} 418181398Smarius 419181398Smariusstatic vm_offset_t 420181398Smariusitlb_va_to_pa_sun4u(vm_offset_t va) 421181398Smarius{ 422182766Smarius u_long pstate, reg; 423181398Smarius int i; 424181398Smarius 425182766Smarius pstate = rdpr(pstate); 426182766Smarius wrpr(pstate, pstate & ~PSTATE_IE, 0); 427181398Smarius for (i = 0; i < itlb_slot_max; i++) { 428223719Smarius reg = ldxa(TLB_DAR_SLOT(tlb_locked, i), 429223719Smarius ASI_ITLB_TAG_READ_REG); 430181398Smarius if (TLB_TAR_VA(reg) != va) 431181398Smarius continue; 432223719Smarius reg = itlb_get_data_sun4u(tlb_locked, i); 433182766Smarius wrpr(pstate, pstate, 0); 434191071Smarius reg >>= TD_PA_SHIFT; 435207537Smarius if (cpu_impl == CPU_IMPL_SPARC64V || 436207537Smarius cpu_impl >= CPU_IMPL_ULTRASPARCIII) 437191071Smarius return (reg & TD_PA_CH_MASK); 438191071Smarius return (reg & TD_PA_SF_MASK); 439181398Smarius } 440182766Smarius wrpr(pstate, pstate, 0); 441181398Smarius return (-1); 442181398Smarius} 443181398Smarius 444203830Smariusstatic int 445203830Smariusdtlb_enter_sun4u(u_int index, u_long data, vm_offset_t virt) 446181398Smarius{ 447181398Smarius 448203830Smarius return (OF_call_method("SUNW,dtlb-load", mmu, 3, 0, index, data, 449203830Smarius virt)); 450181398Smarius} 451181398Smarius 452203830Smariusstatic int 453203830Smariusitlb_enter_sun4u(u_int index, u_long data, vm_offset_t virt) 454181398Smarius{ 455181398Smarius 456203830Smarius if (cpu_impl == CPU_IMPL_ULTRASPARCIIIp && index == 0 && 457203830Smarius (data & TD_L) != 0) 458203830Smarius panic("%s: won't enter locked TLB entry at index 0 on USIII+", 459203830Smarius __func__); 460203830Smarius return (OF_call_method("SUNW,itlb-load", mmu, 3, 0, index, data, 461203830Smarius virt)); 462181398Smarius} 463181398Smarius 464182916Smariusstatic void 465182916Smariusitlb_relocate_locked0_sun4u(void) 466182916Smarius{ 467182916Smarius u_long data, pstate, tag; 468182916Smarius int i; 469182916Smarius 470182916Smarius if (cpu_impl != CPU_IMPL_ULTRASPARCIIIp) 471182916Smarius return; 472182916Smarius 473182916Smarius pstate = rdpr(pstate); 474182916Smarius wrpr(pstate, pstate & ~PSTATE_IE, 0); 475182916Smarius 476223719Smarius data = itlb_get_data_sun4u(tlb_locked, 0); 477182916Smarius if ((data & (TD_V | TD_L)) != (TD_V | TD_L)) { 478182916Smarius wrpr(pstate, pstate, 0); 479182916Smarius return; 480182916Smarius } 481182916Smarius 482182916Smarius /* Flush the mapping of slot 0. */ 483223719Smarius tag = ldxa(TLB_DAR_SLOT(tlb_locked, 0), ASI_ITLB_TAG_READ_REG); 484182916Smarius stxa(TLB_DEMAP_VA(TLB_TAR_VA(tag)) | TLB_DEMAP_PRIMARY | 485182916Smarius TLB_DEMAP_PAGE, ASI_IMMU_DEMAP, 0); 486182916Smarius flush(0); /* The USIII-family ignores the address. */ 487182916Smarius 488182916Smarius /* 489182916Smarius * Search a replacement slot != 0 and enter the data and tag 490182916Smarius * that formerly were in slot 0. 491182916Smarius */ 492182916Smarius for (i = 1; i < itlb_slot_max; i++) { 493223719Smarius if ((itlb_get_data_sun4u(tlb_locked, i) & TD_V) != 0) 494182916Smarius continue; 495182916Smarius 496182916Smarius stxa(AA_IMMU_TAR, ASI_IMMU, tag); 497223719Smarius stxa(TLB_DAR_SLOT(tlb_locked, i), ASI_ITLB_DATA_ACCESS_REG, 498223719Smarius data); 499182916Smarius flush(0); /* The USIII-family ignores the address. */ 500182916Smarius break; 501182916Smarius } 502182916Smarius wrpr(pstate, pstate, 0); 503182916Smarius if (i == itlb_slot_max) 504182916Smarius panic("%s: could not find a replacement slot", __func__); 505182916Smarius} 506182916Smarius 50784996Srobertstatic int 508163145Skmacymmu_mapin_sun4u(vm_offset_t va, vm_size_t len) 50984996Srobert{ 51091110Sjake vm_offset_t pa, mva; 51197445Sjake u_long data; 512203830Smarius u_int index; 51384996Srobert 51484996Srobert if (va + len > curkva) 51584996Srobert curkva = va + len; 51684996Srobert 51791110Sjake pa = (vm_offset_t)-1; 51885719Sjake len += va & PAGE_MASK_4M; 51985719Sjake va &= ~PAGE_MASK_4M; 52084996Srobert while (len) { 521181398Smarius if (dtlb_va_to_pa_sun4u(va) == (vm_offset_t)-1 || 522181398Smarius itlb_va_to_pa_sun4u(va) == (vm_offset_t)-1) { 523182020Smarius /* Allocate a physical page, claim the virtual area. */ 52491110Sjake if (pa == (vm_offset_t)-1) { 525170854Smarius pa = alloc_phys(PAGE_SIZE_4M, PAGE_SIZE_4M); 52691110Sjake if (pa == (vm_offset_t)-1) 527170854Smarius panic("%s: out of memory", __func__); 528170854Smarius mva = claim_virt(va, PAGE_SIZE_4M, 0); 529170839Smarius if (mva != va) 530170854Smarius panic("%s: can't claim virtual page " 53191110Sjake "(wanted %#lx, got %#lx)", 532170854Smarius __func__, va, mva); 533182020Smarius /* 534182020Smarius * The mappings may have changed, be paranoid. 535182020Smarius */ 53691110Sjake continue; 53791110Sjake } 53893678Stmm /* 53993678Stmm * Actually, we can only allocate two pages less at 54093678Stmm * most (depending on the kernel TSB size). 54193678Stmm */ 54293678Stmm if (dtlb_slot >= dtlb_slot_max) 543170839Smarius panic("%s: out of dtlb_slots", __func__); 54493678Stmm if (itlb_slot >= itlb_slot_max) 545170839Smarius panic("%s: out of itlb_slots", __func__); 54697445Sjake data = TD_V | TD_4M | TD_PA(pa) | TD_L | TD_CP | 54791139Sjake TD_CV | TD_P | TD_W; 54897445Sjake dtlb_store[dtlb_slot].te_pa = pa; 54997445Sjake dtlb_store[dtlb_slot].te_va = va; 550203830Smarius index = dtlb_slot_max - dtlb_slot - 1; 551203830Smarius if (dtlb_enter_sun4u(index, data, va) < 0) 552203830Smarius panic("%s: can't enter dTLB slot %d data " 553203831Smarius "%#lx va %#lx", __func__, index, data, 554203831Smarius va); 555203830Smarius dtlb_slot++; 55697445Sjake itlb_store[itlb_slot].te_pa = pa; 55797445Sjake itlb_store[itlb_slot].te_va = va; 558203830Smarius index = itlb_slot_max - itlb_slot - 1; 559203830Smarius if (itlb_enter_sun4u(index, data, va) < 0) 560203830Smarius panic("%s: can't enter iTLB slot %d data " 561203831Smarius "%#lx va %#lxd", __func__, index, data, 562203831Smarius va); 56397445Sjake itlb_slot++; 56491110Sjake pa = (vm_offset_t)-1; 56584996Srobert } 56685719Sjake len -= len > PAGE_SIZE_4M ? PAGE_SIZE_4M : len; 56785719Sjake va += PAGE_SIZE_4M; 56884996Srobert } 56991110Sjake if (pa != (vm_offset_t)-1) 570170854Smarius release_phys(pa, PAGE_SIZE_4M); 571170839Smarius return (0); 57284996Srobert} 57384996Srobert 57484996Srobertstatic vm_offset_t 57584996Srobertinit_heap(void) 57684996Srobert{ 57784996Srobert 57884996Srobert /* There is no need for continuous physical heap memory. */ 57984996Srobert heapva = (vm_offset_t)OF_claim((void *)HEAPVA, HEAPSZ, 32); 580170839Smarius return (heapva); 58184996Srobert} 58284996Srobert 583203829Smariusstatic phandle_t 584203829Smariusfind_bsp_sun4u(phandle_t node, uint32_t bspid) 585203829Smarius{ 586203829Smarius char type[sizeof("cpu")]; 587203829Smarius phandle_t child; 588203829Smarius uint32_t cpuid; 589203829Smarius 590203829Smarius for (; node > 0; node = OF_peer(node)) { 591203829Smarius child = OF_child(node); 592203829Smarius if (child > 0) { 593203829Smarius child = find_bsp_sun4u(child, bspid); 594203829Smarius if (child > 0) 595203829Smarius return (child); 596203829Smarius } else { 597203829Smarius if (OF_getprop(node, "device_type", type, 598203829Smarius sizeof(type)) <= 0) 599203829Smarius continue; 600203829Smarius if (strcmp(type, "cpu") != 0) 601203829Smarius continue; 602203829Smarius if (OF_getprop(node, cpu_cpuid_prop_sun4u(), &cpuid, 603203829Smarius sizeof(cpuid)) <= 0) 604203829Smarius continue; 605203829Smarius if (cpuid == bspid) 606203829Smarius return (node); 607203829Smarius } 608203829Smarius } 609203829Smarius return (0); 610203829Smarius} 611203829Smarius 612203829Smariusconst char * 613203829Smariuscpu_cpuid_prop_sun4u(void) 614203829Smarius{ 615203829Smarius 616203829Smarius switch (cpu_impl) { 617203829Smarius case CPU_IMPL_SPARC64: 618207537Smarius case CPU_IMPL_SPARC64V: 619203829Smarius case CPU_IMPL_ULTRASPARCI: 620203829Smarius case CPU_IMPL_ULTRASPARCII: 621203829Smarius case CPU_IMPL_ULTRASPARCIIi: 622203829Smarius case CPU_IMPL_ULTRASPARCIIe: 623203829Smarius return ("upa-portid"); 624203829Smarius case CPU_IMPL_ULTRASPARCIII: 625203829Smarius case CPU_IMPL_ULTRASPARCIIIp: 626203829Smarius case CPU_IMPL_ULTRASPARCIIIi: 627203829Smarius case CPU_IMPL_ULTRASPARCIIIip: 628203829Smarius return ("portid"); 629203829Smarius case CPU_IMPL_ULTRASPARCIV: 630203829Smarius case CPU_IMPL_ULTRASPARCIVp: 631203829Smarius return ("cpuid"); 632203829Smarius default: 633203829Smarius return (""); 634203829Smarius } 635203829Smarius} 636203829Smarius 637203829Smariusuint32_t 638203829Smariuscpu_get_mid_sun4u(void) 639203829Smarius{ 640203829Smarius 641203829Smarius switch (cpu_impl) { 642203829Smarius case CPU_IMPL_SPARC64: 643207537Smarius case CPU_IMPL_SPARC64V: 644203829Smarius case CPU_IMPL_ULTRASPARCI: 645203829Smarius case CPU_IMPL_ULTRASPARCII: 646203829Smarius case CPU_IMPL_ULTRASPARCIIi: 647203829Smarius case CPU_IMPL_ULTRASPARCIIe: 648203829Smarius return (UPA_CR_GET_MID(ldxa(0, ASI_UPA_CONFIG_REG))); 649203829Smarius case CPU_IMPL_ULTRASPARCIII: 650203829Smarius case CPU_IMPL_ULTRASPARCIIIp: 651203829Smarius return (FIREPLANE_CR_GET_AID(ldxa(AA_FIREPLANE_CONFIG, 652203829Smarius ASI_FIREPLANE_CONFIG_REG))); 653203829Smarius case CPU_IMPL_ULTRASPARCIIIi: 654203829Smarius case CPU_IMPL_ULTRASPARCIIIip: 655203829Smarius return (JBUS_CR_GET_JID(ldxa(0, ASI_JBUS_CONFIG_REG))); 656203829Smarius case CPU_IMPL_ULTRASPARCIV: 657203829Smarius case CPU_IMPL_ULTRASPARCIVp: 658203829Smarius return (INTR_ID_GET_ID(ldxa(AA_INTR_ID, ASI_INTR_ID))); 659203829Smarius default: 660203829Smarius return (0); 661203829Smarius } 662203829Smarius} 663203829Smarius 66491139Sjakestatic void 665163145Skmacytlb_init_sun4u(void) 66691139Sjake{ 667203829Smarius phandle_t bsp; 66891139Sjake 669182478Smarius cpu_impl = VER_IMPL(rdpr(ver)); 670223719Smarius switch (cpu_impl) { 671223719Smarius case CPU_IMPL_SPARC64: 672223719Smarius case CPU_IMPL_ULTRASPARCI: 673223719Smarius case CPU_IMPL_ULTRASPARCII: 674223719Smarius case CPU_IMPL_ULTRASPARCIIi: 675223719Smarius case CPU_IMPL_ULTRASPARCIIe: 676223719Smarius tlb_locked = TLB_DAR_T32; 677223719Smarius break; 678223719Smarius case CPU_IMPL_ULTRASPARCIII: 679223719Smarius case CPU_IMPL_ULTRASPARCIIIp: 680223719Smarius case CPU_IMPL_ULTRASPARCIIIi: 681223719Smarius case CPU_IMPL_ULTRASPARCIIIip: 682223719Smarius case CPU_IMPL_ULTRASPARCIV: 683223719Smarius case CPU_IMPL_ULTRASPARCIVp: 684223719Smarius tlb_locked = TLB_DAR_T16; 685223719Smarius break; 686223719Smarius case CPU_IMPL_SPARC64V: 687223719Smarius tlb_locked = TLB_DAR_FTLB; 688223719Smarius break; 689223719Smarius } 690203829Smarius bsp = find_bsp_sun4u(OF_child(root), cpu_get_mid_sun4u()); 691203829Smarius if (bsp == 0) 692170839Smarius panic("%s: no node for bootcpu?!?!", __func__); 693182020Smarius 694203829Smarius if (OF_getprop(bsp, "#dtlb-entries", &dtlb_slot_max, 69591139Sjake sizeof(dtlb_slot_max)) == -1 || 696203829Smarius OF_getprop(bsp, "#itlb-entries", &itlb_slot_max, 69791139Sjake sizeof(itlb_slot_max)) == -1) 698170854Smarius panic("%s: can't get TLB slot max.", __func__); 699182916Smarius 700182916Smarius if (cpu_impl == CPU_IMPL_ULTRASPARCIIIp) { 701182916Smarius#ifdef LOADER_DEBUG 702182916Smarius printf("pre fixup:\n"); 703182916Smarius pmap_print_tlb_sun4u(); 704182916Smarius#endif 705182916Smarius 706182916Smarius /* 707182916Smarius * Relocate the locked entry in it16 slot 0 (if existent) 708182916Smarius * as part of working around Cheetah+ erratum 34. 709182916Smarius */ 710182916Smarius itlb_relocate_locked0_sun4u(); 711182916Smarius 712182916Smarius#ifdef LOADER_DEBUG 713182916Smarius printf("post fixup:\n"); 714182916Smarius pmap_print_tlb_sun4u(); 715182916Smarius#endif 716182916Smarius } 717182916Smarius 71891139Sjake dtlb_store = malloc(dtlb_slot_max * sizeof(*dtlb_store)); 71991139Sjake itlb_store = malloc(itlb_slot_max * sizeof(*itlb_store)); 72091139Sjake if (dtlb_store == NULL || itlb_store == NULL) 721170854Smarius panic("%s: can't allocate TLB store", __func__); 72291139Sjake} 72391139Sjake 72485719Sjakeint 72585719Sjakemain(int (*openfirm)(void *)) 72684996Srobert{ 72784996Srobert char bootpath[64]; 728163145Skmacy char compatible[32]; 72984996Srobert struct devsw **dp; 73084996Srobert 73184996Srobert /* 732182020Smarius * Tell the Open Firmware functions where they find the OFW gate. 73384996Srobert */ 73485719Sjake OF_init(openfirm); 73584996Srobert 73684996Srobert archsw.arch_getdev = ofw_getdev; 73784996Srobert archsw.arch_copyin = sparc64_copyin; 73884996Srobert archsw.arch_copyout = ofw_copyout; 73984996Srobert archsw.arch_readin = sparc64_readin; 74084996Srobert archsw.arch_autoload = sparc64_autoload; 74184996Srobert 742214526Smarius if (init_heap() == (vm_offset_t)-1) 743214526Smarius OF_exit(); 744214526Smarius setheap((void *)heapva, (void *)(heapva + HEAPSZ)); 745214526Smarius 74684996Srobert /* 74784996Srobert * Probe for a console. 74884996Srobert */ 74984996Srobert cons_probe(); 75084996Srobert 751170854Smarius if ((root = OF_peer(0)) == -1) 752170854Smarius panic("%s: can't get root phandle", __func__); 753170854Smarius OF_getprop(root, "compatible", compatible, sizeof(compatible)); 754221869Sattilio mmu_ops = &mmu_ops_sun4u; 75591139Sjake 756163145Skmacy mmu_ops->tlb_init(); 757163145Skmacy 75884996Srobert /* 75984996Srobert * Initialize devices. 76084996Srobert */ 76184996Srobert for (dp = devsw; *dp != 0; dp++) { 76284996Srobert if ((*dp)->dv_init != 0) 76384996Srobert (*dp)->dv_init(); 76484996Srobert } 76584996Srobert 76684996Srobert /* 76784996Srobert * Set up the current device. 76884996Srobert */ 769170854Smarius OF_getprop(chosen, "bootpath", bootpath, sizeof(bootpath)); 77084996Srobert 771106738Sjake /* 772106738Sjake * Sun compatible bootable CD-ROMs have a disk label placed 773106738Sjake * before the cd9660 data, with the actual filesystem being 774106738Sjake * in the first partition, while the other partitions contain 775106738Sjake * pseudo disk labels with embedded boot blocks for different 776106738Sjake * architectures, which may be followed by UFS filesystems. 777106738Sjake * The firmware will set the boot path to the partition it 778106738Sjake * boots from ('f' in the sun4u case), but we want the kernel 779106738Sjake * to be loaded from the cd9660 fs ('a'), so the boot path 780106738Sjake * needs to be altered. 781106738Sjake */ 782106738Sjake if (bootpath[strlen(bootpath) - 2] == ':' && 783106738Sjake bootpath[strlen(bootpath) - 1] == 'f') { 784106738Sjake bootpath[strlen(bootpath) - 1] = 'a'; 785106738Sjake printf("Boot path set to %s\n", bootpath); 78684996Srobert } 78784996Srobert 788106738Sjake env_setenv("currdev", EV_VOLATILE, bootpath, 78984996Srobert ofw_setcurrdev, env_nounset); 790106738Sjake env_setenv("loaddev", EV_VOLATILE, bootpath, 79184996Srobert env_noset, env_nounset); 79284996Srobert 793101287Sjake printf("\n"); 794101287Sjake printf("%s, Revision %s\n", bootprog_name, bootprog_rev); 795101287Sjake printf("(%s, %s)\n", bootprog_maker, bootprog_date); 79684996Srobert printf("bootpath=\"%s\"\n", bootpath); 79784996Srobert 79884996Srobert /* Give control to the machine independent loader code. */ 79984996Srobert interact(); 800170839Smarius return (1); 80184996Srobert} 80284996Srobert 80391110SjakeCOMMAND_SET(reboot, "reboot", "reboot the system", command_reboot); 80491110Sjake 80591110Sjakestatic int 80691110Sjakecommand_reboot(int argc, char *argv[]) 80791110Sjake{ 80891110Sjake int i; 80991110Sjake 81091110Sjake for (i = 0; devsw[i] != NULL; ++i) 81191110Sjake if (devsw[i]->dv_cleanup != NULL) 81291110Sjake (devsw[i]->dv_cleanup)(); 81391110Sjake 81491110Sjake printf("Rebooting...\n"); 81591110Sjake OF_exit(); 81691110Sjake} 81791110Sjake 81891110Sjake/* provide this for panic, as it's not in the startup code */ 81991110Sjakevoid 82091110Sjakeexit(int code) 82191110Sjake{ 822170839Smarius 82391110Sjake OF_exit(); 82491110Sjake} 82591110Sjake 82691110Sjake#ifdef LOADER_DEBUG 827188455Smariusstatic const char *const page_sizes[] = { 82884996Srobert " 8k", " 64k", "512k", " 4m" 82984996Srobert}; 83084996Srobert 83184996Srobertstatic void 832181398Smariuspmap_print_tte_sun4u(tte_t tag, tte_t tte) 83384996Srobert{ 834170839Smarius 83584996Srobert printf("%s %s ", 836191071Smarius page_sizes[(tte >> TD_SIZE_SHIFT) & TD_SIZE_MASK], 83784996Srobert tag & TD_G ? "G" : " "); 83884996Srobert printf(tte & TD_W ? "W " : " "); 83984996Srobert printf(tte & TD_P ? "\e[33mP\e[0m " : " "); 84084996Srobert printf(tte & TD_E ? "E " : " "); 84184996Srobert printf(tte & TD_CV ? "CV " : " "); 84284996Srobert printf(tte & TD_CP ? "CP " : " "); 84384996Srobert printf(tte & TD_L ? "\e[32mL\e[0m " : " "); 84484996Srobert printf(tte & TD_IE ? "IE " : " "); 84584996Srobert printf(tte & TD_NFO ? "NFO " : " "); 846181398Smarius printf("pa=0x%lx va=0x%lx ctx=%ld\n", 847181398Smarius TD_PA(tte), TLB_TAR_VA(tag), TLB_TAR_CTX(tag)); 84884996Srobert} 849181398Smarius 850181398Smariusstatic void 851181398Smariuspmap_print_tlb_sun4u(void) 85284996Srobert{ 853181398Smarius tte_t tag, tte; 854182478Smarius u_long pstate; 85584996Srobert int i; 85684996Srobert 857182478Smarius pstate = rdpr(pstate); 858181398Smarius for (i = 0; i < itlb_slot_max; i++) { 859182478Smarius wrpr(pstate, pstate & ~PSTATE_IE, 0); 860223719Smarius tte = itlb_get_data_sun4u(tlb_locked, i); 861182478Smarius wrpr(pstate, pstate, 0); 86284996Srobert if (!(tte & TD_V)) 86384996Srobert continue; 864223719Smarius tag = ldxa(TLB_DAR_SLOT(tlb_locked, i), 865223719Smarius ASI_ITLB_TAG_READ_REG); 866181398Smarius printf("iTLB-%2u: ", i); 867181398Smarius pmap_print_tte_sun4u(tag, tte); 86884996Srobert } 869181398Smarius for (i = 0; i < dtlb_slot_max; i++) { 870182478Smarius wrpr(pstate, pstate & ~PSTATE_IE, 0); 871223719Smarius tte = dtlb_get_data_sun4u(tlb_locked, i); 872182478Smarius wrpr(pstate, pstate, 0); 873181398Smarius if (!(tte & TD_V)) 874181398Smarius continue; 875223719Smarius tag = ldxa(TLB_DAR_SLOT(tlb_locked, i), 876223719Smarius ASI_DTLB_TAG_READ_REG); 877181398Smarius printf("dTLB-%2u: ", i); 878181398Smarius pmap_print_tte_sun4u(tag, tte); 879181398Smarius } 88084996Srobert} 88191110Sjake#endif 882