1239268Sgonzo/*- 2244469Scognet * Copyright (c) 2012 Ian Lepore 3239268Sgonzo * Copyright (c) 2010 Mark Tinguely 4239268Sgonzo * Copyright (c) 2004 Olivier Houchard 5239268Sgonzo * Copyright (c) 2002 Peter Grehan 6239268Sgonzo * Copyright (c) 1997, 1998 Justin T. Gibbs. 7239268Sgonzo * All rights reserved. 8239268Sgonzo * 9239268Sgonzo * Redistribution and use in source and binary forms, with or without 10239268Sgonzo * modification, are permitted provided that the following conditions 11239268Sgonzo * are met: 12239268Sgonzo * 1. Redistributions of source code must retain the above copyright 13239268Sgonzo * notice, this list of conditions, and the following disclaimer, 14239268Sgonzo * without modification, immediately at the beginning of the file. 15239268Sgonzo * 2. The name of the author may not be used to endorse or promote products 16239268Sgonzo * derived from this software without specific prior written permission. 17239268Sgonzo * 18239268Sgonzo * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 19239268Sgonzo * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20239268Sgonzo * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21239268Sgonzo * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 22239268Sgonzo * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 23239268Sgonzo * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 24239268Sgonzo * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25239268Sgonzo * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26239268Sgonzo * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27239268Sgonzo * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28239268Sgonzo * SUCH DAMAGE. 29239268Sgonzo * 30239268Sgonzo * From i386/busdma_machdep.c 191438 2009-04-23 20:24:19Z jhb 31239268Sgonzo */ 32239268Sgonzo 33239268Sgonzo#include <sys/cdefs.h> 34239268Sgonzo__FBSDID("$FreeBSD$"); 35239268Sgonzo 36239268Sgonzo#define _ARM32_BUS_DMA_PRIVATE 37239268Sgonzo#include <sys/param.h> 38239268Sgonzo#include <sys/kdb.h> 39239268Sgonzo#include <ddb/ddb.h> 40239268Sgonzo#include <ddb/db_output.h> 41239268Sgonzo#include <sys/systm.h> 42239268Sgonzo#include <sys/malloc.h> 43239268Sgonzo#include <sys/bus.h> 44244469Scognet#include <sys/busdma_bufalloc.h> 45239268Sgonzo#include <sys/interrupt.h> 46239268Sgonzo#include <sys/kernel.h> 47239268Sgonzo#include <sys/ktr.h> 48239268Sgonzo#include <sys/lock.h> 49246713Skib#include <sys/memdesc.h> 50239268Sgonzo#include <sys/proc.h> 51239268Sgonzo#include <sys/mutex.h> 52246713Skib#include <sys/sysctl.h> 53239268Sgonzo#include <sys/uio.h> 54239268Sgonzo 55239268Sgonzo#include <vm/vm.h> 56239268Sgonzo#include <vm/vm_page.h> 57239268Sgonzo#include <vm/vm_map.h> 58244469Scognet#include <vm/vm_extern.h> 59244469Scognet#include <vm/vm_kern.h> 60239268Sgonzo 61239268Sgonzo#include <machine/atomic.h> 62239268Sgonzo#include <machine/bus.h> 63239268Sgonzo#include <machine/cpufunc.h> 64239268Sgonzo#include <machine/md_var.h> 65239268Sgonzo 66239268Sgonzo#define MAX_BPAGES 64 67269794Sian#define MAX_DMA_SEGMENTS 4096 68269794Sian#define BUS_DMA_EXCL_BOUNCE BUS_DMA_BUS2 69269794Sian#define BUS_DMA_ALIGN_BOUNCE BUS_DMA_BUS3 70269794Sian#define BUS_DMA_COULD_BOUNCE (BUS_DMA_EXCL_BOUNCE | BUS_DMA_ALIGN_BOUNCE) 71239268Sgonzo#define BUS_DMA_MIN_ALLOC_COMP BUS_DMA_BUS4 72239268Sgonzo 73239268Sgonzostruct bounce_zone; 74239268Sgonzo 75239268Sgonzostruct bus_dma_tag { 76239268Sgonzo bus_dma_tag_t parent; 77239268Sgonzo bus_size_t alignment; 78239268Sgonzo bus_size_t boundary; 79239268Sgonzo bus_addr_t lowaddr; 80239268Sgonzo bus_addr_t highaddr; 81239268Sgonzo bus_dma_filter_t *filter; 82239268Sgonzo void *filterarg; 83239268Sgonzo bus_size_t maxsize; 84239268Sgonzo u_int nsegments; 85239268Sgonzo bus_size_t maxsegsz; 86239268Sgonzo int flags; 87239268Sgonzo int ref_count; 88239268Sgonzo int map_count; 89239268Sgonzo bus_dma_lock_t *lockfunc; 90239268Sgonzo void *lockfuncarg; 91239268Sgonzo struct bounce_zone *bounce_zone; 92239268Sgonzo /* 93239268Sgonzo * DMA range for this tag. If the page doesn't fall within 94239268Sgonzo * one of these ranges, an error is returned. The caller 95239268Sgonzo * may then decide what to do with the transfer. If the 96239268Sgonzo * range pointer is NULL, it is ignored. 97239268Sgonzo */ 98239268Sgonzo struct arm32_dma_range *ranges; 99239268Sgonzo int _nranges; 100239268Sgonzo}; 101239268Sgonzo 102239268Sgonzostruct bounce_page { 103239268Sgonzo vm_offset_t vaddr; /* kva of bounce buffer */ 104239268Sgonzo bus_addr_t busaddr; /* Physical address */ 105239268Sgonzo vm_offset_t datavaddr; /* kva of client data */ 106246713Skib bus_addr_t dataaddr; /* client physical address */ 107239268Sgonzo bus_size_t datacount; /* client data count */ 108239268Sgonzo STAILQ_ENTRY(bounce_page) links; 109239268Sgonzo}; 110239268Sgonzo 111239268Sgonzostruct sync_list { 112239268Sgonzo vm_offset_t vaddr; /* kva of bounce buffer */ 113239268Sgonzo bus_addr_t busaddr; /* Physical address */ 114239268Sgonzo bus_size_t datacount; /* client data count */ 115239268Sgonzo}; 116239268Sgonzo 117239268Sgonzoint busdma_swi_pending; 118239268Sgonzo 119239268Sgonzostruct bounce_zone { 120239268Sgonzo STAILQ_ENTRY(bounce_zone) links; 121239268Sgonzo STAILQ_HEAD(bp_list, bounce_page) bounce_page_list; 122239268Sgonzo int total_bpages; 123239268Sgonzo int free_bpages; 124239268Sgonzo int reserved_bpages; 125239268Sgonzo int active_bpages; 126239268Sgonzo int total_bounced; 127239268Sgonzo int total_deferred; 128239268Sgonzo int map_count; 129239268Sgonzo bus_size_t alignment; 130239268Sgonzo bus_addr_t lowaddr; 131239268Sgonzo char zoneid[8]; 132239268Sgonzo char lowaddrid[20]; 133239268Sgonzo struct sysctl_ctx_list sysctl_tree; 134239268Sgonzo struct sysctl_oid *sysctl_tree_top; 135239268Sgonzo}; 136239268Sgonzo 137239268Sgonzostatic struct mtx bounce_lock; 138239268Sgonzostatic int total_bpages; 139239268Sgonzostatic int busdma_zonecount; 140269794Sianstatic uint32_t tags_total; 141269794Sianstatic uint32_t maps_total; 142269794Sianstatic uint32_t maps_dmamem; 143269794Sianstatic uint32_t maps_coherent; 144269794Sianstatic uint64_t maploads_total; 145269794Sianstatic uint64_t maploads_bounced; 146269794Sianstatic uint64_t maploads_coherent; 147269794Sianstatic uint64_t maploads_dmamem; 148269794Sianstatic uint64_t maploads_mbuf; 149269794Sianstatic uint64_t maploads_physmem; 150269794Sian 151239268Sgonzostatic STAILQ_HEAD(, bounce_zone) bounce_zone_list; 152239268Sgonzo 153239268SgonzoSYSCTL_NODE(_hw, OID_AUTO, busdma, CTLFLAG_RD, 0, "Busdma parameters"); 154269794SianSYSCTL_UINT(_hw_busdma, OID_AUTO, tags_total, CTLFLAG_RD, &tags_total, 0, 155269794Sian "Number of active tags"); 156269794SianSYSCTL_UINT(_hw_busdma, OID_AUTO, maps_total, CTLFLAG_RD, &maps_total, 0, 157269794Sian "Number of active maps"); 158269794SianSYSCTL_UINT(_hw_busdma, OID_AUTO, maps_dmamem, CTLFLAG_RD, &maps_dmamem, 0, 159269794Sian "Number of active maps for bus_dmamem_alloc buffers"); 160269794SianSYSCTL_UINT(_hw_busdma, OID_AUTO, maps_coherent, CTLFLAG_RD, &maps_coherent, 0, 161269794Sian "Number of active maps with BUS_DMA_COHERENT flag set"); 162269794SianSYSCTL_UQUAD(_hw_busdma, OID_AUTO, maploads_total, CTLFLAG_RD, &maploads_total, 0, 163269794Sian "Number of load operations performed"); 164269794SianSYSCTL_UQUAD(_hw_busdma, OID_AUTO, maploads_bounced, CTLFLAG_RD, &maploads_bounced, 0, 165269794Sian "Number of load operations that used bounce buffers"); 166269794SianSYSCTL_UQUAD(_hw_busdma, OID_AUTO, maploads_coherent, CTLFLAG_RD, &maploads_dmamem, 0, 167269794Sian "Number of load operations on BUS_DMA_COHERENT memory"); 168269794SianSYSCTL_UQUAD(_hw_busdma, OID_AUTO, maploads_dmamem, CTLFLAG_RD, &maploads_dmamem, 0, 169269794Sian "Number of load operations on bus_dmamem_alloc buffers"); 170269794SianSYSCTL_UQUAD(_hw_busdma, OID_AUTO, maploads_mbuf, CTLFLAG_RD, &maploads_mbuf, 0, 171269794Sian "Number of load operations for mbufs"); 172269794SianSYSCTL_UQUAD(_hw_busdma, OID_AUTO, maploads_physmem, CTLFLAG_RD, &maploads_physmem, 0, 173269794Sian "Number of load operations on physical buffers"); 174239268SgonzoSYSCTL_INT(_hw_busdma, OID_AUTO, total_bpages, CTLFLAG_RD, &total_bpages, 0, 175239268Sgonzo "Total bounce pages"); 176239268Sgonzo 177239268Sgonzostruct bus_dmamap { 178239268Sgonzo struct bp_list bpages; 179239268Sgonzo int pagesneeded; 180239268Sgonzo int pagesreserved; 181239268Sgonzo bus_dma_tag_t dmat; 182246713Skib struct memdesc mem; 183239268Sgonzo pmap_t pmap; 184239268Sgonzo bus_dmamap_callback_t *callback; 185239268Sgonzo void *callback_arg; 186244469Scognet int flags; 187244469Scognet#define DMAMAP_COHERENT (1 << 0) 188269794Sian#define DMAMAP_DMAMEM_ALLOC (1 << 1) 189269794Sian#define DMAMAP_MBUF (1 << 2) 190239268Sgonzo STAILQ_ENTRY(bus_dmamap) links; 191269794Sian bus_dma_segment_t *segments; 192246713Skib int sync_count; 193246713Skib struct sync_list slist[]; 194239268Sgonzo}; 195239268Sgonzo 196239268Sgonzostatic STAILQ_HEAD(, bus_dmamap) bounce_map_waitinglist; 197239268Sgonzostatic STAILQ_HEAD(, bus_dmamap) bounce_map_callbacklist; 198239268Sgonzo 199239268Sgonzostatic void init_bounce_pages(void *dummy); 200239268Sgonzostatic int alloc_bounce_zone(bus_dma_tag_t dmat); 201239268Sgonzostatic int alloc_bounce_pages(bus_dma_tag_t dmat, u_int numpages); 202239268Sgonzostatic int reserve_bounce_pages(bus_dma_tag_t dmat, bus_dmamap_t map, 203239268Sgonzo int commit); 204239268Sgonzostatic bus_addr_t add_bounce_page(bus_dma_tag_t dmat, bus_dmamap_t map, 205246713Skib vm_offset_t vaddr, bus_addr_t addr, 206246713Skib bus_size_t size); 207239268Sgonzostatic void free_bounce_page(bus_dma_tag_t dmat, struct bounce_page *bpage); 208246713Skibstatic void _bus_dmamap_count_pages(bus_dma_tag_t dmat, bus_dmamap_t map, 209239268Sgonzo void *buf, bus_size_t buflen, int flags); 210246713Skibstatic void _bus_dmamap_count_phys(bus_dma_tag_t dmat, bus_dmamap_t map, 211246713Skib vm_paddr_t buf, bus_size_t buflen, int flags); 212246713Skibstatic int _bus_dmamap_reserve_pages(bus_dma_tag_t dmat, bus_dmamap_t map, 213246713Skib int flags); 214239268Sgonzo 215244469Scognetstatic busdma_bufalloc_t coherent_allocator; /* Cache of coherent buffers */ 216244469Scognetstatic busdma_bufalloc_t standard_allocator; /* Cache of standard buffers */ 217244469Scognetstatic void 218244469Scognetbusdma_init(void *dummy) 219244469Scognet{ 220252652Sgonzo int uma_flags; 221244469Scognet 222252652Sgonzo uma_flags = 0; 223252652Sgonzo 224244469Scognet /* Create a cache of buffers in standard (cacheable) memory. */ 225244469Scognet standard_allocator = busdma_bufalloc_create("buffer", 226244469Scognet arm_dcache_align, /* minimum_alignment */ 227244469Scognet NULL, /* uma_alloc func */ 228244469Scognet NULL, /* uma_free func */ 229252652Sgonzo uma_flags); /* uma_zcreate_flags */ 230244469Scognet 231252652Sgonzo#ifdef INVARIANTS 232252652Sgonzo /* 233252652Sgonzo * Force UMA zone to allocate service structures like 234252652Sgonzo * slabs using own allocator. uma_debug code performs 235252652Sgonzo * atomic ops on uma_slab_t fields and safety of this 236252652Sgonzo * operation is not guaranteed for write-back caches 237252652Sgonzo */ 238252652Sgonzo uma_flags = UMA_ZONE_OFFPAGE; 239252652Sgonzo#endif 240244469Scognet /* 241244469Scognet * Create a cache of buffers in uncacheable memory, to implement the 242244469Scognet * BUS_DMA_COHERENT (and potentially BUS_DMA_NOCACHE) flag. 243244469Scognet */ 244244469Scognet coherent_allocator = busdma_bufalloc_create("coherent", 245244469Scognet arm_dcache_align, /* minimum_alignment */ 246244469Scognet busdma_bufalloc_alloc_uncacheable, 247244469Scognet busdma_bufalloc_free_uncacheable, 248252652Sgonzo uma_flags); /* uma_zcreate_flags */ 249244469Scognet} 250244469Scognet 251244469Scognet/* 252244469Scognet * This init historically used SI_SUB_VM, but now the init code requires 253244469Scognet * malloc(9) using M_DEVBUF memory, which is set up later than SI_SUB_VM, by 254244469Scognet * SI_SUB_KMEM and SI_ORDER_SECOND, so we'll go right after that by using 255244469Scognet * SI_SUB_KMEM and SI_ORDER_THIRD. 256244469Scognet */ 257244469ScognetSYSINIT(busdma, SI_SUB_KMEM, SI_ORDER_THIRD, busdma_init, NULL); 258244469Scognet 259269794Sianstatic int 260269794Sianexclusion_bounce_check(vm_offset_t lowaddr, vm_offset_t highaddr) 261239268Sgonzo{ 262239268Sgonzo int i; 263239268Sgonzo for (i = 0; phys_avail[i] && phys_avail[i + 1]; i += 2) { 264269794Sian if ((lowaddr >= phys_avail[i] && lowaddr < phys_avail[i + 1]) || 265269794Sian (lowaddr < phys_avail[i] && highaddr >= phys_avail[i])) 266239268Sgonzo return (1); 267239268Sgonzo } 268239268Sgonzo return (0); 269239268Sgonzo} 270239268Sgonzo 271269794Sian/* 272269794Sian * Return true if the tag has an exclusion zone that could lead to bouncing. 273269794Sian */ 274269794Sianstatic __inline int 275269794Sianexclusion_bounce(bus_dma_tag_t dmat) 276269794Sian{ 277269794Sian 278269794Sian return (dmat->flags & BUS_DMA_EXCL_BOUNCE); 279269794Sian} 280269794Sian 281269794Sian/* 282269794Sian * Return true if the given address does not fall on the alignment boundary. 283269794Sian */ 284269794Sianstatic __inline int 285269794Sianalignment_bounce(bus_dma_tag_t dmat, bus_addr_t addr) 286269794Sian{ 287269794Sian 288269794Sian return (addr & (dmat->alignment - 1)); 289269794Sian} 290269794Sian 291269794Sian/* 292269794Sian * Return true if the DMA should bounce because the start or end does not fall 293269794Sian * on a cacheline boundary (which would require a partial cacheline flush). 294269794Sian * COHERENT memory doesn't trigger cacheline flushes. Memory allocated by 295269794Sian * bus_dmamem_alloc() is always aligned to cacheline boundaries, and there's a 296269794Sian * strict rule that such memory cannot be accessed by the CPU while DMA is in 297269794Sian * progress (or by multiple DMA engines at once), so that it's always safe to do 298269794Sian * full cacheline flushes even if that affects memory outside the range of a 299269794Sian * given DMA operation that doesn't involve the full allocated buffer. If we're 300269794Sian * mapping an mbuf, that follows the same rules as a buffer we allocated. 301269794Sian */ 302269794Sianstatic __inline int 303269794Siancacheline_bounce(bus_dmamap_t map, bus_addr_t addr, bus_size_t size) 304269794Sian{ 305269794Sian 306269794Sian if (map->flags & (DMAMAP_DMAMEM_ALLOC | DMAMAP_COHERENT | DMAMAP_MBUF)) 307269794Sian return (0); 308269794Sian return ((addr | size) & arm_dcache_align_mask); 309269794Sian} 310269794Sian 311269794Sian/* 312269794Sian * Return true if we might need to bounce the DMA described by addr and size. 313269794Sian * 314269794Sian * This is used to quick-check whether we need to do the more expensive work of 315269794Sian * checking the DMA page-by-page looking for alignment and exclusion bounces. 316269794Sian * 317269794Sian * Note that the addr argument might be either virtual or physical. It doesn't 318269794Sian * matter because we only look at the low-order bits, which are the same in both 319269794Sian * address spaces. 320269794Sian */ 321269794Sianstatic __inline int 322269794Sianmight_bounce(bus_dma_tag_t dmat, bus_dmamap_t map, bus_addr_t addr, 323269794Sian bus_size_t size) 324269794Sian{ 325269794Sian return ((dmat->flags & BUS_DMA_EXCL_BOUNCE) || 326269794Sian alignment_bounce(dmat, addr) || 327269794Sian cacheline_bounce(map, addr, size)); 328269794Sian} 329269794Sian 330269794Sian/* 331269794Sian * Return true if we must bounce the DMA described by paddr and size. 332269794Sian * 333269794Sian * Bouncing can be triggered by DMA that doesn't begin and end on cacheline 334269794Sian * boundaries, or doesn't begin on an alignment boundary, or falls within the 335269794Sian * exclusion zone of any tag in the ancestry chain. 336269794Sian * 337269794Sian * For exclusions, walk the chain of tags comparing paddr to the exclusion zone 338269794Sian * within each tag. If the tag has a filter function, use it to decide whether 339269794Sian * the DMA needs to bounce, otherwise any DMA within the zone bounces. 340269794Sian */ 341269794Sianstatic int 342269794Sianmust_bounce(bus_dma_tag_t dmat, bus_dmamap_t map, bus_addr_t paddr, 343269794Sian bus_size_t size) 344269794Sian{ 345269794Sian 346269794Sian if (cacheline_bounce(map, paddr, size)) 347269794Sian return (1); 348269794Sian 349269794Sian /* 350269794Sian * The tag already contains ancestors' alignment restrictions so this 351269794Sian * check doesn't need to be inside the loop. 352269794Sian */ 353269794Sian if (alignment_bounce(dmat, paddr)) 354269794Sian return (1); 355269794Sian 356269794Sian /* 357269794Sian * Even though each tag has an exclusion zone that is a superset of its 358269794Sian * own and all its ancestors' exclusions, the exclusion zone of each tag 359269794Sian * up the chain must be checked within the loop, because the busdma 360269794Sian * rules say the filter function is called only when the address lies 361269794Sian * within the low-highaddr range of the tag that filterfunc belongs to. 362269794Sian */ 363269794Sian while (dmat != NULL && exclusion_bounce(dmat)) { 364269794Sian if ((paddr >= dmat->lowaddr && paddr <= dmat->highaddr) && 365269794Sian (dmat->filter == NULL || 366269794Sian dmat->filter(dmat->filterarg, paddr) != 0)) 367269794Sian return (1); 368269794Sian dmat = dmat->parent; 369269794Sian } 370269794Sian 371269794Sian return (0); 372269794Sian} 373269794Sian 374239268Sgonzostatic __inline struct arm32_dma_range * 375239268Sgonzo_bus_dma_inrange(struct arm32_dma_range *ranges, int nranges, 376239268Sgonzo bus_addr_t curaddr) 377239268Sgonzo{ 378239268Sgonzo struct arm32_dma_range *dr; 379239268Sgonzo int i; 380239268Sgonzo 381239268Sgonzo for (i = 0, dr = ranges; i < nranges; i++, dr++) { 382239268Sgonzo if (curaddr >= dr->dr_sysbase && 383239268Sgonzo round_page(curaddr) <= (dr->dr_sysbase + dr->dr_len)) 384239268Sgonzo return (dr); 385239268Sgonzo } 386239268Sgonzo 387239268Sgonzo return (NULL); 388239268Sgonzo} 389239268Sgonzo 390239268Sgonzo/* 391239268Sgonzo * Convenience function for manipulating driver locks from busdma (during 392239268Sgonzo * busdma_swi, for example). Drivers that don't provide their own locks 393239268Sgonzo * should specify &Giant to dmat->lockfuncarg. Drivers that use their own 394239268Sgonzo * non-mutex locking scheme don't have to use this at all. 395239268Sgonzo */ 396239268Sgonzovoid 397239268Sgonzobusdma_lock_mutex(void *arg, bus_dma_lock_op_t op) 398239268Sgonzo{ 399239268Sgonzo struct mtx *dmtx; 400239268Sgonzo 401239268Sgonzo dmtx = (struct mtx *)arg; 402239268Sgonzo switch (op) { 403239268Sgonzo case BUS_DMA_LOCK: 404239268Sgonzo mtx_lock(dmtx); 405239268Sgonzo break; 406239268Sgonzo case BUS_DMA_UNLOCK: 407239268Sgonzo mtx_unlock(dmtx); 408239268Sgonzo break; 409239268Sgonzo default: 410239268Sgonzo panic("Unknown operation 0x%x for busdma_lock_mutex!", op); 411239268Sgonzo } 412239268Sgonzo} 413239268Sgonzo 414239268Sgonzo/* 415239268Sgonzo * dflt_lock should never get called. It gets put into the dma tag when 416239268Sgonzo * lockfunc == NULL, which is only valid if the maps that are associated 417239268Sgonzo * with the tag are meant to never be defered. 418239268Sgonzo * XXX Should have a way to identify which driver is responsible here. 419239268Sgonzo */ 420239268Sgonzostatic void 421239268Sgonzodflt_lock(void *arg, bus_dma_lock_op_t op) 422239268Sgonzo{ 423239268Sgonzo panic("driver error: busdma dflt_lock called"); 424239268Sgonzo} 425239268Sgonzo 426239268Sgonzo/* 427239268Sgonzo * Allocate a device specific dma_tag. 428239268Sgonzo */ 429239268Sgonzoint 430239268Sgonzobus_dma_tag_create(bus_dma_tag_t parent, bus_size_t alignment, 431239268Sgonzo bus_size_t boundary, bus_addr_t lowaddr, 432239268Sgonzo bus_addr_t highaddr, bus_dma_filter_t *filter, 433239268Sgonzo void *filterarg, bus_size_t maxsize, int nsegments, 434239268Sgonzo bus_size_t maxsegsz, int flags, bus_dma_lock_t *lockfunc, 435239268Sgonzo void *lockfuncarg, bus_dma_tag_t *dmat) 436239268Sgonzo{ 437239268Sgonzo bus_dma_tag_t newtag; 438239268Sgonzo int error = 0; 439239268Sgonzo 440239268Sgonzo#if 0 441239268Sgonzo if (!parent) 442239268Sgonzo parent = arm_root_dma_tag; 443239268Sgonzo#endif 444239268Sgonzo 445239268Sgonzo /* Basic sanity checking */ 446239268Sgonzo if (boundary != 0 && boundary < maxsegsz) 447239268Sgonzo maxsegsz = boundary; 448239268Sgonzo 449239268Sgonzo /* Return a NULL tag on failure */ 450239268Sgonzo *dmat = NULL; 451239268Sgonzo 452239268Sgonzo if (maxsegsz == 0) { 453239268Sgonzo return (EINVAL); 454239268Sgonzo } 455239268Sgonzo 456239268Sgonzo newtag = (bus_dma_tag_t)malloc(sizeof(*newtag), M_DEVBUF, 457239268Sgonzo M_ZERO | M_NOWAIT); 458239268Sgonzo if (newtag == NULL) { 459239268Sgonzo CTR4(KTR_BUSDMA, "%s returned tag %p tag flags 0x%x error %d", 460239268Sgonzo __func__, newtag, 0, error); 461239268Sgonzo return (ENOMEM); 462239268Sgonzo } 463239268Sgonzo 464239268Sgonzo newtag->parent = parent; 465239268Sgonzo newtag->alignment = alignment; 466239268Sgonzo newtag->boundary = boundary; 467239268Sgonzo newtag->lowaddr = trunc_page((vm_paddr_t)lowaddr) + (PAGE_SIZE - 1); 468239268Sgonzo newtag->highaddr = trunc_page((vm_paddr_t)highaddr) + 469239268Sgonzo (PAGE_SIZE - 1); 470239268Sgonzo newtag->filter = filter; 471239268Sgonzo newtag->filterarg = filterarg; 472239268Sgonzo newtag->maxsize = maxsize; 473239268Sgonzo newtag->nsegments = nsegments; 474239268Sgonzo newtag->maxsegsz = maxsegsz; 475239268Sgonzo newtag->flags = flags; 476239268Sgonzo newtag->ref_count = 1; /* Count ourself */ 477239268Sgonzo newtag->map_count = 0; 478239268Sgonzo newtag->ranges = bus_dma_get_range(); 479239268Sgonzo newtag->_nranges = bus_dma_get_range_nb(); 480239268Sgonzo if (lockfunc != NULL) { 481239268Sgonzo newtag->lockfunc = lockfunc; 482239268Sgonzo newtag->lockfuncarg = lockfuncarg; 483239268Sgonzo } else { 484239268Sgonzo newtag->lockfunc = dflt_lock; 485239268Sgonzo newtag->lockfuncarg = NULL; 486239268Sgonzo } 487239268Sgonzo 488239268Sgonzo /* Take into account any restrictions imposed by our parent tag */ 489239268Sgonzo if (parent != NULL) { 490239268Sgonzo newtag->lowaddr = MIN(parent->lowaddr, newtag->lowaddr); 491239268Sgonzo newtag->highaddr = MAX(parent->highaddr, newtag->highaddr); 492269794Sian newtag->alignment = MAX(parent->alignment, newtag->alignment); 493269794Sian newtag->flags |= parent->flags & BUS_DMA_COULD_BOUNCE; 494239268Sgonzo if (newtag->boundary == 0) 495239268Sgonzo newtag->boundary = parent->boundary; 496239268Sgonzo else if (parent->boundary != 0) 497239268Sgonzo newtag->boundary = MIN(parent->boundary, 498239268Sgonzo newtag->boundary); 499239268Sgonzo if (newtag->filter == NULL) { 500239268Sgonzo /* 501269794Sian * Short circuit to looking at our parent directly 502239268Sgonzo * since we have encapsulated all of its information 503239268Sgonzo */ 504239268Sgonzo newtag->filter = parent->filter; 505239268Sgonzo newtag->filterarg = parent->filterarg; 506239268Sgonzo newtag->parent = parent->parent; 507239268Sgonzo } 508239268Sgonzo if (newtag->parent != NULL) 509239268Sgonzo atomic_add_int(&parent->ref_count, 1); 510239268Sgonzo } 511239268Sgonzo 512269794Sian if (exclusion_bounce_check(newtag->lowaddr, newtag->highaddr)) 513269794Sian newtag->flags |= BUS_DMA_EXCL_BOUNCE; 514269794Sian if (alignment_bounce(newtag, 1)) 515269794Sian newtag->flags |= BUS_DMA_ALIGN_BOUNCE; 516239268Sgonzo 517259309Sian /* 518259309Sian * Any request can auto-bounce due to cacheline alignment, in addition 519259309Sian * to any alignment or boundary specifications in the tag, so if the 520259309Sian * ALLOCNOW flag is set, there's always work to do. 521259309Sian */ 522254061Scognet if ((flags & BUS_DMA_ALLOCNOW) != 0) { 523239268Sgonzo struct bounce_zone *bz; 524259309Sian /* 525259309Sian * Round size up to a full page, and add one more page because 526259309Sian * there can always be one more boundary crossing than the 527259309Sian * number of pages in a transfer. 528259309Sian */ 529259309Sian maxsize = roundup2(maxsize, PAGE_SIZE) + PAGE_SIZE; 530259309Sian 531239268Sgonzo if ((error = alloc_bounce_zone(newtag)) != 0) { 532239268Sgonzo free(newtag, M_DEVBUF); 533239268Sgonzo return (error); 534239268Sgonzo } 535239268Sgonzo bz = newtag->bounce_zone; 536239268Sgonzo 537239268Sgonzo if (ptoa(bz->total_bpages) < maxsize) { 538239268Sgonzo int pages; 539239268Sgonzo 540239268Sgonzo pages = atop(maxsize) - bz->total_bpages; 541239268Sgonzo 542239268Sgonzo /* Add pages to our bounce pool */ 543239268Sgonzo if (alloc_bounce_pages(newtag, pages) < pages) 544239268Sgonzo error = ENOMEM; 545239268Sgonzo } 546239268Sgonzo /* Performed initial allocation */ 547239268Sgonzo newtag->flags |= BUS_DMA_MIN_ALLOC_COMP; 548239268Sgonzo } else 549239268Sgonzo newtag->bounce_zone = NULL; 550239268Sgonzo 551239268Sgonzo if (error != 0) { 552239268Sgonzo free(newtag, M_DEVBUF); 553239268Sgonzo } else { 554269794Sian atomic_add_32(&tags_total, 1); 555239268Sgonzo *dmat = newtag; 556239268Sgonzo } 557239268Sgonzo CTR4(KTR_BUSDMA, "%s returned tag %p tag flags 0x%x error %d", 558239268Sgonzo __func__, newtag, (newtag != NULL ? newtag->flags : 0), error); 559239268Sgonzo return (error); 560239268Sgonzo} 561239268Sgonzo 562239268Sgonzoint 563239268Sgonzobus_dma_tag_destroy(bus_dma_tag_t dmat) 564239268Sgonzo{ 565239268Sgonzo bus_dma_tag_t dmat_copy; 566239268Sgonzo int error; 567239268Sgonzo 568239268Sgonzo error = 0; 569239268Sgonzo dmat_copy = dmat; 570239268Sgonzo 571239268Sgonzo if (dmat != NULL) { 572239268Sgonzo 573239268Sgonzo if (dmat->map_count != 0) { 574239268Sgonzo error = EBUSY; 575239268Sgonzo goto out; 576239268Sgonzo } 577239268Sgonzo 578239268Sgonzo while (dmat != NULL) { 579239268Sgonzo bus_dma_tag_t parent; 580239268Sgonzo 581239268Sgonzo parent = dmat->parent; 582239268Sgonzo atomic_subtract_int(&dmat->ref_count, 1); 583239268Sgonzo if (dmat->ref_count == 0) { 584269794Sian atomic_subtract_32(&tags_total, 1); 585239268Sgonzo free(dmat, M_DEVBUF); 586239268Sgonzo /* 587239268Sgonzo * Last reference count, so 588239268Sgonzo * release our reference 589239268Sgonzo * count on our parent. 590239268Sgonzo */ 591239268Sgonzo dmat = parent; 592239268Sgonzo } else 593239268Sgonzo dmat = NULL; 594239268Sgonzo } 595239268Sgonzo } 596239268Sgonzoout: 597239268Sgonzo CTR3(KTR_BUSDMA, "%s tag %p error %d", __func__, dmat_copy, error); 598239268Sgonzo return (error); 599239268Sgonzo} 600239268Sgonzo 601254061Scognetstatic int allocate_bz_and_pages(bus_dma_tag_t dmat, bus_dmamap_t mapp) 602254061Scognet{ 603254061Scognet struct bounce_zone *bz; 604254061Scognet int maxpages; 605254061Scognet int error; 606254061Scognet 607254061Scognet if (dmat->bounce_zone == NULL) 608254061Scognet if ((error = alloc_bounce_zone(dmat)) != 0) 609254061Scognet return (error); 610254061Scognet bz = dmat->bounce_zone; 611254061Scognet /* Initialize the new map */ 612254061Scognet STAILQ_INIT(&(mapp->bpages)); 613254061Scognet 614254061Scognet /* 615259309Sian * Attempt to add pages to our pool on a per-instance basis up to a sane 616259309Sian * limit. Even if the tag isn't flagged as COULD_BOUNCE due to 617259309Sian * alignment and boundary constraints, it could still auto-bounce due to 618259309Sian * cacheline alignment, which requires at most two bounce pages. 619254061Scognet */ 620254229Scognet if (dmat->flags & BUS_DMA_COULD_BOUNCE) 621254229Scognet maxpages = MAX_BPAGES; 622254229Scognet else 623259309Sian maxpages = 2 * bz->map_count; 624269794Sian if ((dmat->flags & BUS_DMA_MIN_ALLOC_COMP) == 0 || 625269794Sian (bz->map_count > 0 && bz->total_bpages < maxpages)) { 626254061Scognet int pages; 627254061Scognet 628259309Sian pages = atop(roundup2(dmat->maxsize, PAGE_SIZE)) + 1; 629254061Scognet pages = MIN(maxpages - bz->total_bpages, pages); 630259309Sian pages = MAX(pages, 2); 631254061Scognet if (alloc_bounce_pages(dmat, pages) < pages) 632254061Scognet return (ENOMEM); 633254061Scognet 634254061Scognet if ((dmat->flags & BUS_DMA_MIN_ALLOC_COMP) == 0) 635254061Scognet dmat->flags |= BUS_DMA_MIN_ALLOC_COMP; 636254061Scognet } 637254061Scognet bz->map_count++; 638254061Scognet return (0); 639254061Scognet} 640254061Scognet 641269794Sianstatic bus_dmamap_t 642269794Sianallocate_map(bus_dma_tag_t dmat, int mflags) 643269794Sian{ 644269794Sian int mapsize, segsize; 645269794Sian bus_dmamap_t map; 646269794Sian 647269794Sian /* 648269794Sian * Allocate the map. The map structure ends with an embedded 649269794Sian * variable-sized array of sync_list structures. Following that 650269794Sian * we allocate enough extra space to hold the array of bus_dma_segments. 651269794Sian */ 652269794Sian KASSERT(dmat->nsegments <= MAX_DMA_SEGMENTS, 653269794Sian ("cannot allocate %u dma segments (max is %u)", 654269794Sian dmat->nsegments, MAX_DMA_SEGMENTS)); 655269794Sian segsize = sizeof(struct bus_dma_segment) * dmat->nsegments; 656269794Sian mapsize = sizeof(*map) + sizeof(struct sync_list) * dmat->nsegments; 657269794Sian map = malloc(mapsize + segsize, M_DEVBUF, mflags | M_ZERO); 658269794Sian if (map == NULL) { 659269794Sian CTR3(KTR_BUSDMA, "%s: tag %p error %d", __func__, dmat, ENOMEM); 660269794Sian return (NULL); 661269794Sian } 662269794Sian map->segments = (bus_dma_segment_t *)((uintptr_t)map + mapsize); 663269794Sian return (map); 664269794Sian} 665269794Sian 666239268Sgonzo/* 667239268Sgonzo * Allocate a handle for mapping from kva/uva/physical 668239268Sgonzo * address space into bus device space. 669239268Sgonzo */ 670239268Sgonzoint 671239268Sgonzobus_dmamap_create(bus_dma_tag_t dmat, int flags, bus_dmamap_t *mapp) 672239268Sgonzo{ 673269794Sian bus_dmamap_t map; 674254061Scognet int error = 0; 675239268Sgonzo 676269794Sian *mapp = map = allocate_map(dmat, M_NOWAIT); 677269794Sian if (map == NULL) { 678239268Sgonzo CTR3(KTR_BUSDMA, "%s: tag %p error %d", __func__, dmat, ENOMEM); 679239268Sgonzo return (ENOMEM); 680239268Sgonzo } 681239268Sgonzo 682239268Sgonzo /* 683269794Sian * Bouncing might be required if the driver asks for an exclusion 684269794Sian * region, a data alignment that is stricter than 1, or DMA that begins 685269794Sian * or ends with a partial cacheline. Whether bouncing will actually 686269794Sian * happen can't be known until mapping time, but we need to pre-allocate 687269794Sian * resources now because we might not be allowed to at mapping time. 688239268Sgonzo */ 689269794Sian error = allocate_bz_and_pages(dmat, map); 690254061Scognet if (error != 0) { 691269794Sian free(map, M_DEVBUF); 692254061Scognet *mapp = NULL; 693254061Scognet return (error); 694239268Sgonzo } 695269794Sian if (map->flags & DMAMAP_COHERENT) 696269794Sian atomic_add_32(&maps_coherent, 1); 697269794Sian atomic_add_32(&maps_total, 1); 698269794Sian return (0); 699239268Sgonzo} 700239268Sgonzo 701239268Sgonzo/* 702239268Sgonzo * Destroy a handle for mapping from kva/uva/physical 703239268Sgonzo * address space into bus device space. 704239268Sgonzo */ 705239268Sgonzoint 706239268Sgonzobus_dmamap_destroy(bus_dma_tag_t dmat, bus_dmamap_t map) 707239268Sgonzo{ 708246713Skib if (STAILQ_FIRST(&map->bpages) != NULL || map->sync_count != 0) { 709239268Sgonzo CTR3(KTR_BUSDMA, "%s: tag %p error %d", 710239268Sgonzo __func__, dmat, EBUSY); 711239268Sgonzo return (EBUSY); 712239268Sgonzo } 713239268Sgonzo if (dmat->bounce_zone) 714239268Sgonzo dmat->bounce_zone->map_count--; 715269794Sian if (map->flags & DMAMAP_COHERENT) 716269794Sian atomic_subtract_32(&maps_coherent, 1); 717269794Sian atomic_subtract_32(&maps_total, 1); 718239268Sgonzo free(map, M_DEVBUF); 719239268Sgonzo dmat->map_count--; 720239268Sgonzo CTR2(KTR_BUSDMA, "%s: tag %p error 0", __func__, dmat); 721239268Sgonzo return (0); 722239268Sgonzo} 723239268Sgonzo 724239268Sgonzo 725239268Sgonzo/* 726239268Sgonzo * Allocate a piece of memory that can be efficiently mapped into 727239268Sgonzo * bus device space based on the constraints lited in the dma tag. 728239268Sgonzo * A dmamap to for use with dmamap_load is also allocated. 729239268Sgonzo */ 730239268Sgonzoint 731239268Sgonzobus_dmamem_alloc(bus_dma_tag_t dmat, void** vaddr, int flags, 732239268Sgonzo bus_dmamap_t *mapp) 733239268Sgonzo{ 734244469Scognet busdma_bufalloc_t ba; 735244469Scognet struct busdma_bufzone *bufzone; 736269794Sian bus_dmamap_t map; 737244469Scognet vm_memattr_t memattr; 738244469Scognet int mflags; 739239268Sgonzo 740239268Sgonzo if (flags & BUS_DMA_NOWAIT) 741239268Sgonzo mflags = M_NOWAIT; 742239268Sgonzo else 743239268Sgonzo mflags = M_WAITOK; 744269794Sian if (flags & BUS_DMA_ZERO) 745269794Sian mflags |= M_ZERO; 746239268Sgonzo 747269794Sian *mapp = map = allocate_map(dmat, mflags); 748269794Sian if (map == NULL) { 749239268Sgonzo CTR4(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d", 750239268Sgonzo __func__, dmat, dmat->flags, ENOMEM); 751239268Sgonzo return (ENOMEM); 752239268Sgonzo } 753269794Sian map->flags = DMAMAP_DMAMEM_ALLOC; 754239268Sgonzo 755269794Sian /* Choose a busdma buffer allocator based on memory type flags. */ 756244469Scognet if (flags & BUS_DMA_COHERENT) { 757244469Scognet memattr = VM_MEMATTR_UNCACHEABLE; 758244469Scognet ba = coherent_allocator; 759269794Sian map->flags |= DMAMAP_COHERENT; 760244469Scognet } else { 761244469Scognet memattr = VM_MEMATTR_DEFAULT; 762244469Scognet ba = standard_allocator; 763244469Scognet } 764239268Sgonzo 765244469Scognet /* 766244469Scognet * Try to find a bufzone in the allocator that holds a cache of buffers 767244469Scognet * of the right size for this request. If the buffer is too big to be 768244469Scognet * held in the allocator cache, this returns NULL. 769239268Sgonzo */ 770244469Scognet bufzone = busdma_bufalloc_findzone(ba, dmat->maxsize); 771244469Scognet 772244469Scognet /* 773244469Scognet * Allocate the buffer from the uma(9) allocator if... 774244469Scognet * - It's small enough to be in the allocator (bufzone not NULL). 775244469Scognet * - The alignment constraint isn't larger than the allocation size 776244469Scognet * (the allocator aligns buffers to their size boundaries). 777244469Scognet * - There's no need to handle lowaddr/highaddr exclusion zones. 778244469Scognet * else allocate non-contiguous pages if... 779244469Scognet * - The page count that could get allocated doesn't exceed nsegments. 780244469Scognet * - The alignment constraint isn't larger than a page boundary. 781244469Scognet * - There are no boundary-crossing constraints. 782244469Scognet * else allocate a block of contiguous pages because one or more of the 783244469Scognet * constraints is something that only the contig allocator can fulfill. 784244469Scognet */ 785244469Scognet if (bufzone != NULL && dmat->alignment <= bufzone->size && 786269794Sian !exclusion_bounce(dmat)) { 787244469Scognet *vaddr = uma_zalloc(bufzone->umazone, mflags); 788244469Scognet } else if (dmat->nsegments >= btoc(dmat->maxsize) && 789244469Scognet dmat->alignment <= PAGE_SIZE && dmat->boundary == 0) { 790254025Sjeff *vaddr = (void *)kmem_alloc_attr(kernel_arena, dmat->maxsize, 791244469Scognet mflags, 0, dmat->lowaddr, memattr); 792239268Sgonzo } else { 793254025Sjeff *vaddr = (void *)kmem_alloc_contig(kernel_arena, dmat->maxsize, 794244469Scognet mflags, 0, dmat->lowaddr, dmat->alignment, dmat->boundary, 795244469Scognet memattr); 796239268Sgonzo } 797244469Scognet 798244469Scognet 799239268Sgonzo if (*vaddr == NULL) { 800239268Sgonzo CTR4(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d", 801239268Sgonzo __func__, dmat, dmat->flags, ENOMEM); 802269794Sian free(map, M_DEVBUF); 803239268Sgonzo *mapp = NULL; 804239268Sgonzo return (ENOMEM); 805239268Sgonzo } else if ((uintptr_t)*vaddr & (dmat->alignment - 1)) { 806239268Sgonzo printf("bus_dmamem_alloc failed to align memory properly.\n"); 807239268Sgonzo } 808269794Sian if (map->flags & DMAMAP_COHERENT) 809269794Sian atomic_add_32(&maps_coherent, 1); 810269794Sian atomic_add_32(&maps_dmamem, 1); 811269794Sian atomic_add_32(&maps_total, 1); 812239268Sgonzo dmat->map_count++; 813239268Sgonzo 814239268Sgonzo CTR4(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d", 815239268Sgonzo __func__, dmat, dmat->flags, 0); 816239268Sgonzo return (0); 817239268Sgonzo} 818239268Sgonzo 819239268Sgonzo/* 820239268Sgonzo * Free a piece of memory and it's allociated dmamap, that was allocated 821239268Sgonzo * via bus_dmamem_alloc. Make the same choice for free/contigfree. 822239268Sgonzo */ 823239268Sgonzovoid 824239268Sgonzobus_dmamem_free(bus_dma_tag_t dmat, void *vaddr, bus_dmamap_t map) 825239268Sgonzo{ 826244469Scognet struct busdma_bufzone *bufzone; 827244469Scognet busdma_bufalloc_t ba; 828239268Sgonzo 829244469Scognet if (map->flags & DMAMAP_COHERENT) 830244469Scognet ba = coherent_allocator; 831244469Scognet else 832244469Scognet ba = standard_allocator; 833244469Scognet 834244469Scognet /* Be careful not to access map from here on. */ 835244469Scognet 836244469Scognet bufzone = busdma_bufalloc_findzone(ba, dmat->maxsize); 837244469Scognet 838244469Scognet if (bufzone != NULL && dmat->alignment <= bufzone->size && 839269794Sian !exclusion_bounce(dmat)) 840244469Scognet uma_zfree(bufzone->umazone, vaddr); 841244469Scognet else 842254025Sjeff kmem_free(kernel_arena, (vm_offset_t)vaddr, dmat->maxsize); 843244469Scognet 844239268Sgonzo dmat->map_count--; 845269794Sian if (map->flags & DMAMAP_COHERENT) 846269794Sian atomic_subtract_32(&maps_coherent, 1); 847269794Sian atomic_subtract_32(&maps_total, 1); 848269794Sian atomic_subtract_32(&maps_dmamem, 1); 849239268Sgonzo free(map, M_DEVBUF); 850239268Sgonzo CTR3(KTR_BUSDMA, "%s: tag %p flags 0x%x", __func__, dmat, dmat->flags); 851239268Sgonzo} 852239268Sgonzo 853246713Skibstatic void 854246713Skib_bus_dmamap_count_phys(bus_dma_tag_t dmat, bus_dmamap_t map, vm_paddr_t buf, 855246713Skib bus_size_t buflen, int flags) 856246713Skib{ 857246713Skib bus_addr_t curaddr; 858246713Skib bus_size_t sgsize; 859246713Skib 860246713Skib if (map->pagesneeded == 0) { 861246713Skib CTR5(KTR_BUSDMA, "lowaddr= %d, boundary= %d, alignment= %d" 862246713Skib " map= %p, pagesneeded= %d", 863246713Skib dmat->lowaddr, dmat->boundary, dmat->alignment, 864246713Skib map, map->pagesneeded); 865246713Skib /* 866246713Skib * Count the number of bounce pages 867246713Skib * needed in order to complete this transfer 868246713Skib */ 869246713Skib curaddr = buf; 870246713Skib while (buflen != 0) { 871246713Skib sgsize = MIN(buflen, dmat->maxsegsz); 872269794Sian if (must_bounce(dmat, map, curaddr, sgsize) != 0) { 873246713Skib sgsize = MIN(sgsize, PAGE_SIZE); 874246713Skib map->pagesneeded++; 875246713Skib } 876246713Skib curaddr += sgsize; 877246713Skib buflen -= sgsize; 878246713Skib } 879246713Skib CTR1(KTR_BUSDMA, "pagesneeded= %d", map->pagesneeded); 880246713Skib } 881246713Skib} 882246713Skib 883246713Skibstatic void 884239268Sgonzo_bus_dmamap_count_pages(bus_dma_tag_t dmat, bus_dmamap_t map, 885239268Sgonzo void *buf, bus_size_t buflen, int flags) 886239268Sgonzo{ 887239268Sgonzo vm_offset_t vaddr; 888239268Sgonzo vm_offset_t vendaddr; 889239268Sgonzo bus_addr_t paddr; 890239268Sgonzo 891239268Sgonzo if (map->pagesneeded == 0) { 892239268Sgonzo CTR5(KTR_BUSDMA, "lowaddr= %d, boundary= %d, alignment= %d" 893239268Sgonzo " map= %p, pagesneeded= %d", 894239268Sgonzo dmat->lowaddr, dmat->boundary, dmat->alignment, 895239268Sgonzo map, map->pagesneeded); 896239268Sgonzo /* 897239268Sgonzo * Count the number of bounce pages 898239268Sgonzo * needed in order to complete this transfer 899239268Sgonzo */ 900239268Sgonzo vaddr = (vm_offset_t)buf; 901239268Sgonzo vendaddr = (vm_offset_t)buf + buflen; 902239268Sgonzo 903239268Sgonzo while (vaddr < vendaddr) { 904246713Skib if (__predict_true(map->pmap == kernel_pmap)) 905239268Sgonzo paddr = pmap_kextract(vaddr); 906239268Sgonzo else 907239268Sgonzo paddr = pmap_extract(map->pmap, vaddr); 908269794Sian if (must_bounce(dmat, map, paddr, 909269794Sian min(vendaddr - vaddr, (PAGE_SIZE - ((vm_offset_t)vaddr & 910269794Sian PAGE_MASK)))) != 0) { 911239268Sgonzo map->pagesneeded++; 912239268Sgonzo } 913239268Sgonzo vaddr += (PAGE_SIZE - ((vm_offset_t)vaddr & PAGE_MASK)); 914239268Sgonzo 915239268Sgonzo } 916239268Sgonzo CTR1(KTR_BUSDMA, "pagesneeded= %d", map->pagesneeded); 917239268Sgonzo } 918246713Skib} 919239268Sgonzo 920246713Skibstatic int 921246713Skib_bus_dmamap_reserve_pages(bus_dma_tag_t dmat, bus_dmamap_t map, int flags) 922246713Skib{ 923246713Skib 924239268Sgonzo /* Reserve Necessary Bounce Pages */ 925246713Skib mtx_lock(&bounce_lock); 926246713Skib if (flags & BUS_DMA_NOWAIT) { 927246713Skib if (reserve_bounce_pages(dmat, map, 0) != 0) { 928246713Skib map->pagesneeded = 0; 929246713Skib mtx_unlock(&bounce_lock); 930246713Skib return (ENOMEM); 931239268Sgonzo } 932246713Skib } else { 933246713Skib if (reserve_bounce_pages(dmat, map, 1) != 0) { 934246713Skib /* Queue us for resources */ 935246713Skib STAILQ_INSERT_TAIL(&bounce_map_waitinglist, map, links); 936246713Skib mtx_unlock(&bounce_lock); 937246713Skib return (EINPROGRESS); 938246713Skib } 939239268Sgonzo } 940246713Skib mtx_unlock(&bounce_lock); 941239268Sgonzo 942239268Sgonzo return (0); 943239268Sgonzo} 944239268Sgonzo 945239268Sgonzo/* 946246713Skib * Add a single contiguous physical range to the segment list. 947246713Skib */ 948246713Skibstatic int 949246713Skib_bus_dmamap_addseg(bus_dma_tag_t dmat, bus_dmamap_t map, bus_addr_t curaddr, 950246713Skib bus_size_t sgsize, bus_dma_segment_t *segs, int *segp) 951246713Skib{ 952246713Skib bus_addr_t baddr, bmask; 953246713Skib int seg; 954246713Skib 955246713Skib /* 956246713Skib * Make sure we don't cross any boundaries. 957246713Skib */ 958246713Skib bmask = ~(dmat->boundary - 1); 959246713Skib if (dmat->boundary > 0) { 960246713Skib baddr = (curaddr + dmat->boundary) & bmask; 961246713Skib if (sgsize > (baddr - curaddr)) 962246713Skib sgsize = (baddr - curaddr); 963246713Skib } 964246713Skib 965246713Skib if (dmat->ranges) { 966246713Skib struct arm32_dma_range *dr; 967246713Skib 968246713Skib dr = _bus_dma_inrange(dmat->ranges, dmat->_nranges, 969246713Skib curaddr); 970246713Skib if (dr == NULL) { 971246713Skib _bus_dmamap_unload(dmat, map); 972246881Sian return (0); 973246713Skib } 974246713Skib /* 975246713Skib * In a valid DMA range. Translate the physical 976246713Skib * memory address to an address in the DMA window. 977246713Skib */ 978246713Skib curaddr = (curaddr - dr->dr_sysbase) + dr->dr_busbase; 979246713Skib } 980246713Skib 981246713Skib /* 982246713Skib * Insert chunk into a segment, coalescing with 983246713Skib * previous segment if possible. 984246713Skib */ 985246713Skib seg = *segp; 986246713Skib if (seg == -1) { 987246713Skib seg = 0; 988246713Skib segs[seg].ds_addr = curaddr; 989246713Skib segs[seg].ds_len = sgsize; 990246713Skib } else { 991246713Skib if (curaddr == segs[seg].ds_addr + segs[seg].ds_len && 992246713Skib (segs[seg].ds_len + sgsize) <= dmat->maxsegsz && 993246713Skib (dmat->boundary == 0 || 994246713Skib (segs[seg].ds_addr & bmask) == (curaddr & bmask))) 995246713Skib segs[seg].ds_len += sgsize; 996246713Skib else { 997246713Skib if (++seg >= dmat->nsegments) 998246713Skib return (0); 999246713Skib segs[seg].ds_addr = curaddr; 1000246713Skib segs[seg].ds_len = sgsize; 1001246713Skib } 1002246713Skib } 1003246713Skib *segp = seg; 1004246713Skib return (sgsize); 1005246713Skib} 1006246713Skib 1007246713Skib/* 1008246713Skib * Utility function to load a physical buffer. segp contains 1009239268Sgonzo * the starting segment on entrace, and the ending segment on exit. 1010239268Sgonzo */ 1011246713Skibint 1012246713Skib_bus_dmamap_load_phys(bus_dma_tag_t dmat, 1013246713Skib bus_dmamap_t map, 1014246713Skib vm_paddr_t buf, bus_size_t buflen, 1015246713Skib int flags, 1016246713Skib bus_dma_segment_t *segs, 1017246713Skib int *segp) 1018246713Skib{ 1019246713Skib bus_addr_t curaddr; 1020246713Skib bus_size_t sgsize; 1021246713Skib int error; 1022246713Skib 1023246713Skib if (segs == NULL) 1024269794Sian segs = map->segments; 1025246713Skib 1026269794Sian maploads_total++; 1027269794Sian maploads_physmem++; 1028269794Sian 1029269794Sian if (might_bounce(dmat, map, buflen, buflen)) { 1030246713Skib _bus_dmamap_count_phys(dmat, map, buf, buflen, flags); 1031246713Skib if (map->pagesneeded != 0) { 1032269794Sian maploads_bounced++; 1033246713Skib error = _bus_dmamap_reserve_pages(dmat, map, flags); 1034246713Skib if (error) 1035246713Skib return (error); 1036246713Skib } 1037246713Skib } 1038246713Skib 1039246713Skib while (buflen > 0) { 1040246713Skib curaddr = buf; 1041246713Skib sgsize = MIN(buflen, dmat->maxsegsz); 1042269794Sian if (map->pagesneeded != 0 && must_bounce(dmat, map, curaddr, 1043269794Sian sgsize)) { 1044246713Skib sgsize = MIN(sgsize, PAGE_SIZE); 1045246713Skib curaddr = add_bounce_page(dmat, map, 0, curaddr, 1046246713Skib sgsize); 1047246713Skib } 1048246713Skib sgsize = _bus_dmamap_addseg(dmat, map, curaddr, sgsize, segs, 1049246713Skib segp); 1050246713Skib if (sgsize == 0) 1051246713Skib break; 1052246713Skib buf += sgsize; 1053246713Skib buflen -= sgsize; 1054246713Skib } 1055246713Skib 1056246713Skib /* 1057246713Skib * Did we fit? 1058246713Skib */ 1059246713Skib if (buflen != 0) { 1060246713Skib _bus_dmamap_unload(dmat, map); 1061246713Skib return (EFBIG); /* XXX better return value here? */ 1062246713Skib } 1063246713Skib return (0); 1064246713Skib} 1065246713Skib 1066259510Skibint 1067259510Skib_bus_dmamap_load_ma(bus_dma_tag_t dmat, bus_dmamap_t map, 1068259510Skib struct vm_page **ma, bus_size_t tlen, int ma_offs, int flags, 1069259510Skib bus_dma_segment_t *segs, int *segp) 1070259510Skib{ 1071259510Skib 1072259510Skib return (bus_dmamap_load_ma_triv(dmat, map, ma, tlen, ma_offs, flags, 1073259510Skib segs, segp)); 1074259510Skib} 1075259510Skib 1076246713Skib/* 1077246713Skib * Utility function to load a linear buffer. segp contains 1078246713Skib * the starting segment on entrace, and the ending segment on exit. 1079246713Skib */ 1080246713Skibint 1081239268Sgonzo_bus_dmamap_load_buffer(bus_dma_tag_t dmat, 1082239268Sgonzo bus_dmamap_t map, 1083239268Sgonzo void *buf, bus_size_t buflen, 1084246713Skib pmap_t pmap, 1085239268Sgonzo int flags, 1086239268Sgonzo bus_dma_segment_t *segs, 1087246713Skib int *segp) 1088239268Sgonzo{ 1089239268Sgonzo bus_size_t sgsize; 1090246713Skib bus_addr_t curaddr; 1091239268Sgonzo vm_offset_t vaddr; 1092239268Sgonzo struct sync_list *sl; 1093246713Skib int error; 1094239268Sgonzo 1095269794Sian maploads_total++; 1096269794Sian if (map->flags & DMAMAP_COHERENT) 1097269794Sian maploads_coherent++; 1098269794Sian if (map->flags & DMAMAP_DMAMEM_ALLOC) 1099269794Sian maploads_dmamem++; 1100269794Sian 1101246713Skib if (segs == NULL) 1102269794Sian segs = map->segments; 1103246713Skib 1104269794Sian if (flags & BUS_DMA_LOAD_MBUF) { 1105269794Sian maploads_mbuf++; 1106269794Sian map->flags |= DMAMAP_MBUF; 1107269794Sian } 1108269794Sian 1109246859Sian map->pmap = pmap; 1110246859Sian 1111269794Sian if (might_bounce(dmat, map, (bus_addr_t)buf, buflen)) { 1112246713Skib _bus_dmamap_count_pages(dmat, map, buf, buflen, flags); 1113246713Skib if (map->pagesneeded != 0) { 1114269794Sian maploads_bounced++; 1115246713Skib error = _bus_dmamap_reserve_pages(dmat, map, flags); 1116246713Skib if (error) 1117246713Skib return (error); 1118246713Skib } 1119239268Sgonzo } 1120239268Sgonzo 1121239268Sgonzo sl = NULL; 1122239268Sgonzo vaddr = (vm_offset_t)buf; 1123239268Sgonzo 1124246713Skib while (buflen > 0) { 1125239268Sgonzo /* 1126239268Sgonzo * Get the physical address for this segment. 1127239268Sgonzo */ 1128246713Skib if (__predict_true(map->pmap == kernel_pmap)) 1129239268Sgonzo curaddr = pmap_kextract(vaddr); 1130239268Sgonzo else 1131239268Sgonzo curaddr = pmap_extract(map->pmap, vaddr); 1132239268Sgonzo 1133239268Sgonzo /* 1134239268Sgonzo * Compute the segment size, and adjust counts. 1135239268Sgonzo */ 1136239268Sgonzo sgsize = PAGE_SIZE - ((u_long)curaddr & PAGE_MASK); 1137239268Sgonzo if (sgsize > dmat->maxsegsz) 1138239268Sgonzo sgsize = dmat->maxsegsz; 1139239268Sgonzo if (buflen < sgsize) 1140239268Sgonzo sgsize = buflen; 1141239268Sgonzo 1142269794Sian if (map->pagesneeded != 0 && must_bounce(dmat, map, curaddr, 1143269794Sian sgsize)) { 1144246713Skib curaddr = add_bounce_page(dmat, map, vaddr, curaddr, 1145246713Skib sgsize); 1146239268Sgonzo } else { 1147246713Skib sl = &map->slist[map->sync_count - 1]; 1148246713Skib if (map->sync_count == 0 || 1149247776Scognet#ifdef ARM_L2_PIPT 1150247776Scognet curaddr != sl->busaddr + sl->datacount || 1151247776Scognet#endif 1152246713Skib vaddr != sl->vaddr + sl->datacount) { 1153246713Skib if (++map->sync_count > dmat->nsegments) 1154246713Skib goto cleanup; 1155246713Skib sl++; 1156246713Skib sl->vaddr = vaddr; 1157246713Skib sl->datacount = sgsize; 1158246713Skib sl->busaddr = curaddr; 1159246713Skib } else 1160246713Skib sl->datacount += sgsize; 1161239268Sgonzo } 1162246713Skib sgsize = _bus_dmamap_addseg(dmat, map, curaddr, sgsize, segs, 1163246713Skib segp); 1164246713Skib if (sgsize == 0) 1165246713Skib break; 1166239268Sgonzo vaddr += sgsize; 1167239268Sgonzo buflen -= sgsize; 1168239268Sgonzo } 1169239268Sgonzo 1170239268Sgonzocleanup: 1171239268Sgonzo /* 1172239268Sgonzo * Did we fit? 1173239268Sgonzo */ 1174239268Sgonzo if (buflen != 0) { 1175239268Sgonzo _bus_dmamap_unload(dmat, map); 1176246713Skib return (EFBIG); /* XXX better return value here? */ 1177239268Sgonzo } 1178239268Sgonzo return (0); 1179239268Sgonzo} 1180239268Sgonzo 1181246713Skib 1182246713Skibvoid 1183246713Skib__bus_dmamap_waitok(bus_dma_tag_t dmat, bus_dmamap_t map, 1184246713Skib struct memdesc *mem, bus_dmamap_callback_t *callback, 1185246713Skib void *callback_arg) 1186239268Sgonzo{ 1187239268Sgonzo 1188246713Skib map->mem = *mem; 1189246713Skib map->dmat = dmat; 1190239268Sgonzo map->callback = callback; 1191239268Sgonzo map->callback_arg = callback_arg; 1192239268Sgonzo} 1193239268Sgonzo 1194246713Skibbus_dma_segment_t * 1195246713Skib_bus_dmamap_complete(bus_dma_tag_t dmat, bus_dmamap_t map, 1196246713Skib bus_dma_segment_t *segs, int nsegs, int error) 1197239268Sgonzo{ 1198239268Sgonzo 1199246713Skib if (segs == NULL) 1200269794Sian segs = map->segments; 1201246713Skib return (segs); 1202239268Sgonzo} 1203239268Sgonzo 1204239268Sgonzo/* 1205239268Sgonzo * Release the mapping held by map. 1206239268Sgonzo */ 1207239268Sgonzovoid 1208239268Sgonzo_bus_dmamap_unload(bus_dma_tag_t dmat, bus_dmamap_t map) 1209239268Sgonzo{ 1210239268Sgonzo struct bounce_page *bpage; 1211239268Sgonzo struct bounce_zone *bz; 1212239268Sgonzo 1213239268Sgonzo if ((bz = dmat->bounce_zone) != NULL) { 1214239268Sgonzo while ((bpage = STAILQ_FIRST(&map->bpages)) != NULL) { 1215239268Sgonzo STAILQ_REMOVE_HEAD(&map->bpages, links); 1216239268Sgonzo free_bounce_page(dmat, bpage); 1217239268Sgonzo } 1218239268Sgonzo 1219239268Sgonzo bz = dmat->bounce_zone; 1220239268Sgonzo bz->free_bpages += map->pagesreserved; 1221239268Sgonzo bz->reserved_bpages -= map->pagesreserved; 1222239268Sgonzo map->pagesreserved = 0; 1223239268Sgonzo map->pagesneeded = 0; 1224239268Sgonzo } 1225246713Skib map->sync_count = 0; 1226269794Sian map->flags &= ~DMAMAP_MBUF; 1227239268Sgonzo} 1228239268Sgonzo 1229239268Sgonzo#ifdef notyetbounceuser 1230239268Sgonzo /* If busdma uses user pages, then the interrupt handler could 1231239268Sgonzo * be use the kernel vm mapping. Both bounce pages and sync list 1232239268Sgonzo * do not cross page boundaries. 1233239268Sgonzo * Below is a rough sequence that a person would do to fix the 1234239268Sgonzo * user page reference in the kernel vmspace. This would be 1235239268Sgonzo * done in the dma post routine. 1236239268Sgonzo */ 1237239268Sgonzovoid 1238239268Sgonzo_bus_dmamap_fix_user(vm_offset_t buf, bus_size_t len, 1239239268Sgonzo pmap_t pmap, int op) 1240239268Sgonzo{ 1241239268Sgonzo bus_size_t sgsize; 1242239268Sgonzo bus_addr_t curaddr; 1243239268Sgonzo vm_offset_t va; 1244239268Sgonzo 1245239268Sgonzo /* each synclist entry is contained within a single page. 1246239268Sgonzo * 1247239268Sgonzo * this would be needed if BUS_DMASYNC_POSTxxxx was implemented 1248239268Sgonzo */ 1249239268Sgonzo curaddr = pmap_extract(pmap, buf); 1250239268Sgonzo va = pmap_dma_map(curaddr); 1251239268Sgonzo switch (op) { 1252239268Sgonzo case SYNC_USER_INV: 1253239268Sgonzo cpu_dcache_wb_range(va, sgsize); 1254239268Sgonzo break; 1255239268Sgonzo 1256239268Sgonzo case SYNC_USER_COPYTO: 1257239268Sgonzo bcopy((void *)va, (void *)bounce, sgsize); 1258239268Sgonzo break; 1259239268Sgonzo 1260239268Sgonzo case SYNC_USER_COPYFROM: 1261239268Sgonzo bcopy((void *) bounce, (void *)va, sgsize); 1262239268Sgonzo break; 1263239268Sgonzo 1264239268Sgonzo default: 1265239268Sgonzo break; 1266239268Sgonzo } 1267239268Sgonzo 1268239268Sgonzo pmap_dma_unmap(va); 1269239268Sgonzo} 1270239268Sgonzo#endif 1271239268Sgonzo 1272239268Sgonzo#ifdef ARM_L2_PIPT 1273239268Sgonzo#define l2cache_wb_range(va, pa, size) cpu_l2cache_wb_range(pa, size) 1274239268Sgonzo#define l2cache_wbinv_range(va, pa, size) cpu_l2cache_wbinv_range(pa, size) 1275239268Sgonzo#define l2cache_inv_range(va, pa, size) cpu_l2cache_inv_range(pa, size) 1276239268Sgonzo#else 1277239268Sgonzo#define l2cache_wb_range(va, pa, size) cpu_l2cache_wb_range(va, size) 1278239268Sgonzo#define l2cache_wbinv_range(va, pa, size) cpu_l2cache_wbinv_range(va, size) 1279243909Scognet#define l2cache_inv_range(va, pa, size) cpu_l2cache_inv_range(va, size) 1280239268Sgonzo#endif 1281239268Sgonzo 1282239268Sgonzovoid 1283239268Sgonzo_bus_dmamap_sync(bus_dma_tag_t dmat, bus_dmamap_t map, bus_dmasync_op_t op) 1284239268Sgonzo{ 1285239268Sgonzo struct bounce_page *bpage; 1286246713Skib struct sync_list *sl, *end; 1287248655Sian /* 1288248655Sian * If the buffer was from user space, it is possible that this is not 1289248655Sian * the same vm map, especially on a POST operation. It's not clear that 1290248655Sian * dma on userland buffers can work at all right now, certainly not if a 1291248655Sian * partial cacheline flush has to be handled. To be safe, until we're 1292248655Sian * able to test direct userland dma, panic on a map mismatch. 1293248655Sian */ 1294239268Sgonzo if ((bpage = STAILQ_FIRST(&map->bpages)) != NULL) { 1295248655Sian if (!pmap_dmap_iscurrent(map->pmap)) 1296248655Sian panic("_bus_dmamap_sync: wrong user map for bounce sync."); 1297239268Sgonzo /* Handle data bouncing. */ 1298239268Sgonzo CTR4(KTR_BUSDMA, "%s: tag %p tag flags 0x%x op 0x%x " 1299239268Sgonzo "performing bounce", __func__, dmat, dmat->flags, op); 1300239268Sgonzo 1301239268Sgonzo if (op & BUS_DMASYNC_PREWRITE) { 1302239268Sgonzo while (bpage != NULL) { 1303246713Skib if (bpage->datavaddr != 0) 1304246713Skib bcopy((void *)bpage->datavaddr, 1305269794Sian (void *)bpage->vaddr, 1306269794Sian bpage->datacount); 1307246713Skib else 1308246713Skib physcopyout(bpage->dataaddr, 1309269794Sian (void *)bpage->vaddr, 1310269794Sian bpage->datacount); 1311239268Sgonzo cpu_dcache_wb_range((vm_offset_t)bpage->vaddr, 1312239268Sgonzo bpage->datacount); 1313239268Sgonzo l2cache_wb_range((vm_offset_t)bpage->vaddr, 1314239268Sgonzo (vm_offset_t)bpage->busaddr, 1315239268Sgonzo bpage->datacount); 1316239268Sgonzo bpage = STAILQ_NEXT(bpage, links); 1317239268Sgonzo } 1318239268Sgonzo dmat->bounce_zone->total_bounced++; 1319239268Sgonzo } 1320239268Sgonzo 1321266159Sian if (op & BUS_DMASYNC_PREREAD) { 1322266159Sian bpage = STAILQ_FIRST(&map->bpages); 1323266159Sian while (bpage != NULL) { 1324266159Sian cpu_dcache_inv_range((vm_offset_t)bpage->vaddr, 1325266159Sian bpage->datacount); 1326266159Sian l2cache_inv_range((vm_offset_t)bpage->vaddr, 1327266159Sian (vm_offset_t)bpage->busaddr, 1328266159Sian bpage->datacount); 1329266159Sian bpage = STAILQ_NEXT(bpage, links); 1330266159Sian } 1331266159Sian } 1332239268Sgonzo if (op & BUS_DMASYNC_POSTREAD) { 1333239268Sgonzo while (bpage != NULL) { 1334239268Sgonzo vm_offset_t startv; 1335239268Sgonzo vm_paddr_t startp; 1336239268Sgonzo int len; 1337239268Sgonzo 1338239268Sgonzo startv = bpage->vaddr &~ arm_dcache_align_mask; 1339239268Sgonzo startp = bpage->busaddr &~ arm_dcache_align_mask; 1340239268Sgonzo len = bpage->datacount; 1341239268Sgonzo 1342239268Sgonzo if (startv != bpage->vaddr) 1343239268Sgonzo len += bpage->vaddr & arm_dcache_align_mask; 1344239268Sgonzo if (len & arm_dcache_align_mask) 1345239268Sgonzo len = (len - 1346239268Sgonzo (len & arm_dcache_align_mask)) + 1347239268Sgonzo arm_dcache_align; 1348239268Sgonzo cpu_dcache_inv_range(startv, len); 1349239268Sgonzo l2cache_inv_range(startv, startp, len); 1350246713Skib if (bpage->datavaddr != 0) 1351246713Skib bcopy((void *)bpage->vaddr, 1352269794Sian (void *)bpage->datavaddr, 1353269794Sian bpage->datacount); 1354246713Skib else 1355246713Skib physcopyin((void *)bpage->vaddr, 1356269794Sian bpage->dataaddr, 1357269794Sian bpage->datacount); 1358239268Sgonzo bpage = STAILQ_NEXT(bpage, links); 1359239268Sgonzo } 1360239268Sgonzo dmat->bounce_zone->total_bounced++; 1361239268Sgonzo } 1362239268Sgonzo } 1363244469Scognet if (map->flags & DMAMAP_COHERENT) 1364244469Scognet return; 1365239268Sgonzo 1366246713Skib if (map->sync_count != 0) { 1367248655Sian if (!pmap_dmap_iscurrent(map->pmap)) 1368248655Sian panic("_bus_dmamap_sync: wrong user map for sync."); 1369239268Sgonzo /* ARM caches are not self-snooping for dma */ 1370239268Sgonzo 1371246713Skib sl = &map->slist[0]; 1372246713Skib end = &map->slist[map->sync_count]; 1373239268Sgonzo CTR4(KTR_BUSDMA, "%s: tag %p tag flags 0x%x op 0x%x " 1374239268Sgonzo "performing sync", __func__, dmat, dmat->flags, op); 1375239268Sgonzo 1376239268Sgonzo switch (op) { 1377239268Sgonzo case BUS_DMASYNC_PREWRITE: 1378246713Skib while (sl != end) { 1379239268Sgonzo cpu_dcache_wb_range(sl->vaddr, sl->datacount); 1380239268Sgonzo l2cache_wb_range(sl->vaddr, sl->busaddr, 1381239268Sgonzo sl->datacount); 1382246713Skib sl++; 1383239268Sgonzo } 1384239268Sgonzo break; 1385239268Sgonzo 1386239268Sgonzo case BUS_DMASYNC_PREREAD: 1387246713Skib while (sl != end) { 1388254061Scognet cpu_dcache_inv_range(sl->vaddr, sl->datacount); 1389254061Scognet l2cache_inv_range(sl->vaddr, sl->busaddr, 1390254061Scognet sl->datacount); 1391246713Skib sl++; 1392239268Sgonzo } 1393239268Sgonzo break; 1394239268Sgonzo 1395239268Sgonzo case BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD: 1396246713Skib while (sl != end) { 1397239268Sgonzo cpu_dcache_wbinv_range(sl->vaddr, sl->datacount); 1398239268Sgonzo l2cache_wbinv_range(sl->vaddr, 1399239268Sgonzo sl->busaddr, sl->datacount); 1400246713Skib sl++; 1401239268Sgonzo } 1402239268Sgonzo break; 1403239268Sgonzo 1404259310Sian case BUS_DMASYNC_POSTREAD: 1405259310Sian case BUS_DMASYNC_POSTWRITE: 1406259310Sian case BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE: 1407259310Sian break; 1408239268Sgonzo default: 1409259310Sian panic("unsupported combination of sync operations: 0x%08x\n", op); 1410239268Sgonzo break; 1411239268Sgonzo } 1412239268Sgonzo } 1413239268Sgonzo} 1414239268Sgonzo 1415239268Sgonzostatic void 1416239268Sgonzoinit_bounce_pages(void *dummy __unused) 1417239268Sgonzo{ 1418239268Sgonzo 1419239268Sgonzo total_bpages = 0; 1420239268Sgonzo STAILQ_INIT(&bounce_zone_list); 1421239268Sgonzo STAILQ_INIT(&bounce_map_waitinglist); 1422239268Sgonzo STAILQ_INIT(&bounce_map_callbacklist); 1423239268Sgonzo mtx_init(&bounce_lock, "bounce pages lock", NULL, MTX_DEF); 1424239268Sgonzo} 1425239268SgonzoSYSINIT(bpages, SI_SUB_LOCK, SI_ORDER_ANY, init_bounce_pages, NULL); 1426239268Sgonzo 1427239268Sgonzostatic struct sysctl_ctx_list * 1428239268Sgonzobusdma_sysctl_tree(struct bounce_zone *bz) 1429239268Sgonzo{ 1430239268Sgonzo return (&bz->sysctl_tree); 1431239268Sgonzo} 1432239268Sgonzo 1433239268Sgonzostatic struct sysctl_oid * 1434239268Sgonzobusdma_sysctl_tree_top(struct bounce_zone *bz) 1435239268Sgonzo{ 1436239268Sgonzo return (bz->sysctl_tree_top); 1437239268Sgonzo} 1438239268Sgonzo 1439239268Sgonzostatic int 1440239268Sgonzoalloc_bounce_zone(bus_dma_tag_t dmat) 1441239268Sgonzo{ 1442239268Sgonzo struct bounce_zone *bz; 1443239268Sgonzo 1444239268Sgonzo /* Check to see if we already have a suitable zone */ 1445239268Sgonzo STAILQ_FOREACH(bz, &bounce_zone_list, links) { 1446269794Sian if ((dmat->alignment <= bz->alignment) && 1447269794Sian (dmat->lowaddr >= bz->lowaddr)) { 1448239268Sgonzo dmat->bounce_zone = bz; 1449239268Sgonzo return (0); 1450239268Sgonzo } 1451239268Sgonzo } 1452239268Sgonzo 1453239268Sgonzo if ((bz = (struct bounce_zone *)malloc(sizeof(*bz), M_DEVBUF, 1454239268Sgonzo M_NOWAIT | M_ZERO)) == NULL) 1455239268Sgonzo return (ENOMEM); 1456239268Sgonzo 1457239268Sgonzo STAILQ_INIT(&bz->bounce_page_list); 1458239268Sgonzo bz->free_bpages = 0; 1459239268Sgonzo bz->reserved_bpages = 0; 1460239268Sgonzo bz->active_bpages = 0; 1461239268Sgonzo bz->lowaddr = dmat->lowaddr; 1462239268Sgonzo bz->alignment = MAX(dmat->alignment, PAGE_SIZE); 1463239268Sgonzo bz->map_count = 0; 1464239268Sgonzo snprintf(bz->zoneid, 8, "zone%d", busdma_zonecount); 1465239268Sgonzo busdma_zonecount++; 1466239268Sgonzo snprintf(bz->lowaddrid, 18, "%#jx", (uintmax_t)bz->lowaddr); 1467239268Sgonzo STAILQ_INSERT_TAIL(&bounce_zone_list, bz, links); 1468239268Sgonzo dmat->bounce_zone = bz; 1469239268Sgonzo 1470239268Sgonzo sysctl_ctx_init(&bz->sysctl_tree); 1471239268Sgonzo bz->sysctl_tree_top = SYSCTL_ADD_NODE(&bz->sysctl_tree, 1472239268Sgonzo SYSCTL_STATIC_CHILDREN(_hw_busdma), OID_AUTO, bz->zoneid, 1473239268Sgonzo CTLFLAG_RD, 0, ""); 1474239268Sgonzo if (bz->sysctl_tree_top == NULL) { 1475239268Sgonzo sysctl_ctx_free(&bz->sysctl_tree); 1476239268Sgonzo return (0); /* XXX error code? */ 1477239268Sgonzo } 1478239268Sgonzo 1479239268Sgonzo SYSCTL_ADD_INT(busdma_sysctl_tree(bz), 1480239268Sgonzo SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO, 1481239268Sgonzo "total_bpages", CTLFLAG_RD, &bz->total_bpages, 0, 1482239268Sgonzo "Total bounce pages"); 1483239268Sgonzo SYSCTL_ADD_INT(busdma_sysctl_tree(bz), 1484239268Sgonzo SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO, 1485239268Sgonzo "free_bpages", CTLFLAG_RD, &bz->free_bpages, 0, 1486239268Sgonzo "Free bounce pages"); 1487239268Sgonzo SYSCTL_ADD_INT(busdma_sysctl_tree(bz), 1488239268Sgonzo SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO, 1489239268Sgonzo "reserved_bpages", CTLFLAG_RD, &bz->reserved_bpages, 0, 1490239268Sgonzo "Reserved bounce pages"); 1491239268Sgonzo SYSCTL_ADD_INT(busdma_sysctl_tree(bz), 1492239268Sgonzo SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO, 1493239268Sgonzo "active_bpages", CTLFLAG_RD, &bz->active_bpages, 0, 1494239268Sgonzo "Active bounce pages"); 1495239268Sgonzo SYSCTL_ADD_INT(busdma_sysctl_tree(bz), 1496239268Sgonzo SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO, 1497239268Sgonzo "total_bounced", CTLFLAG_RD, &bz->total_bounced, 0, 1498269794Sian "Total bounce requests (pages bounced)"); 1499239268Sgonzo SYSCTL_ADD_INT(busdma_sysctl_tree(bz), 1500239268Sgonzo SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO, 1501239268Sgonzo "total_deferred", CTLFLAG_RD, &bz->total_deferred, 0, 1502239268Sgonzo "Total bounce requests that were deferred"); 1503239268Sgonzo SYSCTL_ADD_STRING(busdma_sysctl_tree(bz), 1504239268Sgonzo SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO, 1505239268Sgonzo "lowaddr", CTLFLAG_RD, bz->lowaddrid, 0, ""); 1506239268Sgonzo SYSCTL_ADD_INT(busdma_sysctl_tree(bz), 1507239268Sgonzo SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO, 1508239268Sgonzo "alignment", CTLFLAG_RD, &bz->alignment, 0, ""); 1509239268Sgonzo 1510239268Sgonzo return (0); 1511239268Sgonzo} 1512239268Sgonzo 1513239268Sgonzostatic int 1514239268Sgonzoalloc_bounce_pages(bus_dma_tag_t dmat, u_int numpages) 1515239268Sgonzo{ 1516239268Sgonzo struct bounce_zone *bz; 1517239268Sgonzo int count; 1518239268Sgonzo 1519239268Sgonzo bz = dmat->bounce_zone; 1520239268Sgonzo count = 0; 1521239268Sgonzo while (numpages > 0) { 1522239268Sgonzo struct bounce_page *bpage; 1523239268Sgonzo 1524239268Sgonzo bpage = (struct bounce_page *)malloc(sizeof(*bpage), M_DEVBUF, 1525269794Sian M_NOWAIT | M_ZERO); 1526239268Sgonzo 1527239268Sgonzo if (bpage == NULL) 1528239268Sgonzo break; 1529239268Sgonzo bpage->vaddr = (vm_offset_t)contigmalloc(PAGE_SIZE, M_DEVBUF, 1530269794Sian M_NOWAIT, 0ul, bz->lowaddr, PAGE_SIZE, 0); 1531239268Sgonzo if (bpage->vaddr == 0) { 1532239268Sgonzo free(bpage, M_DEVBUF); 1533239268Sgonzo break; 1534239268Sgonzo } 1535239268Sgonzo bpage->busaddr = pmap_kextract(bpage->vaddr); 1536239268Sgonzo mtx_lock(&bounce_lock); 1537239268Sgonzo STAILQ_INSERT_TAIL(&bz->bounce_page_list, bpage, links); 1538239268Sgonzo total_bpages++; 1539239268Sgonzo bz->total_bpages++; 1540239268Sgonzo bz->free_bpages++; 1541239268Sgonzo mtx_unlock(&bounce_lock); 1542239268Sgonzo count++; 1543239268Sgonzo numpages--; 1544239268Sgonzo } 1545239268Sgonzo return (count); 1546239268Sgonzo} 1547239268Sgonzo 1548239268Sgonzostatic int 1549239268Sgonzoreserve_bounce_pages(bus_dma_tag_t dmat, bus_dmamap_t map, int commit) 1550239268Sgonzo{ 1551239268Sgonzo struct bounce_zone *bz; 1552239268Sgonzo int pages; 1553239268Sgonzo 1554239268Sgonzo mtx_assert(&bounce_lock, MA_OWNED); 1555239268Sgonzo bz = dmat->bounce_zone; 1556239268Sgonzo pages = MIN(bz->free_bpages, map->pagesneeded - map->pagesreserved); 1557239268Sgonzo if (commit == 0 && map->pagesneeded > (map->pagesreserved + pages)) 1558239268Sgonzo return (map->pagesneeded - (map->pagesreserved + pages)); 1559239268Sgonzo bz->free_bpages -= pages; 1560239268Sgonzo bz->reserved_bpages += pages; 1561239268Sgonzo map->pagesreserved += pages; 1562239268Sgonzo pages = map->pagesneeded - map->pagesreserved; 1563239268Sgonzo 1564239268Sgonzo return (pages); 1565239268Sgonzo} 1566239268Sgonzo 1567239268Sgonzostatic bus_addr_t 1568239268Sgonzoadd_bounce_page(bus_dma_tag_t dmat, bus_dmamap_t map, vm_offset_t vaddr, 1569246713Skib bus_addr_t addr, bus_size_t size) 1570239268Sgonzo{ 1571239268Sgonzo struct bounce_zone *bz; 1572239268Sgonzo struct bounce_page *bpage; 1573239268Sgonzo 1574239268Sgonzo KASSERT(dmat->bounce_zone != NULL, ("no bounce zone in dma tag")); 1575239268Sgonzo KASSERT(map != NULL, 1576239268Sgonzo ("add_bounce_page: bad map %p", map)); 1577239268Sgonzo 1578239268Sgonzo bz = dmat->bounce_zone; 1579239268Sgonzo if (map->pagesneeded == 0) 1580239268Sgonzo panic("add_bounce_page: map doesn't need any pages"); 1581239268Sgonzo map->pagesneeded--; 1582239268Sgonzo 1583239268Sgonzo if (map->pagesreserved == 0) 1584239268Sgonzo panic("add_bounce_page: map doesn't need any pages"); 1585239268Sgonzo map->pagesreserved--; 1586239268Sgonzo 1587239268Sgonzo mtx_lock(&bounce_lock); 1588239268Sgonzo bpage = STAILQ_FIRST(&bz->bounce_page_list); 1589239268Sgonzo if (bpage == NULL) 1590239268Sgonzo panic("add_bounce_page: free page list is empty"); 1591239268Sgonzo 1592239268Sgonzo STAILQ_REMOVE_HEAD(&bz->bounce_page_list, links); 1593239268Sgonzo bz->reserved_bpages--; 1594239268Sgonzo bz->active_bpages++; 1595239268Sgonzo mtx_unlock(&bounce_lock); 1596239268Sgonzo 1597239268Sgonzo if (dmat->flags & BUS_DMA_KEEP_PG_OFFSET) { 1598239268Sgonzo /* Page offset needs to be preserved. */ 1599239268Sgonzo bpage->vaddr |= vaddr & PAGE_MASK; 1600239268Sgonzo bpage->busaddr |= vaddr & PAGE_MASK; 1601239268Sgonzo } 1602239268Sgonzo bpage->datavaddr = vaddr; 1603246713Skib bpage->dataaddr = addr; 1604239268Sgonzo bpage->datacount = size; 1605239268Sgonzo STAILQ_INSERT_TAIL(&(map->bpages), bpage, links); 1606239268Sgonzo return (bpage->busaddr); 1607239268Sgonzo} 1608239268Sgonzo 1609239268Sgonzostatic void 1610239268Sgonzofree_bounce_page(bus_dma_tag_t dmat, struct bounce_page *bpage) 1611239268Sgonzo{ 1612239268Sgonzo struct bus_dmamap *map; 1613239268Sgonzo struct bounce_zone *bz; 1614239268Sgonzo 1615239268Sgonzo bz = dmat->bounce_zone; 1616239268Sgonzo bpage->datavaddr = 0; 1617239268Sgonzo bpage->datacount = 0; 1618239268Sgonzo if (dmat->flags & BUS_DMA_KEEP_PG_OFFSET) { 1619239268Sgonzo /* 1620239268Sgonzo * Reset the bounce page to start at offset 0. Other uses 1621239268Sgonzo * of this bounce page may need to store a full page of 1622239268Sgonzo * data and/or assume it starts on a page boundary. 1623239268Sgonzo */ 1624239268Sgonzo bpage->vaddr &= ~PAGE_MASK; 1625239268Sgonzo bpage->busaddr &= ~PAGE_MASK; 1626239268Sgonzo } 1627239268Sgonzo 1628239268Sgonzo mtx_lock(&bounce_lock); 1629239268Sgonzo STAILQ_INSERT_HEAD(&bz->bounce_page_list, bpage, links); 1630239268Sgonzo bz->free_bpages++; 1631239268Sgonzo bz->active_bpages--; 1632239268Sgonzo if ((map = STAILQ_FIRST(&bounce_map_waitinglist)) != NULL) { 1633239268Sgonzo if (reserve_bounce_pages(map->dmat, map, 1) == 0) { 1634239268Sgonzo STAILQ_REMOVE_HEAD(&bounce_map_waitinglist, links); 1635239268Sgonzo STAILQ_INSERT_TAIL(&bounce_map_callbacklist, 1636269794Sian map, links); 1637239268Sgonzo busdma_swi_pending = 1; 1638239268Sgonzo bz->total_deferred++; 1639239268Sgonzo swi_sched(vm_ih, 0); 1640239268Sgonzo } 1641239268Sgonzo } 1642239268Sgonzo mtx_unlock(&bounce_lock); 1643239268Sgonzo} 1644239268Sgonzo 1645239268Sgonzovoid 1646239268Sgonzobusdma_swi(void) 1647239268Sgonzo{ 1648239268Sgonzo bus_dma_tag_t dmat; 1649239268Sgonzo struct bus_dmamap *map; 1650239268Sgonzo 1651239268Sgonzo mtx_lock(&bounce_lock); 1652239268Sgonzo while ((map = STAILQ_FIRST(&bounce_map_callbacklist)) != NULL) { 1653239268Sgonzo STAILQ_REMOVE_HEAD(&bounce_map_callbacklist, links); 1654239268Sgonzo mtx_unlock(&bounce_lock); 1655239268Sgonzo dmat = map->dmat; 1656269794Sian dmat->lockfunc(dmat->lockfuncarg, BUS_DMA_LOCK); 1657246713Skib bus_dmamap_load_mem(map->dmat, map, &map->mem, map->callback, 1658269794Sian map->callback_arg, BUS_DMA_WAITOK); 1659269794Sian dmat->lockfunc(dmat->lockfuncarg, BUS_DMA_UNLOCK); 1660239268Sgonzo mtx_lock(&bounce_lock); 1661239268Sgonzo } 1662239268Sgonzo mtx_unlock(&bounce_lock); 1663239268Sgonzo} 1664