1263363Semaste//===-- RegisterContextLinux_x86_64.cpp ------------------------*- C++ -*-===// 2254721Semaste// 3254721Semaste// The LLVM Compiler Infrastructure 4254721Semaste// 5254721Semaste// This file is distributed under the University of Illinois Open Source 6254721Semaste// License. See LICENSE.TXT for details. 7254721Semaste// 8254721Semaste//===---------------------------------------------------------------------===// 9254721Semaste 10263363Semaste#include <vector> 11263363Semaste#include "RegisterContextPOSIX_x86.h" 12263363Semaste#include "RegisterContextLinux_i386.h" 13254721Semaste#include "RegisterContextLinux_x86_64.h" 14254721Semaste 15254721Semasteusing namespace lldb_private; 16263363Semasteusing namespace lldb; 17254721Semaste 18254721Semastetypedef struct _GPR 19254721Semaste{ 20254721Semaste uint64_t r15; 21254721Semaste uint64_t r14; 22254721Semaste uint64_t r13; 23254721Semaste uint64_t r12; 24254721Semaste uint64_t rbp; 25254721Semaste uint64_t rbx; 26254721Semaste uint64_t r11; 27254721Semaste uint64_t r10; 28254721Semaste uint64_t r9; 29254721Semaste uint64_t r8; 30254721Semaste uint64_t rax; 31254721Semaste uint64_t rcx; 32254721Semaste uint64_t rdx; 33254721Semaste uint64_t rsi; 34254721Semaste uint64_t rdi; 35254721Semaste uint64_t orig_ax; 36254721Semaste uint64_t rip; 37254721Semaste uint64_t cs; 38254721Semaste uint64_t rflags; 39254721Semaste uint64_t rsp; 40254721Semaste uint64_t ss; 41254721Semaste uint64_t fs_base; 42254721Semaste uint64_t gs_base; 43254721Semaste uint64_t ds; 44254721Semaste uint64_t es; 45254721Semaste uint64_t fs; 46254721Semaste uint64_t gs; 47254721Semaste} GPR; 48254721Semaste 49254721Semastestruct UserArea 50254721Semaste{ 51254721Semaste GPR gpr; // General purpose registers. 52254721Semaste int32_t fpvalid; // True if FPU is being used. 53254721Semaste int32_t pad0; 54254721Semaste FXSAVE i387; // General purpose floating point registers (see FPR for extended register sets). 55254721Semaste uint64_t tsize; // Text segment size. 56254721Semaste uint64_t dsize; // Data segment size. 57254721Semaste uint64_t ssize; // Stack segment size. 58254721Semaste uint64_t start_code; // VM address of text. 59254721Semaste uint64_t start_stack; // VM address of stack bottom (top in rsp). 60254721Semaste int64_t signal; // Signal causing core dump. 61254721Semaste int32_t reserved; // Unused. 62254721Semaste int32_t pad1; 63254721Semaste uint64_t ar0; // Location of GPR's. 64254721Semaste FXSAVE* fpstate; // Location of FPR's. 65254721Semaste uint64_t magic; // Identifier for core dumps. 66254721Semaste char u_comm[32]; // Command causing core dump. 67254721Semaste uint64_t u_debugreg[8]; // Debug registers (DR0 - DR7). 68254721Semaste uint64_t error_code; // CPU error code. 69254721Semaste uint64_t fault_address; // Control register CR3. 70254721Semaste}; 71254721Semaste 72263363Semaste#define DR_SIZE sizeof(UserArea::u_debugreg[0]) 73263363Semaste#define DR_OFFSET(reg_index) \ 74263363Semaste (LLVM_EXTENSION offsetof(UserArea, u_debugreg[reg_index])) 75263363Semaste 76263363Semaste//--------------------------------------------------------------------------- 77263363Semaste// Include RegisterInfos_x86_64 to declare our g_register_infos_x86_64 structure. 78263363Semaste//--------------------------------------------------------------------------- 79263363Semaste#define DECLARE_REGISTER_INFOS_X86_64_STRUCT 80263363Semaste#include "RegisterInfos_x86_64.h" 81263363Semaste#undef DECLARE_REGISTER_INFOS_X86_64_STRUCT 82263363Semaste 83263363Semastestatic const RegisterInfo * 84263363SemasteGetRegisterInfo_i386(const lldb_private::ArchSpec &arch) 85263363Semaste{ 86263363Semaste static std::vector<lldb_private::RegisterInfo> g_register_infos; 87263363Semaste 88263363Semaste // Allocate RegisterInfo only once 89263363Semaste if (g_register_infos.empty()) 90263363Semaste { 91263363Semaste // Copy the register information from base class 92263363Semaste std::unique_ptr<RegisterContextLinux_i386> reg_interface(new RegisterContextLinux_i386 (arch)); 93263363Semaste const RegisterInfo *base_info = reg_interface->GetRegisterInfo(); 94263363Semaste g_register_infos.insert(g_register_infos.end(), &base_info[0], &base_info[k_num_registers_i386]); 95263363Semaste 96263363Semaste //--------------------------------------------------------------------------- 97263363Semaste // Include RegisterInfos_x86_64 to update the g_register_infos structure 98263363Semaste // with x86_64 offsets. 99263363Semaste //--------------------------------------------------------------------------- 100263363Semaste #define UPDATE_REGISTER_INFOS_I386_STRUCT_WITH_X86_64_OFFSETS 101263363Semaste #include "RegisterInfos_x86_64.h" 102263363Semaste #undef UPDATE_REGISTER_INFOS_I386_STRUCT_WITH_X86_64_OFFSETS 103263363Semaste } 104263363Semaste 105263363Semaste return &g_register_infos[0]; 106254721Semaste} 107254721Semaste 108263363SemasteRegisterContextLinux_x86_64::RegisterContextLinux_x86_64(const ArchSpec &target_arch) : 109263363Semaste RegisterInfoInterface(target_arch) 110254721Semaste{ 111254721Semaste} 112254721Semaste 113263363SemasteRegisterContextLinux_x86_64::~RegisterContextLinux_x86_64() 114263363Semaste{ 115263363Semaste} 116263363Semaste 117254721Semastesize_t 118254721SemasteRegisterContextLinux_x86_64::GetGPRSize() 119254721Semaste{ 120254721Semaste return sizeof(GPR); 121254721Semaste} 122254721Semaste 123254721Semasteconst RegisterInfo * 124254721SemasteRegisterContextLinux_x86_64::GetRegisterInfo() 125254721Semaste{ 126263363Semaste switch (m_target_arch.GetCore()) 127254721Semaste { 128263363Semaste case ArchSpec::eCore_x86_32_i386: 129263363Semaste case ArchSpec::eCore_x86_32_i486: 130263363Semaste case ArchSpec::eCore_x86_32_i486sx: 131263363Semaste return GetRegisterInfo_i386 (m_target_arch); 132263363Semaste case ArchSpec::eCore_x86_64_x86_64: 133263363Semaste return g_register_infos_x86_64; 134263363Semaste default: 135263363Semaste assert(false && "Unhandled target architecture."); 136263363Semaste return NULL; 137254721Semaste } 138254721Semaste} 139254721Semaste 140