1234353Sdim//===-- ARMBuildAttrs.h - ARM Build Attributes ------------------*- C++ -*-===// 2193323Sed// 3193323Sed// The LLVM Compiler Infrastructure 4193323Sed// 5193323Sed// This file is distributed under the University of Illinois Open Source 6193323Sed// License. See LICENSE.TXT for details. 7193323Sed// 8193323Sed//===----------------------------------------------------------------------===// 9193323Sed// 10193323Sed// This file contains enumerations and support routines for ARM build attributes 11218893Sdim// as defined in ARM ABI addenda document (ABI release 2.08). 12193323Sed// 13193323Sed//===----------------------------------------------------------------------===// 14193323Sed 15193323Sed#ifndef __TARGET_ARMBUILDATTRS_H__ 16193323Sed#define __TARGET_ARMBUILDATTRS_H__ 17193323Sed 18263508Sdimnamespace llvm { 19193323Sednamespace ARMBuildAttrs { 20263508Sdim 21218893Sdim enum SpecialAttr { 22218893Sdim // This is for the .cpu asm attr. It translates into one or more 23218893Sdim // AttrType (below) entries in the .ARM.attributes section in the ELF. 24263508Sdim SEL_CPU 25218893Sdim }; 26218893Sdim 27218893Sdim enum AttrType { 28218893Sdim // Rest correspond to ELF/.ARM.attributes 29193323Sed File = 1, 30193323Sed Section = 2, 31193323Sed Symbol = 3, 32193323Sed CPU_raw_name = 4, 33193323Sed CPU_name = 5, 34193323Sed CPU_arch = 6, 35193323Sed CPU_arch_profile = 7, 36193323Sed ARM_ISA_use = 8, 37193323Sed THUMB_ISA_use = 9, 38193323Sed VFP_arch = 10, 39193323Sed WMMX_arch = 11, 40193323Sed Advanced_SIMD_arch = 12, 41193323Sed PCS_config = 13, 42193323Sed ABI_PCS_R9_use = 14, 43193323Sed ABI_PCS_RW_data = 15, 44193323Sed ABI_PCS_RO_data = 16, 45193323Sed ABI_PCS_GOT_use = 17, 46193323Sed ABI_PCS_wchar_t = 18, 47193323Sed ABI_FP_rounding = 19, 48193323Sed ABI_FP_denormal = 20, 49193323Sed ABI_FP_exceptions = 21, 50193323Sed ABI_FP_user_exceptions = 22, 51193323Sed ABI_FP_number_model = 23, 52193323Sed ABI_align8_needed = 24, 53193323Sed ABI_align8_preserved = 25, 54193323Sed ABI_enum_size = 26, 55193323Sed ABI_HardFP_use = 27, 56193323Sed ABI_VFP_args = 28, 57193323Sed ABI_WMMX_args = 29, 58193323Sed ABI_optimization_goals = 30, 59193323Sed ABI_FP_optimization_goals = 31, 60193323Sed compatibility = 32, 61193323Sed CPU_unaligned_access = 34, 62263508Sdim FP_HP_extension = 36, 63193323Sed ABI_FP_16bit_format = 38, 64218893Sdim MPextension_use = 42, // was 70, 2.08 ABI 65218893Sdim DIV_use = 44, 66193323Sed nodefaults = 64, 67193323Sed also_compatible_with = 65, 68193323Sed T2EE_use = 66, 69193323Sed conformance = 67, 70193323Sed Virtualization_use = 68, 71218893Sdim MPextension_use_old = 70 72193323Sed }; 73218893Sdim 74218893Sdim // Magic numbers for .ARM.attributes 75218893Sdim enum AttrMagic { 76218893Sdim Format_Version = 0x41 77218893Sdim }; 78218893Sdim 79218893Sdim // Legal Values for CPU_arch, (=6), uleb128 80218893Sdim enum CPUArch { 81218893Sdim Pre_v4 = 0, 82218893Sdim v4 = 1, // e.g. SA110 83218893Sdim v4T = 2, // e.g. ARM7TDMI 84218893Sdim v5T = 3, // e.g. ARM9TDMI 85218893Sdim v5TE = 4, // e.g. ARM946E_S 86218893Sdim v5TEJ = 5, // e.g. ARM926EJ_S 87218893Sdim v6 = 6, // e.g. ARM1136J_S 88218893Sdim v6KZ = 7, // e.g. ARM1176JZ_S 89218893Sdim v6T2 = 8, // e.g. ARM1156T2F_S 90218893Sdim v6K = 9, // e.g. ARM1136J_S 91218893Sdim v7 = 10, // e.g. Cortex A8, Cortex M3 92218893Sdim v6_M = 11, // e.g. Cortex M1 93218893Sdim v6S_M = 12, // v6_M with the System extensions 94263508Sdim v7E_M = 13, // v7_M with DSP extensions 95263508Sdim v8 = 14 // v8, AArch32 96218893Sdim }; 97218893Sdim 98263508Sdim enum CPUArchProfile { // (=7), uleb128 99218893Sdim Not_Applicable = 0, // pre v7, or cross-profile code 100218893Sdim ApplicationProfile = (0x41), // 'A' (e.g. for Cortex A8) 101218893Sdim RealTimeProfile = (0x52), // 'R' (e.g. for Cortex R4) 102218893Sdim MicroControllerProfile = (0x4D), // 'M' (e.g. for Cortex M3) 103218893Sdim SystemProfile = (0x53) // 'S' Application or real-time profile 104218893Sdim }; 105218893Sdim 106218893Sdim // The following have a lot of common use cases 107263508Sdim enum { 108218893Sdim Not_Allowed = 0, 109218893Sdim Allowed = 1, 110218893Sdim 111263508Sdim // Tag_ARM_ISA_use (=8), uleb128 112263508Sdim 113263508Sdim // Tag_THUMB_ISA_use, (=9), uleb128 114263508Sdim AllowThumb32 = 2, // 32-bit Thumb (implies 16-bit instructions) 115263508Sdim 116263508Sdim // Tag_FP_arch (=10), uleb128 (formerly Tag_VFP_arch = 10) 117218893Sdim AllowFPv2 = 2, // v2 FP ISA permitted (implies use of the v1 FP ISA) 118218893Sdim AllowFPv3A = 3, // v3 FP ISA permitted (implies use of the v2 FP ISA) 119263508Sdim AllowFPv3B = 4, // v3 FP ISA permitted, but only D0-D15, S0-S31 120263508Sdim AllowFPv4A = 5, // v4 FP ISA permitted (implies use of v3 FP ISA) 121218893Sdim AllowFPv4B = 6, // v4 FP ISA was permitted, but only D0-D15, S0-S31 122263508Sdim AllowFPARMv8A = 7, // Use of the ARM v8-A FP ISA was permitted 123263508Sdim AllowFPARMv8B = 8, // Use of the ARM v8-A FP ISA was permitted, but only D0-D15, S0-S31 124218893Sdim 125218893Sdim // Tag_WMMX_arch, (=11), uleb128 126263508Sdim AllowWMMXv1 = 1, // The user permitted this entity to use WMMX v1 127263508Sdim AllowWMMXv2 = 2, // The user permitted this entity to use WMMX v2 128218893Sdim 129263508Sdim // Tag_Advanced_SIMD_arch, (=12), uleb128 130263508Sdim AllowNeon = 1, // SIMDv1 was permitted 131263508Sdim AllowNeon2 = 2, // SIMDv2 was permitted (Half-precision FP, MAC operations) 132263508Sdim AllowNeonARMv8 = 3, // ARM v8-A SIMD was permitted 133263508Sdim 134263508Sdim // Tag_ABI_FP_denormal, (=20), uleb128 135218893Sdim PreserveFPSign = 2, // sign when flushed-to-zero is preserved 136218893Sdim 137218893Sdim // Tag_ABI_FP_number_model, (=23), uleb128 138218893Sdim AllowRTABI = 2, // numbers, infinities, and one quiet NaN (see [RTABI]) 139263508Sdim AllowIEE754 = 3, // this code to use all the IEEE 754-defined FP encodings 140263508Sdim 141263508Sdim // Tag_ABI_HardFP_use, (=27), uleb128 142263508Sdim HardFPImplied = 0, // FP use should be implied by Tag_FP_arch 143263508Sdim HardFPSinglePrecision = 1, // Single-precision only 144263508Sdim 145263508Sdim // Tag_ABI_VFP_args, (=28), uleb128 146263508Sdim BaseAAPCS = 0, 147263508Sdim HardFPAAPCS = 1, 148263508Sdim 149263508Sdim // Tag_FP_HP_extension, (=36), uleb128 150263508Sdim AllowHPFP = 1, // Allow use of Half Precision FP 151263508Sdim 152263508Sdim // Tag_MPextension_use, (=42), uleb128 153263508Sdim AllowMP = 1, // Allow use of MP extensions 154263508Sdim 155263508Sdim // Tag_DIV_use, (=44), uleb128 156263508Sdim AllowDIVIfExists = 0, // Allow hardware divide if available in arch, or no info exists. 157263508Sdim DisallowDIV = 1, // Hardware divide explicitly disallowed 158263508Sdim AllowDIVExt = 2, // Allow hardware divide as optional architecture extension above 159263508Sdim // the base arch specified by Tag_CPU_arch and Tag_CPU_arch_profile. 160263508Sdim 161263508Sdim // Tag_Virtualization_use, (=68), uleb128 162263508Sdim AllowTZ = 1, 163263508Sdim AllowVirtualization = 2, 164263508Sdim AllowTZVirtualization = 3 165218893Sdim }; 166193323Sed 167263508Sdim} // namespace ARMBuildAttrs 168263508Sdim} // namespace llvm 169263508Sdim 170193323Sed#endif // __TARGET_ARMBUILDATTRS_H__ 171