1262552Sbr//===-- llvm/MC/MCTargetAsmParser.h - Target Assembly Parser ----*- C++ -*-===//
2262552Sbr//
3262552Sbr//                     The LLVM Compiler Infrastructure
4262552Sbr//
5262552Sbr// This file is distributed under the University of Illinois Open Source
6262552Sbr// License. See LICENSE.TXT for details.
7262552Sbr//
8262552Sbr//===----------------------------------------------------------------------===//
9262552Sbr
10262552Sbr#ifndef LLVM_MC_TARGETPARSER_H
11262552Sbr#define LLVM_MC_TARGETPARSER_H
12262552Sbr
13262552Sbr#include "llvm/MC/MCParser/MCAsmParserExtension.h"
14262552Sbr#include "llvm/MC/MCExpr.h"
15262552Sbr
16262552Sbrnamespace llvm {
17262552Sbrclass MCStreamer;
18262552Sbrclass StringRef;
19262552Sbrclass SMLoc;
20262552Sbrclass AsmToken;
21262552Sbrclass MCParsedAsmOperand;
22262552Sbrclass MCInst;
23262552Sbrtemplate <typename T> class SmallVectorImpl;
24262552Sbr
25262552Sbrenum AsmRewriteKind {
26262552Sbr  AOK_Delete = 0,     // Rewrite should be ignored.
27262552Sbr  AOK_Align,          // Rewrite align as .align.
28262552Sbr  AOK_DotOperator,    // Rewrite a dot operator expression as an immediate.
29262552Sbr                      // E.g., [eax].foo.bar -> [eax].8
30262552Sbr  AOK_Emit,           // Rewrite _emit as .byte.
31262552Sbr  AOK_Imm,            // Rewrite as $$N.
32262552Sbr  AOK_ImmPrefix,      // Add $$ before a parsed Imm.
33273662Sian  AOK_Input,          // Rewrite in terms of $N.
34262552Sbr  AOK_Output,         // Rewrite in terms of $N.
35262552Sbr  AOK_SizeDirective,  // Add a sizing directive (e.g., dword ptr).
36262552Sbr  AOK_Skip            // Skip emission (e.g., offset/type operators).
37262552Sbr};
38262552Sbr
39262552Sbrconst char AsmRewritePrecedence [] = {
40262552Sbr  0, // AOK_Delete
41262552Sbr  1, // AOK_Align
42262552Sbr  1, // AOK_DotOperator
43262552Sbr  1, // AOK_Emit
44262552Sbr  3, // AOK_Imm
45262552Sbr  3, // AOK_ImmPrefix
46262552Sbr  2, // AOK_Input
47262552Sbr  2, // AOK_Output
48262552Sbr  4, // AOK_SizeDirective
49262552Sbr  1  // AOK_Skip
50262552Sbr};
51262552Sbr
52262552Sbrstruct AsmRewrite {
53262552Sbr  AsmRewriteKind Kind;
54262552Sbr  SMLoc Loc;
55262552Sbr  unsigned Len;
56262552Sbr  unsigned Val;
57262552Sbrpublic:
58262552Sbr  AsmRewrite(AsmRewriteKind kind, SMLoc loc, unsigned len = 0, unsigned val = 0)
59262552Sbr    : Kind(kind), Loc(loc), Len(len), Val(val) {}
60262552Sbr};
61262552Sbr
62262552Sbrstruct ParseInstructionInfo {
63262552Sbr
64262552Sbr  SmallVectorImpl<AsmRewrite> *AsmRewrites;
65262552Sbr
66262552Sbr  ParseInstructionInfo() : AsmRewrites(0) {}
67262552Sbr  ParseInstructionInfo(SmallVectorImpl<AsmRewrite> *rewrites)
68262552Sbr    : AsmRewrites(rewrites) {}
69262552Sbr
70262552Sbr  ~ParseInstructionInfo() {}
71262552Sbr};
72262552Sbr
73262552Sbr/// MCTargetAsmParser - Generic interface to target specific assembly parsers.
74262552Sbrclass MCTargetAsmParser : public MCAsmParserExtension {
75262552Sbrpublic:
76262552Sbr  enum MatchResultTy {
77262552Sbr    Match_InvalidOperand,
78262552Sbr    Match_MissingFeature,
79262552Sbr    Match_MnemonicFail,
80262552Sbr    Match_Success,
81262552Sbr    FIRST_TARGET_MATCH_RESULT_TY
82262552Sbr  };
83262552Sbr
84262552Sbrprivate:
85262552Sbr  MCTargetAsmParser(const MCTargetAsmParser &) LLVM_DELETED_FUNCTION;
86262552Sbr  void operator=(const MCTargetAsmParser &) LLVM_DELETED_FUNCTION;
87262552Sbrprotected: // Can only create subclasses.
88262552Sbr  MCTargetAsmParser();
89262552Sbr
90262552Sbr  /// AvailableFeatures - The current set of available features.
91262552Sbr  unsigned AvailableFeatures;
92262552Sbr
93262552Sbr  /// ParsingInlineAsm - Are we parsing ms-style inline assembly?
94262552Sbr  bool ParsingInlineAsm;
95262552Sbr
96262552Sbr  /// SemaCallback - The Sema callback implementation.  Must be set when parsing
97262552Sbr  /// ms-style inline assembly.
98262552Sbr  MCAsmParserSemaCallback *SemaCallback;
99262552Sbr
100262552Sbrpublic:
101262552Sbr  virtual ~MCTargetAsmParser();
102262552Sbr
103262552Sbr  unsigned getAvailableFeatures() const { return AvailableFeatures; }
104262552Sbr  void setAvailableFeatures(unsigned Value) { AvailableFeatures = Value; }
105262552Sbr
106262552Sbr  bool isParsingInlineAsm () { return ParsingInlineAsm; }
107262552Sbr  void setParsingInlineAsm (bool Value) { ParsingInlineAsm = Value; }
108262552Sbr
109262552Sbr  void setSemaCallback(MCAsmParserSemaCallback *Callback) {
110262552Sbr    SemaCallback = Callback;
111262552Sbr  }
112262552Sbr
113262552Sbr  virtual bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc,
114262552Sbr                             SMLoc &EndLoc) = 0;
115262552Sbr
116262552Sbr  /// ParseInstruction - Parse one assembly instruction.
117262552Sbr  ///
118262552Sbr  /// The parser is positioned following the instruction name. The target
119262552Sbr  /// specific instruction parser should parse the entire instruction and
120262552Sbr  /// construct the appropriate MCInst, or emit an error. On success, the entire
121262552Sbr  /// line should be parsed up to and including the end-of-statement token. On
122262552Sbr  /// failure, the parser is not required to read to the end of the line.
123262552Sbr  //
124262552Sbr  /// \param Name - The instruction name.
125262552Sbr  /// \param NameLoc - The source location of the name.
126262552Sbr  /// \param Operands [out] - The list of parsed operands, this returns
127262552Sbr  ///        ownership of them to the caller.
128262552Sbr  /// \return True on failure.
129262552Sbr  virtual bool ParseInstruction(ParseInstructionInfo &Info, StringRef Name,
130262552Sbr                                SMLoc NameLoc,
131262552Sbr                            SmallVectorImpl<MCParsedAsmOperand*> &Operands) = 0;
132262552Sbr
133262552Sbr  /// ParseDirective - Parse a target specific assembler directive
134262552Sbr  ///
135262552Sbr  /// The parser is positioned following the directive name.  The target
136262552Sbr  /// specific directive parser should parse the entire directive doing or
137262552Sbr  /// recording any target specific work, or return true and do nothing if the
138262552Sbr  /// directive is not target specific. If the directive is specific for
139262552Sbr  /// the target, the entire line is parsed up to and including the
140262552Sbr  /// end-of-statement token and false is returned.
141262552Sbr  ///
142262552Sbr  /// \param DirectiveID - the identifier token of the directive.
143262552Sbr  virtual bool ParseDirective(AsmToken DirectiveID) = 0;
144262552Sbr
145262552Sbr  /// mnemonicIsValid - This returns true if this is a valid mnemonic and false
146262552Sbr  /// otherwise.
147262552Sbr  virtual bool mnemonicIsValid(StringRef Mnemonic, unsigned VariantID) = 0;
148262552Sbr
149262552Sbr  /// MatchAndEmitInstruction - Recognize a series of operands of a parsed
150262552Sbr  /// instruction as an actual MCInst and emit it to the specified MCStreamer.
151262552Sbr  /// This returns false on success and returns true on failure to match.
152262552Sbr  ///
153262552Sbr  /// On failure, the target parser is responsible for emitting a diagnostic
154262552Sbr  /// explaining the match failure.
155262552Sbr  virtual bool
156262552Sbr  MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
157262552Sbr                          SmallVectorImpl<MCParsedAsmOperand*> &Operands,
158262552Sbr                          MCStreamer &Out, unsigned &ErrorInfo,
159262552Sbr                          bool MatchingInlineAsm) = 0;
160262552Sbr
161262552Sbr  /// Allow a target to add special case operand matching for things that
162262552Sbr  /// tblgen doesn't/can't handle effectively. For example, literal
163262552Sbr  /// immediates on ARM. TableGen expects a token operand, but the parser
164262552Sbr  /// will recognize them as immediates.
165262552Sbr  virtual unsigned validateTargetOperandClass(MCParsedAsmOperand *Op,
166262552Sbr                                              unsigned Kind) {
167262552Sbr    return Match_InvalidOperand;
168262552Sbr  }
169262552Sbr
170262552Sbr  /// checkTargetMatchPredicate - Validate the instruction match against
171262552Sbr  /// any complex target predicates not expressible via match classes.
172262552Sbr  virtual unsigned checkTargetMatchPredicate(MCInst &Inst) {
173266207Sian    return Match_Success;
174266207Sian  }
175262552Sbr
176266207Sian  virtual void convertToMapAndConstraints(unsigned Kind,
177262552Sbr                      const SmallVectorImpl<MCParsedAsmOperand*> &Operands) = 0;
178262552Sbr
179262552Sbr  virtual const MCExpr *applyModifierToExpr(const MCExpr *E,
180262552Sbr                                            MCSymbolRefExpr::VariantKind,
181262552Sbr                                            MCContext &Ctx) {
182262552Sbr    return 0;
183262552Sbr  }
184262552Sbr
185262552Sbr  virtual void onLabelParsed(MCSymbol *Symbol) { };
186262552Sbr};
187262552Sbr
188262552Sbr} // End llvm namespace
189262552Sbr
190262552Sbr#endif
191262552Sbr