1214152Sed/*===-- floatdidf.c - Implement __floatdidf -------------------------------=== 2214152Sed * 3214152Sed * The LLVM Compiler Infrastructure 4214152Sed * 5222656Sed * This file is dual licensed under the MIT and the University of Illinois Open 6222656Sed * Source Licenses. See LICENSE.TXT for details. 7214152Sed * 8214152Sed *===----------------------------------------------------------------------=== 9214152Sed * 10214152Sed * This file implements __floatdidf for the compiler_rt library. 11214152Sed * 12214152Sed *===----------------------------------------------------------------------=== 13214152Sed */ 14214152Sed 15214152Sed#include "int_lib.h" 16214152Sed 17214152Sed/* Returns: convert a to a double, rounding toward even. */ 18214152Sed 19214152Sed/* Assumption: double is a IEEE 64 bit floating point type 20214152Sed * di_int is a 64 bit integral type 21214152Sed */ 22214152Sed 23214152Sed/* seee eeee eeee mmmm mmmm mmmm mmmm mmmm | mmmm mmmm mmmm mmmm mmmm mmmm mmmm mmmm */ 24214152Sed 25239138SandrewARM_EABI_FNALIAS(l2d, floatdidf) 26222656Sed 27214152Sed#ifndef __SOFT_FP__ 28214152Sed/* Support for systems that have hardware floating-point; we'll set the inexact flag 29214152Sed * as a side-effect of this computation. 30214152Sed */ 31214152Sed 32222656SedCOMPILER_RT_ABI double 33214152Sed__floatdidf(di_int a) 34214152Sed{ 35214152Sed static const double twop52 = 0x1.0p52; 36214152Sed static const double twop32 = 0x1.0p32; 37214152Sed 38214152Sed union { int64_t x; double d; } low = { .d = twop52 }; 39214152Sed 40214152Sed const double high = (int32_t)(a >> 32) * twop32; 41214152Sed low.x |= a & INT64_C(0x00000000ffffffff); 42214152Sed 43214152Sed const double result = (high - twop52) + low.d; 44214152Sed return result; 45214152Sed} 46214152Sed 47214152Sed#else 48214152Sed/* Support for systems that don't have hardware floating-point; there are no flags to 49214152Sed * set, and we don't want to code-gen to an unknown soft-float implementation. 50214152Sed */ 51214152Sed 52222656SedCOMPILER_RT_ABI double 53214152Sed__floatdidf(di_int a) 54214152Sed{ 55214152Sed if (a == 0) 56214152Sed return 0.0; 57214152Sed const unsigned N = sizeof(di_int) * CHAR_BIT; 58214152Sed const di_int s = a >> (N-1); 59214152Sed a = (a ^ s) - s; 60214152Sed int sd = N - __builtin_clzll(a); /* number of significant digits */ 61214152Sed int e = sd - 1; /* exponent */ 62214152Sed if (sd > DBL_MANT_DIG) 63214152Sed { 64214152Sed /* start: 0000000000000000000001xxxxxxxxxxxxxxxxxxxxxxPQxxxxxxxxxxxxxxxxxx 65214152Sed * finish: 000000000000000000000000000000000000001xxxxxxxxxxxxxxxxxxxxxxPQR 66214152Sed * 12345678901234567890123456 67214152Sed * 1 = msb 1 bit 68214152Sed * P = bit DBL_MANT_DIG-1 bits to the right of 1 69214152Sed * Q = bit DBL_MANT_DIG bits to the right of 1 70214152Sed * R = "or" of all bits to the right of Q 71214152Sed */ 72214152Sed switch (sd) 73214152Sed { 74214152Sed case DBL_MANT_DIG + 1: 75214152Sed a <<= 1; 76214152Sed break; 77214152Sed case DBL_MANT_DIG + 2: 78214152Sed break; 79214152Sed default: 80214152Sed a = ((du_int)a >> (sd - (DBL_MANT_DIG+2))) | 81214152Sed ((a & ((du_int)(-1) >> ((N + DBL_MANT_DIG+2) - sd))) != 0); 82214152Sed }; 83214152Sed /* finish: */ 84214152Sed a |= (a & 4) != 0; /* Or P into R */ 85214152Sed ++a; /* round - this step may add a significant bit */ 86214152Sed a >>= 2; /* dump Q and R */ 87214152Sed /* a is now rounded to DBL_MANT_DIG or DBL_MANT_DIG+1 bits */ 88214152Sed if (a & ((du_int)1 << DBL_MANT_DIG)) 89214152Sed { 90214152Sed a >>= 1; 91214152Sed ++e; 92214152Sed } 93214152Sed /* a is now rounded to DBL_MANT_DIG bits */ 94214152Sed } 95214152Sed else 96214152Sed { 97214152Sed a <<= (DBL_MANT_DIG - sd); 98214152Sed /* a is now rounded to DBL_MANT_DIG bits */ 99214152Sed } 100214152Sed double_bits fb; 101214152Sed fb.u.high = ((su_int)s & 0x80000000) | /* sign */ 102214152Sed ((e + 1023) << 20) | /* exponent */ 103214152Sed ((su_int)(a >> 32) & 0x000FFFFF); /* mantissa-high */ 104214152Sed fb.u.low = (su_int)a; /* mantissa-low */ 105214152Sed return fb.f; 106214152Sed} 107214152Sed#endif 108