1221828Sgrehan/*- 2242131Sgrehan * Copyright (c) 2012 NetApp, Inc. 3221828Sgrehan * All rights reserved. 4221828Sgrehan * 5221828Sgrehan * Redistribution and use in source and binary forms, with or without 6221828Sgrehan * modification, are permitted provided that the following conditions 7221828Sgrehan * are met: 8221828Sgrehan * 1. Redistributions of source code must retain the above copyright 9221828Sgrehan * notice, this list of conditions and the following disclaimer. 10221828Sgrehan * 2. Redistributions in binary form must reproduce the above copyright 11221828Sgrehan * notice, this list of conditions and the following disclaimer in the 12221828Sgrehan * documentation and/or other materials provided with the distribution. 13221828Sgrehan * 14221828Sgrehan * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND 15221828Sgrehan * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16221828Sgrehan * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17221828Sgrehan * ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE 18221828Sgrehan * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19221828Sgrehan * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20221828Sgrehan * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21221828Sgrehan * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22221828Sgrehan * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23221828Sgrehan * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24221828Sgrehan * SUCH DAMAGE. 25221828Sgrehan * 26221828Sgrehan * $FreeBSD$ 27221828Sgrehan */ 28221828Sgrehan 29221828Sgrehan#include <sys/cdefs.h> 30221828Sgrehan__FBSDID("$FreeBSD$"); 31221828Sgrehan 32221828Sgrehan#include <sys/types.h> 33242131Sgrehan#include <sys/errno.h> 34242131Sgrehan#include <x86/mptable.h> 35221828Sgrehan 36221828Sgrehan#include <stdio.h> 37221828Sgrehan#include <string.h> 38221828Sgrehan 39244167Sgrehan#include "bhyverun.h" 40242131Sgrehan#include "mptbl.h" 41221828Sgrehan 42242131Sgrehan#define MPTABLE_BASE 0xF0000 43221828Sgrehan 44247523Sneel/* floating pointer length + maximum length of configuration table */ 45247523Sneel#define MPTABLE_MAX_LENGTH (65536 + 16) 46247523Sneel 47242131Sgrehan#define LAPIC_PADDR 0xFEE00000 48242131Sgrehan#define LAPIC_VERSION 16 49221828Sgrehan 50242131Sgrehan#define IOAPIC_PADDR 0xFEC00000 51242131Sgrehan#define IOAPIC_VERSION 0x11 52221828Sgrehan 53242131Sgrehan#define MP_SPECREV 4 54242131Sgrehan#define MPFP_SIG "_MP_" 55242131Sgrehan 56242131Sgrehan/* Configuration header defines */ 57242131Sgrehan#define MPCH_SIG "PCMP" 58242131Sgrehan#define MPCH_OEMID "BHyVe " 59242131Sgrehan#define MPCH_OEMID_LEN 8 60242131Sgrehan#define MPCH_PRODID "Hypervisor " 61242131Sgrehan#define MPCH_PRODID_LEN 12 62242131Sgrehan 63242131Sgrehan/* Processor entry defines */ 64242131Sgrehan#define MPEP_SIG_FAMILY 6 /* XXX bhyve should supply this */ 65242131Sgrehan#define MPEP_SIG_MODEL 26 66242131Sgrehan#define MPEP_SIG_STEPPING 5 67242131Sgrehan#define MPEP_SIG \ 68242131Sgrehan ((MPEP_SIG_FAMILY << 8) | \ 69242131Sgrehan (MPEP_SIG_MODEL << 4) | \ 70242131Sgrehan (MPEP_SIG_STEPPING)) 71242131Sgrehan 72242131Sgrehan#define MPEP_FEATURES (0xBFEBFBFF) /* XXX Intel i7 */ 73242131Sgrehan 74256755Sgrehan/* Number of i/o intr entries */ 75256755Sgrehan#define MPEII_MAX_IRQ 16 76256755Sgrehan 77242131Sgrehan/* Define processor entry struct since <x86/mptable.h> gets it wrong */ 78242131Sgrehantypedef struct BPROCENTRY { 79242131Sgrehan u_char type; 80242131Sgrehan u_char apic_id; 81242131Sgrehan u_char apic_version; 82242131Sgrehan u_char cpu_flags; 83242131Sgrehan uint32_t cpu_signature; 84242131Sgrehan uint32_t feature_flags; 85242131Sgrehan uint32_t reserved1; 86242131Sgrehan uint32_t reserved2; 87242131Sgrehan} *bproc_entry_ptr; 88242131SgrehanCTASSERT(sizeof(struct BPROCENTRY) == 20); 89242131Sgrehan 90242131Sgrehan/* Bus entry defines */ 91242131Sgrehan#define MPE_NUM_BUSES 2 92242131Sgrehan#define MPE_BUSNAME_LEN 6 93242131Sgrehan#define MPE_BUSNAME_ISA "ISA " 94242131Sgrehan#define MPE_BUSNAME_PCI "PCI " 95242131Sgrehan 96242131Sgrehanstatic void *oem_tbl_start; 97242131Sgrehanstatic int oem_tbl_size; 98242131Sgrehan 99221828Sgrehanstatic uint8_t 100242131Sgrehanmpt_compute_checksum(void *base, size_t len) 101221828Sgrehan{ 102242131Sgrehan uint8_t *bytes; 103242131Sgrehan uint8_t sum; 104242131Sgrehan 105242131Sgrehan for(bytes = base, sum = 0; len > 0; len--) { 106221828Sgrehan sum += *bytes++; 107221828Sgrehan } 108242131Sgrehan 109242131Sgrehan return (256 - sum); 110221828Sgrehan} 111221828Sgrehan 112221828Sgrehanstatic void 113242131Sgrehanmpt_build_mpfp(mpfps_t mpfp, vm_paddr_t gpa) 114221828Sgrehan{ 115242131Sgrehan 116221828Sgrehan memset(mpfp, 0, sizeof(*mpfp)); 117242131Sgrehan memcpy(mpfp->signature, MPFP_SIG, 4); 118242131Sgrehan mpfp->pap = gpa + sizeof(*mpfp); 119242131Sgrehan mpfp->length = 1; 120242131Sgrehan mpfp->spec_rev = MP_SPECREV; 121242131Sgrehan mpfp->checksum = mpt_compute_checksum(mpfp, sizeof(*mpfp)); 122221828Sgrehan} 123221828Sgrehan 124221828Sgrehanstatic void 125242131Sgrehanmpt_build_mpch(mpcth_t mpch) 126221828Sgrehan{ 127242131Sgrehan 128221828Sgrehan memset(mpch, 0, sizeof(*mpch)); 129242131Sgrehan memcpy(mpch->signature, MPCH_SIG, 4); 130242131Sgrehan mpch->spec_rev = MP_SPECREV; 131242131Sgrehan memcpy(mpch->oem_id, MPCH_OEMID, MPCH_OEMID_LEN); 132242131Sgrehan memcpy(mpch->product_id, MPCH_PRODID, MPCH_PRODID_LEN); 133242131Sgrehan mpch->apic_address = LAPIC_PADDR; 134221828Sgrehan} 135221828Sgrehan 136221828Sgrehanstatic void 137242131Sgrehanmpt_build_proc_entries(bproc_entry_ptr mpep, int ncpu) 138221828Sgrehan{ 139221828Sgrehan int i; 140221828Sgrehan 141242131Sgrehan for (i = 0; i < ncpu; i++) { 142221828Sgrehan memset(mpep, 0, sizeof(*mpep)); 143242131Sgrehan mpep->type = MPCT_ENTRY_PROCESSOR; 144242131Sgrehan mpep->apic_id = i; // XXX 145242131Sgrehan mpep->apic_version = LAPIC_VERSION; 146242131Sgrehan mpep->cpu_flags = PROCENTRY_FLAG_EN; 147242131Sgrehan if (i == 0) 148242131Sgrehan mpep->cpu_flags |= PROCENTRY_FLAG_BP; 149242131Sgrehan mpep->cpu_signature = MPEP_SIG; 150221828Sgrehan mpep->feature_flags = MPEP_FEATURES; 151221828Sgrehan mpep++; 152221828Sgrehan } 153221828Sgrehan} 154221828Sgrehan 155221828Sgrehanstatic void 156242131Sgrehanmpt_build_bus_entries(bus_entry_ptr mpeb) 157221828Sgrehan{ 158242131Sgrehan 159221828Sgrehan memset(mpeb, 0, sizeof(*mpeb)); 160242131Sgrehan mpeb->type = MPCT_ENTRY_BUS; 161256755Sgrehan mpeb->bus_id = 0; 162256755Sgrehan memcpy(mpeb->bus_type, MPE_BUSNAME_PCI, MPE_BUSNAME_LEN); 163221828Sgrehan mpeb++; 164221828Sgrehan 165221828Sgrehan memset(mpeb, 0, sizeof(*mpeb)); 166242131Sgrehan mpeb->type = MPCT_ENTRY_BUS; 167256755Sgrehan mpeb->bus_id = 1; 168256755Sgrehan memcpy(mpeb->bus_type, MPE_BUSNAME_ISA, MPE_BUSNAME_LEN); 169221828Sgrehan} 170221828Sgrehan 171221828Sgrehanstatic void 172242131Sgrehanmpt_build_ioapic_entries(io_apic_entry_ptr mpei, int id) 173221828Sgrehan{ 174242131Sgrehan 175221828Sgrehan memset(mpei, 0, sizeof(*mpei)); 176242131Sgrehan mpei->type = MPCT_ENTRY_IOAPIC; 177242131Sgrehan mpei->apic_id = id; 178242131Sgrehan mpei->apic_version = IOAPIC_VERSION; 179242131Sgrehan mpei->apic_flags = IOAPICENTRY_FLAG_EN; 180242131Sgrehan mpei->apic_address = IOAPIC_PADDR; 181221828Sgrehan} 182221828Sgrehan 183221828Sgrehanstatic void 184256755Sgrehanmpt_build_ioint_entries(int_entry_ptr mpie, int num_pins, int id) 185221828Sgrehan{ 186221828Sgrehan int pin; 187221828Sgrehan 188221828Sgrehan /* 189221828Sgrehan * The following config is taken from kernel mptable.c 190221828Sgrehan * mptable_parse_default_config_ints(...), for now 191221828Sgrehan * just use the default config, tweek later if needed. 192221828Sgrehan */ 193221828Sgrehan 194221828Sgrehan /* Run through all 16 pins. */ 195221828Sgrehan for (pin = 0; pin < num_pins; pin++) { 196256755Sgrehan memset(mpie, 0, sizeof(*mpie)); 197256755Sgrehan mpie->type = MPCT_ENTRY_INT; 198256755Sgrehan mpie->src_bus_id = 1; 199256755Sgrehan mpie->dst_apic_id = id; 200221828Sgrehan 201221828Sgrehan /* 202242131Sgrehan * All default configs route IRQs from bus 0 to the first 16 203242131Sgrehan * pins of the first I/O APIC with an APIC ID of 2. 204221828Sgrehan */ 205256755Sgrehan mpie->dst_apic_int = pin; 206221828Sgrehan switch (pin) { 207221828Sgrehan case 0: 208221828Sgrehan /* Pin 0 is an ExtINT pin. */ 209256755Sgrehan mpie->int_type = INTENTRY_TYPE_EXTINT; 210221828Sgrehan break; 211221828Sgrehan case 2: 212221828Sgrehan /* IRQ 0 is routed to pin 2. */ 213256755Sgrehan mpie->int_type = INTENTRY_TYPE_INT; 214256755Sgrehan mpie->src_bus_irq = 0; 215221828Sgrehan break; 216221828Sgrehan case 5: 217221828Sgrehan case 10: 218221828Sgrehan case 11: 219221828Sgrehan /* 220221828Sgrehan * PCI Irqs set to level triggered. 221221828Sgrehan */ 222256755Sgrehan mpie->int_flags = INTENTRY_FLAGS_TRIGGER_LEVEL; 223256755Sgrehan mpie->src_bus_id = 0; 224256755Sgrehan /* fall through.. */ 225221828Sgrehan default: 226221828Sgrehan /* All other pins are identity mapped. */ 227256755Sgrehan mpie->int_type = INTENTRY_TYPE_INT; 228256755Sgrehan mpie->src_bus_irq = pin; 229221828Sgrehan break; 230221828Sgrehan } 231256755Sgrehan mpie++; 232221828Sgrehan } 233221828Sgrehan 234221828Sgrehan} 235221828Sgrehan 236242131Sgrehanvoid 237242131Sgrehanmptable_add_oemtbl(void *tbl, int tblsz) 238242131Sgrehan{ 239242131Sgrehan 240242131Sgrehan oem_tbl_start = tbl; 241242131Sgrehan oem_tbl_size = tblsz; 242242131Sgrehan} 243242131Sgrehan 244221828Sgrehanint 245259496Sgrehanmptable_build(struct vmctx *ctx, int ncpu) 246221828Sgrehan{ 247242131Sgrehan mpcth_t mpch; 248242131Sgrehan bus_entry_ptr mpeb; 249242131Sgrehan io_apic_entry_ptr mpei; 250242131Sgrehan bproc_entry_ptr mpep; 251242131Sgrehan mpfps_t mpfp; 252256755Sgrehan int_entry_ptr mpie; 253242131Sgrehan char *curraddr; 254221828Sgrehan char *startaddr; 255221828Sgrehan 256248477Sneel startaddr = paddr_guest2host(ctx, MPTABLE_BASE, MPTABLE_MAX_LENGTH); 257247523Sneel if (startaddr == NULL) { 258242131Sgrehan printf("mptable requires mapped mem\n"); 259242131Sgrehan return (ENOMEM); 260221828Sgrehan } 261221828Sgrehan 262247523Sneel curraddr = startaddr; 263242131Sgrehan mpfp = (mpfps_t)curraddr; 264242131Sgrehan mpt_build_mpfp(mpfp, MPTABLE_BASE); 265242131Sgrehan curraddr += sizeof(*mpfp); 266221828Sgrehan 267242131Sgrehan mpch = (mpcth_t)curraddr; 268242131Sgrehan mpt_build_mpch(mpch); 269242131Sgrehan curraddr += sizeof(*mpch); 270221828Sgrehan 271242131Sgrehan mpep = (bproc_entry_ptr)curraddr; 272242131Sgrehan mpt_build_proc_entries(mpep, ncpu); 273242131Sgrehan curraddr += sizeof(*mpep) * ncpu; 274242131Sgrehan mpch->entry_count += ncpu; 275221828Sgrehan 276242131Sgrehan mpeb = (bus_entry_ptr) curraddr; 277242131Sgrehan mpt_build_bus_entries(mpeb); 278242131Sgrehan curraddr += sizeof(*mpeb) * MPE_NUM_BUSES; 279242131Sgrehan mpch->entry_count += MPE_NUM_BUSES; 280242131Sgrehan 281259496Sgrehan mpei = (io_apic_entry_ptr)curraddr; 282259496Sgrehan mpt_build_ioapic_entries(mpei, 0); 283259496Sgrehan curraddr += sizeof(*mpei); 284259496Sgrehan mpch->entry_count++; 285239042Sneel 286256755Sgrehan mpie = (int_entry_ptr) curraddr; 287259496Sgrehan mpt_build_ioint_entries(mpie, MPEII_MAX_IRQ, 0); 288256755Sgrehan curraddr += sizeof(*mpie) * MPEII_MAX_IRQ; 289242131Sgrehan mpch->entry_count += MPEII_MAX_IRQ; 290221828Sgrehan 291242131Sgrehan if (oem_tbl_start) { 292242131Sgrehan mpch->oem_table_pointer = curraddr - startaddr + MPTABLE_BASE; 293242131Sgrehan mpch->oem_table_size = oem_tbl_size; 294242131Sgrehan memcpy(curraddr, oem_tbl_start, oem_tbl_size); 295221828Sgrehan } 296221828Sgrehan 297242131Sgrehan mpch->base_table_length = curraddr - (char *)mpch; 298249173Sgrehan mpch->checksum = mpt_compute_checksum(mpch, mpch->base_table_length); 299221828Sgrehan 300242131Sgrehan return (0); 301221828Sgrehan} 302