1181624Skmacy/******************************************************************************
2181624Skmacy * arch-x86/xen.h
3181624Skmacy *
4181624Skmacy * Guest OS interface to x86 Xen.
5181624Skmacy *
6181624Skmacy * Permission is hereby granted, free of charge, to any person obtaining a copy
7181624Skmacy * of this software and associated documentation files (the "Software"), to
8181624Skmacy * deal in the Software without restriction, including without limitation the
9181624Skmacy * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
10181624Skmacy * sell copies of the Software, and to permit persons to whom the Software is
11181624Skmacy * furnished to do so, subject to the following conditions:
12181624Skmacy *
13181624Skmacy * The above copyright notice and this permission notice shall be included in
14181624Skmacy * all copies or substantial portions of the Software.
15181624Skmacy *
16181624Skmacy * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17181624Skmacy * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18181624Skmacy * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19181624Skmacy * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20181624Skmacy * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21181624Skmacy * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22181624Skmacy * DEALINGS IN THE SOFTWARE.
23181624Skmacy *
24181624Skmacy * Copyright (c) 2004-2006, K A Fraser
25181624Skmacy */
26181624Skmacy
27251767Sgibbs#include "../xen.h"
28251767Sgibbs
29181624Skmacy#ifndef __XEN_PUBLIC_ARCH_X86_XEN_H__
30181624Skmacy#define __XEN_PUBLIC_ARCH_X86_XEN_H__
31181624Skmacy
32183340Skmacy/* Structural guest handles introduced in 0x00030201. */
33183340Skmacy#if __XEN_INTERFACE_VERSION__ >= 0x00030201
34183340Skmacy#define ___DEFINE_XEN_GUEST_HANDLE(name, type) \
35183340Skmacy    typedef struct { type *p; } __guest_handle_ ## name
36183340Skmacy#else
37251767Sgibbs#define ___DEFINE_XEN_GUEST_HANDLE(name, type) \
38183340Skmacy    typedef type * __guest_handle_ ## name
39183340Skmacy#endif
40183340Skmacy
41183340Skmacy#define __DEFINE_XEN_GUEST_HANDLE(name, type) \
42183340Skmacy    ___DEFINE_XEN_GUEST_HANDLE(name, type);   \
43183340Skmacy    ___DEFINE_XEN_GUEST_HANDLE(const_##name, const type)
44183340Skmacy#define DEFINE_XEN_GUEST_HANDLE(name)   __DEFINE_XEN_GUEST_HANDLE(name, name)
45183340Skmacy#define __XEN_GUEST_HANDLE(name)        __guest_handle_ ## name
46183340Skmacy#define XEN_GUEST_HANDLE(name)          __XEN_GUEST_HANDLE(name)
47251767Sgibbs#define set_xen_guest_handle_raw(hnd, val)  do { (hnd).p = val; } while (0)
48183340Skmacy#ifdef __XEN_TOOLS__
49183340Skmacy#define get_xen_guest_handle(val, hnd)  do { val = (hnd).p; } while (0)
50183340Skmacy#endif
51251767Sgibbs#define set_xen_guest_handle(hnd, val) set_xen_guest_handle_raw(hnd, val)
52183340Skmacy
53181624Skmacy#if defined(__i386__)
54251767Sgibbs#include "xen-x86_32.h"
55181624Skmacy#elif defined(__x86_64__)
56251767Sgibbs#include "xen-x86_64.h"
57181624Skmacy#endif
58181624Skmacy
59181624Skmacy#ifndef __ASSEMBLY__
60181624Skmacytypedef unsigned long xen_pfn_t;
61181624Skmacy#define PRI_xen_pfn "lx"
62181624Skmacy#endif
63181624Skmacy
64181624Skmacy/*
65181624Skmacy * SEGMENT DESCRIPTOR TABLES
66181624Skmacy */
67181624Skmacy/*
68251767Sgibbs * ` enum neg_errnoval
69251767Sgibbs * ` HYPERVISOR_set_gdt(const xen_pfn_t frames[], unsigned int entries);
70251767Sgibbs * `
71251767Sgibbs */
72251767Sgibbs/*
73181624Skmacy * A number of GDT entries are reserved by Xen. These are not situated at the
74181624Skmacy * start of the GDT because some stupid OSes export hard-coded selector values
75181624Skmacy * in their ABI. These hard-coded values are always near the start of the GDT,
76181624Skmacy * so Xen places itself out of the way, at the far end of the GDT.
77181624Skmacy */
78181624Skmacy#define FIRST_RESERVED_GDT_PAGE  14
79181624Skmacy#define FIRST_RESERVED_GDT_BYTE  (FIRST_RESERVED_GDT_PAGE * 4096)
80181624Skmacy#define FIRST_RESERVED_GDT_ENTRY (FIRST_RESERVED_GDT_BYTE / 8)
81181624Skmacy
82251767Sgibbs/* Maximum number of virtual CPUs in legacy multi-processor guests. */
83251767Sgibbs#define XEN_LEGACY_MAX_VCPUS 32
84181624Skmacy
85181624Skmacy#ifndef __ASSEMBLY__
86181624Skmacy
87181624Skmacytypedef unsigned long xen_ulong_t;
88181624Skmacy
89181624Skmacy/*
90251767Sgibbs * ` enum neg_errnoval
91251767Sgibbs * ` HYPERVISOR_stack_switch(unsigned long ss, unsigned long esp);
92251767Sgibbs * `
93251767Sgibbs * Sets the stack segment and pointer for the current vcpu.
94251767Sgibbs */
95251767Sgibbs
96251767Sgibbs/*
97251767Sgibbs * ` enum neg_errnoval
98251767Sgibbs * ` HYPERVISOR_set_trap_table(const struct trap_info traps[]);
99251767Sgibbs * `
100251767Sgibbs */
101251767Sgibbs/*
102181624Skmacy * Send an array of these to HYPERVISOR_set_trap_table().
103251767Sgibbs * Terminate the array with a sentinel entry, with traps[].address==0.
104181624Skmacy * The privilege level specifies which modes may enter a trap via a software
105181624Skmacy * interrupt. On x86/64, since rings 1 and 2 are unavailable, we allocate
106181624Skmacy * privilege levels as follows:
107181624Skmacy *  Level == 0: Noone may enter
108181624Skmacy *  Level == 1: Kernel may enter
109181624Skmacy *  Level == 2: Kernel may enter
110181624Skmacy *  Level == 3: Everyone may enter
111181624Skmacy */
112181624Skmacy#define TI_GET_DPL(_ti)      ((_ti)->flags & 3)
113181624Skmacy#define TI_GET_IF(_ti)       ((_ti)->flags & 4)
114181624Skmacy#define TI_SET_DPL(_ti,_dpl) ((_ti)->flags |= (_dpl))
115181624Skmacy#define TI_SET_IF(_ti,_if)   ((_ti)->flags |= ((!!(_if))<<2))
116181624Skmacystruct trap_info {
117181624Skmacy    uint8_t       vector;  /* exception vector                              */
118181624Skmacy    uint8_t       flags;   /* 0-3: privilege level; 4: clear event enable?  */
119181624Skmacy    uint16_t      cs;      /* code selector                                 */
120181624Skmacy    unsigned long address; /* code offset                                   */
121181624Skmacy};
122181624Skmacytypedef struct trap_info trap_info_t;
123181624SkmacyDEFINE_XEN_GUEST_HANDLE(trap_info_t);
124181624Skmacy
125181624Skmacytypedef uint64_t tsc_timestamp_t; /* RDTSC timestamp */
126181624Skmacy
127181624Skmacy/*
128181624Skmacy * The following is all CPU context. Note that the fpu_ctxt block is filled
129181624Skmacy * in by FXSAVE if the CPU has feature FXSR; otherwise FSAVE is used.
130181624Skmacy */
131181624Skmacystruct vcpu_guest_context {
132181624Skmacy    /* FPU registers come first so they can be aligned for FXSAVE/FXRSTOR. */
133181624Skmacy    struct { char x[512]; } fpu_ctxt;       /* User-level FPU registers     */
134181624Skmacy#define VGCF_I387_VALID                (1<<0)
135181624Skmacy#define VGCF_IN_KERNEL                 (1<<2)
136181624Skmacy#define _VGCF_i387_valid               0
137181624Skmacy#define VGCF_i387_valid                (1<<_VGCF_i387_valid)
138181624Skmacy#define _VGCF_in_kernel                2
139181624Skmacy#define VGCF_in_kernel                 (1<<_VGCF_in_kernel)
140181624Skmacy#define _VGCF_failsafe_disables_events 3
141181624Skmacy#define VGCF_failsafe_disables_events  (1<<_VGCF_failsafe_disables_events)
142181624Skmacy#define _VGCF_syscall_disables_events  4
143181624Skmacy#define VGCF_syscall_disables_events   (1<<_VGCF_syscall_disables_events)
144181624Skmacy#define _VGCF_online                   5
145181624Skmacy#define VGCF_online                    (1<<_VGCF_online)
146181624Skmacy    unsigned long flags;                    /* VGCF_* flags                 */
147181624Skmacy    struct cpu_user_regs user_regs;         /* User-level CPU registers     */
148181624Skmacy    struct trap_info trap_ctxt[256];        /* Virtual IDT                  */
149181624Skmacy    unsigned long ldt_base, ldt_ents;       /* LDT (linear address, # ents) */
150181624Skmacy    unsigned long gdt_frames[16], gdt_ents; /* GDT (machine frames, # ents) */
151181624Skmacy    unsigned long kernel_ss, kernel_sp;     /* Virtual TSS (only SS1/SP1)   */
152181624Skmacy    /* NB. User pagetable on x86/64 is placed in ctrlreg[1]. */
153181624Skmacy    unsigned long ctrlreg[8];               /* CR0-CR7 (control registers)  */
154181624Skmacy    unsigned long debugreg[8];              /* DB0-DB7 (debug registers)    */
155181624Skmacy#ifdef __i386__
156181624Skmacy    unsigned long event_callback_cs;        /* CS:EIP of event callback     */
157181624Skmacy    unsigned long event_callback_eip;
158181624Skmacy    unsigned long failsafe_callback_cs;     /* CS:EIP of failsafe callback  */
159181624Skmacy    unsigned long failsafe_callback_eip;
160181624Skmacy#else
161181624Skmacy    unsigned long event_callback_eip;
162181624Skmacy    unsigned long failsafe_callback_eip;
163181624Skmacy#ifdef __XEN__
164181624Skmacy    union {
165181624Skmacy        unsigned long syscall_callback_eip;
166181624Skmacy        struct {
167181624Skmacy            unsigned int event_callback_cs;    /* compat CS of event cb     */
168181624Skmacy            unsigned int failsafe_callback_cs; /* compat CS of failsafe cb  */
169181624Skmacy        };
170251767Sgibbs    };
171181624Skmacy#else
172181624Skmacy    unsigned long syscall_callback_eip;
173181624Skmacy#endif
174181624Skmacy#endif
175181624Skmacy    unsigned long vm_assist;                /* VMASST_TYPE_* bitmap */
176181624Skmacy#ifdef __x86_64__
177181624Skmacy    /* Segment base addresses. */
178181624Skmacy    uint64_t      fs_base;
179181624Skmacy    uint64_t      gs_base_kernel;
180181624Skmacy    uint64_t      gs_base_user;
181181624Skmacy#endif
182181624Skmacy};
183181624Skmacytypedef struct vcpu_guest_context vcpu_guest_context_t;
184181624SkmacyDEFINE_XEN_GUEST_HANDLE(vcpu_guest_context_t);
185181624Skmacy
186181624Skmacystruct arch_shared_info {
187181624Skmacy    unsigned long max_pfn;                  /* max pfn that appears in table */
188181624Skmacy    /* Frame containing list of mfns containing list of mfns containing p2m. */
189181624Skmacy    xen_pfn_t     pfn_to_mfn_frame_list_list;
190181624Skmacy    unsigned long nmi_reason;
191181624Skmacy    uint64_t pad[32];
192181624Skmacy};
193181624Skmacytypedef struct arch_shared_info arch_shared_info_t;
194181624Skmacy
195181624Skmacy#endif /* !__ASSEMBLY__ */
196181624Skmacy
197181624Skmacy/*
198251767Sgibbs * ` enum neg_errnoval
199251767Sgibbs * ` HYPERVISOR_fpu_taskswitch(int set);
200251767Sgibbs * `
201251767Sgibbs * Sets (if set!=0) or clears (if set==0) CR0.TS.
202251767Sgibbs */
203251767Sgibbs
204251767Sgibbs/*
205251767Sgibbs * ` enum neg_errnoval
206251767Sgibbs * ` HYPERVISOR_set_debugreg(int regno, unsigned long value);
207251767Sgibbs *
208251767Sgibbs * ` unsigned long
209251767Sgibbs * ` HYPERVISOR_get_debugreg(int regno);
210251767Sgibbs * For 0<=reg<=7, returns the debug register value.
211251767Sgibbs * For other values of reg, returns ((unsigned long)-EINVAL).
212251767Sgibbs * (Unfortunately, this interface is defective.)
213251767Sgibbs */
214251767Sgibbs
215251767Sgibbs/*
216181624Skmacy * Prefix forces emulation of some non-trapping instructions.
217181624Skmacy * Currently only CPUID.
218181624Skmacy */
219181624Skmacy#ifdef __ASSEMBLY__
220181624Skmacy#define XEN_EMULATE_PREFIX .byte 0x0f,0x0b,0x78,0x65,0x6e ;
221181624Skmacy#define XEN_CPUID          XEN_EMULATE_PREFIX cpuid
222181624Skmacy#else
223181624Skmacy#define XEN_EMULATE_PREFIX ".byte 0x0f,0x0b,0x78,0x65,0x6e ; "
224181624Skmacy#define XEN_CPUID          XEN_EMULATE_PREFIX "cpuid"
225181624Skmacy#endif
226181624Skmacy
227181624Skmacy#endif /* __XEN_PUBLIC_ARCH_X86_XEN_H__ */
228181624Skmacy
229181624Skmacy/*
230181624Skmacy * Local variables:
231181624Skmacy * mode: C
232181624Skmacy * c-set-style: "BSD"
233181624Skmacy * c-basic-offset: 4
234181624Skmacy * tab-width: 4
235181624Skmacy * indent-tabs-mode: nil
236181624Skmacy * End:
237181624Skmacy */
238