isa.c revision 976
1/*- 2 * Copyright (c) 1991 The Regents of the University of California. 3 * All rights reserved. 4 * 5 * This code is derived from software contributed to Berkeley by 6 * William Jolitz. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by the University of 19 * California, Berkeley and its contributors. 20 * 4. Neither the name of the University nor the names of its contributors 21 * may be used to endorse or promote products derived from this software 22 * without specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 27 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 34 * SUCH DAMAGE. 35 * 36 * from: @(#)isa.c 7.2 (Berkeley) 5/13/91 37 * $Id: isa.c,v 1.11 1993/12/19 00:50:41 wollman Exp $ 38 */ 39 40/* 41 * code to manage AT bus 42 * 43 * 92/08/18 Frank P. MacLachlan (fpm@crash.cts.com): 44 * Fixed uninitialized variable problem and added code to deal 45 * with DMA page boundaries in isa_dmarangecheck(). Fixed word 46 * mode DMA count compution and reorganized DMA setup code in 47 * isa_dmastart() 48 */ 49 50#include "param.h" 51#include "systm.h" /* isn't it a joy */ 52#include "kernel.h" /* to have three of these */ 53#include "conf.h" 54#include "file.h" 55#include "buf.h" 56#include "uio.h" 57#include "syslog.h" 58#include "malloc.h" 59#include "rlist.h" 60#include "machine/segments.h" 61#include "vm/vm.h" 62#include "i386/isa/isa_device.h" 63#include "i386/isa/isa.h" 64#include "i386/isa/icu.h" 65#include "i386/isa/ic/i8237.h" 66#include "i386/isa/ic/i8042.h" 67 68/* 69** Register definitions for DMA controller 1 (channels 0..3): 70*/ 71#define DMA1_CHN(c) (IO_DMA1 + 1*(2*(c))) /* addr reg for channel c */ 72#define DMA1_SMSK (IO_DMA1 + 1*10) /* single mask register */ 73#define DMA1_MODE (IO_DMA1 + 1*11) /* mode register */ 74#define DMA1_FFC (IO_DMA1 + 1*12) /* clear first/last FF */ 75 76/* 77** Register definitions for DMA controller 2 (channels 4..7): 78*/ 79#define DMA2_CHN(c) (IO_DMA2 + 2*(2*(c))) /* addr reg for channel c */ 80#define DMA2_SMSK (IO_DMA2 + 2*10) /* single mask register */ 81#define DMA2_MODE (IO_DMA2 + 2*11) /* mode register */ 82#define DMA2_FFC (IO_DMA2 + 2*12) /* clear first/last FF */ 83 84void config_isadev __P((struct isa_device *, u_int *)); 85 86/* 87 * print a conflict message 88 */ 89void 90conflict(dvp, tmpdvp, item, reason, format) 91 struct isa_device *dvp, *tmpdvp; 92 int item; 93 char *reason; 94 char *format; 95{ 96 printf("%s%d not probed due to %s conflict with %s%d at ", 97 dvp->id_driver->name, dvp->id_unit, reason, 98 tmpdvp->id_driver->name, tmpdvp->id_unit); 99 printf(format, item); 100 printf("\n"); 101} 102 103/* 104 * Check to see if things are alread in use, like IRQ's, I/O addresses 105 * and Memory addresses. 106 */ 107int 108haveseen(dvp, tmpdvp) 109 struct isa_device *dvp, *tmpdvp; 110{ 111 int status = 0; 112 113 /* 114 * Only check against devices that have already been found 115 */ 116 if (tmpdvp->id_alive) { 117 /* 118 * Check for I/O address conflict. We can only check the 119 * starting address of the device against the range of the 120 * device that has already been probed since we do not 121 * know how many I/O addresses this device uses. 122 */ 123 if (tmpdvp->id_alive != -1) { 124 if ((dvp->id_iobase >= tmpdvp->id_iobase) && 125 (dvp->id_iobase <= 126 (tmpdvp->id_iobase + tmpdvp->id_alive - 1))) { 127 conflict(dvp, tmpdvp, dvp->id_iobase, 128 "I/O address", "0x%x"); 129 status = 1; 130 } 131 } 132 /* 133 * Check for Memory address conflict. We can check for 134 * range overlap, but it will not catch all cases since the 135 * driver may adjust the msize paramater during probe, for 136 * now we just check that the starting address does not 137 * fall within any allocated region. 138 * XXX could add a second check after the probe for overlap, 139 * since at that time we would know the full range. 140 * XXX KERNBASE is a hack, we should have vaddr in the table! 141 */ 142 if(tmpdvp->id_maddr) { 143 if((KERNBASE + dvp->id_maddr >= tmpdvp->id_maddr) && 144 (KERNBASE + dvp->id_maddr <= 145 (tmpdvp->id_maddr + tmpdvp->id_msize - 1))) { 146 conflict(dvp, tmpdvp, dvp->id_maddr, "maddr", 147 "0x%x"); 148 status = 1; 149 } 150 } 151#ifndef COM_MULTIPORT 152 /* 153 * Check for IRQ conflicts. 154 */ 155 if(tmpdvp->id_irq) { 156 if (tmpdvp->id_irq == dvp->id_irq) { 157 conflict(dvp, tmpdvp, ffs(dvp->id_irq) - 1, 158 "irq", "%d"); 159 status = 1; 160 } 161 } 162#endif 163 /* 164 * Check for DRQ conflicts. 165 */ 166 if(tmpdvp->id_drq != -1) { 167 if (tmpdvp->id_drq == dvp->id_drq) { 168 conflict(dvp, tmpdvp, dvp->id_drq, 169 "drq", "%d"); 170 status = 1; 171 } 172 } 173 } 174 return (status); 175} 176 177/* 178 * Search through all the isa_devtab_* tables looking for anything that 179 * conflicts with the current device. 180 */ 181int 182haveseen_isadev(dvp) 183 struct isa_device *dvp; 184{ 185 struct isa_device *tmpdvp; 186 int status = 0; 187 188 for (tmpdvp = isa_devtab_tty; tmpdvp->id_driver; tmpdvp++) { 189 status |= haveseen(dvp, tmpdvp); 190 } 191 for (tmpdvp = isa_devtab_bio; tmpdvp->id_driver; tmpdvp++) { 192 status |= haveseen(dvp, tmpdvp); 193 } 194 for (tmpdvp = isa_devtab_net; tmpdvp->id_driver; tmpdvp++) { 195 status |= haveseen(dvp, tmpdvp); 196 } 197 for (tmpdvp = isa_devtab_null; tmpdvp->id_driver; tmpdvp++) { 198 status |= haveseen(dvp, tmpdvp); 199 } 200 return(status); 201} 202 203/* 204 * Configure all ISA devices 205 */ 206void 207isa_configure() { 208 struct isa_device *dvp; 209 210 enable_intr(); 211 splhigh(); 212 INTREN(IRQ_SLAVE); 213 printf("Probing for devices on the ISA bus:\n"); 214 for (dvp = isa_devtab_tty; dvp->id_driver; dvp++) { 215 if (!haveseen_isadev(dvp)) 216 config_isadev(dvp,&ttymask); 217 } 218 for (dvp = isa_devtab_bio; dvp->id_driver; dvp++) { 219 if (!haveseen_isadev(dvp)) 220 config_isadev(dvp,&biomask); 221 } 222 for (dvp = isa_devtab_net; dvp->id_driver; dvp++) { 223 if (!haveseen_isadev(dvp)) 224 config_isadev(dvp,&netmask); 225 } 226 for (dvp = isa_devtab_null; dvp->id_driver; dvp++) { 227 if (!haveseen_isadev(dvp)) 228 config_isadev(dvp,(u_int *) NULL); 229 } 230/* 231 * XXX We should really add the tty device to netmask when the line is 232 * switched to SLIPDISC, and then remove it when it is switched away from 233 * SLIPDISC. No need to block out ALL ttys during a splnet when only one 234 * of them is running slip. 235 */ 236#include "sl.h" 237#if NSL > 0 238 netmask |= ttymask; 239 ttymask |= netmask; 240#endif 241 /* if netmask == 0, then the loopback code can do some really 242 * bad things. 243 */ 244 if (netmask == 0) 245 netmask = 0x10000; 246 /* biomask |= ttymask ; can some tty devices use buffers? */ 247 printf("biomask %x ttymask %x netmask %x\n", biomask, ttymask, netmask); 248 splnone(); 249} 250 251/* 252 * Configure an ISA device. 253 */ 254void 255config_isadev(isdp, mp) 256 struct isa_device *isdp; 257 u_int *mp; 258{ 259 struct isa_driver *dp = isdp->id_driver; 260 261 if (isdp->id_maddr) { 262 extern u_int atdevbase; 263 264 isdp->id_maddr -= 0xa0000; /* XXX should be a define */ 265 isdp->id_maddr += atdevbase; 266 } 267 isdp->id_alive = (*dp->probe)(isdp); 268 if (isdp->id_alive) { 269 /* 270 * Only print the I/O address range if id_alive != -1 271 * Right now this is a temporary fix just for the new 272 * NPX code so that if it finds a 486 that can use trap 273 * 16 it will not report I/O addresses. 274 * Rod Grimes 04/26/94 275 */ 276 printf("%s%d", dp->name, isdp->id_unit); 277 if (isdp->id_alive != -1) { 278 printf(" at 0x%x", isdp->id_iobase); 279 if ((isdp->id_iobase + isdp->id_alive - 1) != 280 isdp->id_iobase) { 281 printf("-0x%x", 282 isdp->id_iobase + 283 isdp->id_alive - 1); 284 } 285 } 286 if(isdp->id_irq) 287 printf(" irq %d", ffs(isdp->id_irq) - 1); 288 if (isdp->id_drq != -1) 289 printf(" drq %d", isdp->id_drq); 290 if (isdp->id_maddr) 291 printf(" maddr 0x%x", kvtop(isdp->id_maddr)); 292 if (isdp->id_msize) 293 printf(" msize %d", isdp->id_msize); 294 if (isdp->id_flags) 295 printf(" flags 0x%x", isdp->id_flags); 296 if (isdp->id_iobase && isdp->id_iobase < 0x100)) 297 printf(" on motherboard\n"); 298 else 299 printf(" on isa\n"); 300 301 (*dp->attach)(isdp); 302 303 if(isdp->id_irq) { 304 int intrno; 305 306 intrno = ffs(isdp->id_irq)-1; 307 setidt(ICU_OFFSET+intrno, isdp->id_intr, 308 SDT_SYS386IGT, SEL_KPL); 309 if(mp) { 310 INTRMASK(*mp,isdp->id_irq); 311 } 312 INTREN(isdp->id_irq); 313 } 314 } else { 315 printf("%s%d not found", dp->name, isdp->id_unit); 316 if (isdp->id_iobase) { 317 printf(" at 0x%x", isdp->id_iobase); 318 } 319 printf("\n"); 320 } 321} 322 323#define IDTVEC(name) __CONCAT(X,name) 324/* default interrupt vector table entries */ 325typedef void inthand_t(); 326typedef void (*inthand_func_t)(); 327extern inthand_t 328 IDTVEC(intr0), IDTVEC(intr1), IDTVEC(intr2), IDTVEC(intr3), 329 IDTVEC(intr4), IDTVEC(intr5), IDTVEC(intr6), IDTVEC(intr7), 330 IDTVEC(intr8), IDTVEC(intr9), IDTVEC(intr10), IDTVEC(intr11), 331 IDTVEC(intr12), IDTVEC(intr13), IDTVEC(intr14), IDTVEC(intr15); 332 333static inthand_func_t defvec[16] = { 334 &IDTVEC(intr0), &IDTVEC(intr1), &IDTVEC(intr2), &IDTVEC(intr3), 335 &IDTVEC(intr4), &IDTVEC(intr5), &IDTVEC(intr6), &IDTVEC(intr7), 336 &IDTVEC(intr8), &IDTVEC(intr9), &IDTVEC(intr10), &IDTVEC(intr11), 337 &IDTVEC(intr12), &IDTVEC(intr13), &IDTVEC(intr14), &IDTVEC(intr15) }; 338 339/* out of range default interrupt vector gate entry */ 340extern inthand_t IDTVEC(intrdefault); 341 342/* 343 * Fill in default interrupt table (in case of spuruious interrupt 344 * during configuration of kernel, setup interrupt control unit 345 */ 346void 347isa_defaultirq() 348{ 349 int i; 350 351 /* icu vectors */ 352 for (i = NRSVIDT ; i < NRSVIDT+ICU_LEN ; i++) 353 setidt(i, defvec[i], SDT_SYS386IGT, SEL_KPL); 354 355 /* out of range vectors */ 356 for (i = NRSVIDT; i < NIDT; i++) 357 setidt(i, &IDTVEC(intrdefault), SDT_SYS386IGT, SEL_KPL); 358 359 /* initialize 8259's */ 360 outb(IO_ICU1, 0x11); /* reset; program device, four bytes */ 361 outb(IO_ICU1+1, NRSVIDT); /* starting at this vector index */ 362 outb(IO_ICU1+1, 1<<2); /* slave on line 2 */ 363#ifdef AUTO_EOI_1 364 outb(IO_ICU1+1, 2 | 1); /* auto EOI, 8086 mode */ 365#else 366 outb(IO_ICU1+1, 1); /* 8086 mode */ 367#endif 368 outb(IO_ICU1+1, 0xff); /* leave interrupts masked */ 369 outb(IO_ICU1, 0x0a); /* default to IRR on read */ 370 outb(IO_ICU1, 0xc0 | (3 - 1)); /* pri order 3-7, 0-2 (com2 first) */ 371 372 outb(IO_ICU2, 0x11); /* reset; program device, four bytes */ 373 outb(IO_ICU2+1, NRSVIDT+8); /* staring at this vector index */ 374 outb(IO_ICU2+1,2); /* my slave id is 2 */ 375#ifdef AUTO_EOI_2 376 outb(IO_ICU2+1, 2 | 1); /* auto EOI, 8086 mode */ 377#else 378 outb(IO_ICU2+1,1); /* 8086 mode */ 379#endif 380 outb(IO_ICU2+1, 0xff); /* leave interrupts masked */ 381 outb(IO_ICU2, 0x0a); /* default to IRR on read */ 382} 383 384/* region of physical memory known to be contiguous */ 385vm_offset_t isaphysmem; 386static caddr_t dma_bounce[8]; /* XXX */ 387static char bounced[8]; /* XXX */ 388#define MAXDMASZ 512 /* XXX */ 389 390/* high byte of address is stored in this port for i-th dma channel */ 391static short dmapageport[8] = 392 { 0x87, 0x83, 0x81, 0x82, 0x8f, 0x8b, 0x89, 0x8a }; 393 394/* 395 * isa_dmacascade(): program 8237 DMA controller channel to accept 396 * external dma control by a board. 397 */ 398void isa_dmacascade(unsigned chan) 399{ 400 if (chan > 7) 401 panic("isa_dmacascade: impossible request"); 402 403 /* set dma channel mode, and set dma channel mode */ 404 if ((chan & 4) == 0) { 405 outb(DMA1_MODE, DMA37MD_CASCADE | chan); 406 outb(DMA1_SMSK, chan); 407 } else { 408 outb(DMA2_MODE, DMA37MD_CASCADE | (chan & 3)); 409 outb(DMA2_SMSK, chan & 3); 410 } 411} 412 413/* 414 * isa_dmastart(): program 8237 DMA controller channel, avoid page alignment 415 * problems by using a bounce buffer. 416 */ 417void isa_dmastart(int flags, caddr_t addr, unsigned nbytes, unsigned chan) 418{ vm_offset_t phys; 419 int waport; 420 caddr_t newaddr; 421 422 if ( chan > 7 423 || (chan < 4 && nbytes > (1<<16)) 424 || (chan >= 4 && (nbytes > (1<<17) || (u_int)addr & 1))) 425 panic("isa_dmastart: impossible request"); 426 427 if (isa_dmarangecheck(addr, nbytes, chan)) { 428 if (dma_bounce[chan] == 0) 429 dma_bounce[chan] = 430 /*(caddr_t)malloc(MAXDMASZ, M_TEMP, M_WAITOK);*/ 431 (caddr_t) isaphysmem + NBPG*chan; 432 bounced[chan] = 1; 433 newaddr = dma_bounce[chan]; 434 *(int *) newaddr = 0; /* XXX */ 435 436 /* copy bounce buffer on write */ 437 if (!(flags & B_READ)) 438 bcopy(addr, newaddr, nbytes); 439 addr = newaddr; 440 } 441 442 /* translate to physical */ 443 phys = pmap_extract(pmap_kernel(), (vm_offset_t)addr); 444 445 if ((chan & 4) == 0) { 446 /* 447 * Program one of DMA channels 0..3. These are 448 * byte mode channels. 449 */ 450 /* set dma channel mode, and reset address ff */ 451 if (flags & B_READ) 452 outb(DMA1_MODE, DMA37MD_SINGLE|DMA37MD_WRITE|chan); 453 else 454 outb(DMA1_MODE, DMA37MD_SINGLE|DMA37MD_READ|chan); 455 outb(DMA1_FFC, 0); 456 457 /* send start address */ 458 waport = DMA1_CHN(chan); 459 outb(waport, phys); 460 outb(waport, phys>>8); 461 outb(dmapageport[chan], phys>>16); 462 463 /* send count */ 464 outb(waport + 1, --nbytes); 465 outb(waport + 1, nbytes>>8); 466 467 /* unmask channel */ 468 outb(DMA1_SMSK, chan); 469 } else { 470 /* 471 * Program one of DMA channels 4..7. These are 472 * word mode channels. 473 */ 474 /* set dma channel mode, and reset address ff */ 475 if (flags & B_READ) 476 outb(DMA2_MODE, DMA37MD_SINGLE|DMA37MD_WRITE|(chan&3)); 477 else 478 outb(DMA2_MODE, DMA37MD_SINGLE|DMA37MD_READ|(chan&3)); 479 outb(DMA2_FFC, 0); 480 481 /* send start address */ 482 waport = DMA2_CHN(chan - 4); 483 outb(waport, phys>>1); 484 outb(waport, phys>>9); 485 outb(dmapageport[chan], phys>>16); 486 487 /* send count */ 488 nbytes >>= 1; 489 outb(waport + 2, --nbytes); 490 outb(waport + 2, nbytes>>8); 491 492 /* unmask channel */ 493 outb(DMA2_SMSK, chan & 3); 494 } 495} 496 497void isa_dmadone(int flags, caddr_t addr, int nbytes, int chan) 498{ 499 500 /* copy bounce buffer on read */ 501 /*if ((flags & (B_PHYS|B_READ)) == (B_PHYS|B_READ))*/ 502 if (bounced[chan]) { 503 bcopy(dma_bounce[chan], addr, nbytes); 504 bounced[chan] = 0; 505 } 506} 507 508/* 509 * Check for problems with the address range of a DMA transfer 510 * (non-contiguous physical pages, outside of bus address space, 511 * crossing DMA page boundaries). 512 * Return true if special handling needed. 513 */ 514 515int 516isa_dmarangecheck(caddr_t va, unsigned length, unsigned chan) { 517 vm_offset_t phys, priorpage = 0, endva; 518 u_int dma_pgmsk = (chan & 4) ? ~(128*1024-1) : ~(64*1024-1); 519 520 endva = (vm_offset_t)round_page(va + length); 521 for (; va < (caddr_t) endva ; va += NBPG) { 522 phys = trunc_page(pmap_extract(pmap_kernel(), (vm_offset_t)va)); 523#define ISARAM_END RAM_END 524 if (phys == 0) 525 panic("isa_dmacheck: no physical page present"); 526 if (phys > ISARAM_END) 527 return (1); 528 if (priorpage) { 529 if (priorpage + NBPG != phys) 530 return (1); 531 /* check if crossing a DMA page boundary */ 532 if (((u_int)priorpage ^ (u_int)phys) & dma_pgmsk) 533 return (1); 534 } 535 priorpage = phys; 536 } 537 return (0); 538} 539 540/* head of queue waiting for physmem to become available */ 541struct buf isa_physmemq; 542 543/* blocked waiting for resource to become free for exclusive use */ 544static isaphysmemflag; 545/* if waited for and call requested when free (B_CALL) */ 546static void (*isaphysmemunblock)(); /* needs to be a list */ 547 548/* 549 * Allocate contiguous physical memory for transfer, returning 550 * a *virtual* address to region. May block waiting for resource. 551 * (assumed to be called at splbio()) 552 */ 553caddr_t 554isa_allocphysmem(caddr_t va, unsigned length, void (*func)()) { 555 556 isaphysmemunblock = func; 557 while (isaphysmemflag & B_BUSY) { 558 isaphysmemflag |= B_WANTED; 559 tsleep((caddr_t)&isaphysmemflag, PRIBIO, "isaphys", 0); 560 } 561 isaphysmemflag |= B_BUSY; 562 563 return((caddr_t)isaphysmem); 564} 565 566/* 567 * Free contiguous physical memory used for transfer. 568 * (assumed to be called at splbio()) 569 */ 570void 571isa_freephysmem(caddr_t va, unsigned length) { 572 573 isaphysmemflag &= ~B_BUSY; 574 if (isaphysmemflag & B_WANTED) { 575 isaphysmemflag &= B_WANTED; 576 wakeup((caddr_t)&isaphysmemflag); 577 if (isaphysmemunblock) 578 (*isaphysmemunblock)(); 579 } 580} 581 582/* 583 * Handle a NMI, possibly a machine check. 584 * return true to panic system, false to ignore. 585 */ 586int 587isa_nmi(cd) 588 int cd; 589{ 590 591 log(LOG_CRIT, "\nNMI port 61 %x, port 70 %x\n", inb(0x61), inb(0x70)); 592 return(0); 593} 594 595/* 596 * Caught a stray interrupt, notify 597 */ 598void 599isa_strayintr(d) 600 int d; 601{ 602 603 /* DON'T BOTHER FOR NOW! */ 604 /* for some reason, we get bursts of intr #7, even if not enabled! */ 605 /* 606 * Well the reason you got bursts of intr #7 is because someone 607 * raised an interrupt line and dropped it before the 8259 could 608 * prioritize it. This is documented in the intel data book. This 609 * means you have BAD hardware! I have changed this so that only 610 * the first 5 get logged, then it quits logging them, and puts 611 * out a special message. rgrimes 3/25/1993 612 */ 613 extern u_long intrcnt_stray; 614 615 intrcnt_stray++; 616 if (intrcnt_stray <= 5) 617 log(LOG_ERR,"ISA strayintr %x\n", d); 618 if (intrcnt_stray == 5) 619 log(LOG_CRIT,"Too many ISA strayintr not logging any more\n"); 620} 621 622/* 623 * Wait "n" microseconds. 624 * Relies on timer 1 counting down from (TIMER_FREQ / hz) at 625 * (1 * TIMER_FREQ) Hz. 626 * Note: timer had better have been programmed before this is first used! 627 * (The standard programming causes the timer to generate a square wave and 628 * the counter is decremented twice every cycle.) 629 */ 630#define CF (1 * TIMER_FREQ) 631#define TIMER_FREQ 1193182 /* XXX - should be elsewhere */ 632 633void 634DELAY(n) 635 int n; 636{ 637 int counter_limit; 638 int prev_tick; 639 int tick; 640 int ticks_left; 641 int sec; 642 int usec; 643 644#ifdef DELAYDEBUG 645 int getit_calls = 1; 646 int n1; 647 static int state = 0; 648 649 if (state == 0) { 650 state = 1; 651 for (n1 = 1; n1 <= 10000000; n1 *= 10) 652 DELAY(n1); 653 state = 2; 654 } 655 if (state == 1) 656 printf("DELAY(%d)...", n); 657#endif 658 659 /* 660 * Read the counter first, so that the rest of the setup overhead is 661 * counted. Guess the initial overhead is 20 usec (on most systems it 662 * takes about 1.5 usec for each of the i/o's in getit(). The loop 663 * takes about 6 usec on a 486/33 and 13 usec on a 386/20. The 664 * multiplications and divisions to scale the count take a while). 665 */ 666 prev_tick = getit(0, 0); 667 n -= 20; 668 669 /* 670 * Calculate (n * (CF / 1e6)) without using floating point and without 671 * any avoidable overflows. 672 */ 673 sec = n / 1000000; 674 usec = n - sec * 1000000; 675 ticks_left = sec * CF 676 + usec * (CF / 1000000) 677 + usec * ((CF % 1000000) / 1000) / 1000 678 + usec * (CF % 1000) / 1000000; 679 680 counter_limit = TIMER_FREQ / hz; 681 while (ticks_left > 0) { 682 tick = getit(0, 0); 683#ifdef DELAYDEBUG 684 ++getit_calls; 685#endif 686 if (tick > prev_tick) 687 ticks_left -= prev_tick - (tick - counter_limit); 688 else 689 ticks_left -= prev_tick - tick; 690 prev_tick = tick; 691 } 692#ifdef DELAYDEBUG 693 if (state == 1) 694 printf(" %d calls to getit() at %d usec each\n", 695 getit_calls, (n + 5) / getit_calls); 696#endif 697} 698 699int 700getit(unit, timer) 701 int unit; 702 int timer; 703{ 704 int high; 705 int low; 706 707 /* 708 * XXX - isa.h defines bogus timers. There's no such timer as 709 * IO_TIMER_2 = 0x48. There's a timer in the CMOS RAM chip but 710 * its interface is quite different. Neither timer is an 8252. 711 * We actually only call this with unit = 0 and timer = 0. It 712 * could be static... 713 */ 714 /* 715 * Protect ourself against interrupts. 716 * XXX - sysbeep() and sysbeepstop() need protection. 717 */ 718 disable_intr(); 719 /* 720 * Latch the count for 'timer' (cc00xxxx, c = counter, x = any). 721 */ 722 outb(IO_TIMER1 + 3, timer << 6); 723 724 low = inb(IO_TIMER1 + timer); 725 high = inb(IO_TIMER1 + timer); 726 enable_intr(); 727 return ((high << 8) | low); 728} 729 730static int beeping; 731 732static void 733sysbeepstop(f, dummy) 734 caddr_t f; 735 int dummy; 736{ 737 /* disable counter 2 */ 738 outb(0x61, inb(0x61) & 0xFC); 739 if (f) 740 timeout(sysbeepstop, (caddr_t)0, (int)f); 741 else 742 beeping = 0; 743} 744 745void 746sysbeep(int pitch, int period) 747{ 748 749 outb(0x61, inb(0x61) | 3); /* enable counter 2 */ 750 /* 751 * XXX - move timer stuff to clock.c. 752 * Program counter 2: 753 * ccaammmb, c counter, a = access, m = mode, b = BCD 754 * 1011x110, 11 for aa = LSB then MSB, x11 for mmm = square wave. 755 */ 756 outb(0x43, 0xb6); /* set command for counter 2, 2 byte write */ 757 758 outb(0x42, pitch); 759 outb(0x42, (pitch>>8)); 760 761 if (!beeping) { 762 beeping = period; 763 timeout(sysbeepstop, (caddr_t)(period/2), period); 764 } 765} 766 767/* 768 * Pass command to keyboard controller (8042) 769 */ 770unsigned 771kbc_8042cmd(val) 772 int val; 773{ 774 775 while (inb(KBSTATP)&KBS_IBF); 776 if (val) outb(KBCMDP, val); 777 while (inb(KBSTATP)&KBS_IBF); 778 return (inb(KBDATAP)); 779} 780 781/* 782 * find an ISA device in a given isa_devtab_* table, given 783 * the table to search, the expected id_driver entry, and the unit number. 784 * 785 * this function is defined in isa_device.h, and this location is debatable; 786 * i put it there because it's useless w/o, and directly operates on 787 * the other stuff in that file. 788 * 789 */ 790 791struct isa_device *find_isadev(table, driverp, unit) 792 struct isa_device *table; 793 struct isa_driver *driverp; 794 int unit; 795{ 796 if (driverp == NULL) /* sanity check */ 797 return NULL; 798 799 while ((table->id_driver != driverp) || (table->id_unit != unit)) { 800 if (table->id_driver == 0) 801 return NULL; 802 803 table++; 804 } 805 806 return table; 807} 808 809/* 810 * Return nonzero if a (masked) irq is pending for a given device. 811 */ 812int 813isa_irq_pending(dvp) 814 struct isa_device *dvp; 815{ 816 unsigned id_irq; 817 818 id_irq = (unsigned short) dvp->id_irq; /* XXX silly type in struct */ 819 if (id_irq & 0xff) 820 return (inb(IO_ICU1) & id_irq); 821 return (inb(IO_ICU2) & (id_irq >> 8)); 822} 823