isa.c revision 3258
17650Spsandoz/*-
27650Spsandoz * Copyright (c) 1991 The Regents of the University of California.
37650Spsandoz * All rights reserved.
47650Spsandoz *
57650Spsandoz * This code is derived from software contributed to Berkeley by
67650Spsandoz * William Jolitz.
77650Spsandoz *
87650Spsandoz * Redistribution and use in source and binary forms, with or without
97650Spsandoz * modification, are permitted provided that the following conditions
107650Spsandoz * are met:
117650Spsandoz * 1. Redistributions of source code must retain the above copyright
127650Spsandoz *    notice, this list of conditions and the following disclaimer.
137650Spsandoz * 2. Redistributions in binary form must reproduce the above copyright
147650Spsandoz *    notice, this list of conditions and the following disclaimer in the
157650Spsandoz *    documentation and/or other materials provided with the distribution.
167650Spsandoz * 3. All advertising materials mentioning features or use of this software
177650Spsandoz *    must display the following acknowledgement:
187650Spsandoz *	This product includes software developed by the University of
197650Spsandoz *	California, Berkeley and its contributors.
207650Spsandoz * 4. Neither the name of the University nor the names of its contributors
217650Spsandoz *    may be used to endorse or promote products derived from this software
227650Spsandoz *    without specific prior written permission.
237650Spsandoz *
247650Spsandoz * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
257650Spsandoz * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
267650Spsandoz * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
277650Spsandoz * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
287650Spsandoz * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
297650Spsandoz * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
307650Spsandoz * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
317650Spsandoz * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
327650Spsandoz * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
337650Spsandoz * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
347650Spsandoz * SUCH DAMAGE.
357650Spsandoz *
367650Spsandoz *	from: @(#)isa.c	7.2 (Berkeley) 5/13/91
377650Spsandoz *	$Id: isa.c,v 1.26 1994/09/30 05:35:55 swallace Exp $
387650Spsandoz */
397650Spsandoz
407650Spsandoz/*
417650Spsandoz * code to manage AT bus
427650Spsandoz *
437650Spsandoz * 92/08/18  Frank P. MacLachlan (fpm@crash.cts.com):
447650Spsandoz * Fixed uninitialized variable problem and added code to deal
457650Spsandoz * with DMA page boundaries in isa_dmarangecheck().  Fixed word
467650Spsandoz * mode DMA count compution and reorganized DMA setup code in
477650Spsandoz * isa_dmastart()
487650Spsandoz */
497650Spsandoz
507650Spsandoz#include <sys/param.h>
517650Spsandoz#include <sys/systm.h>		/* isn't it a joy */
527650Spsandoz#include <sys/kernel.h>		/* to have three of these */
537650Spsandoz#include <sys/conf.h>
547650Spsandoz#include <sys/file.h>
557650Spsandoz#include <sys/buf.h>
567650Spsandoz#include <sys/uio.h>
577650Spsandoz#include <sys/syslog.h>
587650Spsandoz#include <sys/malloc.h>
597650Spsandoz#include <sys/rlist.h>
607650Spsandoz#include <machine/segments.h>
617650Spsandoz#include <vm/vm.h>
627650Spsandoz#include <machine/spl.h>
637650Spsandoz#include <i386/isa/isa_device.h>
647650Spsandoz#include <i386/isa/isa.h>
657650Spsandoz#include <i386/isa/icu.h>
667650Spsandoz#include <i386/isa/ic/i8237.h>
677650Spsandoz#include <i386/isa/ic/i8042.h>
687650Spsandoz#include "vector.h"
697650Spsandoz
707650Spsandoz/*
717650Spsandoz**  Register definitions for DMA controller 1 (channels 0..3):
727650Spsandoz*/
737650Spsandoz#define	DMA1_CHN(c)	(IO_DMA1 + 1*(2*(c)))	/* addr reg for channel c */
747650Spsandoz#define	DMA1_SMSK	(IO_DMA1 + 1*10)	/* single mask register */
757650Spsandoz#define	DMA1_MODE	(IO_DMA1 + 1*11)	/* mode register */
767650Spsandoz#define	DMA1_FFC	(IO_DMA1 + 1*12)	/* clear first/last FF */
777650Spsandoz
787650Spsandoz/*
797650Spsandoz**  Register definitions for DMA controller 2 (channels 4..7):
807650Spsandoz*/
817650Spsandoz#define	DMA2_CHN(c)	(IO_DMA2 + 2*(2*(c)))	/* addr reg for channel c */
827650Spsandoz#define	DMA2_SMSK	(IO_DMA2 + 2*10)	/* single mask register */
837650Spsandoz#define	DMA2_MODE	(IO_DMA2 + 2*11)	/* mode register */
847650Spsandoz#define	DMA2_FFC	(IO_DMA2 + 2*12)	/* clear first/last FF */
857650Spsandoz
867650Spsandoz/*
877650Spsandoz * Bits to specify the type and amount of conflict checking.
887650Spsandoz */
897650Spsandoz#define	CC_ATTACH	(1 << 0)
907650Spsandoz#define	CC_DRQ		(1 << 1)
917650Spsandoz#define	CC_IOADDR	(1 << 2)
927650Spsandoz#define	CC_IRQ		(1 << 3)
937650Spsandoz#define	CC_MEMADDR	(1 << 4)
947650Spsandoz
957650Spsandoz/*
967650Spsandoz * XXX these defines should be in a central place.
977650Spsandoz */
987650Spsandoz#define	read_eflags()		({u_long ef; \
997650Spsandoz				  __asm("pushfl; popl %0" : "=a" (ef)); \
1007650Spsandoz				  ef; })
1017650Spsandoz#define	write_eflags(ef)	__asm("pushl %0; popfl" : : "a" ((u_long)(ef)))
1027650Spsandoz
1037650Spsandozu_long	*intr_countp[ICU_LEN];
1047650Spsandozinthand2_t *intr_handler[ICU_LEN];
1057650Spsandozu_int	intr_mask[ICU_LEN];
1067650Spsandozint	intr_unit[ICU_LEN];
1077650Spsandoz
1087650Spsandozstatic inthand_t *fastintr[ICU_LEN] = {
1097650Spsandoz	&IDTVEC(fastintr0), &IDTVEC(fastintr1),
1107650Spsandoz	&IDTVEC(fastintr2), &IDTVEC(fastintr3),
1117650Spsandoz	&IDTVEC(fastintr4), &IDTVEC(fastintr5),
1127650Spsandoz	&IDTVEC(fastintr6), &IDTVEC(fastintr7),
1137650Spsandoz	&IDTVEC(fastintr8), &IDTVEC(fastintr9),
1147650Spsandoz	&IDTVEC(fastintr10), &IDTVEC(fastintr11),
1157650Spsandoz	&IDTVEC(fastintr12), &IDTVEC(fastintr13),
1167650Spsandoz	&IDTVEC(fastintr14), &IDTVEC(fastintr15)
1177650Spsandoz};
1187650Spsandoz
1197650Spsandozstatic inthand_t *slowintr[ICU_LEN] = {
1207650Spsandoz	&IDTVEC(intr0), &IDTVEC(intr1), &IDTVEC(intr2), &IDTVEC(intr3),
1217650Spsandoz	&IDTVEC(intr4), &IDTVEC(intr5), &IDTVEC(intr6), &IDTVEC(intr7),
1227650Spsandoz	&IDTVEC(intr8), &IDTVEC(intr9), &IDTVEC(intr10), &IDTVEC(intr11),
1237650Spsandoz	&IDTVEC(intr12), &IDTVEC(intr13), &IDTVEC(intr14), &IDTVEC(intr15)
1247650Spsandoz};
1257650Spsandoz
1267650Spsandozstatic void config_isadev __P((struct isa_device *isdp, u_int *mp));
1277650Spsandozstatic void conflict __P((struct isa_device *dvp, struct isa_device *tmpdvp,
1287650Spsandoz			  int item, char const *whatnot, char const *reason,
1297650Spsandoz			  char const *format));
1307650Spsandozstatic int haveseen __P((struct isa_device *dvp, struct isa_device *tmpdvp,
1317650Spsandoz			 u_int checkbits));
1327650Spsandozstatic int haveseen_isadev __P((struct isa_device *dvp, u_int checkbits));
1337650Spsandozstatic inthand2_t isa_strayintr;
1347650Spsandozstatic void register_imask __P((struct isa_device *dvp, u_int mask));
1357650Spsandoz
1367650Spsandoz/*
1377650Spsandoz * print a conflict message
1387650Spsandoz */
1397650Spsandozstatic void
1407650Spsandozconflict(dvp, tmpdvp, item, whatnot, reason, format)
1417650Spsandoz	struct isa_device	*dvp;
1427650Spsandoz	struct isa_device	*tmpdvp;
1437650Spsandoz	int			item;
1447650Spsandoz	char const		*whatnot;
1457650Spsandoz	char const		*reason;
1467650Spsandoz	char const		*format;
1477650Spsandoz{
1487650Spsandoz	printf("%s%d not %sed due to %s conflict with %s%d at ",
1497650Spsandoz		dvp->id_driver->name, dvp->id_unit, whatnot, reason,
1507650Spsandoz		tmpdvp->id_driver->name, tmpdvp->id_unit);
1517650Spsandoz	printf(format, item);
1527650Spsandoz	printf("\n");
1537650Spsandoz}
1547650Spsandoz
1557650Spsandoz/*
1567650Spsandoz * Check to see if things are alread in use, like IRQ's, I/O addresses
1577650Spsandoz * and Memory addresses.
1587650Spsandoz */
1597650Spsandozstatic int
1607650Spsandozhaveseen(dvp, tmpdvp, checkbits)
1617650Spsandoz	struct isa_device *dvp;
1627650Spsandoz	struct isa_device *tmpdvp;
1637650Spsandoz	u_int	checkbits;
1647650Spsandoz{
165	int	status = 0;
166
167	/*
168	 * Only check against devices that have already been found
169	 */
170	if (tmpdvp->id_alive) {
171		char const *whatnot;
172
173		whatnot = checkbits & CC_ATTACH ? "attach" : "prob";
174		/*
175		 * Check for I/O address conflict.  We can only check the
176		 * starting address of the device against the range of the
177		 * device that has already been probed since we do not
178		 * know how many I/O addresses this device uses.
179		 */
180		if (checkbits & CC_IOADDR && tmpdvp->id_alive != -1) {
181			if ((dvp->id_iobase >= tmpdvp->id_iobase) &&
182			    (dvp->id_iobase <=
183				  (tmpdvp->id_iobase + tmpdvp->id_alive - 1))) {
184				conflict(dvp, tmpdvp, dvp->id_iobase, whatnot,
185					 "I/O address", "0x%x");
186				status = 1;
187			}
188		}
189		/*
190		 * Check for Memory address conflict.  We can check for
191		 * range overlap, but it will not catch all cases since the
192		 * driver may adjust the msize paramater during probe, for
193		 * now we just check that the starting address does not
194		 * fall within any allocated region.
195		 * XXX could add a second check after the probe for overlap,
196		 * since at that time we would know the full range.
197		 * XXX KERNBASE is a hack, we should have vaddr in the table!
198		 */
199		if (checkbits & CC_MEMADDR && tmpdvp->id_maddr) {
200			if ((KERNBASE + dvp->id_maddr >= tmpdvp->id_maddr) &&
201			    (KERNBASE + dvp->id_maddr <=
202			     (tmpdvp->id_maddr + tmpdvp->id_msize - 1))) {
203				conflict(dvp, tmpdvp, (int)dvp->id_maddr,
204					 whatnot, "maddr", "0x%x");
205				status = 1;
206			}
207		}
208		/*
209		 * Check for IRQ conflicts.
210		 */
211		if (checkbits & CC_IRQ && tmpdvp->id_irq) {
212			if (tmpdvp->id_irq == dvp->id_irq) {
213				conflict(dvp, tmpdvp, ffs(dvp->id_irq) - 1,
214					 whatnot, "irq", "%d");
215				status = 1;
216			}
217		}
218		/*
219		 * Check for DRQ conflicts.
220		 */
221		if (checkbits & CC_DRQ && tmpdvp->id_drq != -1) {
222			if (tmpdvp->id_drq == dvp->id_drq) {
223				conflict(dvp, tmpdvp, dvp->id_drq, whatnot,
224					 "drq", "%d");
225				status = 1;
226			}
227		}
228	}
229	return (status);
230}
231
232/*
233 * Search through all the isa_devtab_* tables looking for anything that
234 * conflicts with the current device.
235 */
236static int
237haveseen_isadev(dvp, checkbits)
238	struct isa_device *dvp;
239	u_int	checkbits;
240{
241	struct isa_device *tmpdvp;
242	int	status = 0;
243
244	for (tmpdvp = isa_devtab_tty; tmpdvp->id_driver; tmpdvp++)
245		status |= haveseen(dvp, tmpdvp, checkbits);
246	for (tmpdvp = isa_devtab_bio; tmpdvp->id_driver; tmpdvp++)
247		status |= haveseen(dvp, tmpdvp, checkbits);
248	for (tmpdvp = isa_devtab_net; tmpdvp->id_driver; tmpdvp++)
249		status |= haveseen(dvp, tmpdvp, checkbits);
250	for (tmpdvp = isa_devtab_null; tmpdvp->id_driver; tmpdvp++)
251		status |= haveseen(dvp, tmpdvp, checkbits);
252	return(status);
253}
254
255/*
256 * Configure all ISA devices
257 */
258void
259isa_configure() {
260	struct isa_device *dvp;
261
262	splhigh();
263	enable_intr();
264	INTREN(IRQ_SLAVE);
265	printf("Probing for devices on the ISA bus:\n");
266	for (dvp = isa_devtab_tty; dvp->id_driver; dvp++)
267		config_isadev(dvp, &tty_imask);
268	for (dvp = isa_devtab_bio; dvp->id_driver; dvp++)
269		config_isadev(dvp, &bio_imask);
270	for (dvp = isa_devtab_net; dvp->id_driver; dvp++)
271		config_isadev(dvp, &net_imask);
272	for (dvp = isa_devtab_null; dvp->id_driver; dvp++)
273		config_isadev(dvp, (u_int *)NULL);
274	bio_imask |= SWI_CLOCK_MASK;
275	net_imask |= SWI_NET_MASK;
276	tty_imask |= SWI_TTY_MASK;
277
278/*
279 * XXX we should really add the tty device to net_imask when the line is
280 * switched to SLIPDISC, and then remove it when it is switched away from
281 * SLIPDISC.  No need to block out ALL ttys during a splimp when only one
282 * of them is running slip.
283 *
284 * XXX actually, blocking all ttys during a splimp doesn't matter so much
285 * with sio because the serial interrupt layer doesn't use tty_imask.  Only
286 * non-serial ttys suffer.  It's more stupid that ALL 'net's are blocked
287 * during spltty.
288 */
289#include "sl.h"
290#if NSL > 0
291	net_imask |= tty_imask;
292	tty_imask = net_imask;
293#endif
294	/* bio_imask |= tty_imask ;  can some tty devices use buffers? */
295#ifdef DIAGNOSTIC
296	printf("bio_imask %x tty_imask %x net_imask %x\n",
297	       bio_imask, tty_imask, net_imask);
298#endif
299	/*
300	 * Finish initializing intr_mask[].  Note that the partly
301	 * constructed masks aren't actually used since we're at splhigh.
302	 * For fully dynamic initialization, register_intr() and
303	 * unregister_intr() will have to adjust the masks for _all_
304	 * interrupts and for tty_imask, etc.
305	 */
306	for (dvp = isa_devtab_tty; dvp->id_driver; dvp++)
307		register_imask(dvp, tty_imask);
308	for (dvp = isa_devtab_bio; dvp->id_driver; dvp++)
309		register_imask(dvp, bio_imask);
310	for (dvp = isa_devtab_net; dvp->id_driver; dvp++)
311		register_imask(dvp, net_imask);
312	for (dvp = isa_devtab_null; dvp->id_driver; dvp++)
313		register_imask(dvp, SWI_CLOCK_MASK);
314	spl0();
315}
316
317/*
318 * Configure an ISA device.
319 */
320
321
322static void config_isadev_c();
323
324static void
325config_isadev(isdp, mp)
326     struct isa_device *isdp;
327     u_int *mp;
328{
329	config_isadev_c(isdp, mp, 0);
330}
331
332void
333reconfig_isadev(isdp, mp)
334	struct isa_device *isdp;
335	u_int *mp;
336{
337	config_isadev_c(isdp, mp, 1);
338}
339
340static void
341config_isadev_c(isdp, mp, reconfig)
342	struct isa_device *isdp;
343	u_int *mp;
344	int reconfig;
345{
346	u_int checkbits;
347	int id_alive;
348	int last_alive;
349	struct isa_driver *dp = isdp->id_driver;
350
351 	checkbits = 0;
352#ifndef ALLOW_CONFLICT_IRQ
353	checkbits |= CC_IRQ;
354#endif
355#ifndef ALLOW_CONFLICT_DRQ
356	checkbits |= CC_DRQ;
357#endif
358#ifndef ALLOW_CONFLICT_IOADDR
359	checkbits |= CC_IOADDR;
360#endif
361#ifndef ALLOW_CONFLICT_MEMADDR
362	checkbits |= CC_MEMADDR;
363#endif
364	if (!reconfig && haveseen_isadev(isdp, checkbits))
365		return;
366	if (!reconfig && isdp->id_maddr) {
367		isdp->id_maddr -= 0xa0000; /* XXX should be a define */
368		isdp->id_maddr += atdevbase;
369	}
370	if (reconfig) {
371		last_alive = isdp->id_alive;
372	}
373	else {
374		last_alive = 0;
375	}
376	id_alive = (*dp->probe)(isdp);
377	if (id_alive) {
378		/*
379		 * Only print the I/O address range if id_alive != -1
380		 * Right now this is a temporary fix just for the new
381		 * NPX code so that if it finds a 486 that can use trap
382		 * 16 it will not report I/O addresses.
383		 * Rod Grimes 04/26/94
384		 */
385		if (!isdp->id_reconfig) {
386			printf("%s%d", dp->name, isdp->id_unit);
387			if (id_alive != -1) {
388 				printf(" at 0x%x", isdp->id_iobase);
389 				if ((isdp->id_iobase + id_alive - 1) !=
390 				     isdp->id_iobase) {
391 					printf("-0x%x",
392					       isdp->id_iobase + id_alive - 1);
393				}
394			}
395			if (isdp->id_irq)
396				printf(" irq %d", ffs(isdp->id_irq) - 1);
397			if (isdp->id_drq != -1)
398				printf(" drq %d", isdp->id_drq);
399			if (isdp->id_maddr)
400				printf(" maddr 0x%lx", kvtop(isdp->id_maddr));
401			if (isdp->id_msize)
402				printf(" msize %d", isdp->id_msize);
403			if (isdp->id_flags)
404				printf(" flags 0x%x", isdp->id_flags);
405			if (isdp->id_iobase) {
406				if (isdp->id_iobase < 0x100) {
407					printf(" on motherboard\n");
408				} else {
409					if (isdp->id_iobase >= 0x1000) {
410						printf (" on eisa\n");
411					} else {
412						printf (" on isa\n");
413					}
414				}
415			}
416			/*
417			 * Check for conflicts again.  The driver may have
418			 * changed *dvp.  We should weaken the early check
419			 * since the driver may have been able to change
420			 * *dvp to avoid conflicts if given a chance.  We
421			 * already skip the early check for IRQs and force
422			 * a check for IRQs in the next group of checks.
423		 	 */
424#ifndef ALLOW_CONFLICT_IRQ
425			checkbits |= CC_IRQ;
426#endif
427			if (haveseen_isadev(isdp, checkbits))
428				return;
429			isdp->id_alive = id_alive;
430		}
431		(*dp->attach)(isdp);
432		if (isdp->id_irq) {
433			if (mp)
434				INTRMASK(*mp, isdp->id_irq);
435			register_intr(ffs(isdp->id_irq) - 1, isdp->id_id,
436				      isdp->id_ri_flags, isdp->id_intr,
437				      mp ? *mp : 0, isdp->id_unit);
438			INTREN(isdp->id_irq);
439		}
440	} else {
441		if (isdp->id_reconfig) {
442			(*dp->attach)(isdp); /* reconfiguration attach */
443		}
444		if (!last_alive) {
445			if (!isdp->id_reconfig) {
446				printf("%s%d not found", dp->name, isdp->id_unit);
447				if (isdp->id_iobase) {
448					printf(" at 0x%x", isdp->id_iobase);
449				}
450				printf("\n");
451			}
452		}
453		else {
454			/* This code has not been tested.... */
455			if (isdp->id_irq) {
456				INTRDIS(isdp->id_irq);
457				unregister_intr(ffs(isdp->id_irq) - 1,
458						isdp->id_intr);
459				if (mp)
460					INTRUNMASK(*mp, isdp->id_irq);
461			}
462		}
463	}
464}
465
466/*
467 * Fill in default interrupt table (in case of spuruious interrupt
468 * during configuration of kernel, setup interrupt control unit
469 */
470void
471isa_defaultirq()
472{
473	int i;
474
475	/* icu vectors */
476	for (i = 0; i < ICU_LEN; i++)
477		unregister_intr(i, (inthand2_t *)NULL);
478
479	/* initialize 8259's */
480	outb(IO_ICU1, 0x11);		/* reset; program device, four bytes */
481	outb(IO_ICU1+1, NRSVIDT);	/* starting at this vector index */
482	outb(IO_ICU1+1, 1<<2);		/* slave on line 2 */
483#ifdef AUTO_EOI_1
484	outb(IO_ICU1+1, 2 | 1);		/* auto EOI, 8086 mode */
485#else
486	outb(IO_ICU1+1, 1);		/* 8086 mode */
487#endif
488	outb(IO_ICU1+1, 0xff);		/* leave interrupts masked */
489	outb(IO_ICU1, 0x0a);		/* default to IRR on read */
490	outb(IO_ICU1, 0xc0 | (3 - 1));	/* pri order 3-7, 0-2 (com2 first) */
491
492	outb(IO_ICU2, 0x11);		/* reset; program device, four bytes */
493	outb(IO_ICU2+1, NRSVIDT+8);	/* staring at this vector index */
494	outb(IO_ICU2+1,2);		/* my slave id is 2 */
495#ifdef AUTO_EOI_2
496	outb(IO_ICU2+1, 2 | 1);		/* auto EOI, 8086 mode */
497#else
498	outb(IO_ICU2+1,1);		/* 8086 mode */
499#endif
500	outb(IO_ICU2+1, 0xff);		/* leave interrupts masked */
501	outb(IO_ICU2, 0x0a);		/* default to IRR on read */
502}
503
504/* region of physical memory known to be contiguous */
505vm_offset_t isaphysmem;
506static caddr_t dma_bounce[8];		/* XXX */
507static char bounced[8];		/* XXX */
508#define MAXDMASZ 512		/* XXX */
509
510/* high byte of address is stored in this port for i-th dma channel */
511static short dmapageport[8] =
512	{ 0x87, 0x83, 0x81, 0x82, 0x8f, 0x8b, 0x89, 0x8a };
513
514/*
515 * isa_dmacascade(): program 8237 DMA controller channel to accept
516 * external dma control by a board.
517 */
518void isa_dmacascade(unsigned chan)
519{
520	if (chan > 7)
521		panic("isa_dmacascade: impossible request");
522
523	/* set dma channel mode, and set dma channel mode */
524	if ((chan & 4) == 0) {
525		outb(DMA1_MODE, DMA37MD_CASCADE | chan);
526		outb(DMA1_SMSK, chan);
527	} else {
528		outb(DMA2_MODE, DMA37MD_CASCADE | (chan & 3));
529		outb(DMA2_SMSK, chan & 3);
530	}
531}
532
533static int
534isa_dmarangecheck(caddr_t va, unsigned length, unsigned chan);
535
536/*
537 * isa_dmastart(): program 8237 DMA controller channel, avoid page alignment
538 * problems by using a bounce buffer.
539 */
540void isa_dmastart(int flags, caddr_t addr, unsigned nbytes, unsigned chan)
541{	vm_offset_t phys;
542	int waport;
543	caddr_t newaddr;
544
545	if (    chan > 7
546	    || (chan < 4 && nbytes > (1<<16))
547	    || (chan >= 4 && (nbytes > (1<<17) || (u_int)addr & 1)))
548		panic("isa_dmastart: impossible request");
549
550	if (isa_dmarangecheck(addr, nbytes, chan)) {
551		if (dma_bounce[chan] == 0)
552			dma_bounce[chan] =
553				/*(caddr_t)malloc(MAXDMASZ, M_TEMP, M_WAITOK);*/
554				(caddr_t) isaphysmem + NBPG*chan;
555		bounced[chan] = 1;
556		newaddr = dma_bounce[chan];
557		*(int *) newaddr = 0;	/* XXX */
558
559		/* copy bounce buffer on write */
560		if (!(flags & B_READ))
561			bcopy(addr, newaddr, nbytes);
562		addr = newaddr;
563	}
564
565	/* translate to physical */
566	phys = pmap_extract(pmap_kernel(), (vm_offset_t)addr);
567
568	if ((chan & 4) == 0) {
569		/*
570		 * Program one of DMA channels 0..3.  These are
571		 * byte mode channels.
572		 */
573		/* set dma channel mode, and reset address ff */
574		if (flags & B_READ)
575			outb(DMA1_MODE, DMA37MD_SINGLE|DMA37MD_WRITE|chan);
576		else
577			outb(DMA1_MODE, DMA37MD_SINGLE|DMA37MD_READ|chan);
578		outb(DMA1_FFC, 0);
579
580		/* send start address */
581		waport =  DMA1_CHN(chan);
582		outb(waport, phys);
583		outb(waport, phys>>8);
584		outb(dmapageport[chan], phys>>16);
585
586		/* send count */
587		outb(waport + 1, --nbytes);
588		outb(waport + 1, nbytes>>8);
589
590		/* unmask channel */
591		outb(DMA1_SMSK, chan);
592	} else {
593		/*
594		 * Program one of DMA channels 4..7.  These are
595		 * word mode channels.
596		 */
597		/* set dma channel mode, and reset address ff */
598		if (flags & B_READ)
599			outb(DMA2_MODE, DMA37MD_SINGLE|DMA37MD_WRITE|(chan&3));
600		else
601			outb(DMA2_MODE, DMA37MD_SINGLE|DMA37MD_READ|(chan&3));
602		outb(DMA2_FFC, 0);
603
604		/* send start address */
605		waport = DMA2_CHN(chan - 4);
606		outb(waport, phys>>1);
607		outb(waport, phys>>9);
608		outb(dmapageport[chan], phys>>16);
609
610		/* send count */
611		nbytes >>= 1;
612		outb(waport + 2, --nbytes);
613		outb(waport + 2, nbytes>>8);
614
615		/* unmask channel */
616		outb(DMA2_SMSK, chan & 3);
617	}
618}
619
620void isa_dmadone(int flags, caddr_t addr, int nbytes, int chan)
621{
622
623	/* copy bounce buffer on read */
624	/*if ((flags & (B_PHYS|B_READ)) == (B_PHYS|B_READ))*/
625	if (bounced[chan]) {
626		bcopy(dma_bounce[chan], addr, nbytes);
627		bounced[chan] = 0;
628	}
629}
630
631/*
632 * Check for problems with the address range of a DMA transfer
633 * (non-contiguous physical pages, outside of bus address space,
634 * crossing DMA page boundaries).
635 * Return true if special handling needed.
636 */
637
638static int
639isa_dmarangecheck(caddr_t va, unsigned length, unsigned chan) {
640	vm_offset_t phys, priorpage = 0, endva;
641	u_int dma_pgmsk = (chan & 4) ?  ~(128*1024-1) : ~(64*1024-1);
642
643	endva = (vm_offset_t)round_page(va + length);
644	for (; va < (caddr_t) endva ; va += NBPG) {
645		phys = trunc_page(pmap_extract(pmap_kernel(), (vm_offset_t)va));
646#define ISARAM_END	RAM_END
647		if (phys == 0)
648			panic("isa_dmacheck: no physical page present");
649		if (phys >= ISARAM_END)
650			return (1);
651		if (priorpage) {
652			if (priorpage + NBPG != phys)
653				return (1);
654			/* check if crossing a DMA page boundary */
655			if (((u_int)priorpage ^ (u_int)phys) & dma_pgmsk)
656				return (1);
657		}
658		priorpage = phys;
659	}
660	return (0);
661}
662
663/* head of queue waiting for physmem to become available */
664struct buf isa_physmemq;
665
666/* blocked waiting for resource to become free for exclusive use */
667static isaphysmemflag;
668/* if waited for and call requested when free (B_CALL) */
669static void (*isaphysmemunblock)(); /* needs to be a list */
670
671/*
672 * Allocate contiguous physical memory for transfer, returning
673 * a *virtual* address to region. May block waiting for resource.
674 * (assumed to be called at splbio())
675 */
676caddr_t
677isa_allocphysmem(caddr_t va, unsigned length, void (*func)()) {
678
679	isaphysmemunblock = func;
680	while (isaphysmemflag & B_BUSY) {
681		isaphysmemflag |= B_WANTED;
682		tsleep((caddr_t)&isaphysmemflag, PRIBIO, "isaphys", 0);
683	}
684	isaphysmemflag |= B_BUSY;
685
686	return((caddr_t)isaphysmem);
687}
688
689/*
690 * Free contiguous physical memory used for transfer.
691 * (assumed to be called at splbio())
692 */
693void
694isa_freephysmem(caddr_t va, unsigned length) {
695
696	isaphysmemflag &= ~B_BUSY;
697	if (isaphysmemflag & B_WANTED) {
698		isaphysmemflag &= B_WANTED;
699		wakeup((caddr_t)&isaphysmemflag);
700		if (isaphysmemunblock)
701			(*isaphysmemunblock)();
702	}
703}
704
705#define NMI_PARITY (1 << 7)
706#define NMI_IOCHAN (1 << 6)
707#define ENMI_WATCHDOG (1 << 7)
708#define ENMI_BUSTIMER (1 << 6)
709#define ENMI_IOSTATUS (1 << 5)
710
711/*
712 * Handle a NMI, possibly a machine check.
713 * return true to panic system, false to ignore.
714 */
715int
716isa_nmi(cd)
717	int cd;
718{
719	int isa_port = inb(0x61);
720	int eisa_port = inb(0x461);
721	if(isa_port & NMI_PARITY) {
722		panic("RAM parity error, likely hardware failure.");
723	} else if(isa_port & NMI_IOCHAN) {
724		panic("I/O channel check, likely hardware failure.");
725	} else if(eisa_port & ENMI_WATCHDOG) {
726		panic("EISA watchdog timer expired, likely hardware failure.");
727	} else if(eisa_port & ENMI_BUSTIMER) {
728		panic("EISA bus timeout, likely hardware failure.");
729	} else if(eisa_port & ENMI_IOSTATUS) {
730		panic("EISA I/O port status error.");
731	} else {
732		printf("\nNMI ISA %x, EISA %x\n", isa_port, eisa_port);
733		return(0);
734	}
735}
736
737/*
738 * Caught a stray interrupt, notify
739 */
740static void
741isa_strayintr(d)
742	int d;
743{
744
745	/* DON'T BOTHER FOR NOW! */
746	/* for some reason, we get bursts of intr #7, even if not enabled! */
747	/*
748	 * Well the reason you got bursts of intr #7 is because someone
749	 * raised an interrupt line and dropped it before the 8259 could
750	 * prioritize it.  This is documented in the intel data book.  This
751	 * means you have BAD hardware!  I have changed this so that only
752	 * the first 5 get logged, then it quits logging them, and puts
753	 * out a special message. rgrimes 3/25/1993
754	 */
755	/*
756	 * XXX TODO print a different message for #7 if it is for a
757	 * glitch.  Glitches can be distinguished from real #7's by
758	 * testing that the in-service bit is _not_ set.  The test
759	 * must be done before sending an EOI so it can't be done if
760	 * we are using AUTO_EOI_1.
761	 */
762	if (intrcnt[NR_DEVICES + d] <= 5)
763		log(LOG_ERR, "stray irq %d\n", d);
764	if (intrcnt[NR_DEVICES + d] == 5)
765		log(LOG_CRIT,
766		    "too many stray irq %d's; not logging any more\n", d);
767}
768
769/*
770 * find an ISA device in a given isa_devtab_* table, given
771 * the table to search, the expected id_driver entry, and the unit number.
772 *
773 * this function is defined in isa_device.h, and this location is debatable;
774 * i put it there because it's useless w/o, and directly operates on
775 * the other stuff in that file.
776 *
777 */
778
779struct isa_device *find_isadev(table, driverp, unit)
780     struct isa_device *table;
781     struct isa_driver *driverp;
782     int unit;
783{
784  if (driverp == NULL) /* sanity check */
785    return NULL;
786
787  while ((table->id_driver != driverp) || (table->id_unit != unit)) {
788    if (table->id_driver == 0)
789      return NULL;
790
791    table++;
792  }
793
794  return table;
795}
796
797/*
798 * Return nonzero if a (masked) irq is pending for a given device.
799 */
800int
801isa_irq_pending(dvp)
802	struct isa_device *dvp;
803{
804	unsigned id_irq;
805
806	id_irq = dvp->id_irq;
807	if (id_irq & 0xff)
808		return (inb(IO_ICU1) & id_irq);
809	return (inb(IO_ICU2) & (id_irq >> 8));
810}
811
812int
813register_intr(intr, device_id, flags, handler, mask, unit)
814	int	intr;
815	int	device_id;
816	u_int	flags;
817	inthand2_t *handler;
818	u_int	mask;
819	int	unit;
820{
821	char	*cp;
822	u_long	ef;
823	int	id;
824
825	if ((u_int)intr >= ICU_LEN || intr == 2
826	    || (u_int)device_id >= NR_DEVICES)
827		return (EINVAL);
828	if (intr_handler[intr] != isa_strayintr)
829		return (EBUSY);
830	ef = read_eflags();
831	disable_intr();
832	intr_countp[intr] = &intrcnt[device_id];
833	intr_handler[intr] = handler;
834	intr_mask[intr] = mask | (1 << intr);
835	intr_unit[intr] = unit;
836	setidt(ICU_OFFSET + intr,
837	       flags & RI_FAST ? fastintr[intr] : slowintr[intr],
838	       SDT_SYS386IGT, SEL_KPL);
839	write_eflags(ef);
840	for (cp = intrnames, id = 0; id <= device_id; id++)
841		while (*cp++ != '\0')
842			;
843	if (cp > eintrnames)
844		return (0);
845	if (intr < 10) {
846		cp[-3] = intr + '0';
847		cp[-2] = ' ';
848	} else {
849		cp[-3] = '1';
850		cp[-2] = intr - 10 + '0';
851	}
852	return (0);
853}
854
855static void
856register_imask(dvp, mask)
857	struct isa_device *dvp;
858	u_int	mask;
859{
860	if (dvp->id_alive && dvp->id_irq) {
861		int	intr;
862
863		intr = ffs(dvp->id_irq) - 1;
864		intr_mask[intr] = mask | (1 <<intr);
865	}
866}
867
868int
869unregister_intr(intr, handler)
870	int	intr;
871	inthand2_t *handler;
872{
873	u_long	ef;
874
875	if ((u_int)intr >= ICU_LEN || handler != intr_handler[intr])
876		return (EINVAL);
877	ef = read_eflags();
878	disable_intr();
879	intr_countp[intr] = &intrcnt[NR_DEVICES + intr];
880	intr_handler[intr] = isa_strayintr;
881	intr_mask[intr] = HWI_MASK | SWI_MASK;
882	intr_unit[intr] = intr;
883	setidt(ICU_OFFSET + intr, slowintr[intr], SDT_SYS386IGT, SEL_KPL);
884	write_eflags(ef);
885	return (0);
886}
887