1139825Simp/*- 2103619Sgrehan * Copyright 2002 by Peter Grehan. All rights reserved. 3103619Sgrehan * 4103619Sgrehan * Redistribution and use in source and binary forms, with or without 5103619Sgrehan * modification, are permitted provided that the following conditions 6103619Sgrehan * are met: 7103619Sgrehan * 1. Redistributions of source code must retain the above copyright 8103619Sgrehan * notice, this list of conditions and the following disclaimer. 9103619Sgrehan * 2. Redistributions in binary form must reproduce the above copyright 10103619Sgrehan * notice, this list of conditions and the following disclaimer in the 11103619Sgrehan * documentation and/or other materials provided with the distribution. 12103619Sgrehan * 3. The name of the author may not be used to endorse or promote products 13103619Sgrehan * derived from this software without specific prior written permission. 14103619Sgrehan * 15103619Sgrehan * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16103619Sgrehan * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17103619Sgrehan * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18103619Sgrehan * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19103619Sgrehan * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 20103619Sgrehan * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 21103619Sgrehan * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 22103619Sgrehan * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 23103619Sgrehan * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24103619Sgrehan * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25103619Sgrehan * SUCH DAMAGE. 26103619Sgrehan * 27103619Sgrehan * $FreeBSD$ 28103619Sgrehan */ 29103619Sgrehan 30103619Sgrehan/* 31103619Sgrehan * Driver for KeyLargo/Pangea, the MacPPC south bridge ASIC. 32103619Sgrehan */ 33103619Sgrehan 34103619Sgrehan#include <sys/param.h> 35103619Sgrehan#include <sys/systm.h> 36103619Sgrehan#include <sys/kernel.h> 37103619Sgrehan#include <sys/malloc.h> 38131102Sgrehan#include <sys/module.h> 39103619Sgrehan#include <sys/bus.h> 40103619Sgrehan#include <sys/rman.h> 41103619Sgrehan 42103619Sgrehan#include <vm/vm.h> 43103619Sgrehan#include <vm/pmap.h> 44209298Snwhitehorn 45209298Snwhitehorn#include <machine/bus.h> 46209298Snwhitehorn#include <machine/intr_machdep.h> 47103619Sgrehan#include <machine/pmap.h> 48103619Sgrehan#include <machine/resource.h> 49209298Snwhitehorn#include <machine/vmparam.h> 50103619Sgrehan 51133589Smarius#include <dev/ofw/ofw_bus.h> 52153050Smarius#include <dev/ofw/ofw_bus_subr.h> 53103619Sgrehan#include <dev/ofw/openfirm.h> 54103619Sgrehan 55103619Sgrehan#include <powerpc/powermac/maciovar.h> 56103619Sgrehan 57103619Sgrehan#include <dev/pci/pcivar.h> 58103619Sgrehan#include <dev/pci/pcireg.h> 59103619Sgrehan 60131400Sgrehan/* 61131400Sgrehan * Macio softc 62131400Sgrehan */ 63131400Sgrehanstruct macio_softc { 64131400Sgrehan phandle_t sc_node; 65131400Sgrehan vm_offset_t sc_base; 66131400Sgrehan vm_offset_t sc_size; 67131400Sgrehan struct rman sc_mem_rman; 68221519Snwhitehorn 69221519Snwhitehorn /* FCR registers */ 70221519Snwhitehorn int sc_memrid; 71221519Snwhitehorn struct resource *sc_memr; 72131400Sgrehan}; 73131400Sgrehan 74103619Sgrehanstatic MALLOC_DEFINE(M_MACIO, "macio", "macio device information"); 75103619Sgrehan 76103619Sgrehanstatic int macio_probe(device_t); 77103619Sgrehanstatic int macio_attach(device_t); 78103619Sgrehanstatic int macio_print_child(device_t dev, device_t child); 79103619Sgrehanstatic void macio_probe_nomatch(device_t, device_t); 80103619Sgrehanstatic struct resource *macio_alloc_resource(device_t, device_t, int, int *, 81103619Sgrehan u_long, u_long, u_long, u_int); 82103619Sgrehanstatic int macio_activate_resource(device_t, device_t, int, int, 83103619Sgrehan struct resource *); 84103619Sgrehanstatic int macio_deactivate_resource(device_t, device_t, int, int, 85103619Sgrehan struct resource *); 86103619Sgrehanstatic int macio_release_resource(device_t, device_t, int, int, 87103619Sgrehan struct resource *); 88103619Sgrehanstatic struct resource_list *macio_get_resource_list (device_t, device_t); 89153050Smariusstatic ofw_bus_get_devinfo_t macio_get_devinfo; 90103619Sgrehan 91103619Sgrehan/* 92103619Sgrehan * Bus interface definition 93103619Sgrehan */ 94103619Sgrehanstatic device_method_t macio_methods[] = { 95103619Sgrehan /* Device interface */ 96103619Sgrehan DEVMETHOD(device_probe, macio_probe), 97103619Sgrehan DEVMETHOD(device_attach, macio_attach), 98103619Sgrehan DEVMETHOD(device_detach, bus_generic_detach), 99103619Sgrehan DEVMETHOD(device_shutdown, bus_generic_shutdown), 100103619Sgrehan DEVMETHOD(device_suspend, bus_generic_suspend), 101103619Sgrehan DEVMETHOD(device_resume, bus_generic_resume), 102103619Sgrehan 103103619Sgrehan /* Bus interface */ 104103619Sgrehan DEVMETHOD(bus_print_child, macio_print_child), 105103619Sgrehan DEVMETHOD(bus_probe_nomatch, macio_probe_nomatch), 106103619Sgrehan DEVMETHOD(bus_setup_intr, bus_generic_setup_intr), 107103619Sgrehan DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr), 108103619Sgrehan 109103619Sgrehan DEVMETHOD(bus_alloc_resource, macio_alloc_resource), 110103619Sgrehan DEVMETHOD(bus_release_resource, macio_release_resource), 111103619Sgrehan DEVMETHOD(bus_activate_resource, macio_activate_resource), 112103619Sgrehan DEVMETHOD(bus_deactivate_resource, macio_deactivate_resource), 113103619Sgrehan DEVMETHOD(bus_get_resource_list, macio_get_resource_list), 114103619Sgrehan 115186128Snwhitehorn DEVMETHOD(bus_child_pnpinfo_str, ofw_bus_gen_child_pnpinfo_str), 116186128Snwhitehorn 117133589Smarius /* ofw_bus interface */ 118153050Smarius DEVMETHOD(ofw_bus_get_devinfo, macio_get_devinfo), 119153050Smarius DEVMETHOD(ofw_bus_get_compat, ofw_bus_gen_get_compat), 120153050Smarius DEVMETHOD(ofw_bus_get_model, ofw_bus_gen_get_model), 121153050Smarius DEVMETHOD(ofw_bus_get_name, ofw_bus_gen_get_name), 122153050Smarius DEVMETHOD(ofw_bus_get_node, ofw_bus_gen_get_node), 123153050Smarius DEVMETHOD(ofw_bus_get_type, ofw_bus_gen_get_type), 124133589Smarius 125103619Sgrehan { 0, 0 } 126103619Sgrehan}; 127103619Sgrehan 128103619Sgrehanstatic driver_t macio_pci_driver = { 129103619Sgrehan "macio", 130103619Sgrehan macio_methods, 131103619Sgrehan sizeof(struct macio_softc) 132103619Sgrehan}; 133103619Sgrehan 134103619Sgrehandevclass_t macio_devclass; 135103619Sgrehan 136103619SgrehanDRIVER_MODULE(macio, pci, macio_pci_driver, macio_devclass, 0, 0); 137103619Sgrehan 138103619Sgrehan/* 139103619Sgrehan * PCI ID search table 140103619Sgrehan */ 141103619Sgrehanstatic struct macio_pci_dev { 142103619Sgrehan u_int32_t mpd_devid; 143103619Sgrehan char *mpd_desc; 144103619Sgrehan} macio_pci_devlist[] = { 145112428Sgrehan { 0x0017106b, "Paddington I/O Controller" }, 146112428Sgrehan { 0x0022106b, "KeyLargo I/O Controller" }, 147103619Sgrehan { 0x0025106b, "Pangea I/O Controller" }, 148112428Sgrehan { 0x003e106b, "Intrepid I/O Controller" }, 149183882Snwhitehorn { 0x0041106b, "K2 KeyLargo I/O Controller" }, 150183882Snwhitehorn { 0x004f106b, "Shasta I/O Controller" }, 151112428Sgrehan { 0, NULL } 152103619Sgrehan}; 153103619Sgrehan 154103619Sgrehan/* 155103619Sgrehan * Devices to exclude from the probe 156103619Sgrehan * XXX some of these may be required in the future... 157103619Sgrehan */ 158108991Sbenno#define MACIO_QUIRK_IGNORE 0x00000001 159108991Sbenno#define MACIO_QUIRK_CHILD_HAS_INTR 0x00000002 160186805Snwhitehorn#define MACIO_QUIRK_USE_CHILD_REG 0x00000004 161108991Sbenno 162108991Sbennostruct macio_quirk_entry { 163108991Sbenno const char *mq_name; 164108991Sbenno int mq_quirks; 165103619Sgrehan}; 166103619Sgrehan 167108991Sbennostatic struct macio_quirk_entry macio_quirks[] = { 168108991Sbenno { "escc-legacy", MACIO_QUIRK_IGNORE }, 169108991Sbenno { "timer", MACIO_QUIRK_IGNORE }, 170108991Sbenno { "escc", MACIO_QUIRK_CHILD_HAS_INTR }, 171186805Snwhitehorn { "i2s", MACIO_QUIRK_CHILD_HAS_INTR | 172186805Snwhitehorn MACIO_QUIRK_USE_CHILD_REG }, 173186805Snwhitehorn { NULL, 0 } 174108991Sbenno}; 175108991Sbenno 176103619Sgrehanstatic int 177108991Sbennomacio_get_quirks(const char *name) 178103619Sgrehan{ 179108991Sbenno struct macio_quirk_entry *mqe; 180103619Sgrehan 181108991Sbenno for (mqe = macio_quirks; mqe->mq_name != NULL; mqe++) 182108991Sbenno if (strcmp(name, mqe->mq_name) == 0) 183108991Sbenno return (mqe->mq_quirks); 184103619Sgrehan return (0); 185103619Sgrehan} 186103619Sgrehan 187103619Sgrehan 188103619Sgrehan/* 189103619Sgrehan * Add an interrupt to the dev's resource list if present 190103619Sgrehan */ 191103619Sgrehanstatic void 192103619Sgrehanmacio_add_intr(phandle_t devnode, struct macio_devinfo *dinfo) 193103619Sgrehan{ 194209298Snwhitehorn phandle_t iparent; 195178599Smarcel int *intr; 196178599Smarcel int i, nintr; 197178599Smarcel int icells; 198108991Sbenno 199178599Smarcel if (dinfo->mdi_ninterrupts >= 6) { 200178599Smarcel printf("macio: device has more than 6 interrupts\n"); 201108991Sbenno return; 202108991Sbenno } 203108991Sbenno 204186728Snwhitehorn if (OF_searchprop(devnode, "#interrupt-cells", &icells, sizeof(icells)) 205186728Snwhitehorn <= 0) 206186728Snwhitehorn icells = 1; 207178599Smarcel 208178599Smarcel nintr = OF_getprop_alloc(devnode, "interrupts", sizeof(*intr), 209178599Smarcel (void **)&intr); 210178599Smarcel if (nintr == -1) { 211178599Smarcel nintr = OF_getprop_alloc(devnode, "AAPL,interrupts", 212178599Smarcel sizeof(*intr), (void **)&intr); 213178599Smarcel if (nintr == -1) 214108991Sbenno return; 215108991Sbenno } 216108991Sbenno 217178599Smarcel if (intr[0] == -1) 218108991Sbenno return; 219108991Sbenno 220209298Snwhitehorn if (OF_getprop(devnode, "interrupt-parent", &iparent, sizeof(iparent)) 221209298Snwhitehorn <= 0) 222209298Snwhitehorn panic("Interrupt but no interrupt parent!\n"); 223209298Snwhitehorn 224178599Smarcel for (i = 0; i < nintr; i+=icells) { 225218184Smarcel u_int irq = MAP_IRQ(iparent, intr[i]); 226218184Smarcel 227178599Smarcel resource_list_add(&dinfo->mdi_resources, SYS_RES_IRQ, 228218184Smarcel dinfo->mdi_ninterrupts, irq, irq, 1); 229108991Sbenno 230218184Smarcel dinfo->mdi_interrupts[dinfo->mdi_ninterrupts] = irq; 231178599Smarcel dinfo->mdi_ninterrupts++; 232178599Smarcel } 233103619Sgrehan} 234103619Sgrehan 235103619Sgrehan 236103619Sgrehanstatic void 237103619Sgrehanmacio_add_reg(phandle_t devnode, struct macio_devinfo *dinfo) 238103619Sgrehan{ 239110080Sbenno struct macio_reg *reg; 240110080Sbenno int i, nreg; 241110080Sbenno 242110080Sbenno nreg = OF_getprop_alloc(devnode, "reg", sizeof(*reg), (void **)®); 243110080Sbenno if (nreg == -1) 244110080Sbenno return; 245110080Sbenno 246110080Sbenno for (i = 0; i < nreg; i++) { 247110080Sbenno resource_list_add(&dinfo->mdi_resources, SYS_RES_MEMORY, i, 248110080Sbenno reg[i].mr_base, reg[i].mr_base + reg[i].mr_size, 249110080Sbenno reg[i].mr_size); 250103619Sgrehan } 251103619Sgrehan} 252103619Sgrehan 253103619Sgrehan/* 254103619Sgrehan * PCI probe 255103619Sgrehan */ 256103619Sgrehanstatic int 257103619Sgrehanmacio_probe(device_t dev) 258103619Sgrehan{ 259103619Sgrehan int i; 260103619Sgrehan u_int32_t devid; 261103619Sgrehan 262103619Sgrehan devid = pci_get_devid(dev); 263103619Sgrehan for (i = 0; macio_pci_devlist[i].mpd_desc != NULL; i++) { 264103619Sgrehan if (devid == macio_pci_devlist[i].mpd_devid) { 265103619Sgrehan device_set_desc(dev, macio_pci_devlist[i].mpd_desc); 266103619Sgrehan return (0); 267103619Sgrehan } 268103619Sgrehan } 269103619Sgrehan 270103619Sgrehan return (ENXIO); 271103619Sgrehan} 272103619Sgrehan 273103619Sgrehan/* 274133862Smarius * PCI attach: scan Open Firmware child nodes, and attach these as children 275103619Sgrehan * of the macio bus 276103619Sgrehan */ 277103619Sgrehanstatic int 278103619Sgrehanmacio_attach(device_t dev) 279103619Sgrehan{ 280103619Sgrehan struct macio_softc *sc; 281103619Sgrehan struct macio_devinfo *dinfo; 282103619Sgrehan phandle_t root; 283103619Sgrehan phandle_t child; 284108991Sbenno phandle_t subchild; 285103619Sgrehan device_t cdev; 286103619Sgrehan u_int reg[3]; 287179746Skevlo int error, quirks; 288103619Sgrehan 289103619Sgrehan sc = device_get_softc(dev); 290183882Snwhitehorn root = sc->sc_node = ofw_bus_get_node(dev); 291103619Sgrehan 292103619Sgrehan /* 293103619Sgrehan * Locate the device node and it's base address 294103619Sgrehan */ 295103619Sgrehan if (OF_getprop(root, "assigned-addresses", 296230398Snwhitehorn reg, sizeof(reg)) < (ssize_t)sizeof(reg)) { 297103619Sgrehan return (ENXIO); 298103619Sgrehan } 299103619Sgrehan 300103619Sgrehan sc->sc_base = reg[2]; 301103619Sgrehan sc->sc_size = MACIO_REG_SIZE; 302103619Sgrehan 303221519Snwhitehorn sc->sc_memrid = PCIR_BAR(0); 304221519Snwhitehorn sc->sc_memr = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 305221519Snwhitehorn &sc->sc_memrid, RF_ACTIVE); 306221519Snwhitehorn 307103619Sgrehan sc->sc_mem_rman.rm_type = RMAN_ARRAY; 308110080Sbenno sc->sc_mem_rman.rm_descr = "MacIO Device Memory"; 309179746Skevlo error = rman_init(&sc->sc_mem_rman); 310179746Skevlo if (error) { 311179746Skevlo device_printf(dev, "rman_init() failed. error = %d\n", error); 312179746Skevlo return (error); 313179746Skevlo } 314179746Skevlo error = rman_manage_region(&sc->sc_mem_rman, 0, sc->sc_size); 315179746Skevlo if (error) { 316103619Sgrehan device_printf(dev, 317179746Skevlo "rman_manage_region() failed. error = %d\n", error); 318179746Skevlo return (error); 319103619Sgrehan } 320103619Sgrehan 321103619Sgrehan /* 322103619Sgrehan * Iterate through the sub-devices 323103619Sgrehan */ 324103619Sgrehan for (child = OF_child(root); child != 0; child = OF_peer(child)) { 325153050Smarius dinfo = malloc(sizeof(*dinfo), M_MACIO, M_WAITOK | M_ZERO); 326153050Smarius if (ofw_bus_gen_setup_devinfo(&dinfo->mdi_obdinfo, child) != 327153050Smarius 0) { 328153050Smarius free(dinfo, M_MACIO); 329153050Smarius continue; 330153050Smarius } 331153050Smarius quirks = macio_get_quirks(dinfo->mdi_obdinfo.obd_name); 332108991Sbenno if ((quirks & MACIO_QUIRK_IGNORE) != 0) { 333153050Smarius ofw_bus_gen_destroy_devinfo(&dinfo->mdi_obdinfo); 334153050Smarius free(dinfo, M_MACIO); 335103619Sgrehan continue; 336103619Sgrehan } 337153050Smarius resource_list_init(&dinfo->mdi_resources); 338153050Smarius dinfo->mdi_ninterrupts = 0; 339153050Smarius macio_add_intr(child, dinfo); 340186805Snwhitehorn if ((quirks & MACIO_QUIRK_USE_CHILD_REG) != 0) 341186805Snwhitehorn macio_add_reg(OF_child(child), dinfo); 342186805Snwhitehorn else 343186805Snwhitehorn macio_add_reg(child, dinfo); 344153050Smarius if ((quirks & MACIO_QUIRK_CHILD_HAS_INTR) != 0) 345153050Smarius for (subchild = OF_child(child); subchild != 0; 346153050Smarius subchild = OF_peer(subchild)) 347153050Smarius macio_add_intr(subchild, dinfo); 348103619Sgrehan cdev = device_add_child(dev, NULL, -1); 349153050Smarius if (cdev == NULL) { 350153050Smarius device_printf(dev, "<%s>: device_add_child failed\n", 351153050Smarius dinfo->mdi_obdinfo.obd_name); 352153050Smarius resource_list_free(&dinfo->mdi_resources); 353153050Smarius ofw_bus_gen_destroy_devinfo(&dinfo->mdi_obdinfo); 354153050Smarius free(dinfo, M_MACIO); 355153050Smarius continue; 356103619Sgrehan } 357153050Smarius device_set_ivars(cdev, dinfo); 358221519Snwhitehorn 359221519Snwhitehorn /* Set FCRs to enable some devices */ 360221519Snwhitehorn if (sc->sc_memr == NULL) 361221519Snwhitehorn continue; 362221519Snwhitehorn 363221519Snwhitehorn if (strcmp(ofw_bus_get_name(cdev), "bmac") == 0 || 364221519Snwhitehorn strcmp(ofw_bus_get_compat(cdev), "bmac+") == 0) { 365221519Snwhitehorn uint32_t fcr; 366221519Snwhitehorn 367221519Snwhitehorn fcr = bus_read_4(sc->sc_memr, HEATHROW_FCR); 368221519Snwhitehorn 369221519Snwhitehorn fcr |= FCR_ENET_ENABLE & ~FCR_ENET_RESET; 370221519Snwhitehorn bus_write_4(sc->sc_memr, HEATHROW_FCR, fcr); 371221519Snwhitehorn DELAY(50000); 372221519Snwhitehorn fcr |= FCR_ENET_RESET; 373221519Snwhitehorn bus_write_4(sc->sc_memr, HEATHROW_FCR, fcr); 374221519Snwhitehorn DELAY(50000); 375221519Snwhitehorn fcr &= ~FCR_ENET_RESET; 376221519Snwhitehorn bus_write_4(sc->sc_memr, HEATHROW_FCR, fcr); 377221519Snwhitehorn DELAY(50000); 378221519Snwhitehorn 379221519Snwhitehorn bus_write_4(sc->sc_memr, HEATHROW_FCR, fcr); 380221519Snwhitehorn } 381103619Sgrehan } 382103619Sgrehan 383103619Sgrehan return (bus_generic_attach(dev)); 384103619Sgrehan} 385103619Sgrehan 386103619Sgrehan 387103619Sgrehanstatic int 388103619Sgrehanmacio_print_child(device_t dev, device_t child) 389103619Sgrehan{ 390103619Sgrehan struct macio_devinfo *dinfo; 391103619Sgrehan struct resource_list *rl; 392103619Sgrehan int retval = 0; 393103619Sgrehan 394103619Sgrehan dinfo = device_get_ivars(child); 395103619Sgrehan rl = &dinfo->mdi_resources; 396103619Sgrehan 397103619Sgrehan retval += bus_print_child_header(dev, child); 398103619Sgrehan 399103619Sgrehan retval += resource_list_print_type(rl, "mem", SYS_RES_MEMORY, "%#lx"); 400103619Sgrehan retval += resource_list_print_type(rl, "irq", SYS_RES_IRQ, "%ld"); 401103619Sgrehan 402103619Sgrehan retval += bus_print_child_footer(dev, child); 403103619Sgrehan 404103619Sgrehan return (retval); 405103619Sgrehan} 406103619Sgrehan 407103619Sgrehan 408103619Sgrehanstatic void 409103619Sgrehanmacio_probe_nomatch(device_t dev, device_t child) 410103619Sgrehan{ 411110080Sbenno struct macio_devinfo *dinfo; 412110080Sbenno struct resource_list *rl; 413133589Smarius const char *type; 414103619Sgrehan 415103619Sgrehan if (bootverbose) { 416110080Sbenno dinfo = device_get_ivars(child); 417110080Sbenno rl = &dinfo->mdi_resources; 418103619Sgrehan 419133589Smarius if ((type = ofw_bus_get_type(child)) == NULL) 420133589Smarius type = "(unknown)"; 421133589Smarius device_printf(dev, "<%s, %s>", type, ofw_bus_get_name(child)); 422110080Sbenno resource_list_print_type(rl, "mem", SYS_RES_MEMORY, "%#lx"); 423110080Sbenno resource_list_print_type(rl, "irq", SYS_RES_IRQ, "%ld"); 424110080Sbenno printf(" (no driver attached)\n"); 425103619Sgrehan } 426103619Sgrehan} 427103619Sgrehan 428103619Sgrehan 429103619Sgrehanstatic struct resource * 430103619Sgrehanmacio_alloc_resource(device_t bus, device_t child, int type, int *rid, 431103619Sgrehan u_long start, u_long end, u_long count, u_int flags) 432103619Sgrehan{ 433110080Sbenno struct macio_softc *sc; 434110080Sbenno int needactivate; 435110080Sbenno struct resource *rv; 436110080Sbenno struct rman *rm; 437110080Sbenno u_long adjstart, adjend, adjcount; 438110080Sbenno struct macio_devinfo *dinfo; 439110080Sbenno struct resource_list_entry *rle; 440103619Sgrehan 441103619Sgrehan sc = device_get_softc(bus); 442108994Sbenno dinfo = device_get_ivars(child); 443103619Sgrehan 444103619Sgrehan needactivate = flags & RF_ACTIVE; 445103619Sgrehan flags &= ~RF_ACTIVE; 446103619Sgrehan 447103619Sgrehan switch (type) { 448103619Sgrehan case SYS_RES_MEMORY: 449103619Sgrehan case SYS_RES_IOPORT: 450110080Sbenno rle = resource_list_find(&dinfo->mdi_resources, SYS_RES_MEMORY, 451110080Sbenno *rid); 452110080Sbenno if (rle == NULL) { 453110080Sbenno device_printf(bus, "no rle for %s memory %d\n", 454110080Sbenno device_get_nameunit(child), *rid); 455110080Sbenno return (NULL); 456110080Sbenno } 457110080Sbenno 458110080Sbenno if (start < rle->start) 459110080Sbenno adjstart = rle->start; 460110080Sbenno else if (start > rle->end) 461110080Sbenno adjstart = rle->end; 462110080Sbenno else 463110080Sbenno adjstart = start; 464110080Sbenno 465110080Sbenno if (end < rle->start) 466110080Sbenno adjend = rle->start; 467110080Sbenno else if (end > rle->end) 468110080Sbenno adjend = rle->end; 469110080Sbenno else 470110080Sbenno adjend = end; 471110080Sbenno 472110080Sbenno adjcount = adjend - adjstart; 473110080Sbenno 474103619Sgrehan rm = &sc->sc_mem_rman; 475103619Sgrehan break; 476110080Sbenno 477103619Sgrehan case SYS_RES_IRQ: 478184299Snwhitehorn /* Check for passthrough from subattachments like macgpio */ 479184299Snwhitehorn if (device_get_parent(child) != bus) 480184299Snwhitehorn return BUS_ALLOC_RESOURCE(device_get_parent(bus), child, 481184299Snwhitehorn type, rid, start, end, count, flags); 482184299Snwhitehorn 483110436Sbenno rle = resource_list_find(&dinfo->mdi_resources, SYS_RES_IRQ, 484110436Sbenno *rid); 485110436Sbenno if (rle == NULL) { 486178599Smarcel if (dinfo->mdi_ninterrupts >= 6) { 487110436Sbenno device_printf(bus, 488178599Smarcel "%s has more than 6 interrupts\n", 489110436Sbenno device_get_nameunit(child)); 490110436Sbenno return (NULL); 491110436Sbenno } 492110436Sbenno resource_list_add(&dinfo->mdi_resources, SYS_RES_IRQ, 493110436Sbenno dinfo->mdi_ninterrupts, start, start, 1); 494110436Sbenno 495110436Sbenno dinfo->mdi_interrupts[dinfo->mdi_ninterrupts] = start; 496110436Sbenno dinfo->mdi_ninterrupts++; 497110436Sbenno } 498110436Sbenno 499108994Sbenno return (resource_list_alloc(&dinfo->mdi_resources, bus, child, 500108994Sbenno type, rid, start, end, count, flags)); 501110080Sbenno 502103619Sgrehan default: 503103619Sgrehan device_printf(bus, "unknown resource request from %s\n", 504103619Sgrehan device_get_nameunit(child)); 505103619Sgrehan return (NULL); 506103619Sgrehan } 507103619Sgrehan 508110080Sbenno rv = rman_reserve_resource(rm, adjstart, adjend, adjcount, flags, 509110080Sbenno child); 510103619Sgrehan if (rv == NULL) { 511110080Sbenno device_printf(bus, 512110080Sbenno "failed to reserve resource %#lx - %#lx (%#lx) for %s\n", 513110080Sbenno adjstart, adjend, adjcount, device_get_nameunit(child)); 514103619Sgrehan return (NULL); 515103619Sgrehan } 516103619Sgrehan 517157895Simp rman_set_rid(rv, *rid); 518103619Sgrehan 519103619Sgrehan if (needactivate) { 520103619Sgrehan if (bus_activate_resource(child, type, *rid, rv) != 0) { 521103619Sgrehan device_printf(bus, 522103619Sgrehan "failed to activate resource for %s\n", 523103619Sgrehan device_get_nameunit(child)); 524103619Sgrehan rman_release_resource(rv); 525103619Sgrehan return (NULL); 526103619Sgrehan } 527103619Sgrehan } 528103619Sgrehan 529110080Sbenno return (rv); 530103619Sgrehan} 531103619Sgrehan 532103619Sgrehan 533103619Sgrehanstatic int 534103619Sgrehanmacio_release_resource(device_t bus, device_t child, int type, int rid, 535103619Sgrehan struct resource *res) 536103619Sgrehan{ 537103619Sgrehan if (rman_get_flags(res) & RF_ACTIVE) { 538103619Sgrehan int error = bus_deactivate_resource(child, type, rid, res); 539103619Sgrehan if (error) 540103619Sgrehan return error; 541103619Sgrehan } 542103619Sgrehan 543103619Sgrehan return (rman_release_resource(res)); 544103619Sgrehan} 545103619Sgrehan 546103619Sgrehan 547103619Sgrehanstatic int 548103619Sgrehanmacio_activate_resource(device_t bus, device_t child, int type, int rid, 549103619Sgrehan struct resource *res) 550103619Sgrehan{ 551103619Sgrehan struct macio_softc *sc; 552103619Sgrehan void *p; 553103619Sgrehan 554103619Sgrehan sc = device_get_softc(bus); 555103619Sgrehan 556103619Sgrehan if (type == SYS_RES_IRQ) 557103619Sgrehan return (bus_activate_resource(bus, type, rid, res)); 558103619Sgrehan 559103619Sgrehan if ((type == SYS_RES_MEMORY) || (type == SYS_RES_IOPORT)) { 560103619Sgrehan p = pmap_mapdev((vm_offset_t)rman_get_start(res) + sc->sc_base, 561103619Sgrehan (vm_size_t)rman_get_size(res)); 562103619Sgrehan if (p == NULL) 563103619Sgrehan return (ENOMEM); 564103619Sgrehan rman_set_virtual(res, p); 565174822Smarcel rman_set_bustag(res, &bs_le_tag); 566103619Sgrehan rman_set_bushandle(res, (u_long)p); 567103619Sgrehan } 568103619Sgrehan 569103619Sgrehan return (rman_activate_resource(res)); 570103619Sgrehan} 571103619Sgrehan 572103619Sgrehan 573103619Sgrehanstatic int 574103619Sgrehanmacio_deactivate_resource(device_t bus, device_t child, int type, int rid, 575103619Sgrehan struct resource *res) 576103619Sgrehan{ 577103619Sgrehan /* 578103619Sgrehan * If this is a memory resource, unmap it. 579103619Sgrehan */ 580103619Sgrehan if ((type == SYS_RES_MEMORY) || (type == SYS_RES_IOPORT)) { 581103619Sgrehan u_int32_t psize; 582103619Sgrehan 583103619Sgrehan psize = rman_get_size(res); 584103619Sgrehan pmap_unmapdev((vm_offset_t)rman_get_virtual(res), psize); 585103619Sgrehan } 586103619Sgrehan 587103619Sgrehan return (rman_deactivate_resource(res)); 588103619Sgrehan} 589103619Sgrehan 590103619Sgrehan 591103619Sgrehanstatic struct resource_list * 592103619Sgrehanmacio_get_resource_list (device_t dev, device_t child) 593103619Sgrehan{ 594133589Smarius struct macio_devinfo *dinfo; 595133589Smarius 596153050Smarius dinfo = device_get_ivars(child); 597153050Smarius return (&dinfo->mdi_resources); 598133589Smarius} 599133589Smarius 600153050Smariusstatic const struct ofw_bus_devinfo * 601153050Smariusmacio_get_devinfo(device_t dev, device_t child) 602133589Smarius{ 603133589Smarius struct macio_devinfo *dinfo; 604133589Smarius 605153050Smarius dinfo = device_get_ivars(child); 606153050Smarius return (&dinfo->mdi_obdinfo); 607133589Smarius} 608253825Sjhibbits 609253825Sjhibbitsint 610253825Sjhibbitsmacio_enable_wireless(device_t dev, bool enable) 611253825Sjhibbits{ 612253825Sjhibbits struct macio_softc *sc = device_get_softc(dev); 613253825Sjhibbits uint32_t x; 614253825Sjhibbits 615253825Sjhibbits if (enable) { 616253825Sjhibbits x = bus_read_4(sc->sc_memr, KEYLARGO_FCR2); 617253825Sjhibbits x |= 0x4; 618253825Sjhibbits bus_write_4(sc->sc_memr, KEYLARGO_FCR2, x); 619253825Sjhibbits 620253825Sjhibbits /* Enable card slot. */ 621253825Sjhibbits bus_write_1(sc->sc_memr, KEYLARGO_GPIO_BASE + 0x0f, 5); 622253825Sjhibbits DELAY(1000); 623253825Sjhibbits bus_write_1(sc->sc_memr, KEYLARGO_GPIO_BASE + 0x0f, 4); 624253825Sjhibbits DELAY(1000); 625253825Sjhibbits x = bus_read_4(sc->sc_memr, KEYLARGO_FCR2); 626253825Sjhibbits x &= ~0x80000000; 627253825Sjhibbits 628253825Sjhibbits bus_write_4(sc->sc_memr, KEYLARGO_FCR2, x); 629253825Sjhibbits /* out8(gpio + 0x10, 4); */ 630253825Sjhibbits 631253825Sjhibbits bus_write_1(sc->sc_memr, KEYLARGO_EXTINT_GPIO_REG_BASE + 0x0b, 0); 632253825Sjhibbits bus_write_1(sc->sc_memr, KEYLARGO_EXTINT_GPIO_REG_BASE + 0x0a, 0x28); 633253825Sjhibbits bus_write_1(sc->sc_memr, KEYLARGO_EXTINT_GPIO_REG_BASE + 0x0d, 0x28); 634253825Sjhibbits bus_write_1(sc->sc_memr, KEYLARGO_GPIO_BASE + 0x0d, 0x28); 635253825Sjhibbits bus_write_1(sc->sc_memr, KEYLARGO_GPIO_BASE + 0x0e, 0x28); 636253825Sjhibbits bus_write_4(sc->sc_memr, 0x1c000, 0); 637253825Sjhibbits 638253825Sjhibbits /* Initialize the card. */ 639253825Sjhibbits bus_write_4(sc->sc_memr, 0x1a3e0, 0x41); 640253825Sjhibbits x = bus_read_4(sc->sc_memr, KEYLARGO_FCR2); 641253825Sjhibbits x |= 0x80000000; 642253825Sjhibbits bus_write_4(sc->sc_memr, KEYLARGO_FCR2, x); 643253825Sjhibbits } else { 644253825Sjhibbits x = bus_read_4(sc->sc_memr, KEYLARGO_FCR2); 645253825Sjhibbits x &= ~0x4; 646253825Sjhibbits bus_write_4(sc->sc_memr, KEYLARGO_FCR2, x); 647253825Sjhibbits /* out8(gpio + 0x10, 0); */ 648253825Sjhibbits } 649253825Sjhibbits 650253825Sjhibbits return (0); 651253825Sjhibbits} 652