1224110Sjchandra/*- 2224110Sjchandra * Copyright 2003-2011 Netlogic Microsystems (Netlogic). All rights 3224110Sjchandra * reserved. 4224110Sjchandra * 5224110Sjchandra * Redistribution and use in source and binary forms, with or without 6224110Sjchandra * modification, are permitted provided that the following conditions are 7224110Sjchandra * met: 8224110Sjchandra * 9224110Sjchandra * 1. Redistributions of source code must retain the above copyright 10224110Sjchandra * notice, this list of conditions and the following disclaimer. 11224110Sjchandra * 2. Redistributions in binary form must reproduce the above copyright 12224110Sjchandra * notice, this list of conditions and the following disclaimer in 13224110Sjchandra * the documentation and/or other materials provided with the 14224110Sjchandra * distribution. 15224110Sjchandra * 16224110Sjchandra * THIS SOFTWARE IS PROVIDED BY Netlogic Microsystems ``AS IS'' AND 17224110Sjchandra * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18224110Sjchandra * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 19224110Sjchandra * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE 20224110Sjchandra * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21224110Sjchandra * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22224110Sjchandra * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23224110Sjchandra * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24224110Sjchandra * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25224110Sjchandra * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 26224110Sjchandra * THE POSSIBILITY OF SUCH DAMAGE. 27224110Sjchandra * 28225394Sjchandra * NETLOGIC_BSD 29224110Sjchandra * $FreeBSD$ 30225394Sjchandra */ 31224110Sjchandra 32224110Sjchandra#ifndef __NLM_XLP_H__ 33224110Sjchandra#define __NLM_XLP_H__ 34227783Sjchandra#include <mips/nlm/hal/mips-extns.h> 35227783Sjchandra#include <mips/nlm/hal/iomap.h> 36224110Sjchandra 37233533Sjchandra#define PIC_UART_0_IRQ 9 38224110Sjchandra 39233533Sjchandra#define PIC_PCIE_0_IRQ 11 40233533Sjchandra#define PIC_PCIE_1_IRQ 12 41233533Sjchandra#define PIC_PCIE_2_IRQ 13 42233533Sjchandra#define PIC_PCIE_3_IRQ 14 43224110Sjchandra 44233563Sjchandra#define PIC_EHCI_0_IRQ 16 45233563Sjchandra#define PIC_MMC_IRQ 21 46233533Sjchandra/* 41 used by IRQ_SMP */ 47224110Sjchandra 48233533Sjchandra 49227783Sjchandra/* XLP 8xx/4xx A0, A1, A2 CPU COP0 PRIDs */ 50227783Sjchandra#define CHIP_PROCESSOR_ID_XLP_8XX 0x10 51227783Sjchandra#define CHIP_PROCESSOR_ID_XLP_3XX 0x11 52233533Sjchandra#define CHIP_PROCESSOR_ID_XLP_416 0x94 53233533Sjchandra#define CHIP_PROCESSOR_ID_XLP_432 0x14 54227783Sjchandra 55227783Sjchandra/* Revision id's */ 56227783Sjchandra#define XLP_REVISION_A0 0x00 57227783Sjchandra#define XLP_REVISION_A1 0x01 58227783Sjchandra#define XLP_REVISION_A2 0x02 59227783Sjchandra#define XLP_REVISION_B0 0x03 60238290Sjchandra#define XLP_REVISION_B1 0x04 61227783Sjchandra 62224110Sjchandra#ifndef LOCORE 63224110Sjchandra/* 64224110Sjchandra * FreeBSD can be started with few threads and cores turned off, 65224110Sjchandra * so have a hardware thread id to FreeBSD cpuid mapping. 66224110Sjchandra */ 67224110Sjchandraextern int xlp_ncores; 68224110Sjchandraextern int xlp_threads_per_core; 69224110Sjchandraextern uint32_t xlp_hw_thread_mask; 70224110Sjchandraextern int xlp_cpuid_to_hwtid[]; 71224110Sjchandraextern int xlp_hwtid_to_cpuid[]; 72224110Sjchandra#ifdef SMP 73224110Sjchandraextern void xlp_enable_threads(int code); 74224110Sjchandra#endif 75233533Sjchandrauint32_t xlp_get_cpu_frequency(int node, int core); 76233533Sjchandraint nlm_set_device_frequency(int node, int devtype, int frequency); 77227783Sjchandraint xlp_irt_to_irq(int irt); 78227783Sjchandraint xlp_irq_to_irt(int irq); 79224110Sjchandra 80233533Sjchandrastatic __inline int nlm_processor_id(void) 81233533Sjchandra{ 82233533Sjchandra return ((mips_rd_prid() >> 8) & 0xff); 83233533Sjchandra} 84233533Sjchandra 85227783Sjchandrastatic __inline int nlm_is_xlp3xx(void) 86224110Sjchandra{ 87227783Sjchandra 88233533Sjchandra return (nlm_processor_id() == CHIP_PROCESSOR_ID_XLP_3XX); 89224110Sjchandra} 90224110Sjchandra 91238290Sjchandrastatic __inline int nlm_is_xlp3xx_ax(void) 92238290Sjchandra{ 93238290Sjchandra uint32_t procid = mips_rd_prid(); 94238290Sjchandra int prid = (procid >> 8) & 0xff; 95238290Sjchandra int rev = procid & 0xff; 96238290Sjchandra 97238290Sjchandra return (prid == CHIP_PROCESSOR_ID_XLP_3XX && 98238290Sjchandra rev < XLP_REVISION_B0); 99238290Sjchandra} 100238290Sjchandra 101233533Sjchandrastatic __inline int nlm_is_xlp4xx(void) 102233533Sjchandra{ 103233533Sjchandra int prid = nlm_processor_id(); 104233533Sjchandra 105233533Sjchandra return (prid == CHIP_PROCESSOR_ID_XLP_432 || 106233533Sjchandra prid == CHIP_PROCESSOR_ID_XLP_416); 107233533Sjchandra} 108233533Sjchandra 109227783Sjchandrastatic __inline int nlm_is_xlp8xx(void) 110224110Sjchandra{ 111233533Sjchandra int prid = nlm_processor_id(); 112227783Sjchandra 113233533Sjchandra return (prid == CHIP_PROCESSOR_ID_XLP_8XX || 114233533Sjchandra prid == CHIP_PROCESSOR_ID_XLP_432 || 115233533Sjchandra prid == CHIP_PROCESSOR_ID_XLP_416); 116224110Sjchandra} 117224110Sjchandra 118233533Sjchandrastatic __inline int nlm_is_xlp8xx_ax(void) 119233533Sjchandra{ 120233533Sjchandra uint32_t procid = mips_rd_prid(); 121233533Sjchandra int prid = (procid >> 8) & 0xff; 122233533Sjchandra int rev = procid & 0xff; 123233533Sjchandra 124233533Sjchandra return ((prid == CHIP_PROCESSOR_ID_XLP_8XX || 125233533Sjchandra prid == CHIP_PROCESSOR_ID_XLP_432 || 126233533Sjchandra prid == CHIP_PROCESSOR_ID_XLP_416) && 127233533Sjchandra (rev < XLP_REVISION_B0)); 128233533Sjchandra} 129233533Sjchandra 130238290Sjchandrastatic __inline int nlm_is_xlp8xx_b0(void) 131238290Sjchandra{ 132238290Sjchandra uint32_t procid = mips_rd_prid(); 133238290Sjchandra int prid = (procid >> 8) & 0xff; 134238290Sjchandra int rev = procid & 0xff; 135238290Sjchandra 136238290Sjchandra return ((prid == CHIP_PROCESSOR_ID_XLP_8XX || 137238290Sjchandra prid == CHIP_PROCESSOR_ID_XLP_432 || 138238290Sjchandra prid == CHIP_PROCESSOR_ID_XLP_416) && 139238290Sjchandra rev == XLP_REVISION_B0); 140238290Sjchandra} 141238290Sjchandra 142224110Sjchandra#endif /* LOCORE */ 143224110Sjchandra#endif /* __NLM_XLP_H__ */ 144