1221167Sgnn/*- 2221167Sgnn * Copyright(c) 2002-2011 Exar Corp. 3221167Sgnn * All rights reserved. 4221167Sgnn * 5221167Sgnn * Redistribution and use in source and binary forms, with or without 6221167Sgnn * modification are permitted provided the following conditions are met: 7221167Sgnn * 8221167Sgnn * 1. Redistributions of source code must retain the above copyright notice, 9221167Sgnn * this list of conditions and the following disclaimer. 10221167Sgnn * 11221167Sgnn * 2. Redistributions in binary form must reproduce the above copyright 12221167Sgnn * notice, this list of conditions and the following disclaimer in the 13221167Sgnn * documentation and/or other materials provided with the distribution. 14221167Sgnn * 15221167Sgnn * 3. Neither the name of the Exar Corporation nor the names of its 16221167Sgnn * contributors may be used to endorse or promote products derived from 17221167Sgnn * this software without specific prior written permission. 18221167Sgnn * 19221167Sgnn * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 20221167Sgnn * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 21221167Sgnn * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 22221167Sgnn * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 23221167Sgnn * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24221167Sgnn * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25221167Sgnn * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26221167Sgnn * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27221167Sgnn * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28221167Sgnn * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29221167Sgnn * POSSIBILITY OF SUCH DAMAGE. 30221167Sgnn */ 31221167Sgnn/*$FreeBSD$*/ 32221167Sgnn 33221167Sgnn/* LINTLIBRARY */ 34221167Sgnn 35221167Sgnn#ifndef _VXGE_OSDEP_H_ 36221167Sgnn#define _VXGE_OSDEP_H_ 37221167Sgnn 38221167Sgnn#include <sys/param.h> 39221167Sgnn#include <sys/systm.h> 40221167Sgnn 41221167Sgnn#if __FreeBSD_version >= 800000 42221167Sgnn#include <sys/buf_ring.h> 43221167Sgnn#endif 44221167Sgnn 45221167Sgnn#include <sys/mbuf.h> 46221167Sgnn#include <sys/protosw.h> 47221167Sgnn#include <sys/socket.h> 48221167Sgnn#include <sys/malloc.h> 49221167Sgnn#include <sys/kernel.h> 50221167Sgnn#include <sys/module.h> 51221167Sgnn#include <sys/bus.h> 52221167Sgnn#include <sys/sockio.h> 53221167Sgnn#include <sys/lock.h> 54221167Sgnn#include <sys/mutex.h> 55221167Sgnn#include <sys/rman.h> 56221167Sgnn#include <sys/stddef.h> 57221167Sgnn#include <sys/proc.h> 58221167Sgnn#include <sys/endian.h> 59221167Sgnn#include <sys/sysctl.h> 60221167Sgnn#include <sys/pcpu.h> 61221167Sgnn#include <sys/smp.h> 62221167Sgnn 63221167Sgnn#include <net/if.h> 64221167Sgnn#include <net/if_arp.h> 65221167Sgnn#include <net/bpf.h> 66221167Sgnn#include <net/ethernet.h> 67221167Sgnn#include <net/if_dl.h> 68221167Sgnn#include <net/if_media.h> 69221167Sgnn#include <net/if_types.h> 70221167Sgnn#include <net/if_var.h> 71221167Sgnn#include <net/if_vlan_var.h> 72221167Sgnn 73221167Sgnn#include <netinet/in_systm.h> 74221167Sgnn#include <netinet/in.h> 75221167Sgnn#include <netinet/if_ether.h> 76221167Sgnn#include <netinet/ip.h> 77221167Sgnn#include <netinet/ip6.h> 78221167Sgnn#include <netinet/tcp.h> 79221167Sgnn#include <netinet/tcp_lro.h> 80221167Sgnn#include <netinet/udp.h> 81221167Sgnn 82221167Sgnn#include <machine/bus.h> 83221167Sgnn#include <machine/resource.h> 84221167Sgnn#include <machine/clock.h> 85221167Sgnn#include <machine/stdarg.h> 86221167Sgnn#include <machine/in_cksum.h> 87221167Sgnn 88221167Sgnn#include <vm/vm.h> 89221167Sgnn#include <vm/pmap.h> 90221167Sgnn 91221167Sgnn#include <dev/pci/pcivar.h> 92221167Sgnn#include <dev/pci/pcireg.h> 93221167Sgnn#include <dev/pci/pci_private.h> 94221167Sgnn 95221167Sgnn#include <dev/vxge/include/vxge-defs.h> 96221167Sgnn 97221167Sgnn/* 98221167Sgnn * ------------------------- includes and defines ------------------------- 99221167Sgnn */ 100221167Sgnn 101221167Sgnn#if BYTE_ORDER == BIG_ENDIAN 102221167Sgnn#define VXGE_OS_HOST_BIG_ENDIAN 103221167Sgnn#else 104221167Sgnn#define VXGE_OS_HOST_LITTLE_ENDIAN 105221167Sgnn#endif 106221167Sgnn 107221167Sgnn#if __LONG_BIT == 64 108221167Sgnn#define VXGE_OS_PLATFORM_64BIT 109221167Sgnn#else 110221167Sgnn#define VXGE_OS_PLATFORM_32BIT 111221167Sgnn#endif 112221167Sgnn 113221167Sgnn#define VXGE_OS_PCI_CONFIG_SIZE 256 114221167Sgnn#define VXGE_OS_HOST_PAGE_SIZE 4096 115221167Sgnn#define VXGE_LL_IP_FAST_CSUM(hdr, len) 0 116221167Sgnn 117221167Sgnn#ifndef __DECONST 118221167Sgnn#define __DECONST(type, var) ((type)(uintrptr_t)(const void *)(var)) 119221167Sgnn#endif 120221167Sgnn 121221167Sgnntypedef struct ifnet *ifnet_t; 122221167Sgnntypedef struct mbuf *mbuf_t; 123221167Sgnntypedef struct mbuf *OS_NETSTACK_BUF; 124221167Sgnn 125221167Sgnntypedef struct _vxge_bus_res_t { 126221167Sgnn 127221167Sgnn u_long bus_res_len; 128221167Sgnn bus_space_tag_t bus_space_tag; /* DMA Tag */ 129221167Sgnn bus_space_handle_t bus_space_handle; /* Bus handle */ 130221167Sgnn struct resource *bar_start_addr; /* BAR address */ 131221167Sgnn 132221167Sgnn} vxge_bus_res_t; 133221167Sgnn 134221167Sgnntypedef struct _vxge_dma_alloc_t { 135221167Sgnn 136221167Sgnn bus_addr_t dma_paddr; /* Physical Address */ 137221167Sgnn caddr_t dma_vaddr; /* Virtual Address */ 138221167Sgnn bus_dma_tag_t dma_tag; /* DMA Tag */ 139221167Sgnn bus_dmamap_t dma_map; /* DMA Map */ 140221167Sgnn bus_dma_segment_t dma_segment; /* DMA Segment */ 141221167Sgnn bus_size_t dma_size; /* Size */ 142221167Sgnn int dma_nseg; /* scatter-gather */ 143221167Sgnn 144221167Sgnn} vxge_dma_alloc_t; 145221167Sgnn 146221167Sgnntypedef struct _vxge_pci_info { 147221167Sgnn 148221167Sgnn device_t ndev; /* Device */ 149221167Sgnn void *reg_map[3]; /* BAR Resource */ 150221167Sgnn struct resource *bar_info[3]; /* BAR tag and handle */ 151221167Sgnn 152221167Sgnn} vxge_pci_info_t; 153221167Sgnn 154221167Sgnn/* 155221167Sgnn * ---------------------- fixed size primitive types ----------------------- 156221167Sgnn */ 157221167Sgnntypedef size_t ptr_t; 158221167Sgnntypedef int8_t s8; 159221167Sgnntypedef uint8_t u8; 160221167Sgnntypedef uint16_t u16; 161221167Sgnntypedef int32_t s32; 162221167Sgnntypedef uint32_t u32; 163221167Sgnntypedef unsigned long long int u64; 164228443Smdf#ifndef __bool_true_false_are_defined 165221167Sgnntypedef boolean_t bool; 166228443Smdf#endif 167221167Sgnntypedef bus_addr_t dma_addr_t; 168221167Sgnntypedef struct mtx spinlock_t; 169221167Sgnntypedef struct resource *pci_irq_h; 170221167Sgnntypedef vxge_pci_info_t *pci_dev_h; 171221167Sgnntypedef vxge_pci_info_t *pci_cfg_h; 172221167Sgnntypedef vxge_bus_res_t *pci_reg_h; 173221167Sgnntypedef vxge_dma_alloc_t pci_dma_h; 174221167Sgnntypedef vxge_dma_alloc_t pci_dma_acc_h; 175221167Sgnn 176221167Sgnn/* 177221167Sgnn * -------------------------- "libc" functionality ------------------------- 178221167Sgnn */ 179221167Sgnn#define vxge_os_curr_time systime 180221167Sgnn#define vxge_os_strcpy strcpy 181221167Sgnn#define vxge_os_strlcpy strlcpy 182221167Sgnn#define vxge_os_strlen strlen 183221167Sgnn#define vxge_os_sprintf sprintf 184221167Sgnn#define vxge_os_snprintf snprintf 185221167Sgnn#define vxge_os_println(buf) printf("%s\n", buf) 186221167Sgnn#define vxge_os_memzero bzero 187221167Sgnn#define vxge_os_memcmp memcmp 188221167Sgnn#define vxge_os_memcpy(dst, src, size) bcopy(src, dst, size) 189221167Sgnn 190221167Sgnn#define vxge_os_timestamp(buff) { \ 191221167Sgnn struct timeval cur_time; \ 192221167Sgnn gettimeofday(&cur_time, 0); \ 193221167Sgnn snprintf(buff, sizeof(buff), "%08li.%08li: ", \ 194221167Sgnn cur_time.tv_sec, cur_time.tv_usec); \ 195221167Sgnn} 196221167Sgnn 197221167Sgnn#define vxge_os_printf(fmt...) { \ 198221167Sgnn printf(fmt); \ 199221167Sgnn printf("\n"); \ 200221167Sgnn} 201221167Sgnn 202221167Sgnn#define vxge_os_vaprintf(fmt...) \ 203221167Sgnn vxge_os_printf(fmt); 204221167Sgnn 205221167Sgnn#define vxge_os_vasprintf(fmt...) { \ 206221167Sgnn vxge_os_printf(fmt); \ 207221167Sgnn} 208221167Sgnn 209221167Sgnn#define vxge_trace(trace, fmt, args...) \ 210221167Sgnn vxge_debug_uld(VXGE_COMPONENT_ULD, \ 211221167Sgnn trace, hldev, vpid, fmt, ## args) 212221167Sgnn 213221167Sgnn/* 214221167Sgnn * -------------------- synchronization primitives ------------------------- 215221167Sgnn */ 216221167Sgnn/* Initialize the spin lock */ 217221167Sgnn#define vxge_os_spin_lock_init(lockp, ctxh) { \ 218221167Sgnn if (mtx_initialized(lockp) == 0) \ 219221167Sgnn mtx_init((lockp), "vxge", NULL, MTX_DEF); \ 220221167Sgnn} 221221167Sgnn 222221167Sgnn/* Initialize the spin lock (IRQ version) */ 223221167Sgnn#define vxge_os_spin_lock_init_irq(lockp, ctxh) { \ 224221167Sgnn if (mtx_initialized(lockp) == 0) \ 225221167Sgnn mtx_init((lockp), "vxge", NULL, MTX_DEF); \ 226221167Sgnn} 227221167Sgnn 228221167Sgnn/* Destroy the lock */ 229221167Sgnn#define vxge_os_spin_lock_destroy(lockp, ctxh) { \ 230221167Sgnn if (mtx_initialized(lockp) != 0) \ 231221167Sgnn mtx_destroy(lockp); \ 232221167Sgnn} 233221167Sgnn 234221167Sgnn/* Destroy the lock (IRQ version) */ 235221167Sgnn#define vxge_os_spin_lock_destroy_irq(lockp, ctxh) { \ 236221167Sgnn if (mtx_initialized(lockp) != 0) \ 237221167Sgnn mtx_destroy(lockp); \ 238221167Sgnn} 239221167Sgnn 240221167Sgnn/* Acquire the lock */ 241221167Sgnn#define vxge_os_spin_lock(lockp) { \ 242221167Sgnn if (mtx_owned(lockp) == 0) \ 243221167Sgnn mtx_lock(lockp); \ 244221167Sgnn} 245221167Sgnn 246221167Sgnn/* Release the lock */ 247221167Sgnn#define vxge_os_spin_unlock(lockp) mtx_unlock(lockp) 248221167Sgnn 249221167Sgnn/* Acquire the lock (IRQ version) */ 250221167Sgnn#define vxge_os_spin_lock_irq(lockp, flags) { \ 251221167Sgnn flags = MTX_QUIET; \ 252221167Sgnn if (mtx_owned(lockp) == 0) \ 253221167Sgnn mtx_lock_flags(lockp, flags); \ 254221167Sgnn} 255221167Sgnn 256221167Sgnn/* Release the lock (IRQ version) */ 257221167Sgnn#define vxge_os_spin_unlock_irq(lockp, flags) { \ 258221167Sgnn flags = MTX_QUIET; \ 259221167Sgnn mtx_unlock_flags(lockp, flags); \ 260221167Sgnn} 261221167Sgnn 262221167Sgnn/* Write memory barrier */ 263221167Sgnn#if __FreeBSD_version < 800000 264221167Sgnn#if defined(__i386__) || defined(__amd64__) 265221167Sgnn#define mb() __asm volatile("mfence" ::: "memory") 266221167Sgnn#define wmb() __asm volatile("sfence" ::: "memory") 267221167Sgnn#define rmb() __asm volatile("lfence" ::: "memory") 268221167Sgnn#else 269221167Sgnn#define mb() 270221167Sgnn#define rmb() 271221167Sgnn#define wmb() 272221167Sgnn#endif 273221167Sgnn#endif 274221167Sgnn 275221167Sgnn#define vxge_os_wmb() wmb() 276221167Sgnn#define vxge_os_udelay(x) DELAY(x) 277221167Sgnn#define vxge_os_stall(x) DELAY(x) 278221167Sgnn#define vxge_os_mdelay(x) DELAY(x * 1000) 279221167Sgnn#define vxge_os_xchg (targetp, newval) 280221167Sgnn 281221167Sgnn/* 282221167Sgnn * ------------------------- misc primitives ------------------------------- 283221167Sgnn */ 284221167Sgnn#define vxge_os_be32 u32 285221167Sgnn#define vxge_os_unlikely(x) (x) 286221167Sgnn#define vxge_os_prefetch(x) (x = x) 287221167Sgnn#define vxge_os_prefetchw(x) (x = x) 288221167Sgnn#define vxge_os_bug vxge_os_printf 289221167Sgnn 290221167Sgnn#define vxge_os_ntohs ntohs 291221167Sgnn#define vxge_os_ntohl ntohl 292221167Sgnn#define vxge_os_ntohll be64toh 293221167Sgnn 294221167Sgnn#define vxge_os_htons htons 295221167Sgnn#define vxge_os_htonl htonl 296221167Sgnn#define vxge_os_htonll htobe64 297221167Sgnn 298221167Sgnn#define vxge_os_in_multicast IN_MULTICAST 299221167Sgnn#define VXGE_OS_INADDR_BROADCAST INADDR_BROADCAST 300221167Sgnn/* 301221167Sgnn * -------------------------- compiler stuff ------------------------------ 302221167Sgnn */ 303221167Sgnn#define __vxge_os_cacheline_size CACHE_LINE_SIZE 304221167Sgnn#define __vxge_os_attr_cacheline_aligned __aligned(__vxge_os_cacheline_size) 305221167Sgnn 306221167Sgnn/* 307221167Sgnn * ---------------------- memory primitives -------------------------------- 308221167Sgnn */ 309221167Sgnn#if defined(VXGE_OS_MEMORY_CHECK) 310221167Sgnn 311221167Sgnntypedef struct _vxge_os_malloc_t { 312221167Sgnn 313221167Sgnn u_long line; 314221167Sgnn u_long size; 315221167Sgnn void *ptr; 316221167Sgnn const char *file; 317221167Sgnn 318221167Sgnn} vxge_os_malloc_t; 319221167Sgnn 320221167Sgnn#define VXGE_OS_MALLOC_CNT_MAX 64*1024 321221167Sgnn 322221167Sgnnextern u32 g_malloc_cnt; 323221167Sgnnextern vxge_os_malloc_t g_malloc_arr[VXGE_OS_MALLOC_CNT_MAX]; 324221167Sgnn 325221167Sgnn#define VXGE_OS_MEMORY_CHECK_MALLOC(_vaddr, _size, _file, _line) { \ 326221167Sgnn if (_vaddr) { \ 327221167Sgnn u32 i; \ 328221167Sgnn for (i = 0; i < g_malloc_cnt; i++) { \ 329221167Sgnn if (g_malloc_arr[i].ptr == NULL) \ 330221167Sgnn break; \ 331221167Sgnn } \ 332221167Sgnn if (i == g_malloc_cnt) { \ 333221167Sgnn g_malloc_cnt++; \ 334221167Sgnn if (g_malloc_cnt >= VXGE_OS_MALLOC_CNT_MAX) { \ 335221167Sgnn vxge_os_bug("g_malloc_cnt exceed %d\n", \ 336221167Sgnn VXGE_OS_MALLOC_CNT_MAX); \ 337221167Sgnn } else { \ 338221167Sgnn g_malloc_arr[i].ptr = _vaddr; \ 339221167Sgnn g_malloc_arr[i].size = _size; \ 340221167Sgnn g_malloc_arr[i].file = _file; \ 341221167Sgnn g_malloc_arr[i].line = _line; \ 342221167Sgnn } \ 343221167Sgnn } \ 344221167Sgnn } \ 345221167Sgnn} 346221167Sgnn 347221167Sgnn#define VXGE_OS_MEMORY_CHECK_FREE(_vaddr, _size, _file, _line) { \ 348221167Sgnn u32 i; \ 349221167Sgnn for (i = 0; i < VXGE_OS_MALLOC_CNT_MAX; i++) { \ 350221167Sgnn if (g_malloc_arr[i].ptr == _vaddr) { \ 351221167Sgnn g_malloc_arr[i].ptr = NULL; \ 352221167Sgnn if (_size && g_malloc_arr[i].size != _size) { \ 353221167Sgnn vxge_os_printf("freeing wrong size " \ 354221167Sgnn "%lu allocated %s:%lu:" \ 355221167Sgnn VXGE_OS_LLXFMT":%lu\n", \ 356221167Sgnn _size, \ 357221167Sgnn g_malloc_arr[i].file, \ 358221167Sgnn g_malloc_arr[i].line, \ 359221167Sgnn (u64)(u_long) g_malloc_arr[i].ptr, \ 360221167Sgnn g_malloc_arr[i].size); \ 361221167Sgnn } \ 362221167Sgnn break; \ 363221167Sgnn } \ 364221167Sgnn } \ 365221167Sgnn} 366221167Sgnn 367221167Sgnn#else 368221167Sgnn#define VXGE_OS_MEMORY_CHECK_MALLOC(prt, size, file, line) 369221167Sgnn#define VXGE_OS_MEMORY_CHECK_FREE(vaddr, size, file, line) 370221167Sgnn#endif 371221167Sgnn 372221167Sgnnstatic inline void * 373221167Sgnnvxge_mem_alloc_ex(u_long size, const char *file, int line) 374221167Sgnn{ 375221167Sgnn void *vaddr = NULL; 376221167Sgnn vaddr = malloc(size, M_DEVBUF, M_ZERO | M_NOWAIT); 377221167Sgnn if (NULL != vaddr) { 378221167Sgnn VXGE_OS_MEMORY_CHECK_MALLOC((void *)vaddr, size, file, line) 379221167Sgnn vxge_os_memzero(vaddr, size); 380221167Sgnn } 381221167Sgnn 382221167Sgnn return (vaddr); 383221167Sgnn} 384221167Sgnn 385221167Sgnnstatic inline void 386221167Sgnnvxge_mem_free_ex(const void *vaddr, u_long size, const char *file, int line) 387221167Sgnn{ 388221167Sgnn if (NULL != vaddr) { 389221167Sgnn VXGE_OS_MEMORY_CHECK_FREE(vaddr, size, file, line) 390221167Sgnn free(__DECONST(void *, vaddr), M_DEVBUF); 391221167Sgnn } 392221167Sgnn} 393221167Sgnn 394221167Sgnn#define vxge_os_malloc(pdev, size) \ 395221167Sgnn vxge_mem_alloc_ex(size, __FILE__, __LINE__) 396221167Sgnn 397221167Sgnn#define vxge_os_free(pdev, vaddr, size) \ 398221167Sgnn vxge_mem_free_ex(vaddr, size, __FILE__, __LINE__) 399221167Sgnn 400221167Sgnn#define vxge_mem_alloc(size) \ 401221167Sgnn vxge_mem_alloc_ex(size, __FILE__, __LINE__) 402221167Sgnn 403221167Sgnn#define vxge_mem_free(vaddr, size) \ 404221167Sgnn vxge_mem_free_ex(vaddr, size, __FILE__, __LINE__) 405221167Sgnn 406221167Sgnn#define vxge_free_packet(x) \ 407221167Sgnn if (NULL != x) { m_freem(x); x = NULL; } 408221167Sgnn 409221167Sgnn/* 410221167Sgnn * --------------------------- pci primitives ------------------------------ 411221167Sgnn */ 412221167Sgnn#define vxge_os_pci_read8(pdev, cfgh, where, val) \ 413221167Sgnn (*(val) = pci_read_config(pdev->ndev, where, 1)) 414221167Sgnn 415221167Sgnn#define vxge_os_pci_write8(pdev, cfgh, where, val) \ 416221167Sgnn pci_write_config(pdev->ndev, where, val, 1) 417221167Sgnn 418221167Sgnn#define vxge_os_pci_read16(pdev, cfgh, where, val) \ 419221167Sgnn (*(val) = pci_read_config(pdev->ndev, where, 2)) 420221167Sgnn 421221167Sgnn#define vxge_os_pci_write16(pdev, cfgh, where, val) \ 422221167Sgnn pci_write_config(pdev->ndev, where, val, 2) 423221167Sgnn 424221167Sgnn#define vxge_os_pci_read32(pdev, cfgh, where, val) \ 425221167Sgnn (*(val) = pci_read_config(pdev->ndev, where, 4)) 426221167Sgnn 427221167Sgnn#define vxge_os_pci_write32(pdev, cfgh, where, val) \ 428221167Sgnn pci_write_config(pdev->ndev, where, val, 4) 429221167Sgnn 430221167Sgnnstatic inline u32 431221167Sgnnvxge_os_pci_res_len(pci_dev_h pdev, pci_reg_h regh) 432221167Sgnn{ 433221167Sgnn return (((vxge_bus_res_t *) regh)->bus_res_len); 434221167Sgnn} 435221167Sgnn 436221167Sgnnstatic inline u8 437221167Sgnnvxge_os_pio_mem_read8(pci_dev_h pdev, pci_reg_h regh, void *addr) 438221167Sgnn{ 439221167Sgnn caddr_t vaddr = 440221167Sgnn (caddr_t) (((vxge_bus_res_t *) (regh))->bar_start_addr); 441221167Sgnn 442221167Sgnn return bus_space_read_1(((vxge_bus_res_t *) regh)->bus_space_tag, 443221167Sgnn ((vxge_bus_res_t *) regh)->bus_space_handle, 444221167Sgnn (bus_size_t) ((caddr_t) (addr) - vaddr)); 445221167Sgnn} 446221167Sgnn 447221167Sgnnstatic inline u16 448221167Sgnnvxge_os_pio_mem_read16(pci_dev_h pdev, pci_reg_h regh, void *addr) 449221167Sgnn{ 450221167Sgnn caddr_t vaddr = 451221167Sgnn (caddr_t) (((vxge_bus_res_t *) (regh))->bar_start_addr); 452221167Sgnn 453221167Sgnn return bus_space_read_2(((vxge_bus_res_t *) regh)->bus_space_tag, 454221167Sgnn ((vxge_bus_res_t *) regh)->bus_space_handle, 455221167Sgnn (bus_size_t) ((caddr_t) (addr) - vaddr)); 456221167Sgnn} 457221167Sgnn 458221167Sgnnstatic inline u32 459221167Sgnnvxge_os_pio_mem_read32(pci_dev_h pdev, pci_reg_h regh, void *addr) 460221167Sgnn{ 461221167Sgnn caddr_t vaddr = 462221167Sgnn (caddr_t) (((vxge_bus_res_t *) (regh))->bar_start_addr); 463221167Sgnn 464221167Sgnn return bus_space_read_4(((vxge_bus_res_t *) regh)->bus_space_tag, 465221167Sgnn ((vxge_bus_res_t *) regh)->bus_space_handle, 466221167Sgnn (bus_size_t) ((caddr_t) (addr) - vaddr)); 467221167Sgnn} 468221167Sgnn 469221167Sgnnstatic inline u64 470221167Sgnnvxge_os_pio_mem_read64(pci_dev_h pdev, pci_reg_h regh, void *addr) 471221167Sgnn{ 472221167Sgnn u64 val, val_l, val_u; 473221167Sgnn 474221167Sgnn caddr_t vaddr = 475221167Sgnn (caddr_t) (((vxge_bus_res_t *) (regh))->bar_start_addr); 476221167Sgnn 477221167Sgnn val_l = bus_space_read_4(((vxge_bus_res_t *) regh)->bus_space_tag, 478221167Sgnn ((vxge_bus_res_t *) regh)->bus_space_handle, 479221167Sgnn (bus_size_t) (((caddr_t) addr) + 4 - vaddr)); 480221167Sgnn 481221167Sgnn val_u = bus_space_read_4(((vxge_bus_res_t *) regh)->bus_space_tag, 482221167Sgnn ((vxge_bus_res_t *) regh)->bus_space_handle, 483221167Sgnn (bus_size_t) ((caddr_t) (addr) - vaddr)); 484221167Sgnn 485221167Sgnn val = ((val_l << 32) | val_u); 486221167Sgnn return (val); 487221167Sgnn} 488221167Sgnn 489221167Sgnnstatic inline void 490221167Sgnnvxge_os_pio_mem_write8(pci_dev_h pdev, pci_reg_h regh, u8 val, void *addr) 491221167Sgnn{ 492221167Sgnn caddr_t vaddr = 493221167Sgnn (caddr_t) (((vxge_bus_res_t *) regh)->bar_start_addr); 494221167Sgnn 495221167Sgnn bus_space_write_1(((vxge_bus_res_t *) regh)->bus_space_tag, 496221167Sgnn ((vxge_bus_res_t *) regh)->bus_space_handle, 497221167Sgnn (bus_size_t) ((caddr_t) (addr) - vaddr), val); 498221167Sgnn} 499221167Sgnn 500221167Sgnnstatic inline void 501221167Sgnnvxge_os_pio_mem_write16(pci_dev_h pdev, pci_reg_h regh, u16 val, void *addr) 502221167Sgnn{ 503221167Sgnn caddr_t vaddr = 504221167Sgnn (caddr_t) (((vxge_bus_res_t *) (regh))->bar_start_addr); 505221167Sgnn 506221167Sgnn bus_space_write_2(((vxge_bus_res_t *) regh)->bus_space_tag, 507221167Sgnn ((vxge_bus_res_t *) regh)->bus_space_handle, 508221167Sgnn (bus_size_t) ((caddr_t) (addr) - vaddr), val); 509221167Sgnn} 510221167Sgnn 511221167Sgnnstatic inline void 512221167Sgnnvxge_os_pio_mem_write32(pci_dev_h pdev, pci_reg_h regh, u32 val, void *addr) 513221167Sgnn{ 514221167Sgnn caddr_t vaddr = 515221167Sgnn (caddr_t) (((vxge_bus_res_t *) (regh))->bar_start_addr); 516221167Sgnn 517221167Sgnn bus_space_write_4(((vxge_bus_res_t *) regh)->bus_space_tag, 518221167Sgnn ((vxge_bus_res_t *) regh)->bus_space_handle, 519221167Sgnn (bus_size_t) ((caddr_t) (addr) - vaddr), val); 520221167Sgnn} 521221167Sgnn 522221167Sgnnstatic inline void 523221167Sgnnvxge_os_pio_mem_write64(pci_dev_h pdev, pci_reg_h regh, u64 val, void *addr) 524221167Sgnn{ 525221167Sgnn u32 val_l = (u32) (val & 0xffffffff); 526221167Sgnn u32 val_u = (u32) (val >> 32); 527221167Sgnn 528221167Sgnn vxge_os_pio_mem_write32(pdev, regh, val_l, addr); 529221167Sgnn vxge_os_pio_mem_write32(pdev, regh, val_u, (caddr_t) addr + 4); 530221167Sgnn} 531221167Sgnn 532221167Sgnn#define vxge_os_flush_bridge vxge_os_pio_mem_read64 533221167Sgnn 534221167Sgnn/* 535221167Sgnn * --------------------------- dma primitives ----------------------------- 536221167Sgnn */ 537221167Sgnn#define VXGE_OS_DMA_DIR_TODEVICE 0 538221167Sgnn#define VXGE_OS_DMA_DIR_FROMDEVICE 1 539221167Sgnn#define VXGE_OS_DMA_DIR_BIDIRECTIONAL 2 540221167Sgnn#define VXGE_OS_INVALID_DMA_ADDR ((bus_addr_t)0) 541221167Sgnn 542221167Sgnnstatic void 543221167Sgnnvxge_dmamap_cb(void *arg, bus_dma_segment_t *segs, int nseg, int error) 544221167Sgnn{ 545221167Sgnn if (error) 546221167Sgnn return; 547221167Sgnn 548221167Sgnn *(bus_addr_t *) arg = segs->ds_addr; 549221167Sgnn} 550221167Sgnn 551221167Sgnnstatic inline void * 552221167Sgnnvxge_os_dma_malloc(pci_dev_h pdev, u_long bytes, int dma_flags, 553221167Sgnn pci_dma_h * p_dmah, pci_dma_acc_h * p_dma_acch) 554221167Sgnn{ 555221167Sgnn int error = 0; 556221167Sgnn bus_addr_t bus_addr = BUS_SPACE_MAXADDR; 557221167Sgnn bus_size_t boundary, max_size, alignment = PAGE_SIZE; 558221167Sgnn 559221167Sgnn if (bytes > PAGE_SIZE) { 560221167Sgnn boundary = 0; 561221167Sgnn max_size = bytes; 562221167Sgnn } else { 563221167Sgnn boundary = PAGE_SIZE; 564221167Sgnn max_size = PAGE_SIZE; 565221167Sgnn } 566221167Sgnn 567221167Sgnn error = bus_dma_tag_create( 568221167Sgnn bus_get_dma_tag(pdev->ndev), /* Parent */ 569221167Sgnn alignment, /* Alignment */ 570221167Sgnn boundary, /* Bounds */ 571221167Sgnn bus_addr, /* Low Address */ 572221167Sgnn bus_addr, /* High Address */ 573221167Sgnn NULL, /* Filter Func */ 574221167Sgnn NULL, /* Filter Func Argument */ 575221167Sgnn bytes, /* Maximum Size */ 576221167Sgnn 1, /* Number of Segments */ 577221167Sgnn max_size, /* Maximum Segment Size */ 578221167Sgnn BUS_DMA_ALLOCNOW, /* Flags */ 579221167Sgnn NULL, /* Lock Func */ 580221167Sgnn NULL, /* Lock Func Arguments */ 581221167Sgnn &(p_dmah->dma_tag)); /* DMA Tag */ 582221167Sgnn 583221167Sgnn if (error != 0) { 584221167Sgnn device_printf(pdev->ndev, "bus_dma_tag_create failed\n"); 585221167Sgnn goto _exit0; 586221167Sgnn } 587221167Sgnn 588221167Sgnn p_dmah->dma_size = bytes; 589221167Sgnn error = bus_dmamem_alloc(p_dmah->dma_tag, (void **)&p_dmah->dma_vaddr, 590221167Sgnn (BUS_DMA_NOWAIT | BUS_DMA_ZERO | BUS_DMA_COHERENT), 591221167Sgnn &p_dmah->dma_map); 592221167Sgnn if (error != 0) { 593221167Sgnn device_printf(pdev->ndev, "bus_dmamem_alloc failed\n"); 594221167Sgnn goto _exit1; 595221167Sgnn } 596221167Sgnn 597221167Sgnn VXGE_OS_MEMORY_CHECK_MALLOC(p_dmah->dma_vaddr, p_dmah->dma_size, 598221167Sgnn __FILE__, __LINE__); 599221167Sgnn 600221167Sgnn return (p_dmah->dma_vaddr); 601221167Sgnn 602221167Sgnn_exit1: 603221167Sgnn bus_dma_tag_destroy(p_dmah->dma_tag); 604221167Sgnn_exit0: 605221167Sgnn return (NULL); 606221167Sgnn} 607221167Sgnn 608221167Sgnnstatic inline void 609221167Sgnnvxge_dma_free(pci_dev_h pdev, const void *vaddr, u_long size, 610221167Sgnn pci_dma_h *p_dmah, pci_dma_acc_h *p_dma_acch, 611221167Sgnn const char *file, int line) 612221167Sgnn{ 613221167Sgnn VXGE_OS_MEMORY_CHECK_FREE(p_dmah->dma_vaddr, size, file, line) 614221167Sgnn 615221167Sgnn bus_dmamem_free(p_dmah->dma_tag, p_dmah->dma_vaddr, p_dmah->dma_map); 616221167Sgnn bus_dma_tag_destroy(p_dmah->dma_tag); 617221167Sgnn 618221167Sgnn p_dmah->dma_map = NULL; 619221167Sgnn p_dmah->dma_tag = NULL; 620221167Sgnn p_dmah->dma_vaddr = NULL; 621221167Sgnn} 622221167Sgnn 623221167Sgnnextern void 624221167Sgnnvxge_hal_blockpool_block_add(void *, void *, u32, pci_dma_h *, pci_dma_acc_h *); 625221167Sgnn 626221167Sgnnstatic inline void 627221167Sgnnvxge_os_dma_malloc_async(pci_dev_h pdev, void *devh, 628221167Sgnn u_long size, int dma_flags) 629221167Sgnn{ 630221167Sgnn pci_dma_h dma_h; 631221167Sgnn pci_dma_acc_h acc_handle; 632221167Sgnn 633221167Sgnn void *block_addr = NULL; 634221167Sgnn 635221167Sgnn block_addr = vxge_os_dma_malloc(pdev, size, dma_flags, 636221167Sgnn &dma_h, &acc_handle); 637221167Sgnn 638221167Sgnn vxge_hal_blockpool_block_add(devh, block_addr, size, 639221167Sgnn &dma_h, &acc_handle); 640221167Sgnn} 641221167Sgnn 642221167Sgnnstatic inline void 643221167Sgnnvxge_os_dma_sync(pci_dev_h pdev, pci_dma_h dmah, dma_addr_t dma_paddr, 644221167Sgnn u64 dma_offset, size_t length, int dir) 645221167Sgnn{ 646221167Sgnn bus_dmasync_op_t dmasync_op; 647221167Sgnn 648221167Sgnn switch (dir) { 649221167Sgnn case VXGE_OS_DMA_DIR_TODEVICE: 650221167Sgnn dmasync_op = BUS_DMASYNC_PREWRITE | BUS_DMASYNC_POSTWRITE; 651221167Sgnn break; 652221167Sgnn 653221167Sgnn case VXGE_OS_DMA_DIR_FROMDEVICE: 654221167Sgnn dmasync_op = BUS_DMASYNC_PREREAD | BUS_DMASYNC_POSTREAD; 655221167Sgnn break; 656221167Sgnn 657221167Sgnn default: 658221167Sgnn case VXGE_OS_DMA_DIR_BIDIRECTIONAL: 659221167Sgnn dmasync_op = BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE; 660221167Sgnn break; 661221167Sgnn } 662221167Sgnn 663221167Sgnn bus_dmamap_sync(dmah.dma_tag, dmah.dma_map, dmasync_op); 664221167Sgnn} 665221167Sgnn 666221167Sgnnstatic inline dma_addr_t 667221167Sgnnvxge_os_dma_map(pci_dev_h pdev, pci_dma_h dmah, void *vaddr, u_long size, 668221167Sgnn int dir, int dma_flags) 669221167Sgnn{ 670221167Sgnn int error; 671221167Sgnn 672221167Sgnn error = bus_dmamap_load(dmah.dma_tag, dmah.dma_map, dmah.dma_vaddr, 673221167Sgnn dmah.dma_size, vxge_dmamap_cb, &(dmah.dma_paddr), BUS_DMA_NOWAIT); 674221167Sgnn 675221167Sgnn if (error != 0) 676221167Sgnn return (VXGE_OS_INVALID_DMA_ADDR); 677221167Sgnn 678221167Sgnn dmah.dma_size = size; 679221167Sgnn return (dmah.dma_paddr); 680221167Sgnn} 681221167Sgnn 682221167Sgnnstatic inline void 683221167Sgnnvxge_os_dma_unmap(pci_dev_h pdev, pci_dma_h dmah, dma_addr_t dma_paddr, 684221167Sgnn u32 size, int dir) 685221167Sgnn{ 686221167Sgnn bus_dmamap_unload(dmah.dma_tag, dmah.dma_map); 687221167Sgnn} 688221167Sgnn 689221167Sgnn#define vxge_os_dma_free(pdev, vaddr, size, dma_flags, p_dma_acch, p_dmah) \ 690221167Sgnn vxge_dma_free(pdev, vaddr, size, p_dma_acch, p_dmah, \ 691221167Sgnn __FILE__, __LINE__) 692221167Sgnn 693221167Sgnnstatic inline int 694221167Sgnnvxge_os_is_my_packet(void *pdev, unsigned long addr) 695221167Sgnn{ 696221167Sgnn return (0); 697221167Sgnn} 698221167Sgnn 699221167Sgnn#endif /* _VXGE_OSDEP_H_ */ 700