if_axe.c revision 243857
1184610Salfred/*- 2184610Salfred * Copyright (c) 1997, 1998, 1999, 2000-2003 3184610Salfred * Bill Paul <wpaul@windriver.com>. All rights reserved. 4184610Salfred * 5184610Salfred * Redistribution and use in source and binary forms, with or without 6184610Salfred * modification, are permitted provided that the following conditions 7184610Salfred * are met: 8184610Salfred * 1. Redistributions of source code must retain the above copyright 9184610Salfred * notice, this list of conditions and the following disclaimer. 10184610Salfred * 2. Redistributions in binary form must reproduce the above copyright 11184610Salfred * notice, this list of conditions and the following disclaimer in the 12184610Salfred * documentation and/or other materials provided with the distribution. 13184610Salfred * 3. All advertising materials mentioning features or use of this software 14184610Salfred * must display the following acknowledgement: 15184610Salfred * This product includes software developed by Bill Paul. 16184610Salfred * 4. Neither the name of the author nor the names of any co-contributors 17184610Salfred * may be used to endorse or promote products derived from this software 18184610Salfred * without specific prior written permission. 19184610Salfred * 20184610Salfred * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 21184610Salfred * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22184610Salfred * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23184610Salfred * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 24184610Salfred * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25184610Salfred * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26184610Salfred * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27184610Salfred * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28184610Salfred * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29184610Salfred * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 30184610Salfred * THE POSSIBILITY OF SUCH DAMAGE. 31184610Salfred */ 32184610Salfred 33184610Salfred#include <sys/cdefs.h> 34184610Salfred__FBSDID("$FreeBSD: head/sys/dev/usb/net/if_axe.c 243857 2012-12-04 09:32:43Z glebius $"); 35184610Salfred 36184610Salfred/* 37188412Sthompsa * ASIX Electronics AX88172/AX88178/AX88778 USB 2.0 ethernet driver. 38188412Sthompsa * Used in the LinkSys USB200M and various other adapters. 39184610Salfred * 40184610Salfred * Manuals available from: 41184610Salfred * http://www.asix.com.tw/datasheet/mac/Ax88172.PDF 42184610Salfred * Note: you need the manual for the AX88170 chip (USB 1.x ethernet 43184610Salfred * controller) to find the definitions for the RX control register. 44184610Salfred * http://www.asix.com.tw/datasheet/mac/Ax88170.PDF 45184610Salfred * 46184610Salfred * Written by Bill Paul <wpaul@windriver.com> 47184610Salfred * Senior Engineer 48184610Salfred * Wind River Systems 49184610Salfred */ 50184610Salfred 51184610Salfred/* 52184610Salfred * The AX88172 provides USB ethernet supports at 10 and 100Mbps. 53184610Salfred * It uses an external PHY (reference designs use a RealTek chip), 54184610Salfred * and has a 64-bit multicast hash filter. There is some information 55184610Salfred * missing from the manual which one needs to know in order to make 56184610Salfred * the chip function: 57184610Salfred * 58184610Salfred * - You must set bit 7 in the RX control register, otherwise the 59184610Salfred * chip won't receive any packets. 60184610Salfred * - You must initialize all 3 IPG registers, or you won't be able 61184610Salfred * to send any packets. 62184610Salfred * 63184610Salfred * Note that this device appears to only support loading the station 64184610Salfred * address via autload from the EEPROM (i.e. there's no way to manaully 65184610Salfred * set it). 66184610Salfred * 67184610Salfred * (Adam Weinberger wanted me to name this driver if_gir.c.) 68184610Salfred */ 69184610Salfred 70184610Salfred/* 71184610Salfred * Ax88178 and Ax88772 support backported from the OpenBSD driver. 72184610Salfred * 2007/02/12, J.R. Oldroyd, fbsd@opal.com 73184610Salfred * 74184610Salfred * Manual here: 75184610Salfred * http://www.asix.com.tw/FrootAttach/datasheet/AX88178_datasheet_Rev10.pdf 76184610Salfred * http://www.asix.com.tw/FrootAttach/datasheet/AX88772_datasheet_Rev10.pdf 77184610Salfred */ 78184610Salfred 79194677Sthompsa#include <sys/param.h> 80194677Sthompsa#include <sys/systm.h> 81226743Syongari#include <sys/bus.h> 82226743Syongari#include <sys/condvar.h> 83226743Syongari#include <sys/endian.h> 84194677Sthompsa#include <sys/kernel.h> 85226743Syongari#include <sys/lock.h> 86226743Syongari#include <sys/malloc.h> 87226743Syongari#include <sys/mbuf.h> 88194677Sthompsa#include <sys/module.h> 89194677Sthompsa#include <sys/mutex.h> 90226743Syongari#include <sys/socket.h> 91226743Syongari#include <sys/sockio.h> 92194677Sthompsa#include <sys/sysctl.h> 93194677Sthompsa#include <sys/sx.h> 94194677Sthompsa 95226743Syongari#include <net/if.h> 96226743Syongari#include <net/ethernet.h> 97226743Syongari#include <net/if_types.h> 98226743Syongari#include <net/if_media.h> 99226743Syongari#include <net/if_vlan_var.h> 100226743Syongari 101226743Syongari#include <dev/mii/mii.h> 102226743Syongari#include <dev/mii/miivar.h> 103226743Syongari 104194677Sthompsa#include <dev/usb/usb.h> 105194677Sthompsa#include <dev/usb/usbdi.h> 106194677Sthompsa#include <dev/usb/usbdi_util.h> 107188746Sthompsa#include "usbdevs.h" 108184610Salfred 109184610Salfred#define USB_DEBUG_VAR axe_debug 110194677Sthompsa#include <dev/usb/usb_debug.h> 111188942Sthompsa#include <dev/usb/usb_process.h> 112184610Salfred 113188942Sthompsa#include <dev/usb/net/usb_ethernet.h> 114188942Sthompsa#include <dev/usb/net/if_axereg.h> 115184610Salfred 116188412Sthompsa/* 117188412Sthompsa * AXE_178_MAX_FRAME_BURST 118188412Sthompsa * max frame burst size for Ax88178 and Ax88772 119188412Sthompsa * 0 2048 bytes 120188412Sthompsa * 1 4096 bytes 121188412Sthompsa * 2 8192 bytes 122188412Sthompsa * 3 16384 bytes 123188412Sthompsa * use the largest your system can handle without USB stalling. 124188412Sthompsa * 125188412Sthompsa * NB: 88772 parts appear to generate lots of input errors with 126188412Sthompsa * a 2K rx buffer and 8K is only slightly faster than 4K on an 127188412Sthompsa * EHCI port on a T42 so change at your own risk. 128188412Sthompsa */ 129188412Sthompsa#define AXE_178_MAX_FRAME_BURST 1 130184610Salfred 131226743Syongari#define AXE_CSUM_FEATURES (CSUM_IP | CSUM_TCP | CSUM_UDP) 132226743Syongari 133207077Sthompsa#ifdef USB_DEBUG 134184610Salfredstatic int axe_debug = 0; 135184610Salfred 136227309Sedstatic SYSCTL_NODE(_hw_usb, OID_AUTO, axe, CTLFLAG_RW, 0, "USB axe"); 137192502SthompsaSYSCTL_INT(_hw_usb_axe, OID_AUTO, debug, CTLFLAG_RW, &axe_debug, 0, 138184610Salfred "Debug level"); 139184610Salfred#endif 140184610Salfred 141184610Salfred/* 142184610Salfred * Various supported device vendors/products. 143184610Salfred */ 144223486Shselaskystatic const STRUCT_USB_HOST_ID axe_devs[] = { 145201028Sthompsa#define AXE_DEV(v,p,i) { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, i) } 146201028Sthompsa AXE_DEV(ABOCOM, UF200, 0), 147201028Sthompsa AXE_DEV(ACERCM, EP1427X2, 0), 148201028Sthompsa AXE_DEV(APPLE, ETHERNET, AXE_FLAG_772), 149201028Sthompsa AXE_DEV(ASIX, AX88172, 0), 150201028Sthompsa AXE_DEV(ASIX, AX88178, AXE_FLAG_178), 151201028Sthompsa AXE_DEV(ASIX, AX88772, AXE_FLAG_772), 152215969Syongari AXE_DEV(ASIX, AX88772A, AXE_FLAG_772A), 153224020Syongari AXE_DEV(ASIX, AX88772B, AXE_FLAG_772B), 154228637Skevlo AXE_DEV(ASIX, AX88772B_1, AXE_FLAG_772B), 155201028Sthompsa AXE_DEV(ATEN, UC210T, 0), 156201028Sthompsa AXE_DEV(BELKIN, F5D5055, AXE_FLAG_178), 157201028Sthompsa AXE_DEV(BILLIONTON, USB2AR, 0), 158215969Syongari AXE_DEV(CISCOLINKSYS, USB200MV2, AXE_FLAG_772A), 159201028Sthompsa AXE_DEV(COREGA, FETHER_USB2_TX, 0), 160201028Sthompsa AXE_DEV(DLINK, DUBE100, 0), 161201028Sthompsa AXE_DEV(DLINK, DUBE100B1, AXE_FLAG_772), 162201028Sthompsa AXE_DEV(GOODWAY, GWUSB2E, 0), 163201028Sthompsa AXE_DEV(IODATA, ETGUS2, AXE_FLAG_178), 164201028Sthompsa AXE_DEV(JVC, MP_PRX1, 0), 165201028Sthompsa AXE_DEV(LINKSYS2, USB200M, 0), 166201028Sthompsa AXE_DEV(LINKSYS4, USB1000, AXE_FLAG_178), 167212980Ssanpei AXE_DEV(LOGITEC, LAN_GTJU2A, AXE_FLAG_178), 168201028Sthompsa AXE_DEV(MELCO, LUAU2KTX, 0), 169212980Ssanpei AXE_DEV(MELCO, LUA3U2AGT, AXE_FLAG_178), 170201028Sthompsa AXE_DEV(NETGEAR, FA120, 0), 171201028Sthompsa AXE_DEV(OQO, ETHER01PLUS, AXE_FLAG_772), 172201028Sthompsa AXE_DEV(PLANEX3, GU1000T, AXE_FLAG_178), 173201028Sthompsa AXE_DEV(SITECOM, LN029, 0), 174201028Sthompsa AXE_DEV(SITECOMEU, LN028, AXE_FLAG_178), 175201028Sthompsa AXE_DEV(SYSTEMTALKS, SGCX2UL, 0), 176201028Sthompsa#undef AXE_DEV 177184610Salfred}; 178184610Salfred 179184610Salfredstatic device_probe_t axe_probe; 180184610Salfredstatic device_attach_t axe_attach; 181184610Salfredstatic device_detach_t axe_detach; 182184610Salfred 183193045Sthompsastatic usb_callback_t axe_bulk_read_callback; 184193045Sthompsastatic usb_callback_t axe_bulk_write_callback; 185184610Salfred 186188412Sthompsastatic miibus_readreg_t axe_miibus_readreg; 187188412Sthompsastatic miibus_writereg_t axe_miibus_writereg; 188188412Sthompsastatic miibus_statchg_t axe_miibus_statchg; 189184610Salfred 190193045Sthompsastatic uether_fn_t axe_attach_post; 191193045Sthompsastatic uether_fn_t axe_init; 192193045Sthompsastatic uether_fn_t axe_stop; 193193045Sthompsastatic uether_fn_t axe_start; 194193045Sthompsastatic uether_fn_t axe_tick; 195193045Sthompsastatic uether_fn_t axe_setmulti; 196193045Sthompsastatic uether_fn_t axe_setpromisc; 197184610Salfred 198226743Syongaristatic int axe_attach_post_sub(struct usb_ether *); 199188412Sthompsastatic int axe_ifmedia_upd(struct ifnet *); 200188412Sthompsastatic void axe_ifmedia_sts(struct ifnet *, struct ifmediareq *); 201188412Sthompsastatic int axe_cmd(struct axe_softc *, int, int, int, void *); 202188412Sthompsastatic void axe_ax88178_init(struct axe_softc *); 203188412Sthompsastatic void axe_ax88772_init(struct axe_softc *); 204224020Syongaristatic void axe_ax88772_phywake(struct axe_softc *); 205215969Syongaristatic void axe_ax88772a_init(struct axe_softc *); 206224020Syongaristatic void axe_ax88772b_init(struct axe_softc *); 207186730Salfredstatic int axe_get_phyno(struct axe_softc *, int); 208226743Syongaristatic int axe_ioctl(struct ifnet *, u_long, caddr_t); 209226743Syongaristatic int axe_rx_frame(struct usb_ether *, struct usb_page_cache *, int); 210226743Syongaristatic int axe_rxeof(struct usb_ether *, struct usb_page_cache *, 211226743Syongari unsigned int offset, unsigned int, struct axe_csum_hdr *); 212226743Syongaristatic void axe_csum_cfg(struct usb_ether *); 213184610Salfred 214192984Sthompsastatic const struct usb_config axe_config[AXE_N_TRANSFER] = { 215184610Salfred 216187259Sthompsa [AXE_BULK_DT_WR] = { 217184610Salfred .type = UE_BULK, 218184610Salfred .endpoint = UE_ADDR_ANY, 219184610Salfred .direction = UE_DIR_OUT, 220216284Syongari .frames = 16, 221216284Syongari .bufsize = 16 * MCLBYTES, 222190734Sthompsa .flags = {.pipe_bof = 1,.force_short_xfer = 1,}, 223190734Sthompsa .callback = axe_bulk_write_callback, 224190734Sthompsa .timeout = 10000, /* 10 seconds */ 225184610Salfred }, 226184610Salfred 227187259Sthompsa [AXE_BULK_DT_RD] = { 228184610Salfred .type = UE_BULK, 229184610Salfred .endpoint = UE_ADDR_ANY, 230184610Salfred .direction = UE_DIR_IN, 231197566Sthompsa .bufsize = 16384, /* bytes */ 232190734Sthompsa .flags = {.pipe_bof = 1,.short_xfer_ok = 1,}, 233190734Sthompsa .callback = axe_bulk_read_callback, 234190734Sthompsa .timeout = 0, /* no timeout */ 235184610Salfred }, 236184610Salfred}; 237184610Salfred 238224020Syongaristatic const struct ax88772b_mfb ax88772b_mfb_table[] = { 239224020Syongari { 0x8000, 0x8001, 2048 }, 240224020Syongari { 0x8100, 0x8147, 4096}, 241224020Syongari { 0x8200, 0x81EB, 6144}, 242224020Syongari { 0x8300, 0x83D7, 8192}, 243224020Syongari { 0x8400, 0x851E, 16384}, 244224020Syongari { 0x8500, 0x8666, 20480}, 245224020Syongari { 0x8600, 0x87AE, 24576}, 246224020Syongari { 0x8700, 0x8A3D, 32768} 247224020Syongari}; 248224020Syongari 249184610Salfredstatic device_method_t axe_methods[] = { 250184610Salfred /* Device interface */ 251184610Salfred DEVMETHOD(device_probe, axe_probe), 252184610Salfred DEVMETHOD(device_attach, axe_attach), 253184610Salfred DEVMETHOD(device_detach, axe_detach), 254184610Salfred 255184610Salfred /* MII interface */ 256188412Sthompsa DEVMETHOD(miibus_readreg, axe_miibus_readreg), 257188412Sthompsa DEVMETHOD(miibus_writereg, axe_miibus_writereg), 258188412Sthompsa DEVMETHOD(miibus_statchg, axe_miibus_statchg), 259184610Salfred 260227843Smarius DEVMETHOD_END 261184610Salfred}; 262184610Salfred 263184610Salfredstatic driver_t axe_driver = { 264184610Salfred .name = "axe", 265184610Salfred .methods = axe_methods, 266184610Salfred .size = sizeof(struct axe_softc), 267184610Salfred}; 268184610Salfred 269184610Salfredstatic devclass_t axe_devclass; 270184610Salfred 271189275SthompsaDRIVER_MODULE(axe, uhub, axe_driver, axe_devclass, NULL, 0); 272184610SalfredDRIVER_MODULE(miibus, axe, miibus_driver, miibus_devclass, 0, 0); 273188942SthompsaMODULE_DEPEND(axe, uether, 1, 1, 1); 274188942SthompsaMODULE_DEPEND(axe, usb, 1, 1, 1); 275188412SthompsaMODULE_DEPEND(axe, ether, 1, 1, 1); 276188412SthompsaMODULE_DEPEND(axe, miibus, 1, 1, 1); 277212122SthompsaMODULE_VERSION(axe, 1); 278184610Salfred 279192984Sthompsastatic const struct usb_ether_methods axe_ue_methods = { 280188412Sthompsa .ue_attach_post = axe_attach_post, 281226743Syongari .ue_attach_post_sub = axe_attach_post_sub, 282188412Sthompsa .ue_start = axe_start, 283188412Sthompsa .ue_init = axe_init, 284188412Sthompsa .ue_stop = axe_stop, 285188412Sthompsa .ue_tick = axe_tick, 286188412Sthompsa .ue_setmulti = axe_setmulti, 287188412Sthompsa .ue_setpromisc = axe_setpromisc, 288188412Sthompsa .ue_mii_upd = axe_ifmedia_upd, 289188412Sthompsa .ue_mii_sts = axe_ifmedia_sts, 290188412Sthompsa}; 291188412Sthompsa 292188412Sthompsastatic int 293188412Sthompsaaxe_cmd(struct axe_softc *sc, int cmd, int index, int val, void *buf) 294184610Salfred{ 295192984Sthompsa struct usb_device_request req; 296193045Sthompsa usb_error_t err; 297184610Salfred 298188412Sthompsa AXE_LOCK_ASSERT(sc, MA_OWNED); 299188412Sthompsa 300184610Salfred req.bmRequestType = (AXE_CMD_IS_WRITE(cmd) ? 301184610Salfred UT_WRITE_VENDOR_DEVICE : 302184610Salfred UT_READ_VENDOR_DEVICE); 303184610Salfred req.bRequest = AXE_CMD_CMD(cmd); 304184610Salfred USETW(req.wValue, val); 305184610Salfred USETW(req.wIndex, index); 306188412Sthompsa USETW(req.wLength, AXE_CMD_LEN(cmd)); 307184610Salfred 308194228Sthompsa err = uether_do_request(&sc->sc_ue, &req, buf, 1000); 309184610Salfred 310188412Sthompsa return (err); 311184610Salfred} 312184610Salfred 313184610Salfredstatic int 314188412Sthompsaaxe_miibus_readreg(device_t dev, int phy, int reg) 315184610Salfred{ 316184610Salfred struct axe_softc *sc = device_get_softc(dev); 317184610Salfred uint16_t val; 318188412Sthompsa int locked; 319184610Salfred 320188412Sthompsa locked = mtx_owned(&sc->sc_mtx); 321188412Sthompsa if (!locked) 322188412Sthompsa AXE_LOCK(sc); 323186730Salfred 324188412Sthompsa axe_cmd(sc, AXE_CMD_MII_OPMODE_SW, 0, 0, NULL); 325188412Sthompsa axe_cmd(sc, AXE_CMD_MII_READ_REG, reg, phy, &val); 326188412Sthompsa axe_cmd(sc, AXE_CMD_MII_OPMODE_HW, 0, 0, NULL); 327184610Salfred 328184610Salfred val = le16toh(val); 329215968Syongari if (AXE_IS_772(sc) && reg == MII_BMSR) { 330186730Salfred /* 331186730Salfred * BMSR of AX88772 indicates that it supports extended 332186730Salfred * capability but the extended status register is 333186730Salfred * revered for embedded ethernet PHY. So clear the 334186730Salfred * extended capability bit of BMSR. 335186730Salfred */ 336186730Salfred val &= ~BMSR_EXTCAP; 337186730Salfred } 338184610Salfred 339188412Sthompsa if (!locked) 340188412Sthompsa AXE_UNLOCK(sc); 341184610Salfred return (val); 342184610Salfred} 343184610Salfred 344184610Salfredstatic int 345188412Sthompsaaxe_miibus_writereg(device_t dev, int phy, int reg, int val) 346184610Salfred{ 347184610Salfred struct axe_softc *sc = device_get_softc(dev); 348188412Sthompsa int locked; 349184610Salfred 350189522Sthompsa val = htole32(val); 351188412Sthompsa locked = mtx_owned(&sc->sc_mtx); 352188412Sthompsa if (!locked) 353188412Sthompsa AXE_LOCK(sc); 354184610Salfred 355188412Sthompsa axe_cmd(sc, AXE_CMD_MII_OPMODE_SW, 0, 0, NULL); 356188412Sthompsa axe_cmd(sc, AXE_CMD_MII_WRITE_REG, reg, phy, &val); 357188412Sthompsa axe_cmd(sc, AXE_CMD_MII_OPMODE_HW, 0, 0, NULL); 358188412Sthompsa 359188412Sthompsa if (!locked) 360188412Sthompsa AXE_UNLOCK(sc); 361184610Salfred return (0); 362184610Salfred} 363184610Salfred 364184610Salfredstatic void 365188412Sthompsaaxe_miibus_statchg(device_t dev) 366184610Salfred{ 367184610Salfred struct axe_softc *sc = device_get_softc(dev); 368184610Salfred struct mii_data *mii = GET_MII(sc); 369188553Sthompsa struct ifnet *ifp; 370184610Salfred uint16_t val; 371188412Sthompsa int err, locked; 372184610Salfred 373188412Sthompsa locked = mtx_owned(&sc->sc_mtx); 374188412Sthompsa if (!locked) 375188412Sthompsa AXE_LOCK(sc); 376184610Salfred 377194228Sthompsa ifp = uether_getifp(&sc->sc_ue); 378188553Sthompsa if (mii == NULL || ifp == NULL || 379188553Sthompsa (ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) 380188553Sthompsa goto done; 381226743Syongari 382188553Sthompsa sc->sc_flags &= ~AXE_FLAG_LINK; 383188553Sthompsa if ((mii->mii_media_status & (IFM_ACTIVE | IFM_AVALID)) == 384188553Sthompsa (IFM_ACTIVE | IFM_AVALID)) { 385188553Sthompsa switch (IFM_SUBTYPE(mii->mii_media_active)) { 386188553Sthompsa case IFM_10_T: 387188553Sthompsa case IFM_100_TX: 388188553Sthompsa sc->sc_flags |= AXE_FLAG_LINK; 389188553Sthompsa break; 390188553Sthompsa case IFM_1000_T: 391188553Sthompsa if ((sc->sc_flags & AXE_FLAG_178) == 0) 392188553Sthompsa break; 393188553Sthompsa sc->sc_flags |= AXE_FLAG_LINK; 394188553Sthompsa break; 395188553Sthompsa default: 396188553Sthompsa break; 397188553Sthompsa } 398188553Sthompsa } 399226743Syongari 400188553Sthompsa /* Lost link, do nothing. */ 401188553Sthompsa if ((sc->sc_flags & AXE_FLAG_LINK) == 0) 402188553Sthompsa goto done; 403226743Syongari 404188553Sthompsa val = 0; 405226743Syongari if ((IFM_OPTIONS(mii->mii_media_active) & IFM_FDX) != 0) { 406188553Sthompsa val |= AXE_MEDIA_FULL_DUPLEX; 407226743Syongari if (AXE_IS_178_FAMILY(sc)) { 408226743Syongari if ((IFM_OPTIONS(mii->mii_media_active) & 409226743Syongari IFM_ETH_TXPAUSE) != 0) 410226743Syongari val |= AXE_178_MEDIA_TXFLOW_CONTROL_EN; 411226743Syongari if ((IFM_OPTIONS(mii->mii_media_active) & 412226743Syongari IFM_ETH_RXPAUSE) != 0) 413226743Syongari val |= AXE_178_MEDIA_RXFLOW_CONTROL_EN; 414226743Syongari } 415226743Syongari } 416215968Syongari if (AXE_IS_178_FAMILY(sc)) { 417186730Salfred val |= AXE_178_MEDIA_RX_EN | AXE_178_MEDIA_MAGIC; 418188553Sthompsa if ((sc->sc_flags & AXE_FLAG_178) != 0) 419188553Sthompsa val |= AXE_178_MEDIA_ENCK; 420184610Salfred switch (IFM_SUBTYPE(mii->mii_media_active)) { 421184610Salfred case IFM_1000_T: 422184610Salfred val |= AXE_178_MEDIA_GMII | AXE_178_MEDIA_ENCK; 423184610Salfred break; 424184610Salfred case IFM_100_TX: 425184610Salfred val |= AXE_178_MEDIA_100TX; 426184610Salfred break; 427184610Salfred case IFM_10_T: 428184610Salfred /* doesn't need to be handled */ 429184610Salfred break; 430184610Salfred } 431184610Salfred } 432188412Sthompsa err = axe_cmd(sc, AXE_CMD_WRITE_MEDIA, 0, val, NULL); 433188412Sthompsa if (err) 434188412Sthompsa device_printf(dev, "media change failed, error %d\n", err); 435188553Sthompsadone: 436188412Sthompsa if (!locked) 437188412Sthompsa AXE_UNLOCK(sc); 438184610Salfred} 439184610Salfred 440184610Salfred/* 441184610Salfred * Set media options. 442184610Salfred */ 443184610Salfredstatic int 444188412Sthompsaaxe_ifmedia_upd(struct ifnet *ifp) 445184610Salfred{ 446184610Salfred struct axe_softc *sc = ifp->if_softc; 447184610Salfred struct mii_data *mii = GET_MII(sc); 448221407Smarius struct mii_softc *miisc; 449188553Sthompsa int error; 450184610Salfred 451188412Sthompsa AXE_LOCK_ASSERT(sc, MA_OWNED); 452184610Salfred 453221407Smarius LIST_FOREACH(miisc, &mii->mii_phys, mii_list) 454221407Smarius PHY_RESET(miisc); 455188553Sthompsa error = mii_mediachg(mii); 456188553Sthompsa return (error); 457184610Salfred} 458184610Salfred 459184610Salfred/* 460184610Salfred * Report current media status. 461184610Salfred */ 462184610Salfredstatic void 463188412Sthompsaaxe_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr) 464184610Salfred{ 465184610Salfred struct axe_softc *sc = ifp->if_softc; 466188412Sthompsa struct mii_data *mii = GET_MII(sc); 467184610Salfred 468188412Sthompsa AXE_LOCK(sc); 469188412Sthompsa mii_pollstat(mii); 470188412Sthompsa ifmr->ifm_active = mii->mii_media_active; 471188412Sthompsa ifmr->ifm_status = mii->mii_media_status; 472226479Syongari AXE_UNLOCK(sc); 473184610Salfred} 474184610Salfred 475184610Salfredstatic void 476192984Sthompsaaxe_setmulti(struct usb_ether *ue) 477184610Salfred{ 478194228Sthompsa struct axe_softc *sc = uether_getsc(ue); 479194228Sthompsa struct ifnet *ifp = uether_getifp(ue); 480188412Sthompsa struct ifmultiaddr *ifma; 481188412Sthompsa uint32_t h = 0; 482184610Salfred uint16_t rxmode; 483188412Sthompsa uint8_t hashtbl[8] = { 0, 0, 0, 0, 0, 0, 0, 0 }; 484184610Salfred 485188412Sthompsa AXE_LOCK_ASSERT(sc, MA_OWNED); 486184610Salfred 487188412Sthompsa axe_cmd(sc, AXE_CMD_RXCTL_READ, 0, 0, &rxmode); 488184610Salfred rxmode = le16toh(rxmode); 489184610Salfred 490188412Sthompsa if (ifp->if_flags & (IFF_ALLMULTI | IFF_PROMISC)) { 491184610Salfred rxmode |= AXE_RXCMD_ALLMULTI; 492188412Sthompsa axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, rxmode, NULL); 493184610Salfred return; 494184610Salfred } 495184610Salfred rxmode &= ~AXE_RXCMD_ALLMULTI; 496184610Salfred 497195049Srwatson if_maddr_rlock(ifp); 498188412Sthompsa TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) 499188412Sthompsa { 500188412Sthompsa if (ifma->ifma_addr->sa_family != AF_LINK) 501188412Sthompsa continue; 502188412Sthompsa h = ether_crc32_be(LLADDR((struct sockaddr_dl *) 503188412Sthompsa ifma->ifma_addr), ETHER_ADDR_LEN) >> 26; 504188412Sthompsa hashtbl[h / 8] |= 1 << (h % 8); 505188412Sthompsa } 506195049Srwatson if_maddr_runlock(ifp); 507184610Salfred 508188412Sthompsa axe_cmd(sc, AXE_CMD_WRITE_MCAST, 0, 0, (void *)&hashtbl); 509188412Sthompsa axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, rxmode, NULL); 510184610Salfred} 511184610Salfred 512186730Salfredstatic int 513186730Salfredaxe_get_phyno(struct axe_softc *sc, int sel) 514186730Salfred{ 515188412Sthompsa int phyno; 516186730Salfred 517186730Salfred switch (AXE_PHY_TYPE(sc->sc_phyaddrs[sel])) { 518186730Salfred case PHY_TYPE_100_HOME: 519186730Salfred case PHY_TYPE_GIG: 520188412Sthompsa phyno = AXE_PHY_NO(sc->sc_phyaddrs[sel]); 521186730Salfred break; 522186730Salfred case PHY_TYPE_SPECIAL: 523186730Salfred /* FALLTHROUGH */ 524186730Salfred case PHY_TYPE_RSVD: 525186730Salfred /* FALLTHROUGH */ 526186730Salfred case PHY_TYPE_NON_SUP: 527186730Salfred /* FALLTHROUGH */ 528186730Salfred default: 529186730Salfred phyno = -1; 530186730Salfred break; 531186730Salfred } 532186730Salfred 533186730Salfred return (phyno); 534186730Salfred} 535186730Salfred 536212130Sthompsa#define AXE_GPIO_WRITE(x, y) do { \ 537212130Sthompsa axe_cmd(sc, AXE_CMD_WRITE_GPIO, 0, (x), NULL); \ 538212130Sthompsa uether_pause(ue, (y)); \ 539212130Sthompsa} while (0) 540212130Sthompsa 541184610Salfredstatic void 542188412Sthompsaaxe_ax88178_init(struct axe_softc *sc) 543184610Salfred{ 544212130Sthompsa struct usb_ether *ue; 545222581Syongari int gpio0, ledmode, phymode; 546212130Sthompsa uint16_t eeprom, val; 547184610Salfred 548212130Sthompsa ue = &sc->sc_ue; 549188412Sthompsa axe_cmd(sc, AXE_CMD_SROM_WR_ENABLE, 0, 0, NULL); 550184610Salfred /* XXX magic */ 551188412Sthompsa axe_cmd(sc, AXE_CMD_SROM_READ, 0, 0x0017, &eeprom); 552184610Salfred eeprom = le16toh(eeprom); 553188412Sthompsa axe_cmd(sc, AXE_CMD_SROM_WR_DISABLE, 0, 0, NULL); 554184610Salfred 555184610Salfred /* if EEPROM is invalid we have to use to GPIO0 */ 556184610Salfred if (eeprom == 0xffff) { 557212130Sthompsa phymode = AXE_PHY_MODE_MARVELL; 558184610Salfred gpio0 = 1; 559222581Syongari ledmode = 0; 560184610Salfred } else { 561212130Sthompsa phymode = eeprom & 0x7f; 562184610Salfred gpio0 = (eeprom & 0x80) ? 0 : 1; 563222581Syongari ledmode = eeprom >> 8; 564184610Salfred } 565184610Salfred 566212130Sthompsa if (bootverbose) 567215960Syongari device_printf(sc->sc_ue.ue_dev, 568215960Syongari "EEPROM data : 0x%04x, phymode : 0x%02x\n", eeprom, 569215960Syongari phymode); 570212130Sthompsa /* Program GPIOs depending on PHY hardware. */ 571212130Sthompsa switch (phymode) { 572212130Sthompsa case AXE_PHY_MODE_MARVELL: 573212130Sthompsa if (gpio0 == 1) { 574212130Sthompsa AXE_GPIO_WRITE(AXE_GPIO_RELOAD_EEPROM | AXE_GPIO0_EN, 575212130Sthompsa hz / 32); 576212130Sthompsa AXE_GPIO_WRITE(AXE_GPIO0_EN | AXE_GPIO2 | AXE_GPIO2_EN, 577212130Sthompsa hz / 32); 578212130Sthompsa AXE_GPIO_WRITE(AXE_GPIO0_EN | AXE_GPIO2_EN, hz / 4); 579212130Sthompsa AXE_GPIO_WRITE(AXE_GPIO0_EN | AXE_GPIO2 | AXE_GPIO2_EN, 580212130Sthompsa hz / 32); 581222581Syongari } else { 582212130Sthompsa AXE_GPIO_WRITE(AXE_GPIO_RELOAD_EEPROM | AXE_GPIO1 | 583222581Syongari AXE_GPIO1_EN, hz / 3); 584222581Syongari if (ledmode == 1) { 585222581Syongari AXE_GPIO_WRITE(AXE_GPIO1_EN, hz / 3); 586222581Syongari AXE_GPIO_WRITE(AXE_GPIO1 | AXE_GPIO1_EN, 587222581Syongari hz / 3); 588222581Syongari } else { 589222581Syongari AXE_GPIO_WRITE(AXE_GPIO1 | AXE_GPIO1_EN | 590222581Syongari AXE_GPIO2 | AXE_GPIO2_EN, hz / 32); 591222581Syongari AXE_GPIO_WRITE(AXE_GPIO1 | AXE_GPIO1_EN | 592222581Syongari AXE_GPIO2_EN, hz / 4); 593222581Syongari AXE_GPIO_WRITE(AXE_GPIO1 | AXE_GPIO1_EN | 594222581Syongari AXE_GPIO2 | AXE_GPIO2_EN, hz / 32); 595222581Syongari } 596222581Syongari } 597212130Sthompsa break; 598212130Sthompsa case AXE_PHY_MODE_CICADA: 599215960Syongari case AXE_PHY_MODE_CICADA_V2: 600215960Syongari case AXE_PHY_MODE_CICADA_V2_ASIX: 601212130Sthompsa if (gpio0 == 1) 602212130Sthompsa AXE_GPIO_WRITE(AXE_GPIO_RELOAD_EEPROM | AXE_GPIO0 | 603212130Sthompsa AXE_GPIO0_EN, hz / 32); 604212130Sthompsa else 605212130Sthompsa AXE_GPIO_WRITE(AXE_GPIO_RELOAD_EEPROM | AXE_GPIO1 | 606212130Sthompsa AXE_GPIO1_EN, hz / 32); 607212130Sthompsa break; 608212130Sthompsa case AXE_PHY_MODE_AGERE: 609212130Sthompsa AXE_GPIO_WRITE(AXE_GPIO_RELOAD_EEPROM | AXE_GPIO1 | 610212130Sthompsa AXE_GPIO1_EN, hz / 32); 611212130Sthompsa AXE_GPIO_WRITE(AXE_GPIO1 | AXE_GPIO1_EN | AXE_GPIO2 | 612212130Sthompsa AXE_GPIO2_EN, hz / 32); 613212130Sthompsa AXE_GPIO_WRITE(AXE_GPIO1 | AXE_GPIO1_EN | AXE_GPIO2_EN, hz / 4); 614212130Sthompsa AXE_GPIO_WRITE(AXE_GPIO1 | AXE_GPIO1_EN | AXE_GPIO2 | 615212130Sthompsa AXE_GPIO2_EN, hz / 32); 616212130Sthompsa break; 617212130Sthompsa case AXE_PHY_MODE_REALTEK_8211CL: 618212130Sthompsa case AXE_PHY_MODE_REALTEK_8211BN: 619212130Sthompsa case AXE_PHY_MODE_REALTEK_8251CL: 620212130Sthompsa val = gpio0 == 1 ? AXE_GPIO0 | AXE_GPIO0_EN : 621212130Sthompsa AXE_GPIO1 | AXE_GPIO1_EN; 622212130Sthompsa AXE_GPIO_WRITE(val, hz / 32); 623212130Sthompsa AXE_GPIO_WRITE(val | AXE_GPIO2 | AXE_GPIO2_EN, hz / 32); 624212130Sthompsa AXE_GPIO_WRITE(val | AXE_GPIO2_EN, hz / 4); 625212130Sthompsa AXE_GPIO_WRITE(val | AXE_GPIO2 | AXE_GPIO2_EN, hz / 32); 626212130Sthompsa if (phymode == AXE_PHY_MODE_REALTEK_8211CL) { 627212130Sthompsa axe_miibus_writereg(ue->ue_dev, sc->sc_phyno, 628212130Sthompsa 0x1F, 0x0005); 629212130Sthompsa axe_miibus_writereg(ue->ue_dev, sc->sc_phyno, 630212130Sthompsa 0x0C, 0x0000); 631212130Sthompsa val = axe_miibus_readreg(ue->ue_dev, sc->sc_phyno, 632212130Sthompsa 0x0001); 633212130Sthompsa axe_miibus_writereg(ue->ue_dev, sc->sc_phyno, 634212130Sthompsa 0x01, val | 0x0080); 635212130Sthompsa axe_miibus_writereg(ue->ue_dev, sc->sc_phyno, 636212130Sthompsa 0x1F, 0x0000); 637212130Sthompsa } 638212130Sthompsa break; 639212130Sthompsa default: 640212130Sthompsa /* Unknown PHY model or no need to program GPIOs. */ 641212130Sthompsa break; 642184610Salfred } 643184610Salfred 644184610Salfred /* soft reset */ 645188412Sthompsa axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, AXE_SW_RESET_CLEAR, NULL); 646212130Sthompsa uether_pause(ue, hz / 4); 647184610Salfred 648188412Sthompsa axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, 649184610Salfred AXE_SW_RESET_PRL | AXE_178_RESET_MAGIC, NULL); 650212130Sthompsa uether_pause(ue, hz / 4); 651186730Salfred /* Enable MII/GMII/RGMII interface to work with external PHY. */ 652188412Sthompsa axe_cmd(sc, AXE_CMD_SW_PHY_SELECT, 0, 0, NULL); 653212130Sthompsa uether_pause(ue, hz / 4); 654184610Salfred 655188412Sthompsa axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, 0, NULL); 656184610Salfred} 657184610Salfred 658184610Salfredstatic void 659188412Sthompsaaxe_ax88772_init(struct axe_softc *sc) 660184610Salfred{ 661188412Sthompsa axe_cmd(sc, AXE_CMD_WRITE_GPIO, 0, 0x00b0, NULL); 662194228Sthompsa uether_pause(&sc->sc_ue, hz / 16); 663184610Salfred 664186730Salfred if (sc->sc_phyno == AXE_772_PHY_NO_EPHY) { 665184610Salfred /* ask for the embedded PHY */ 666188412Sthompsa axe_cmd(sc, AXE_CMD_SW_PHY_SELECT, 0, 0x01, NULL); 667194228Sthompsa uether_pause(&sc->sc_ue, hz / 64); 668184610Salfred 669184610Salfred /* power down and reset state, pin reset state */ 670188412Sthompsa axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, 671184610Salfred AXE_SW_RESET_CLEAR, NULL); 672194228Sthompsa uether_pause(&sc->sc_ue, hz / 16); 673184610Salfred 674184610Salfred /* power down/reset state, pin operating state */ 675188412Sthompsa axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, 676184610Salfred AXE_SW_RESET_IPPD | AXE_SW_RESET_PRL, NULL); 677194228Sthompsa uether_pause(&sc->sc_ue, hz / 4); 678184610Salfred 679184610Salfred /* power up, reset */ 680188412Sthompsa axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, AXE_SW_RESET_PRL, NULL); 681184610Salfred 682184610Salfred /* power up, operating */ 683188412Sthompsa axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, 684184610Salfred AXE_SW_RESET_IPRL | AXE_SW_RESET_PRL, NULL); 685184610Salfred } else { 686184610Salfred /* ask for external PHY */ 687188412Sthompsa axe_cmd(sc, AXE_CMD_SW_PHY_SELECT, 0, 0x00, NULL); 688194228Sthompsa uether_pause(&sc->sc_ue, hz / 64); 689184610Salfred 690184610Salfred /* power down internal PHY */ 691188412Sthompsa axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, 692184610Salfred AXE_SW_RESET_IPPD | AXE_SW_RESET_PRL, NULL); 693184610Salfred } 694184610Salfred 695194228Sthompsa uether_pause(&sc->sc_ue, hz / 4); 696188412Sthompsa axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, 0, NULL); 697184610Salfred} 698184610Salfred 699184610Salfredstatic void 700224020Syongariaxe_ax88772_phywake(struct axe_softc *sc) 701215969Syongari{ 702215969Syongari struct usb_ether *ue; 703215969Syongari 704215969Syongari ue = &sc->sc_ue; 705215969Syongari if (sc->sc_phyno == AXE_772_PHY_NO_EPHY) { 706215969Syongari /* Manually select internal(embedded) PHY - MAC mode. */ 707215969Syongari axe_cmd(sc, AXE_CMD_SW_PHY_SELECT, 0, AXE_SW_PHY_SELECT_SS_ENB | 708215969Syongari AXE_SW_PHY_SELECT_EMBEDDED | AXE_SW_PHY_SELECT_SS_MII, 709215969Syongari NULL); 710215969Syongari uether_pause(&sc->sc_ue, hz / 32); 711215969Syongari } else { 712215969Syongari /* 713215969Syongari * Manually select external PHY - MAC mode. 714215969Syongari * Reverse MII/RMII is for AX88772A PHY mode. 715215969Syongari */ 716215969Syongari axe_cmd(sc, AXE_CMD_SW_PHY_SELECT, 0, AXE_SW_PHY_SELECT_SS_ENB | 717215969Syongari AXE_SW_PHY_SELECT_EXT | AXE_SW_PHY_SELECT_SS_MII, NULL); 718215969Syongari uether_pause(&sc->sc_ue, hz / 32); 719215969Syongari } 720215969Syongari /* Take PHY out of power down. */ 721215969Syongari axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, AXE_SW_RESET_IPPD | 722215969Syongari AXE_SW_RESET_IPRL, NULL); 723215969Syongari uether_pause(&sc->sc_ue, hz / 4); 724215969Syongari axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, AXE_SW_RESET_IPRL, NULL); 725215969Syongari uether_pause(&sc->sc_ue, hz); 726215969Syongari axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, AXE_SW_RESET_CLEAR, NULL); 727215969Syongari uether_pause(&sc->sc_ue, hz / 32); 728215969Syongari axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, AXE_SW_RESET_IPRL, NULL); 729215969Syongari uether_pause(&sc->sc_ue, hz / 32); 730224020Syongari} 731224020Syongari 732224020Syongaristatic void 733224020Syongariaxe_ax88772a_init(struct axe_softc *sc) 734224020Syongari{ 735224020Syongari struct usb_ether *ue; 736224020Syongari 737224020Syongari ue = &sc->sc_ue; 738224020Syongari /* Reload EEPROM. */ 739224020Syongari AXE_GPIO_WRITE(AXE_GPIO_RELOAD_EEPROM, hz / 32); 740224020Syongari axe_ax88772_phywake(sc); 741224020Syongari /* Stop MAC. */ 742215969Syongari axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, 0, NULL); 743215969Syongari} 744215969Syongari 745224020Syongaristatic void 746224020Syongariaxe_ax88772b_init(struct axe_softc *sc) 747224020Syongari{ 748224020Syongari struct usb_ether *ue; 749224020Syongari uint16_t eeprom; 750224020Syongari uint8_t *eaddr; 751224020Syongari int i; 752224020Syongari 753224020Syongari ue = &sc->sc_ue; 754224020Syongari /* Reload EEPROM. */ 755224020Syongari AXE_GPIO_WRITE(AXE_GPIO_RELOAD_EEPROM, hz / 32); 756224020Syongari /* 757224020Syongari * Save PHY power saving configuration(high byte) and 758224020Syongari * clear EEPROM checksum value(low byte). 759224020Syongari */ 760224020Syongari axe_cmd(sc, AXE_CMD_SROM_READ, 0, AXE_EEPROM_772B_PHY_PWRCFG, &eeprom); 761224020Syongari sc->sc_pwrcfg = le16toh(eeprom) & 0xFF00; 762224020Syongari 763224020Syongari /* 764224020Syongari * Auto-loaded default station address from internal ROM is 765224020Syongari * 00:00:00:00:00:00 such that an explicit access to EEPROM 766224020Syongari * is required to get real station address. 767224020Syongari */ 768224020Syongari eaddr = ue->ue_eaddr; 769224020Syongari for (i = 0; i < ETHER_ADDR_LEN / 2; i++) { 770224020Syongari axe_cmd(sc, AXE_CMD_SROM_READ, 0, AXE_EEPROM_772B_NODE_ID + i, 771224020Syongari &eeprom); 772224020Syongari eeprom = le16toh(eeprom); 773224020Syongari *eaddr++ = (uint8_t)(eeprom & 0xFF); 774224020Syongari *eaddr++ = (uint8_t)((eeprom >> 8) & 0xFF); 775224020Syongari } 776224020Syongari /* Wakeup PHY. */ 777224020Syongari axe_ax88772_phywake(sc); 778224020Syongari /* Stop MAC. */ 779224020Syongari axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, 0, NULL); 780224020Syongari} 781224020Syongari 782215969Syongari#undef AXE_GPIO_WRITE 783215969Syongari 784215969Syongaristatic void 785188412Sthompsaaxe_reset(struct axe_softc *sc) 786184610Salfred{ 787192984Sthompsa struct usb_config_descriptor *cd; 788193045Sthompsa usb_error_t err; 789184610Salfred 790194228Sthompsa cd = usbd_get_config_descriptor(sc->sc_ue.ue_udev); 791184610Salfred 792194228Sthompsa err = usbd_req_set_config(sc->sc_ue.ue_udev, &sc->sc_mtx, 793188412Sthompsa cd->bConfigurationValue); 794188412Sthompsa if (err) 795188412Sthompsa DPRINTF("reset failed (ignored)\n"); 796188412Sthompsa 797188412Sthompsa /* Wait a little while for the chip to get its brains in order. */ 798194228Sthompsa uether_pause(&sc->sc_ue, hz / 100); 799215966Syongari 800215966Syongari /* Reinitialize controller to achieve full reset. */ 801215966Syongari if (sc->sc_flags & AXE_FLAG_178) 802215966Syongari axe_ax88178_init(sc); 803215966Syongari else if (sc->sc_flags & AXE_FLAG_772) 804215966Syongari axe_ax88772_init(sc); 805215969Syongari else if (sc->sc_flags & AXE_FLAG_772A) 806215969Syongari axe_ax88772a_init(sc); 807224020Syongari else if (sc->sc_flags & AXE_FLAG_772B) 808224020Syongari axe_ax88772b_init(sc); 809188412Sthompsa} 810188412Sthompsa 811188412Sthompsastatic void 812192984Sthompsaaxe_attach_post(struct usb_ether *ue) 813188412Sthompsa{ 814194228Sthompsa struct axe_softc *sc = uether_getsc(ue); 815188412Sthompsa 816184610Salfred /* 817184610Salfred * Load PHY indexes first. Needed by axe_xxx_init(). 818184610Salfred */ 819188412Sthompsa axe_cmd(sc, AXE_CMD_READ_PHYID, 0, 0, sc->sc_phyaddrs); 820212130Sthompsa if (bootverbose) 821212130Sthompsa device_printf(sc->sc_ue.ue_dev, "PHYADDR 0x%02x:0x%02x\n", 822212130Sthompsa sc->sc_phyaddrs[0], sc->sc_phyaddrs[1]); 823186730Salfred sc->sc_phyno = axe_get_phyno(sc, AXE_PHY_SEL_PRI); 824186730Salfred if (sc->sc_phyno == -1) 825186730Salfred sc->sc_phyno = axe_get_phyno(sc, AXE_PHY_SEL_SEC); 826186730Salfred if (sc->sc_phyno == -1) { 827188412Sthompsa device_printf(sc->sc_ue.ue_dev, 828188412Sthompsa "no valid PHY address found, assuming PHY address 0\n"); 829186730Salfred sc->sc_phyno = 0; 830186730Salfred } 831184610Salfred 832224020Syongari /* Initialize controller and get station address. */ 833215968Syongari if (sc->sc_flags & AXE_FLAG_178) { 834188412Sthompsa axe_ax88178_init(sc); 835215968Syongari sc->sc_tx_bufsz = 16 * 1024; 836224020Syongari axe_cmd(sc, AXE_178_CMD_READ_NODEID, 0, 0, ue->ue_eaddr); 837215968Syongari } else if (sc->sc_flags & AXE_FLAG_772) { 838188412Sthompsa axe_ax88772_init(sc); 839215968Syongari sc->sc_tx_bufsz = 8 * 1024; 840224020Syongari axe_cmd(sc, AXE_178_CMD_READ_NODEID, 0, 0, ue->ue_eaddr); 841215969Syongari } else if (sc->sc_flags & AXE_FLAG_772A) { 842215969Syongari axe_ax88772a_init(sc); 843215969Syongari sc->sc_tx_bufsz = 8 * 1024; 844188412Sthompsa axe_cmd(sc, AXE_178_CMD_READ_NODEID, 0, 0, ue->ue_eaddr); 845224020Syongari } else if (sc->sc_flags & AXE_FLAG_772B) { 846224020Syongari axe_ax88772b_init(sc); 847224020Syongari sc->sc_tx_bufsz = 8 * 1024; 848224020Syongari } else 849188412Sthompsa axe_cmd(sc, AXE_172_CMD_READ_NODEID, 0, 0, ue->ue_eaddr); 850184610Salfred 851184610Salfred /* 852184610Salfred * Fetch IPG values. 853184610Salfred */ 854224020Syongari if (sc->sc_flags & (AXE_FLAG_772A | AXE_FLAG_772B)) { 855215969Syongari /* Set IPG values. */ 856215969Syongari sc->sc_ipgs[0] = 0x15; 857215969Syongari sc->sc_ipgs[1] = 0x16; 858215969Syongari sc->sc_ipgs[2] = 0x1A; 859215969Syongari } else 860215969Syongari axe_cmd(sc, AXE_CMD_READ_IPG012, 0, 0, sc->sc_ipgs); 861188412Sthompsa} 862184610Salfred 863226743Syongaristatic int 864226743Syongariaxe_attach_post_sub(struct usb_ether *ue) 865226743Syongari{ 866226743Syongari struct axe_softc *sc; 867226743Syongari struct ifnet *ifp; 868226743Syongari u_int adv_pause; 869226743Syongari int error; 870226743Syongari 871226743Syongari sc = uether_getsc(ue); 872226743Syongari ifp = ue->ue_ifp; 873226743Syongari ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 874226743Syongari ifp->if_start = uether_start; 875226743Syongari ifp->if_ioctl = axe_ioctl; 876226743Syongari ifp->if_init = uether_init; 877226743Syongari IFQ_SET_MAXLEN(&ifp->if_snd, ifqmaxlen); 878226743Syongari ifp->if_snd.ifq_drv_maxlen = ifqmaxlen; 879226743Syongari IFQ_SET_READY(&ifp->if_snd); 880226743Syongari 881226743Syongari if (AXE_IS_178_FAMILY(sc)) 882226743Syongari ifp->if_capabilities |= IFCAP_VLAN_MTU; 883226743Syongari if (sc->sc_flags & AXE_FLAG_772B) { 884226743Syongari ifp->if_capabilities |= IFCAP_TXCSUM | IFCAP_RXCSUM; 885226743Syongari ifp->if_hwassist = AXE_CSUM_FEATURES; 886226743Syongari /* 887226743Syongari * Checksum offloading of AX88772B also works with VLAN 888226743Syongari * tagged frames but there is no way to take advantage 889226743Syongari * of the feature because vlan(4) assumes 890226743Syongari * IFCAP_VLAN_HWTAGGING is prerequisite condition to 891226743Syongari * support checksum offloading with VLAN. VLAN hardware 892226743Syongari * tagging support of AX88772B is very limited so it's 893226743Syongari * not possible to announce IFCAP_VLAN_HWTAGGING. 894226743Syongari */ 895226743Syongari } 896226743Syongari ifp->if_capenable = ifp->if_capabilities; 897226743Syongari if (sc->sc_flags & (AXE_FLAG_772A | AXE_FLAG_772B | AXE_FLAG_178)) 898226743Syongari adv_pause = MIIF_DOPAUSE; 899226743Syongari else 900226743Syongari adv_pause = 0; 901226743Syongari mtx_lock(&Giant); 902226743Syongari error = mii_attach(ue->ue_dev, &ue->ue_miibus, ifp, 903226743Syongari uether_ifmedia_upd, ue->ue_methods->ue_mii_sts, 904226743Syongari BMSR_DEFCAPMASK, sc->sc_phyno, MII_OFFSET_ANY, adv_pause); 905226743Syongari mtx_unlock(&Giant); 906226743Syongari 907226743Syongari return (error); 908226743Syongari} 909226743Syongari 910188412Sthompsa/* 911188412Sthompsa * Probe for a AX88172 chip. 912188412Sthompsa */ 913188412Sthompsastatic int 914188412Sthompsaaxe_probe(device_t dev) 915188412Sthompsa{ 916192984Sthompsa struct usb_attach_arg *uaa = device_get_ivars(dev); 917184610Salfred 918192499Sthompsa if (uaa->usb_mode != USB_MODE_HOST) 919188412Sthompsa return (ENXIO); 920188412Sthompsa if (uaa->info.bConfigIndex != AXE_CONFIG_IDX) 921188412Sthompsa return (ENXIO); 922188412Sthompsa if (uaa->info.bIfaceIndex != AXE_IFACE_IDX) 923188412Sthompsa return (ENXIO); 924184610Salfred 925194228Sthompsa return (usbd_lookup_id_by_uaa(axe_devs, sizeof(axe_devs), uaa)); 926188412Sthompsa} 927184610Salfred 928188412Sthompsa/* 929188412Sthompsa * Attach the interface. Allocate softc structures, do ifmedia 930188412Sthompsa * setup and ethernet/BPF attach. 931188412Sthompsa */ 932188412Sthompsastatic int 933188412Sthompsaaxe_attach(device_t dev) 934188412Sthompsa{ 935192984Sthompsa struct usb_attach_arg *uaa = device_get_ivars(dev); 936188412Sthompsa struct axe_softc *sc = device_get_softc(dev); 937192984Sthompsa struct usb_ether *ue = &sc->sc_ue; 938188412Sthompsa uint8_t iface_index; 939188412Sthompsa int error; 940184610Salfred 941188412Sthompsa sc->sc_flags = USB_GET_DRIVER_INFO(uaa); 942184610Salfred 943194228Sthompsa device_set_usb_desc(dev); 944184610Salfred 945188412Sthompsa mtx_init(&sc->sc_mtx, device_get_nameunit(dev), NULL, MTX_DEF); 946184610Salfred 947188412Sthompsa iface_index = AXE_IFACE_IDX; 948194228Sthompsa error = usbd_transfer_setup(uaa->device, &iface_index, sc->sc_xfer, 949188412Sthompsa axe_config, AXE_N_TRANSFER, sc, &sc->sc_mtx); 950188412Sthompsa if (error) { 951199816Sthompsa device_printf(dev, "allocating USB transfers failed\n"); 952188412Sthompsa goto detach; 953188412Sthompsa } 954184610Salfred 955188412Sthompsa ue->ue_sc = sc; 956188412Sthompsa ue->ue_dev = dev; 957188412Sthompsa ue->ue_udev = uaa->device; 958188412Sthompsa ue->ue_mtx = &sc->sc_mtx; 959188412Sthompsa ue->ue_methods = &axe_ue_methods; 960184610Salfred 961194228Sthompsa error = uether_ifattach(ue); 962184610Salfred if (error) { 963188412Sthompsa device_printf(dev, "could not attach interface\n"); 964188412Sthompsa goto detach; 965184610Salfred } 966188412Sthompsa return (0); /* success */ 967184610Salfred 968188412Sthompsadetach: 969188412Sthompsa axe_detach(dev); 970188412Sthompsa return (ENXIO); /* failure */ 971184610Salfred} 972184610Salfred 973184610Salfredstatic int 974184610Salfredaxe_detach(device_t dev) 975184610Salfred{ 976184610Salfred struct axe_softc *sc = device_get_softc(dev); 977192984Sthompsa struct usb_ether *ue = &sc->sc_ue; 978184610Salfred 979194228Sthompsa usbd_transfer_unsetup(sc->sc_xfer, AXE_N_TRANSFER); 980194228Sthompsa uether_ifdetach(ue); 981184610Salfred mtx_destroy(&sc->sc_mtx); 982184610Salfred 983184610Salfred return (0); 984184610Salfred} 985184610Salfred 986184610Salfred#if (AXE_BULK_BUF_SIZE >= 0x10000) 987184610Salfred#error "Please update axe_bulk_read_callback()!" 988184610Salfred#endif 989184610Salfred 990184610Salfredstatic void 991194677Sthompsaaxe_bulk_read_callback(struct usb_xfer *xfer, usb_error_t error) 992184610Salfred{ 993194677Sthompsa struct axe_softc *sc = usbd_xfer_softc(xfer); 994192984Sthompsa struct usb_ether *ue = &sc->sc_ue; 995194677Sthompsa struct usb_page_cache *pc; 996194677Sthompsa int actlen; 997184610Salfred 998194677Sthompsa usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL); 999194677Sthompsa 1000184610Salfred switch (USB_GET_STATE(xfer)) { 1001184610Salfred case USB_ST_TRANSFERRED: 1002194677Sthompsa pc = usbd_xfer_get_frame(xfer, 0); 1003226743Syongari axe_rx_frame(ue, pc, actlen); 1004184610Salfred 1005188412Sthompsa /* FALLTHROUGH */ 1006184610Salfred case USB_ST_SETUP: 1007184610Salfredtr_setup: 1008194677Sthompsa usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer)); 1009194228Sthompsa usbd_transfer_submit(xfer); 1010194228Sthompsa uether_rxflush(ue); 1011184610Salfred return; 1012184610Salfred 1013184610Salfred default: /* Error */ 1014194677Sthompsa DPRINTF("bulk read error, %s\n", usbd_errstr(error)); 1015188412Sthompsa 1016194677Sthompsa if (error != USB_ERR_CANCELLED) { 1017184610Salfred /* try to clear stall first */ 1018194677Sthompsa usbd_xfer_set_stall(xfer); 1019188412Sthompsa goto tr_setup; 1020184610Salfred } 1021184610Salfred return; 1022184610Salfred 1023184610Salfred } 1024184610Salfred} 1025184610Salfred 1026226743Syongaristatic int 1027226743Syongariaxe_rx_frame(struct usb_ether *ue, struct usb_page_cache *pc, int actlen) 1028226743Syongari{ 1029226743Syongari struct axe_softc *sc; 1030226743Syongari struct axe_sframe_hdr hdr; 1031226743Syongari struct axe_csum_hdr csum_hdr; 1032226743Syongari int error, len, pos; 1033226743Syongari 1034226743Syongari sc = uether_getsc(ue); 1035226743Syongari pos = 0; 1036226743Syongari len = 0; 1037226743Syongari error = 0; 1038226743Syongari if ((sc->sc_flags & AXE_FLAG_STD_FRAME) != 0) { 1039226743Syongari while (pos < actlen) { 1040233774Shselasky if ((int)(pos + sizeof(hdr)) > actlen) { 1041226743Syongari /* too little data */ 1042226743Syongari error = EINVAL; 1043226743Syongari break; 1044226743Syongari } 1045226743Syongari usbd_copy_out(pc, pos, &hdr, sizeof(hdr)); 1046226743Syongari 1047226743Syongari if ((hdr.len ^ hdr.ilen) != sc->sc_lenmask) { 1048226743Syongari /* we lost sync */ 1049226743Syongari error = EINVAL; 1050226743Syongari break; 1051226743Syongari } 1052226743Syongari pos += sizeof(hdr); 1053226743Syongari len = le16toh(hdr.len); 1054226743Syongari if (pos + len > actlen) { 1055226743Syongari /* invalid length */ 1056226743Syongari error = EINVAL; 1057226743Syongari break; 1058226743Syongari } 1059226743Syongari axe_rxeof(ue, pc, pos, len, NULL); 1060226743Syongari pos += len + (len % 2); 1061226743Syongari } 1062226743Syongari } else if ((sc->sc_flags & AXE_FLAG_CSUM_FRAME) != 0) { 1063226743Syongari while (pos < actlen) { 1064233774Shselasky if ((int)(pos + sizeof(csum_hdr)) > actlen) { 1065226743Syongari /* too little data */ 1066226743Syongari error = EINVAL; 1067226743Syongari break; 1068226743Syongari } 1069226743Syongari usbd_copy_out(pc, pos, &csum_hdr, sizeof(csum_hdr)); 1070226743Syongari 1071226743Syongari csum_hdr.len = le16toh(csum_hdr.len); 1072226743Syongari csum_hdr.ilen = le16toh(csum_hdr.ilen); 1073226743Syongari csum_hdr.cstatus = le16toh(csum_hdr.cstatus); 1074226743Syongari if ((AXE_CSUM_RXBYTES(csum_hdr.len) ^ 1075226743Syongari AXE_CSUM_RXBYTES(csum_hdr.ilen)) != 1076226743Syongari sc->sc_lenmask) { 1077226743Syongari /* we lost sync */ 1078226743Syongari error = EINVAL; 1079226743Syongari break; 1080226743Syongari } 1081226743Syongari /* 1082226743Syongari * Get total transferred frame length including 1083226743Syongari * checksum header. The length should be multiple 1084226743Syongari * of 4. 1085226743Syongari */ 1086226743Syongari len = sizeof(csum_hdr) + AXE_CSUM_RXBYTES(csum_hdr.len); 1087226743Syongari len = (len + 3) & ~3; 1088226743Syongari if (pos + len > actlen) { 1089226743Syongari /* invalid length */ 1090226743Syongari error = EINVAL; 1091226743Syongari break; 1092226743Syongari } 1093226743Syongari axe_rxeof(ue, pc, pos + sizeof(csum_hdr), 1094226743Syongari AXE_CSUM_RXBYTES(csum_hdr.len), &csum_hdr); 1095226743Syongari pos += len; 1096226743Syongari } 1097226743Syongari } else 1098226743Syongari axe_rxeof(ue, pc, 0, actlen, NULL); 1099226743Syongari 1100226743Syongari if (error != 0) 1101226743Syongari ue->ue_ifp->if_ierrors++; 1102226743Syongari return (error); 1103226743Syongari} 1104226743Syongari 1105226743Syongaristatic int 1106226743Syongariaxe_rxeof(struct usb_ether *ue, struct usb_page_cache *pc, unsigned int offset, 1107226743Syongari unsigned int len, struct axe_csum_hdr *csum_hdr) 1108226743Syongari{ 1109226743Syongari struct ifnet *ifp = ue->ue_ifp; 1110226743Syongari struct mbuf *m; 1111226743Syongari 1112226743Syongari if (len < ETHER_HDR_LEN || len > MCLBYTES - ETHER_ALIGN) { 1113226743Syongari ifp->if_ierrors++; 1114226743Syongari return (EINVAL); 1115226743Syongari } 1116226743Syongari 1117243857Sglebius m = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR); 1118226743Syongari if (m == NULL) { 1119226743Syongari ifp->if_iqdrops++; 1120226743Syongari return (ENOMEM); 1121226743Syongari } 1122226743Syongari m->m_len = m->m_pkthdr.len = MCLBYTES; 1123226743Syongari m_adj(m, ETHER_ALIGN); 1124226743Syongari 1125226743Syongari usbd_copy_out(pc, offset, mtod(m, uint8_t *), len); 1126226743Syongari 1127226743Syongari ifp->if_ipackets++; 1128226743Syongari m->m_pkthdr.rcvif = ifp; 1129226743Syongari m->m_pkthdr.len = m->m_len = len; 1130226743Syongari 1131226743Syongari if (csum_hdr != NULL && csum_hdr->cstatus & AXE_CSUM_HDR_L3_TYPE_IPV4) { 1132226743Syongari if ((csum_hdr->cstatus & (AXE_CSUM_HDR_L4_CSUM_ERR | 1133226743Syongari AXE_CSUM_HDR_L3_CSUM_ERR)) == 0) { 1134226743Syongari m->m_pkthdr.csum_flags |= CSUM_IP_CHECKED | 1135226743Syongari CSUM_IP_VALID; 1136226743Syongari if ((csum_hdr->cstatus & AXE_CSUM_HDR_L4_TYPE_MASK) == 1137226743Syongari AXE_CSUM_HDR_L4_TYPE_TCP || 1138226743Syongari (csum_hdr->cstatus & AXE_CSUM_HDR_L4_TYPE_MASK) == 1139226743Syongari AXE_CSUM_HDR_L4_TYPE_UDP) { 1140226743Syongari m->m_pkthdr.csum_flags |= 1141226743Syongari CSUM_DATA_VALID | CSUM_PSEUDO_HDR; 1142226743Syongari m->m_pkthdr.csum_data = 0xffff; 1143226743Syongari } 1144226743Syongari } 1145226743Syongari } 1146226743Syongari 1147226743Syongari _IF_ENQUEUE(&ue->ue_rxq, m); 1148226743Syongari return (0); 1149226743Syongari} 1150226743Syongari 1151184610Salfred#if ((AXE_BULK_BUF_SIZE >= 0x10000) || (AXE_BULK_BUF_SIZE < (MCLBYTES+4))) 1152184610Salfred#error "Please update axe_bulk_write_callback()!" 1153184610Salfred#endif 1154184610Salfred 1155184610Salfredstatic void 1156194677Sthompsaaxe_bulk_write_callback(struct usb_xfer *xfer, usb_error_t error) 1157184610Salfred{ 1158194677Sthompsa struct axe_softc *sc = usbd_xfer_softc(xfer); 1159184610Salfred struct axe_sframe_hdr hdr; 1160194228Sthompsa struct ifnet *ifp = uether_getifp(&sc->sc_ue); 1161194677Sthompsa struct usb_page_cache *pc; 1162184610Salfred struct mbuf *m; 1163216284Syongari int nframes, pos; 1164184610Salfred 1165184610Salfred switch (USB_GET_STATE(xfer)) { 1166184610Salfred case USB_ST_TRANSFERRED: 1167184610Salfred DPRINTFN(11, "transfer complete\n"); 1168213424Syongari ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 1169188412Sthompsa /* FALLTHROUGH */ 1170184610Salfred case USB_ST_SETUP: 1171188412Sthompsatr_setup: 1172213424Syongari if ((sc->sc_flags & AXE_FLAG_LINK) == 0 || 1173213424Syongari (ifp->if_drv_flags & IFF_DRV_OACTIVE) != 0) { 1174184610Salfred /* 1175213424Syongari * Don't send anything if there is no link or 1176213424Syongari * controller is busy. 1177184610Salfred */ 1178188412Sthompsa return; 1179184610Salfred } 1180184610Salfred 1181216284Syongari for (nframes = 0; nframes < 16 && 1182216284Syongari !IFQ_DRV_IS_EMPTY(&ifp->if_snd); nframes++) { 1183184610Salfred IFQ_DRV_DEQUEUE(&ifp->if_snd, m); 1184216284Syongari if (m == NULL) 1185216284Syongari break; 1186216284Syongari usbd_xfer_set_frame_offset(xfer, nframes * MCLBYTES, 1187216284Syongari nframes); 1188216284Syongari pos = 0; 1189216284Syongari pc = usbd_xfer_get_frame(xfer, nframes); 1190215968Syongari if (AXE_IS_178_FAMILY(sc)) { 1191184610Salfred hdr.len = htole16(m->m_pkthdr.len); 1192184610Salfred hdr.ilen = ~hdr.len; 1193226743Syongari /* 1194226743Syongari * If upper stack computed checksum, driver 1195226743Syongari * should tell controller not to insert 1196226743Syongari * computed checksum for checksum offloading 1197226743Syongari * enabled controller. 1198226743Syongari */ 1199226743Syongari if (ifp->if_capabilities & IFCAP_TXCSUM) { 1200226743Syongari if ((m->m_pkthdr.csum_flags & 1201226743Syongari AXE_CSUM_FEATURES) != 0) 1202226743Syongari hdr.len |= htole16( 1203226743Syongari AXE_TX_CSUM_PSEUDO_HDR); 1204226743Syongari else 1205226743Syongari hdr.len |= htole16( 1206226743Syongari AXE_TX_CSUM_DIS); 1207226743Syongari } 1208194677Sthompsa usbd_copy_in(pc, pos, &hdr, sizeof(hdr)); 1209184610Salfred pos += sizeof(hdr); 1210216284Syongari usbd_m_copy_in(pc, pos, m, 0, m->m_pkthdr.len); 1211216284Syongari pos += m->m_pkthdr.len; 1212216284Syongari if ((pos % 512) == 0) { 1213216284Syongari hdr.len = 0; 1214216284Syongari hdr.ilen = 0xffff; 1215216284Syongari usbd_copy_in(pc, pos, &hdr, 1216216284Syongari sizeof(hdr)); 1217216284Syongari pos += sizeof(hdr); 1218216284Syongari } 1219216284Syongari } else { 1220216284Syongari usbd_m_copy_in(pc, pos, m, 0, m->m_pkthdr.len); 1221216284Syongari pos += m->m_pkthdr.len; 1222184610Salfred } 1223184610Salfred 1224184610Salfred /* 1225213423Syongari * XXX 1226213423Syongari * Update TX packet counter here. This is not 1227213423Syongari * correct way but it seems that there is no way 1228213423Syongari * to know how many packets are sent at the end 1229213423Syongari * of transfer because controller combines 1230213423Syongari * multiple writes into single one if there is 1231213423Syongari * room in TX buffer of controller. 1232213423Syongari */ 1233213423Syongari ifp->if_opackets++; 1234213423Syongari 1235213423Syongari /* 1236188412Sthompsa * if there's a BPF listener, bounce a copy 1237188412Sthompsa * of this frame to him: 1238188412Sthompsa */ 1239184610Salfred BPF_MTAP(ifp, m); 1240184610Salfred 1241184610Salfred m_freem(m); 1242184610Salfred 1243216284Syongari /* Set frame length. */ 1244216284Syongari usbd_xfer_set_frame_len(xfer, nframes, pos); 1245184610Salfred } 1246216284Syongari if (nframes != 0) { 1247216284Syongari usbd_xfer_set_frames(xfer, nframes); 1248216284Syongari usbd_transfer_submit(xfer); 1249216284Syongari ifp->if_drv_flags |= IFF_DRV_OACTIVE; 1250216284Syongari } 1251184610Salfred return; 1252216284Syongari /* NOTREACHED */ 1253184610Salfred default: /* Error */ 1254184610Salfred DPRINTFN(11, "transfer error, %s\n", 1255194677Sthompsa usbd_errstr(error)); 1256184610Salfred 1257188412Sthompsa ifp->if_oerrors++; 1258213424Syongari ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 1259188412Sthompsa 1260194677Sthompsa if (error != USB_ERR_CANCELLED) { 1261184610Salfred /* try to clear stall first */ 1262194677Sthompsa usbd_xfer_set_stall(xfer); 1263188412Sthompsa goto tr_setup; 1264184610Salfred } 1265184610Salfred return; 1266184610Salfred 1267184610Salfred } 1268184610Salfred} 1269184610Salfred 1270184610Salfredstatic void 1271192984Sthompsaaxe_tick(struct usb_ether *ue) 1272184610Salfred{ 1273194228Sthompsa struct axe_softc *sc = uether_getsc(ue); 1274184610Salfred struct mii_data *mii = GET_MII(sc); 1275184610Salfred 1276188412Sthompsa AXE_LOCK_ASSERT(sc, MA_OWNED); 1277188412Sthompsa 1278184610Salfred mii_tick(mii); 1279188553Sthompsa if ((sc->sc_flags & AXE_FLAG_LINK) == 0) { 1280188553Sthompsa axe_miibus_statchg(ue->ue_dev); 1281188553Sthompsa if ((sc->sc_flags & AXE_FLAG_LINK) != 0) 1282188553Sthompsa axe_start(ue); 1283186730Salfred } 1284184610Salfred} 1285184610Salfred 1286184610Salfredstatic void 1287192984Sthompsaaxe_start(struct usb_ether *ue) 1288184610Salfred{ 1289194228Sthompsa struct axe_softc *sc = uether_getsc(ue); 1290184610Salfred 1291188412Sthompsa /* 1292188412Sthompsa * start the USB transfers, if not already started: 1293188412Sthompsa */ 1294194228Sthompsa usbd_transfer_start(sc->sc_xfer[AXE_BULK_DT_RD]); 1295194228Sthompsa usbd_transfer_start(sc->sc_xfer[AXE_BULK_DT_WR]); 1296184610Salfred} 1297184610Salfred 1298184610Salfredstatic void 1299226743Syongariaxe_csum_cfg(struct usb_ether *ue) 1300226743Syongari{ 1301226743Syongari struct axe_softc *sc; 1302226743Syongari struct ifnet *ifp; 1303226743Syongari uint16_t csum1, csum2; 1304226743Syongari 1305226743Syongari sc = uether_getsc(ue); 1306226743Syongari AXE_LOCK_ASSERT(sc, MA_OWNED); 1307226743Syongari 1308226743Syongari if ((sc->sc_flags & AXE_FLAG_772B) != 0) { 1309226743Syongari ifp = uether_getifp(ue); 1310226743Syongari csum1 = 0; 1311226743Syongari csum2 = 0; 1312226743Syongari if ((ifp->if_capenable & IFCAP_TXCSUM) != 0) 1313226743Syongari csum1 |= AXE_TXCSUM_IP | AXE_TXCSUM_TCP | 1314226743Syongari AXE_TXCSUM_UDP; 1315226743Syongari axe_cmd(sc, AXE_772B_CMD_WRITE_TXCSUM, csum2, csum1, NULL); 1316226743Syongari csum1 = 0; 1317226743Syongari csum2 = 0; 1318226743Syongari if ((ifp->if_capenable & IFCAP_RXCSUM) != 0) 1319226743Syongari csum1 |= AXE_RXCSUM_IP | AXE_RXCSUM_IPVE | 1320226743Syongari AXE_RXCSUM_TCP | AXE_RXCSUM_UDP | AXE_RXCSUM_ICMP | 1321226743Syongari AXE_RXCSUM_IGMP; 1322226743Syongari axe_cmd(sc, AXE_772B_CMD_WRITE_RXCSUM, csum2, csum1, NULL); 1323226743Syongari } 1324226743Syongari} 1325226743Syongari 1326226743Syongaristatic void 1327192984Sthompsaaxe_init(struct usb_ether *ue) 1328184610Salfred{ 1329194228Sthompsa struct axe_softc *sc = uether_getsc(ue); 1330194228Sthompsa struct ifnet *ifp = uether_getifp(ue); 1331184610Salfred uint16_t rxmode; 1332184610Salfred 1333188412Sthompsa AXE_LOCK_ASSERT(sc, MA_OWNED); 1334184610Salfred 1335215963Syongari if ((ifp->if_drv_flags & IFF_DRV_RUNNING) != 0) 1336215963Syongari return; 1337215963Syongari 1338188412Sthompsa /* Cancel pending I/O */ 1339188412Sthompsa axe_stop(ue); 1340184610Salfred 1341215962Syongari axe_reset(sc); 1342215962Syongari 1343226743Syongari /* Set MAC address and transmitter IPG values. */ 1344226743Syongari if (AXE_IS_178_FAMILY(sc)) { 1345197567Sthompsa axe_cmd(sc, AXE_178_CMD_WRITE_NODEID, 0, 0, IF_LLADDR(ifp)); 1346188412Sthompsa axe_cmd(sc, AXE_178_CMD_WRITE_IPG012, sc->sc_ipgs[2], 1347184610Salfred (sc->sc_ipgs[1] << 8) | (sc->sc_ipgs[0]), NULL); 1348226743Syongari } else { 1349226743Syongari axe_cmd(sc, AXE_172_CMD_WRITE_NODEID, 0, 0, IF_LLADDR(ifp)); 1350188412Sthompsa axe_cmd(sc, AXE_172_CMD_WRITE_IPG0, 0, sc->sc_ipgs[0], NULL); 1351188412Sthompsa axe_cmd(sc, AXE_172_CMD_WRITE_IPG1, 0, sc->sc_ipgs[1], NULL); 1352188412Sthompsa axe_cmd(sc, AXE_172_CMD_WRITE_IPG2, 0, sc->sc_ipgs[2], NULL); 1353184610Salfred } 1354184610Salfred 1355226743Syongari if (AXE_IS_178_FAMILY(sc)) { 1356226743Syongari sc->sc_flags &= ~(AXE_FLAG_STD_FRAME | AXE_FLAG_CSUM_FRAME); 1357226743Syongari if ((sc->sc_flags & AXE_FLAG_772B) != 0) 1358226743Syongari sc->sc_lenmask = AXE_CSUM_HDR_LEN_MASK; 1359226743Syongari else 1360226743Syongari sc->sc_lenmask = AXE_HDR_LEN_MASK; 1361226743Syongari if ((sc->sc_flags & AXE_FLAG_772B) != 0 && 1362226743Syongari (ifp->if_capenable & IFCAP_RXCSUM) != 0) 1363226743Syongari sc->sc_flags |= AXE_FLAG_CSUM_FRAME; 1364226743Syongari else 1365226743Syongari sc->sc_flags |= AXE_FLAG_STD_FRAME; 1366226743Syongari } 1367226743Syongari 1368226743Syongari /* Configure TX/RX checksum offloading. */ 1369226743Syongari axe_csum_cfg(ue); 1370226743Syongari 1371226743Syongari if (sc->sc_flags & AXE_FLAG_772B) { 1372226743Syongari /* AX88772B uses different maximum frame burst configuration. */ 1373224020Syongari axe_cmd(sc, AXE_772B_CMD_RXCTL_WRITE_CFG, 1374224020Syongari ax88772b_mfb_table[AX88772B_MFB_16K].threshold, 1375224020Syongari ax88772b_mfb_table[AX88772B_MFB_16K].byte_cnt, NULL); 1376226743Syongari } 1377224020Syongari 1378224020Syongari /* Enable receiver, set RX mode. */ 1379184610Salfred rxmode = (AXE_RXCMD_MULTICAST | AXE_RXCMD_ENABLE); 1380215968Syongari if (AXE_IS_178_FAMILY(sc)) { 1381224020Syongari if (sc->sc_flags & AXE_FLAG_772B) { 1382224020Syongari /* 1383224020Syongari * Select RX header format type 1. Aligning IP 1384226743Syongari * header on 4 byte boundary is not needed when 1385226743Syongari * checksum offloading feature is not used 1386224020Syongari * because we always copy the received frame in 1387226743Syongari * RX handler. When RX checksum offloading is 1388226743Syongari * active, aligning IP header is required to 1389226743Syongari * reflect actual frame length including RX 1390226743Syongari * header size. 1391224020Syongari */ 1392224020Syongari rxmode |= AXE_772B_RXCMD_HDR_TYPE_1; 1393226743Syongari if ((ifp->if_capenable & IFCAP_RXCSUM) != 0) 1394226743Syongari rxmode |= AXE_772B_RXCMD_IPHDR_ALIGN; 1395224020Syongari } else { 1396224020Syongari /* 1397224020Syongari * Default Rx buffer size is too small to get 1398224020Syongari * maximum performance. 1399224020Syongari */ 1400224020Syongari rxmode |= AXE_178_RXCMD_MFB_16384; 1401224020Syongari } 1402184610Salfred } else { 1403184610Salfred rxmode |= AXE_172_RXCMD_UNICAST; 1404184610Salfred } 1405184610Salfred 1406184610Salfred /* If we want promiscuous mode, set the allframes bit. */ 1407188412Sthompsa if (ifp->if_flags & IFF_PROMISC) 1408184610Salfred rxmode |= AXE_RXCMD_PROMISC; 1409188412Sthompsa 1410188412Sthompsa if (ifp->if_flags & IFF_BROADCAST) 1411184610Salfred rxmode |= AXE_RXCMD_BROADCAST; 1412184610Salfred 1413188412Sthompsa axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, rxmode, NULL); 1414188412Sthompsa 1415184610Salfred /* Load the multicast filter. */ 1416188412Sthompsa axe_setmulti(ue); 1417184610Salfred 1418194677Sthompsa usbd_xfer_set_stall(sc->sc_xfer[AXE_BULK_DT_WR]); 1419184610Salfred 1420188412Sthompsa ifp->if_drv_flags |= IFF_DRV_RUNNING; 1421215964Syongari /* Switch to selected media. */ 1422215964Syongari axe_ifmedia_upd(ifp); 1423184610Salfred} 1424184610Salfred 1425184610Salfredstatic void 1426192984Sthompsaaxe_setpromisc(struct usb_ether *ue) 1427184610Salfred{ 1428194228Sthompsa struct axe_softc *sc = uether_getsc(ue); 1429194228Sthompsa struct ifnet *ifp = uether_getifp(ue); 1430184610Salfred uint16_t rxmode; 1431184610Salfred 1432188412Sthompsa axe_cmd(sc, AXE_CMD_RXCTL_READ, 0, 0, &rxmode); 1433184610Salfred 1434184610Salfred rxmode = le16toh(rxmode); 1435184610Salfred 1436188412Sthompsa if (ifp->if_flags & IFF_PROMISC) { 1437184610Salfred rxmode |= AXE_RXCMD_PROMISC; 1438184610Salfred } else { 1439184610Salfred rxmode &= ~AXE_RXCMD_PROMISC; 1440184610Salfred } 1441184610Salfred 1442188412Sthompsa axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, rxmode, NULL); 1443184610Salfred 1444188412Sthompsa axe_setmulti(ue); 1445184610Salfred} 1446184610Salfred 1447184610Salfredstatic void 1448192984Sthompsaaxe_stop(struct usb_ether *ue) 1449184610Salfred{ 1450194228Sthompsa struct axe_softc *sc = uether_getsc(ue); 1451194228Sthompsa struct ifnet *ifp = uether_getifp(ue); 1452184610Salfred 1453188412Sthompsa AXE_LOCK_ASSERT(sc, MA_OWNED); 1454184610Salfred 1455213424Syongari ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE); 1456186730Salfred sc->sc_flags &= ~AXE_FLAG_LINK; 1457184610Salfred 1458184610Salfred /* 1459184610Salfred * stop all the transfers, if not already stopped: 1460184610Salfred */ 1461194228Sthompsa usbd_transfer_stop(sc->sc_xfer[AXE_BULK_DT_WR]); 1462194228Sthompsa usbd_transfer_stop(sc->sc_xfer[AXE_BULK_DT_RD]); 1463184610Salfred} 1464226743Syongari 1465226743Syongaristatic int 1466226743Syongariaxe_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 1467226743Syongari{ 1468226743Syongari struct usb_ether *ue = ifp->if_softc; 1469226743Syongari struct axe_softc *sc; 1470226743Syongari struct ifreq *ifr; 1471226743Syongari int error, mask, reinit; 1472226743Syongari 1473226743Syongari sc = uether_getsc(ue); 1474226743Syongari ifr = (struct ifreq *)data; 1475226743Syongari error = 0; 1476226743Syongari reinit = 0; 1477226743Syongari if (cmd == SIOCSIFCAP) { 1478226743Syongari AXE_LOCK(sc); 1479226743Syongari mask = ifr->ifr_reqcap ^ ifp->if_capenable; 1480226743Syongari if ((mask & IFCAP_TXCSUM) != 0 && 1481226743Syongari (ifp->if_capabilities & IFCAP_TXCSUM) != 0) { 1482226743Syongari ifp->if_capenable ^= IFCAP_TXCSUM; 1483226743Syongari if ((ifp->if_capenable & IFCAP_TXCSUM) != 0) 1484226743Syongari ifp->if_hwassist |= AXE_CSUM_FEATURES; 1485226743Syongari else 1486226743Syongari ifp->if_hwassist &= ~AXE_CSUM_FEATURES; 1487226743Syongari reinit++; 1488226743Syongari } 1489226743Syongari if ((mask & IFCAP_RXCSUM) != 0 && 1490226743Syongari (ifp->if_capabilities & IFCAP_RXCSUM) != 0) { 1491226743Syongari ifp->if_capenable ^= IFCAP_RXCSUM; 1492226743Syongari reinit++; 1493226743Syongari } 1494226743Syongari if (reinit > 0 && ifp->if_drv_flags & IFF_DRV_RUNNING) 1495226743Syongari ifp->if_drv_flags &= ~IFF_DRV_RUNNING; 1496226743Syongari else 1497226743Syongari reinit = 0; 1498226743Syongari AXE_UNLOCK(sc); 1499226743Syongari if (reinit > 0) 1500226743Syongari uether_init(ue); 1501226743Syongari } else 1502226743Syongari error = uether_ioctl(ifp, cmd, data); 1503226743Syongari 1504226743Syongari return (error); 1505226743Syongari} 1506