if_axe.c revision 224020
1184610Salfred/*- 2184610Salfred * Copyright (c) 1997, 1998, 1999, 2000-2003 3184610Salfred * Bill Paul <wpaul@windriver.com>. All rights reserved. 4184610Salfred * 5184610Salfred * Redistribution and use in source and binary forms, with or without 6184610Salfred * modification, are permitted provided that the following conditions 7184610Salfred * are met: 8184610Salfred * 1. Redistributions of source code must retain the above copyright 9184610Salfred * notice, this list of conditions and the following disclaimer. 10184610Salfred * 2. Redistributions in binary form must reproduce the above copyright 11184610Salfred * notice, this list of conditions and the following disclaimer in the 12184610Salfred * documentation and/or other materials provided with the distribution. 13184610Salfred * 3. All advertising materials mentioning features or use of this software 14184610Salfred * must display the following acknowledgement: 15184610Salfred * This product includes software developed by Bill Paul. 16184610Salfred * 4. Neither the name of the author nor the names of any co-contributors 17184610Salfred * may be used to endorse or promote products derived from this software 18184610Salfred * without specific prior written permission. 19184610Salfred * 20184610Salfred * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 21184610Salfred * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22184610Salfred * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23184610Salfred * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 24184610Salfred * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25184610Salfred * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26184610Salfred * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27184610Salfred * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28184610Salfred * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29184610Salfred * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 30184610Salfred * THE POSSIBILITY OF SUCH DAMAGE. 31184610Salfred */ 32184610Salfred 33184610Salfred#include <sys/cdefs.h> 34184610Salfred__FBSDID("$FreeBSD: head/sys/dev/usb/net/if_axe.c 224020 2011-07-14 17:19:00Z yongari $"); 35184610Salfred 36184610Salfred/* 37188412Sthompsa * ASIX Electronics AX88172/AX88178/AX88778 USB 2.0 ethernet driver. 38188412Sthompsa * Used in the LinkSys USB200M and various other adapters. 39184610Salfred * 40184610Salfred * Manuals available from: 41184610Salfred * http://www.asix.com.tw/datasheet/mac/Ax88172.PDF 42184610Salfred * Note: you need the manual for the AX88170 chip (USB 1.x ethernet 43184610Salfred * controller) to find the definitions for the RX control register. 44184610Salfred * http://www.asix.com.tw/datasheet/mac/Ax88170.PDF 45184610Salfred * 46184610Salfred * Written by Bill Paul <wpaul@windriver.com> 47184610Salfred * Senior Engineer 48184610Salfred * Wind River Systems 49184610Salfred */ 50184610Salfred 51184610Salfred/* 52184610Salfred * The AX88172 provides USB ethernet supports at 10 and 100Mbps. 53184610Salfred * It uses an external PHY (reference designs use a RealTek chip), 54184610Salfred * and has a 64-bit multicast hash filter. There is some information 55184610Salfred * missing from the manual which one needs to know in order to make 56184610Salfred * the chip function: 57184610Salfred * 58184610Salfred * - You must set bit 7 in the RX control register, otherwise the 59184610Salfred * chip won't receive any packets. 60184610Salfred * - You must initialize all 3 IPG registers, or you won't be able 61184610Salfred * to send any packets. 62184610Salfred * 63184610Salfred * Note that this device appears to only support loading the station 64184610Salfred * address via autload from the EEPROM (i.e. there's no way to manaully 65184610Salfred * set it). 66184610Salfred * 67184610Salfred * (Adam Weinberger wanted me to name this driver if_gir.c.) 68184610Salfred */ 69184610Salfred 70184610Salfred/* 71184610Salfred * Ax88178 and Ax88772 support backported from the OpenBSD driver. 72184610Salfred * 2007/02/12, J.R. Oldroyd, fbsd@opal.com 73184610Salfred * 74184610Salfred * Manual here: 75184610Salfred * http://www.asix.com.tw/FrootAttach/datasheet/AX88178_datasheet_Rev10.pdf 76184610Salfred * http://www.asix.com.tw/FrootAttach/datasheet/AX88772_datasheet_Rev10.pdf 77184610Salfred */ 78184610Salfred 79194677Sthompsa#include <sys/stdint.h> 80194677Sthompsa#include <sys/stddef.h> 81194677Sthompsa#include <sys/param.h> 82194677Sthompsa#include <sys/queue.h> 83194677Sthompsa#include <sys/types.h> 84194677Sthompsa#include <sys/systm.h> 85194677Sthompsa#include <sys/kernel.h> 86194677Sthompsa#include <sys/bus.h> 87194677Sthompsa#include <sys/module.h> 88194677Sthompsa#include <sys/lock.h> 89194677Sthompsa#include <sys/mutex.h> 90194677Sthompsa#include <sys/condvar.h> 91194677Sthompsa#include <sys/sysctl.h> 92194677Sthompsa#include <sys/sx.h> 93194677Sthompsa#include <sys/unistd.h> 94194677Sthompsa#include <sys/callout.h> 95194677Sthompsa#include <sys/malloc.h> 96194677Sthompsa#include <sys/priv.h> 97194677Sthompsa 98194677Sthompsa#include <dev/usb/usb.h> 99194677Sthompsa#include <dev/usb/usbdi.h> 100194677Sthompsa#include <dev/usb/usbdi_util.h> 101188746Sthompsa#include "usbdevs.h" 102184610Salfred 103184610Salfred#define USB_DEBUG_VAR axe_debug 104194677Sthompsa#include <dev/usb/usb_debug.h> 105188942Sthompsa#include <dev/usb/usb_process.h> 106184610Salfred 107188942Sthompsa#include <dev/usb/net/usb_ethernet.h> 108188942Sthompsa#include <dev/usb/net/if_axereg.h> 109184610Salfred 110188412Sthompsa/* 111188412Sthompsa * AXE_178_MAX_FRAME_BURST 112188412Sthompsa * max frame burst size for Ax88178 and Ax88772 113188412Sthompsa * 0 2048 bytes 114188412Sthompsa * 1 4096 bytes 115188412Sthompsa * 2 8192 bytes 116188412Sthompsa * 3 16384 bytes 117188412Sthompsa * use the largest your system can handle without USB stalling. 118188412Sthompsa * 119188412Sthompsa * NB: 88772 parts appear to generate lots of input errors with 120188412Sthompsa * a 2K rx buffer and 8K is only slightly faster than 4K on an 121188412Sthompsa * EHCI port on a T42 so change at your own risk. 122188412Sthompsa */ 123188412Sthompsa#define AXE_178_MAX_FRAME_BURST 1 124184610Salfred 125207077Sthompsa#ifdef USB_DEBUG 126184610Salfredstatic int axe_debug = 0; 127184610Salfred 128192502SthompsaSYSCTL_NODE(_hw_usb, OID_AUTO, axe, CTLFLAG_RW, 0, "USB axe"); 129192502SthompsaSYSCTL_INT(_hw_usb_axe, OID_AUTO, debug, CTLFLAG_RW, &axe_debug, 0, 130184610Salfred "Debug level"); 131184610Salfred#endif 132184610Salfred 133184610Salfred/* 134184610Salfred * Various supported device vendors/products. 135184610Salfred */ 136223486Shselaskystatic const STRUCT_USB_HOST_ID axe_devs[] = { 137201028Sthompsa#define AXE_DEV(v,p,i) { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, i) } 138201028Sthompsa AXE_DEV(ABOCOM, UF200, 0), 139201028Sthompsa AXE_DEV(ACERCM, EP1427X2, 0), 140201028Sthompsa AXE_DEV(APPLE, ETHERNET, AXE_FLAG_772), 141201028Sthompsa AXE_DEV(ASIX, AX88172, 0), 142201028Sthompsa AXE_DEV(ASIX, AX88178, AXE_FLAG_178), 143201028Sthompsa AXE_DEV(ASIX, AX88772, AXE_FLAG_772), 144215969Syongari AXE_DEV(ASIX, AX88772A, AXE_FLAG_772A), 145224020Syongari AXE_DEV(ASIX, AX88772B, AXE_FLAG_772B), 146201028Sthompsa AXE_DEV(ATEN, UC210T, 0), 147201028Sthompsa AXE_DEV(BELKIN, F5D5055, AXE_FLAG_178), 148201028Sthompsa AXE_DEV(BILLIONTON, USB2AR, 0), 149215969Syongari AXE_DEV(CISCOLINKSYS, USB200MV2, AXE_FLAG_772A), 150201028Sthompsa AXE_DEV(COREGA, FETHER_USB2_TX, 0), 151201028Sthompsa AXE_DEV(DLINK, DUBE100, 0), 152201028Sthompsa AXE_DEV(DLINK, DUBE100B1, AXE_FLAG_772), 153201028Sthompsa AXE_DEV(GOODWAY, GWUSB2E, 0), 154201028Sthompsa AXE_DEV(IODATA, ETGUS2, AXE_FLAG_178), 155201028Sthompsa AXE_DEV(JVC, MP_PRX1, 0), 156201028Sthompsa AXE_DEV(LINKSYS2, USB200M, 0), 157201028Sthompsa AXE_DEV(LINKSYS4, USB1000, AXE_FLAG_178), 158212980Ssanpei AXE_DEV(LOGITEC, LAN_GTJU2A, AXE_FLAG_178), 159201028Sthompsa AXE_DEV(MELCO, LUAU2KTX, 0), 160212980Ssanpei AXE_DEV(MELCO, LUA3U2AGT, AXE_FLAG_178), 161201028Sthompsa AXE_DEV(NETGEAR, FA120, 0), 162201028Sthompsa AXE_DEV(OQO, ETHER01PLUS, AXE_FLAG_772), 163201028Sthompsa AXE_DEV(PLANEX3, GU1000T, AXE_FLAG_178), 164201028Sthompsa AXE_DEV(SITECOM, LN029, 0), 165201028Sthompsa AXE_DEV(SITECOMEU, LN028, AXE_FLAG_178), 166201028Sthompsa AXE_DEV(SYSTEMTALKS, SGCX2UL, 0), 167201028Sthompsa#undef AXE_DEV 168184610Salfred}; 169184610Salfred 170184610Salfredstatic device_probe_t axe_probe; 171184610Salfredstatic device_attach_t axe_attach; 172184610Salfredstatic device_detach_t axe_detach; 173184610Salfred 174193045Sthompsastatic usb_callback_t axe_bulk_read_callback; 175193045Sthompsastatic usb_callback_t axe_bulk_write_callback; 176184610Salfred 177188412Sthompsastatic miibus_readreg_t axe_miibus_readreg; 178188412Sthompsastatic miibus_writereg_t axe_miibus_writereg; 179188412Sthompsastatic miibus_statchg_t axe_miibus_statchg; 180184610Salfred 181193045Sthompsastatic uether_fn_t axe_attach_post; 182193045Sthompsastatic uether_fn_t axe_init; 183193045Sthompsastatic uether_fn_t axe_stop; 184193045Sthompsastatic uether_fn_t axe_start; 185193045Sthompsastatic uether_fn_t axe_tick; 186193045Sthompsastatic uether_fn_t axe_setmulti; 187193045Sthompsastatic uether_fn_t axe_setpromisc; 188184610Salfred 189188412Sthompsastatic int axe_ifmedia_upd(struct ifnet *); 190188412Sthompsastatic void axe_ifmedia_sts(struct ifnet *, struct ifmediareq *); 191188412Sthompsastatic int axe_cmd(struct axe_softc *, int, int, int, void *); 192188412Sthompsastatic void axe_ax88178_init(struct axe_softc *); 193188412Sthompsastatic void axe_ax88772_init(struct axe_softc *); 194224020Syongaristatic void axe_ax88772_phywake(struct axe_softc *); 195215969Syongaristatic void axe_ax88772a_init(struct axe_softc *); 196224020Syongaristatic void axe_ax88772b_init(struct axe_softc *); 197186730Salfredstatic int axe_get_phyno(struct axe_softc *, int); 198184610Salfred 199192984Sthompsastatic const struct usb_config axe_config[AXE_N_TRANSFER] = { 200184610Salfred 201187259Sthompsa [AXE_BULK_DT_WR] = { 202184610Salfred .type = UE_BULK, 203184610Salfred .endpoint = UE_ADDR_ANY, 204184610Salfred .direction = UE_DIR_OUT, 205216284Syongari .frames = 16, 206216284Syongari .bufsize = 16 * MCLBYTES, 207190734Sthompsa .flags = {.pipe_bof = 1,.force_short_xfer = 1,}, 208190734Sthompsa .callback = axe_bulk_write_callback, 209190734Sthompsa .timeout = 10000, /* 10 seconds */ 210184610Salfred }, 211184610Salfred 212187259Sthompsa [AXE_BULK_DT_RD] = { 213184610Salfred .type = UE_BULK, 214184610Salfred .endpoint = UE_ADDR_ANY, 215184610Salfred .direction = UE_DIR_IN, 216197566Sthompsa .bufsize = 16384, /* bytes */ 217190734Sthompsa .flags = {.pipe_bof = 1,.short_xfer_ok = 1,}, 218190734Sthompsa .callback = axe_bulk_read_callback, 219190734Sthompsa .timeout = 0, /* no timeout */ 220184610Salfred }, 221184610Salfred}; 222184610Salfred 223224020Syongaristatic const struct ax88772b_mfb ax88772b_mfb_table[] = { 224224020Syongari { 0x8000, 0x8001, 2048 }, 225224020Syongari { 0x8100, 0x8147, 4096}, 226224020Syongari { 0x8200, 0x81EB, 6144}, 227224020Syongari { 0x8300, 0x83D7, 8192}, 228224020Syongari { 0x8400, 0x851E, 16384}, 229224020Syongari { 0x8500, 0x8666, 20480}, 230224020Syongari { 0x8600, 0x87AE, 24576}, 231224020Syongari { 0x8700, 0x8A3D, 32768} 232224020Syongari}; 233224020Syongari 234184610Salfredstatic device_method_t axe_methods[] = { 235184610Salfred /* Device interface */ 236184610Salfred DEVMETHOD(device_probe, axe_probe), 237184610Salfred DEVMETHOD(device_attach, axe_attach), 238184610Salfred DEVMETHOD(device_detach, axe_detach), 239184610Salfred 240184610Salfred /* bus interface */ 241184610Salfred DEVMETHOD(bus_print_child, bus_generic_print_child), 242184610Salfred DEVMETHOD(bus_driver_added, bus_generic_driver_added), 243184610Salfred 244184610Salfred /* MII interface */ 245188412Sthompsa DEVMETHOD(miibus_readreg, axe_miibus_readreg), 246188412Sthompsa DEVMETHOD(miibus_writereg, axe_miibus_writereg), 247188412Sthompsa DEVMETHOD(miibus_statchg, axe_miibus_statchg), 248184610Salfred 249184610Salfred {0, 0} 250184610Salfred}; 251184610Salfred 252184610Salfredstatic driver_t axe_driver = { 253184610Salfred .name = "axe", 254184610Salfred .methods = axe_methods, 255184610Salfred .size = sizeof(struct axe_softc), 256184610Salfred}; 257184610Salfred 258184610Salfredstatic devclass_t axe_devclass; 259184610Salfred 260189275SthompsaDRIVER_MODULE(axe, uhub, axe_driver, axe_devclass, NULL, 0); 261184610SalfredDRIVER_MODULE(miibus, axe, miibus_driver, miibus_devclass, 0, 0); 262188942SthompsaMODULE_DEPEND(axe, uether, 1, 1, 1); 263188942SthompsaMODULE_DEPEND(axe, usb, 1, 1, 1); 264188412SthompsaMODULE_DEPEND(axe, ether, 1, 1, 1); 265188412SthompsaMODULE_DEPEND(axe, miibus, 1, 1, 1); 266212122SthompsaMODULE_VERSION(axe, 1); 267184610Salfred 268192984Sthompsastatic const struct usb_ether_methods axe_ue_methods = { 269188412Sthompsa .ue_attach_post = axe_attach_post, 270188412Sthompsa .ue_start = axe_start, 271188412Sthompsa .ue_init = axe_init, 272188412Sthompsa .ue_stop = axe_stop, 273188412Sthompsa .ue_tick = axe_tick, 274188412Sthompsa .ue_setmulti = axe_setmulti, 275188412Sthompsa .ue_setpromisc = axe_setpromisc, 276188412Sthompsa .ue_mii_upd = axe_ifmedia_upd, 277188412Sthompsa .ue_mii_sts = axe_ifmedia_sts, 278188412Sthompsa}; 279188412Sthompsa 280188412Sthompsastatic int 281188412Sthompsaaxe_cmd(struct axe_softc *sc, int cmd, int index, int val, void *buf) 282184610Salfred{ 283192984Sthompsa struct usb_device_request req; 284193045Sthompsa usb_error_t err; 285184610Salfred 286188412Sthompsa AXE_LOCK_ASSERT(sc, MA_OWNED); 287188412Sthompsa 288184610Salfred req.bmRequestType = (AXE_CMD_IS_WRITE(cmd) ? 289184610Salfred UT_WRITE_VENDOR_DEVICE : 290184610Salfred UT_READ_VENDOR_DEVICE); 291184610Salfred req.bRequest = AXE_CMD_CMD(cmd); 292184610Salfred USETW(req.wValue, val); 293184610Salfred USETW(req.wIndex, index); 294188412Sthompsa USETW(req.wLength, AXE_CMD_LEN(cmd)); 295184610Salfred 296194228Sthompsa err = uether_do_request(&sc->sc_ue, &req, buf, 1000); 297184610Salfred 298188412Sthompsa return (err); 299184610Salfred} 300184610Salfred 301184610Salfredstatic int 302188412Sthompsaaxe_miibus_readreg(device_t dev, int phy, int reg) 303184610Salfred{ 304184610Salfred struct axe_softc *sc = device_get_softc(dev); 305184610Salfred uint16_t val; 306188412Sthompsa int locked; 307184610Salfred 308188412Sthompsa if (sc->sc_phyno != phy) 309188412Sthompsa return (0); 310184610Salfred 311188412Sthompsa locked = mtx_owned(&sc->sc_mtx); 312188412Sthompsa if (!locked) 313188412Sthompsa AXE_LOCK(sc); 314186730Salfred 315188412Sthompsa axe_cmd(sc, AXE_CMD_MII_OPMODE_SW, 0, 0, NULL); 316188412Sthompsa axe_cmd(sc, AXE_CMD_MII_READ_REG, reg, phy, &val); 317188412Sthompsa axe_cmd(sc, AXE_CMD_MII_OPMODE_HW, 0, 0, NULL); 318184610Salfred 319184610Salfred val = le16toh(val); 320215968Syongari if (AXE_IS_772(sc) && reg == MII_BMSR) { 321186730Salfred /* 322186730Salfred * BMSR of AX88772 indicates that it supports extended 323186730Salfred * capability but the extended status register is 324186730Salfred * revered for embedded ethernet PHY. So clear the 325186730Salfred * extended capability bit of BMSR. 326186730Salfred */ 327186730Salfred val &= ~BMSR_EXTCAP; 328186730Salfred } 329184610Salfred 330188412Sthompsa if (!locked) 331188412Sthompsa AXE_UNLOCK(sc); 332184610Salfred return (val); 333184610Salfred} 334184610Salfred 335184610Salfredstatic int 336188412Sthompsaaxe_miibus_writereg(device_t dev, int phy, int reg, int val) 337184610Salfred{ 338184610Salfred struct axe_softc *sc = device_get_softc(dev); 339188412Sthompsa int locked; 340184610Salfred 341189522Sthompsa val = htole32(val); 342184610Salfred 343186730Salfred if (sc->sc_phyno != phy) 344188412Sthompsa return (0); 345186730Salfred 346188412Sthompsa locked = mtx_owned(&sc->sc_mtx); 347188412Sthompsa if (!locked) 348188412Sthompsa AXE_LOCK(sc); 349184610Salfred 350188412Sthompsa axe_cmd(sc, AXE_CMD_MII_OPMODE_SW, 0, 0, NULL); 351188412Sthompsa axe_cmd(sc, AXE_CMD_MII_WRITE_REG, reg, phy, &val); 352188412Sthompsa axe_cmd(sc, AXE_CMD_MII_OPMODE_HW, 0, 0, NULL); 353188412Sthompsa 354188412Sthompsa if (!locked) 355188412Sthompsa AXE_UNLOCK(sc); 356184610Salfred return (0); 357184610Salfred} 358184610Salfred 359184610Salfredstatic void 360188412Sthompsaaxe_miibus_statchg(device_t dev) 361184610Salfred{ 362184610Salfred struct axe_softc *sc = device_get_softc(dev); 363184610Salfred struct mii_data *mii = GET_MII(sc); 364188553Sthompsa struct ifnet *ifp; 365184610Salfred uint16_t val; 366188412Sthompsa int err, locked; 367184610Salfred 368188412Sthompsa locked = mtx_owned(&sc->sc_mtx); 369188412Sthompsa if (!locked) 370188412Sthompsa AXE_LOCK(sc); 371184610Salfred 372194228Sthompsa ifp = uether_getifp(&sc->sc_ue); 373188553Sthompsa if (mii == NULL || ifp == NULL || 374188553Sthompsa (ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) 375188553Sthompsa goto done; 376188553Sthompsa 377188553Sthompsa sc->sc_flags &= ~AXE_FLAG_LINK; 378188553Sthompsa if ((mii->mii_media_status & (IFM_ACTIVE | IFM_AVALID)) == 379188553Sthompsa (IFM_ACTIVE | IFM_AVALID)) { 380188553Sthompsa switch (IFM_SUBTYPE(mii->mii_media_active)) { 381188553Sthompsa case IFM_10_T: 382188553Sthompsa case IFM_100_TX: 383188553Sthompsa sc->sc_flags |= AXE_FLAG_LINK; 384188553Sthompsa break; 385188553Sthompsa case IFM_1000_T: 386188553Sthompsa if ((sc->sc_flags & AXE_FLAG_178) == 0) 387188553Sthompsa break; 388188553Sthompsa sc->sc_flags |= AXE_FLAG_LINK; 389188553Sthompsa break; 390188553Sthompsa default: 391188553Sthompsa break; 392188553Sthompsa } 393188553Sthompsa } 394188553Sthompsa 395188553Sthompsa /* Lost link, do nothing. */ 396188553Sthompsa if ((sc->sc_flags & AXE_FLAG_LINK) == 0) 397188553Sthompsa goto done; 398188553Sthompsa 399188553Sthompsa val = 0; 400188553Sthompsa if ((IFM_OPTIONS(mii->mii_media_active) & IFM_FDX) != 0) 401188553Sthompsa val |= AXE_MEDIA_FULL_DUPLEX; 402215968Syongari if (AXE_IS_178_FAMILY(sc)) { 403186730Salfred val |= AXE_178_MEDIA_RX_EN | AXE_178_MEDIA_MAGIC; 404188553Sthompsa if ((sc->sc_flags & AXE_FLAG_178) != 0) 405188553Sthompsa val |= AXE_178_MEDIA_ENCK; 406184610Salfred switch (IFM_SUBTYPE(mii->mii_media_active)) { 407184610Salfred case IFM_1000_T: 408184610Salfred val |= AXE_178_MEDIA_GMII | AXE_178_MEDIA_ENCK; 409184610Salfred break; 410184610Salfred case IFM_100_TX: 411184610Salfred val |= AXE_178_MEDIA_100TX; 412184610Salfred break; 413184610Salfred case IFM_10_T: 414184610Salfred /* doesn't need to be handled */ 415184610Salfred break; 416184610Salfred } 417184610Salfred } 418188412Sthompsa err = axe_cmd(sc, AXE_CMD_WRITE_MEDIA, 0, val, NULL); 419188412Sthompsa if (err) 420188412Sthompsa device_printf(dev, "media change failed, error %d\n", err); 421188553Sthompsadone: 422188412Sthompsa if (!locked) 423188412Sthompsa AXE_UNLOCK(sc); 424184610Salfred} 425184610Salfred 426184610Salfred/* 427184610Salfred * Set media options. 428184610Salfred */ 429184610Salfredstatic int 430188412Sthompsaaxe_ifmedia_upd(struct ifnet *ifp) 431184610Salfred{ 432184610Salfred struct axe_softc *sc = ifp->if_softc; 433184610Salfred struct mii_data *mii = GET_MII(sc); 434221407Smarius struct mii_softc *miisc; 435188553Sthompsa int error; 436184610Salfred 437188412Sthompsa AXE_LOCK_ASSERT(sc, MA_OWNED); 438184610Salfred 439221407Smarius LIST_FOREACH(miisc, &mii->mii_phys, mii_list) 440221407Smarius PHY_RESET(miisc); 441188553Sthompsa error = mii_mediachg(mii); 442188553Sthompsa return (error); 443184610Salfred} 444184610Salfred 445184610Salfred/* 446184610Salfred * Report current media status. 447184610Salfred */ 448184610Salfredstatic void 449188412Sthompsaaxe_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr) 450184610Salfred{ 451184610Salfred struct axe_softc *sc = ifp->if_softc; 452188412Sthompsa struct mii_data *mii = GET_MII(sc); 453184610Salfred 454188412Sthompsa AXE_LOCK(sc); 455188412Sthompsa mii_pollstat(mii); 456188412Sthompsa AXE_UNLOCK(sc); 457188412Sthompsa ifmr->ifm_active = mii->mii_media_active; 458188412Sthompsa ifmr->ifm_status = mii->mii_media_status; 459184610Salfred} 460184610Salfred 461184610Salfredstatic void 462192984Sthompsaaxe_setmulti(struct usb_ether *ue) 463184610Salfred{ 464194228Sthompsa struct axe_softc *sc = uether_getsc(ue); 465194228Sthompsa struct ifnet *ifp = uether_getifp(ue); 466188412Sthompsa struct ifmultiaddr *ifma; 467188412Sthompsa uint32_t h = 0; 468184610Salfred uint16_t rxmode; 469188412Sthompsa uint8_t hashtbl[8] = { 0, 0, 0, 0, 0, 0, 0, 0 }; 470184610Salfred 471188412Sthompsa AXE_LOCK_ASSERT(sc, MA_OWNED); 472184610Salfred 473188412Sthompsa axe_cmd(sc, AXE_CMD_RXCTL_READ, 0, 0, &rxmode); 474184610Salfred rxmode = le16toh(rxmode); 475184610Salfred 476188412Sthompsa if (ifp->if_flags & (IFF_ALLMULTI | IFF_PROMISC)) { 477184610Salfred rxmode |= AXE_RXCMD_ALLMULTI; 478188412Sthompsa axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, rxmode, NULL); 479184610Salfred return; 480184610Salfred } 481184610Salfred rxmode &= ~AXE_RXCMD_ALLMULTI; 482184610Salfred 483195049Srwatson if_maddr_rlock(ifp); 484188412Sthompsa TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) 485188412Sthompsa { 486188412Sthompsa if (ifma->ifma_addr->sa_family != AF_LINK) 487188412Sthompsa continue; 488188412Sthompsa h = ether_crc32_be(LLADDR((struct sockaddr_dl *) 489188412Sthompsa ifma->ifma_addr), ETHER_ADDR_LEN) >> 26; 490188412Sthompsa hashtbl[h / 8] |= 1 << (h % 8); 491188412Sthompsa } 492195049Srwatson if_maddr_runlock(ifp); 493184610Salfred 494188412Sthompsa axe_cmd(sc, AXE_CMD_WRITE_MCAST, 0, 0, (void *)&hashtbl); 495188412Sthompsa axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, rxmode, NULL); 496184610Salfred} 497184610Salfred 498186730Salfredstatic int 499186730Salfredaxe_get_phyno(struct axe_softc *sc, int sel) 500186730Salfred{ 501188412Sthompsa int phyno; 502186730Salfred 503186730Salfred switch (AXE_PHY_TYPE(sc->sc_phyaddrs[sel])) { 504186730Salfred case PHY_TYPE_100_HOME: 505186730Salfred case PHY_TYPE_GIG: 506188412Sthompsa phyno = AXE_PHY_NO(sc->sc_phyaddrs[sel]); 507186730Salfred break; 508186730Salfred case PHY_TYPE_SPECIAL: 509186730Salfred /* FALLTHROUGH */ 510186730Salfred case PHY_TYPE_RSVD: 511186730Salfred /* FALLTHROUGH */ 512186730Salfred case PHY_TYPE_NON_SUP: 513186730Salfred /* FALLTHROUGH */ 514186730Salfred default: 515186730Salfred phyno = -1; 516186730Salfred break; 517186730Salfred } 518186730Salfred 519186730Salfred return (phyno); 520186730Salfred} 521186730Salfred 522212130Sthompsa#define AXE_GPIO_WRITE(x, y) do { \ 523212130Sthompsa axe_cmd(sc, AXE_CMD_WRITE_GPIO, 0, (x), NULL); \ 524212130Sthompsa uether_pause(ue, (y)); \ 525212130Sthompsa} while (0) 526212130Sthompsa 527184610Salfredstatic void 528188412Sthompsaaxe_ax88178_init(struct axe_softc *sc) 529184610Salfred{ 530212130Sthompsa struct usb_ether *ue; 531222581Syongari int gpio0, ledmode, phymode; 532212130Sthompsa uint16_t eeprom, val; 533184610Salfred 534212130Sthompsa ue = &sc->sc_ue; 535188412Sthompsa axe_cmd(sc, AXE_CMD_SROM_WR_ENABLE, 0, 0, NULL); 536184610Salfred /* XXX magic */ 537188412Sthompsa axe_cmd(sc, AXE_CMD_SROM_READ, 0, 0x0017, &eeprom); 538184610Salfred eeprom = le16toh(eeprom); 539188412Sthompsa axe_cmd(sc, AXE_CMD_SROM_WR_DISABLE, 0, 0, NULL); 540184610Salfred 541184610Salfred /* if EEPROM is invalid we have to use to GPIO0 */ 542184610Salfred if (eeprom == 0xffff) { 543212130Sthompsa phymode = AXE_PHY_MODE_MARVELL; 544184610Salfred gpio0 = 1; 545222581Syongari ledmode = 0; 546184610Salfred } else { 547212130Sthompsa phymode = eeprom & 0x7f; 548184610Salfred gpio0 = (eeprom & 0x80) ? 0 : 1; 549222581Syongari ledmode = eeprom >> 8; 550184610Salfred } 551184610Salfred 552212130Sthompsa if (bootverbose) 553215960Syongari device_printf(sc->sc_ue.ue_dev, 554215960Syongari "EEPROM data : 0x%04x, phymode : 0x%02x\n", eeprom, 555215960Syongari phymode); 556212130Sthompsa /* Program GPIOs depending on PHY hardware. */ 557212130Sthompsa switch (phymode) { 558212130Sthompsa case AXE_PHY_MODE_MARVELL: 559212130Sthompsa if (gpio0 == 1) { 560212130Sthompsa AXE_GPIO_WRITE(AXE_GPIO_RELOAD_EEPROM | AXE_GPIO0_EN, 561212130Sthompsa hz / 32); 562212130Sthompsa AXE_GPIO_WRITE(AXE_GPIO0_EN | AXE_GPIO2 | AXE_GPIO2_EN, 563212130Sthompsa hz / 32); 564212130Sthompsa AXE_GPIO_WRITE(AXE_GPIO0_EN | AXE_GPIO2_EN, hz / 4); 565212130Sthompsa AXE_GPIO_WRITE(AXE_GPIO0_EN | AXE_GPIO2 | AXE_GPIO2_EN, 566212130Sthompsa hz / 32); 567222581Syongari } else { 568212130Sthompsa AXE_GPIO_WRITE(AXE_GPIO_RELOAD_EEPROM | AXE_GPIO1 | 569222581Syongari AXE_GPIO1_EN, hz / 3); 570222581Syongari if (ledmode == 1) { 571222581Syongari AXE_GPIO_WRITE(AXE_GPIO1_EN, hz / 3); 572222581Syongari AXE_GPIO_WRITE(AXE_GPIO1 | AXE_GPIO1_EN, 573222581Syongari hz / 3); 574222581Syongari } else { 575222581Syongari AXE_GPIO_WRITE(AXE_GPIO1 | AXE_GPIO1_EN | 576222581Syongari AXE_GPIO2 | AXE_GPIO2_EN, hz / 32); 577222581Syongari AXE_GPIO_WRITE(AXE_GPIO1 | AXE_GPIO1_EN | 578222581Syongari AXE_GPIO2_EN, hz / 4); 579222581Syongari AXE_GPIO_WRITE(AXE_GPIO1 | AXE_GPIO1_EN | 580222581Syongari AXE_GPIO2 | AXE_GPIO2_EN, hz / 32); 581222581Syongari } 582222581Syongari } 583212130Sthompsa break; 584212130Sthompsa case AXE_PHY_MODE_CICADA: 585215960Syongari case AXE_PHY_MODE_CICADA_V2: 586215960Syongari case AXE_PHY_MODE_CICADA_V2_ASIX: 587212130Sthompsa if (gpio0 == 1) 588212130Sthompsa AXE_GPIO_WRITE(AXE_GPIO_RELOAD_EEPROM | AXE_GPIO0 | 589212130Sthompsa AXE_GPIO0_EN, hz / 32); 590212130Sthompsa else 591212130Sthompsa AXE_GPIO_WRITE(AXE_GPIO_RELOAD_EEPROM | AXE_GPIO1 | 592212130Sthompsa AXE_GPIO1_EN, hz / 32); 593212130Sthompsa break; 594212130Sthompsa case AXE_PHY_MODE_AGERE: 595212130Sthompsa AXE_GPIO_WRITE(AXE_GPIO_RELOAD_EEPROM | AXE_GPIO1 | 596212130Sthompsa AXE_GPIO1_EN, hz / 32); 597212130Sthompsa AXE_GPIO_WRITE(AXE_GPIO1 | AXE_GPIO1_EN | AXE_GPIO2 | 598212130Sthompsa AXE_GPIO2_EN, hz / 32); 599212130Sthompsa AXE_GPIO_WRITE(AXE_GPIO1 | AXE_GPIO1_EN | AXE_GPIO2_EN, hz / 4); 600212130Sthompsa AXE_GPIO_WRITE(AXE_GPIO1 | AXE_GPIO1_EN | AXE_GPIO2 | 601212130Sthompsa AXE_GPIO2_EN, hz / 32); 602212130Sthompsa break; 603212130Sthompsa case AXE_PHY_MODE_REALTEK_8211CL: 604212130Sthompsa case AXE_PHY_MODE_REALTEK_8211BN: 605212130Sthompsa case AXE_PHY_MODE_REALTEK_8251CL: 606212130Sthompsa val = gpio0 == 1 ? AXE_GPIO0 | AXE_GPIO0_EN : 607212130Sthompsa AXE_GPIO1 | AXE_GPIO1_EN; 608212130Sthompsa AXE_GPIO_WRITE(val, hz / 32); 609212130Sthompsa AXE_GPIO_WRITE(val | AXE_GPIO2 | AXE_GPIO2_EN, hz / 32); 610212130Sthompsa AXE_GPIO_WRITE(val | AXE_GPIO2_EN, hz / 4); 611212130Sthompsa AXE_GPIO_WRITE(val | AXE_GPIO2 | AXE_GPIO2_EN, hz / 32); 612212130Sthompsa if (phymode == AXE_PHY_MODE_REALTEK_8211CL) { 613212130Sthompsa axe_miibus_writereg(ue->ue_dev, sc->sc_phyno, 614212130Sthompsa 0x1F, 0x0005); 615212130Sthompsa axe_miibus_writereg(ue->ue_dev, sc->sc_phyno, 616212130Sthompsa 0x0C, 0x0000); 617212130Sthompsa val = axe_miibus_readreg(ue->ue_dev, sc->sc_phyno, 618212130Sthompsa 0x0001); 619212130Sthompsa axe_miibus_writereg(ue->ue_dev, sc->sc_phyno, 620212130Sthompsa 0x01, val | 0x0080); 621212130Sthompsa axe_miibus_writereg(ue->ue_dev, sc->sc_phyno, 622212130Sthompsa 0x1F, 0x0000); 623212130Sthompsa } 624212130Sthompsa break; 625212130Sthompsa default: 626212130Sthompsa /* Unknown PHY model or no need to program GPIOs. */ 627212130Sthompsa break; 628184610Salfred } 629184610Salfred 630184610Salfred /* soft reset */ 631188412Sthompsa axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, AXE_SW_RESET_CLEAR, NULL); 632212130Sthompsa uether_pause(ue, hz / 4); 633184610Salfred 634188412Sthompsa axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, 635184610Salfred AXE_SW_RESET_PRL | AXE_178_RESET_MAGIC, NULL); 636212130Sthompsa uether_pause(ue, hz / 4); 637186730Salfred /* Enable MII/GMII/RGMII interface to work with external PHY. */ 638188412Sthompsa axe_cmd(sc, AXE_CMD_SW_PHY_SELECT, 0, 0, NULL); 639212130Sthompsa uether_pause(ue, hz / 4); 640184610Salfred 641188412Sthompsa axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, 0, NULL); 642184610Salfred} 643184610Salfred 644184610Salfredstatic void 645188412Sthompsaaxe_ax88772_init(struct axe_softc *sc) 646184610Salfred{ 647188412Sthompsa axe_cmd(sc, AXE_CMD_WRITE_GPIO, 0, 0x00b0, NULL); 648194228Sthompsa uether_pause(&sc->sc_ue, hz / 16); 649184610Salfred 650186730Salfred if (sc->sc_phyno == AXE_772_PHY_NO_EPHY) { 651184610Salfred /* ask for the embedded PHY */ 652188412Sthompsa axe_cmd(sc, AXE_CMD_SW_PHY_SELECT, 0, 0x01, NULL); 653194228Sthompsa uether_pause(&sc->sc_ue, hz / 64); 654184610Salfred 655184610Salfred /* power down and reset state, pin reset state */ 656188412Sthompsa axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, 657184610Salfred AXE_SW_RESET_CLEAR, NULL); 658194228Sthompsa uether_pause(&sc->sc_ue, hz / 16); 659184610Salfred 660184610Salfred /* power down/reset state, pin operating state */ 661188412Sthompsa axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, 662184610Salfred AXE_SW_RESET_IPPD | AXE_SW_RESET_PRL, NULL); 663194228Sthompsa uether_pause(&sc->sc_ue, hz / 4); 664184610Salfred 665184610Salfred /* power up, reset */ 666188412Sthompsa axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, AXE_SW_RESET_PRL, NULL); 667184610Salfred 668184610Salfred /* power up, operating */ 669188412Sthompsa axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, 670184610Salfred AXE_SW_RESET_IPRL | AXE_SW_RESET_PRL, NULL); 671184610Salfred } else { 672184610Salfred /* ask for external PHY */ 673188412Sthompsa axe_cmd(sc, AXE_CMD_SW_PHY_SELECT, 0, 0x00, NULL); 674194228Sthompsa uether_pause(&sc->sc_ue, hz / 64); 675184610Salfred 676184610Salfred /* power down internal PHY */ 677188412Sthompsa axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, 678184610Salfred AXE_SW_RESET_IPPD | AXE_SW_RESET_PRL, NULL); 679184610Salfred } 680184610Salfred 681194228Sthompsa uether_pause(&sc->sc_ue, hz / 4); 682188412Sthompsa axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, 0, NULL); 683184610Salfred} 684184610Salfred 685184610Salfredstatic void 686224020Syongariaxe_ax88772_phywake(struct axe_softc *sc) 687215969Syongari{ 688215969Syongari struct usb_ether *ue; 689215969Syongari 690215969Syongari ue = &sc->sc_ue; 691215969Syongari if (sc->sc_phyno == AXE_772_PHY_NO_EPHY) { 692215969Syongari /* Manually select internal(embedded) PHY - MAC mode. */ 693215969Syongari axe_cmd(sc, AXE_CMD_SW_PHY_SELECT, 0, AXE_SW_PHY_SELECT_SS_ENB | 694215969Syongari AXE_SW_PHY_SELECT_EMBEDDED | AXE_SW_PHY_SELECT_SS_MII, 695215969Syongari NULL); 696215969Syongari uether_pause(&sc->sc_ue, hz / 32); 697215969Syongari } else { 698215969Syongari /* 699215969Syongari * Manually select external PHY - MAC mode. 700215969Syongari * Reverse MII/RMII is for AX88772A PHY mode. 701215969Syongari */ 702215969Syongari axe_cmd(sc, AXE_CMD_SW_PHY_SELECT, 0, AXE_SW_PHY_SELECT_SS_ENB | 703215969Syongari AXE_SW_PHY_SELECT_EXT | AXE_SW_PHY_SELECT_SS_MII, NULL); 704215969Syongari uether_pause(&sc->sc_ue, hz / 32); 705215969Syongari } 706215969Syongari /* Take PHY out of power down. */ 707215969Syongari axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, AXE_SW_RESET_IPPD | 708215969Syongari AXE_SW_RESET_IPRL, NULL); 709215969Syongari uether_pause(&sc->sc_ue, hz / 4); 710215969Syongari axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, AXE_SW_RESET_IPRL, NULL); 711215969Syongari uether_pause(&sc->sc_ue, hz); 712215969Syongari axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, AXE_SW_RESET_CLEAR, NULL); 713215969Syongari uether_pause(&sc->sc_ue, hz / 32); 714215969Syongari axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, AXE_SW_RESET_IPRL, NULL); 715215969Syongari uether_pause(&sc->sc_ue, hz / 32); 716224020Syongari} 717224020Syongari 718224020Syongaristatic void 719224020Syongariaxe_ax88772a_init(struct axe_softc *sc) 720224020Syongari{ 721224020Syongari struct usb_ether *ue; 722224020Syongari 723224020Syongari ue = &sc->sc_ue; 724224020Syongari /* Reload EEPROM. */ 725224020Syongari AXE_GPIO_WRITE(AXE_GPIO_RELOAD_EEPROM, hz / 32); 726224020Syongari axe_ax88772_phywake(sc); 727224020Syongari /* Stop MAC. */ 728215969Syongari axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, 0, NULL); 729215969Syongari} 730215969Syongari 731224020Syongaristatic void 732224020Syongariaxe_ax88772b_init(struct axe_softc *sc) 733224020Syongari{ 734224020Syongari struct usb_ether *ue; 735224020Syongari uint16_t eeprom; 736224020Syongari uint8_t *eaddr; 737224020Syongari int i; 738224020Syongari 739224020Syongari ue = &sc->sc_ue; 740224020Syongari /* Reload EEPROM. */ 741224020Syongari AXE_GPIO_WRITE(AXE_GPIO_RELOAD_EEPROM, hz / 32); 742224020Syongari /* 743224020Syongari * Save PHY power saving configuration(high byte) and 744224020Syongari * clear EEPROM checksum value(low byte). 745224020Syongari */ 746224020Syongari axe_cmd(sc, AXE_CMD_SROM_READ, 0, AXE_EEPROM_772B_PHY_PWRCFG, &eeprom); 747224020Syongari sc->sc_pwrcfg = le16toh(eeprom) & 0xFF00; 748224020Syongari 749224020Syongari /* 750224020Syongari * Auto-loaded default station address from internal ROM is 751224020Syongari * 00:00:00:00:00:00 such that an explicit access to EEPROM 752224020Syongari * is required to get real station address. 753224020Syongari */ 754224020Syongari eaddr = ue->ue_eaddr; 755224020Syongari for (i = 0; i < ETHER_ADDR_LEN / 2; i++) { 756224020Syongari axe_cmd(sc, AXE_CMD_SROM_READ, 0, AXE_EEPROM_772B_NODE_ID + i, 757224020Syongari &eeprom); 758224020Syongari eeprom = le16toh(eeprom); 759224020Syongari *eaddr++ = (uint8_t)(eeprom & 0xFF); 760224020Syongari *eaddr++ = (uint8_t)((eeprom >> 8) & 0xFF); 761224020Syongari } 762224020Syongari /* Wakeup PHY. */ 763224020Syongari axe_ax88772_phywake(sc); 764224020Syongari /* Stop MAC. */ 765224020Syongari axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, 0, NULL); 766224020Syongari} 767224020Syongari 768215969Syongari#undef AXE_GPIO_WRITE 769215969Syongari 770215969Syongaristatic void 771188412Sthompsaaxe_reset(struct axe_softc *sc) 772184610Salfred{ 773192984Sthompsa struct usb_config_descriptor *cd; 774193045Sthompsa usb_error_t err; 775184610Salfred 776194228Sthompsa cd = usbd_get_config_descriptor(sc->sc_ue.ue_udev); 777184610Salfred 778194228Sthompsa err = usbd_req_set_config(sc->sc_ue.ue_udev, &sc->sc_mtx, 779188412Sthompsa cd->bConfigurationValue); 780188412Sthompsa if (err) 781188412Sthompsa DPRINTF("reset failed (ignored)\n"); 782188412Sthompsa 783188412Sthompsa /* Wait a little while for the chip to get its brains in order. */ 784194228Sthompsa uether_pause(&sc->sc_ue, hz / 100); 785215966Syongari 786215966Syongari /* Reinitialize controller to achieve full reset. */ 787215966Syongari if (sc->sc_flags & AXE_FLAG_178) 788215966Syongari axe_ax88178_init(sc); 789215966Syongari else if (sc->sc_flags & AXE_FLAG_772) 790215966Syongari axe_ax88772_init(sc); 791215969Syongari else if (sc->sc_flags & AXE_FLAG_772A) 792215969Syongari axe_ax88772a_init(sc); 793224020Syongari else if (sc->sc_flags & AXE_FLAG_772B) 794224020Syongari axe_ax88772b_init(sc); 795188412Sthompsa} 796188412Sthompsa 797188412Sthompsastatic void 798192984Sthompsaaxe_attach_post(struct usb_ether *ue) 799188412Sthompsa{ 800194228Sthompsa struct axe_softc *sc = uether_getsc(ue); 801188412Sthompsa 802184610Salfred /* 803184610Salfred * Load PHY indexes first. Needed by axe_xxx_init(). 804184610Salfred */ 805188412Sthompsa axe_cmd(sc, AXE_CMD_READ_PHYID, 0, 0, sc->sc_phyaddrs); 806212130Sthompsa if (bootverbose) 807212130Sthompsa device_printf(sc->sc_ue.ue_dev, "PHYADDR 0x%02x:0x%02x\n", 808212130Sthompsa sc->sc_phyaddrs[0], sc->sc_phyaddrs[1]); 809186730Salfred sc->sc_phyno = axe_get_phyno(sc, AXE_PHY_SEL_PRI); 810186730Salfred if (sc->sc_phyno == -1) 811186730Salfred sc->sc_phyno = axe_get_phyno(sc, AXE_PHY_SEL_SEC); 812186730Salfred if (sc->sc_phyno == -1) { 813188412Sthompsa device_printf(sc->sc_ue.ue_dev, 814188412Sthompsa "no valid PHY address found, assuming PHY address 0\n"); 815186730Salfred sc->sc_phyno = 0; 816186730Salfred } 817184610Salfred 818224020Syongari /* Initialize controller and get station address. */ 819215968Syongari if (sc->sc_flags & AXE_FLAG_178) { 820188412Sthompsa axe_ax88178_init(sc); 821215968Syongari sc->sc_tx_bufsz = 16 * 1024; 822224020Syongari axe_cmd(sc, AXE_178_CMD_READ_NODEID, 0, 0, ue->ue_eaddr); 823215968Syongari } else if (sc->sc_flags & AXE_FLAG_772) { 824188412Sthompsa axe_ax88772_init(sc); 825215968Syongari sc->sc_tx_bufsz = 8 * 1024; 826224020Syongari axe_cmd(sc, AXE_178_CMD_READ_NODEID, 0, 0, ue->ue_eaddr); 827215969Syongari } else if (sc->sc_flags & AXE_FLAG_772A) { 828215969Syongari axe_ax88772a_init(sc); 829215969Syongari sc->sc_tx_bufsz = 8 * 1024; 830188412Sthompsa axe_cmd(sc, AXE_178_CMD_READ_NODEID, 0, 0, ue->ue_eaddr); 831224020Syongari } else if (sc->sc_flags & AXE_FLAG_772B) { 832224020Syongari axe_ax88772b_init(sc); 833224020Syongari sc->sc_tx_bufsz = 8 * 1024; 834224020Syongari } else 835188412Sthompsa axe_cmd(sc, AXE_172_CMD_READ_NODEID, 0, 0, ue->ue_eaddr); 836184610Salfred 837184610Salfred /* 838184610Salfred * Fetch IPG values. 839184610Salfred */ 840224020Syongari if (sc->sc_flags & (AXE_FLAG_772A | AXE_FLAG_772B)) { 841215969Syongari /* Set IPG values. */ 842215969Syongari sc->sc_ipgs[0] = 0x15; 843215969Syongari sc->sc_ipgs[1] = 0x16; 844215969Syongari sc->sc_ipgs[2] = 0x1A; 845215969Syongari } else 846215969Syongari axe_cmd(sc, AXE_CMD_READ_IPG012, 0, 0, sc->sc_ipgs); 847188412Sthompsa} 848184610Salfred 849188412Sthompsa/* 850188412Sthompsa * Probe for a AX88172 chip. 851188412Sthompsa */ 852188412Sthompsastatic int 853188412Sthompsaaxe_probe(device_t dev) 854188412Sthompsa{ 855192984Sthompsa struct usb_attach_arg *uaa = device_get_ivars(dev); 856184610Salfred 857192499Sthompsa if (uaa->usb_mode != USB_MODE_HOST) 858188412Sthompsa return (ENXIO); 859188412Sthompsa if (uaa->info.bConfigIndex != AXE_CONFIG_IDX) 860188412Sthompsa return (ENXIO); 861188412Sthompsa if (uaa->info.bIfaceIndex != AXE_IFACE_IDX) 862188412Sthompsa return (ENXIO); 863184610Salfred 864194228Sthompsa return (usbd_lookup_id_by_uaa(axe_devs, sizeof(axe_devs), uaa)); 865188412Sthompsa} 866184610Salfred 867188412Sthompsa/* 868188412Sthompsa * Attach the interface. Allocate softc structures, do ifmedia 869188412Sthompsa * setup and ethernet/BPF attach. 870188412Sthompsa */ 871188412Sthompsastatic int 872188412Sthompsaaxe_attach(device_t dev) 873188412Sthompsa{ 874192984Sthompsa struct usb_attach_arg *uaa = device_get_ivars(dev); 875188412Sthompsa struct axe_softc *sc = device_get_softc(dev); 876192984Sthompsa struct usb_ether *ue = &sc->sc_ue; 877188412Sthompsa uint8_t iface_index; 878188412Sthompsa int error; 879184610Salfred 880188412Sthompsa sc->sc_flags = USB_GET_DRIVER_INFO(uaa); 881184610Salfred 882194228Sthompsa device_set_usb_desc(dev); 883184610Salfred 884188412Sthompsa mtx_init(&sc->sc_mtx, device_get_nameunit(dev), NULL, MTX_DEF); 885184610Salfred 886188412Sthompsa iface_index = AXE_IFACE_IDX; 887194228Sthompsa error = usbd_transfer_setup(uaa->device, &iface_index, sc->sc_xfer, 888188412Sthompsa axe_config, AXE_N_TRANSFER, sc, &sc->sc_mtx); 889188412Sthompsa if (error) { 890199816Sthompsa device_printf(dev, "allocating USB transfers failed\n"); 891188412Sthompsa goto detach; 892188412Sthompsa } 893184610Salfred 894188412Sthompsa ue->ue_sc = sc; 895188412Sthompsa ue->ue_dev = dev; 896188412Sthompsa ue->ue_udev = uaa->device; 897188412Sthompsa ue->ue_mtx = &sc->sc_mtx; 898188412Sthompsa ue->ue_methods = &axe_ue_methods; 899184610Salfred 900194228Sthompsa error = uether_ifattach(ue); 901184610Salfred if (error) { 902188412Sthompsa device_printf(dev, "could not attach interface\n"); 903188412Sthompsa goto detach; 904184610Salfred } 905188412Sthompsa return (0); /* success */ 906184610Salfred 907188412Sthompsadetach: 908188412Sthompsa axe_detach(dev); 909188412Sthompsa return (ENXIO); /* failure */ 910184610Salfred} 911184610Salfred 912184610Salfredstatic int 913184610Salfredaxe_detach(device_t dev) 914184610Salfred{ 915184610Salfred struct axe_softc *sc = device_get_softc(dev); 916192984Sthompsa struct usb_ether *ue = &sc->sc_ue; 917184610Salfred 918194228Sthompsa usbd_transfer_unsetup(sc->sc_xfer, AXE_N_TRANSFER); 919194228Sthompsa uether_ifdetach(ue); 920184610Salfred mtx_destroy(&sc->sc_mtx); 921184610Salfred 922184610Salfred return (0); 923184610Salfred} 924184610Salfred 925184610Salfred#if (AXE_BULK_BUF_SIZE >= 0x10000) 926184610Salfred#error "Please update axe_bulk_read_callback()!" 927184610Salfred#endif 928184610Salfred 929184610Salfredstatic void 930194677Sthompsaaxe_bulk_read_callback(struct usb_xfer *xfer, usb_error_t error) 931184610Salfred{ 932194677Sthompsa struct axe_softc *sc = usbd_xfer_softc(xfer); 933192984Sthompsa struct usb_ether *ue = &sc->sc_ue; 934194228Sthompsa struct ifnet *ifp = uether_getifp(ue); 935184610Salfred struct axe_sframe_hdr hdr; 936194677Sthompsa struct usb_page_cache *pc; 937197566Sthompsa int err, pos, len; 938194677Sthompsa int actlen; 939184610Salfred 940194677Sthompsa usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL); 941194677Sthompsa 942184610Salfred switch (USB_GET_STATE(xfer)) { 943184610Salfred case USB_ST_TRANSFERRED: 944184610Salfred pos = 0; 945197566Sthompsa len = 0; 946197566Sthompsa err = 0; 947197566Sthompsa 948194677Sthompsa pc = usbd_xfer_get_frame(xfer, 0); 949215968Syongari if (AXE_IS_178_FAMILY(sc)) { 950197566Sthompsa while (pos < actlen) { 951197566Sthompsa if ((pos + sizeof(hdr)) > actlen) { 952184610Salfred /* too little data */ 953197566Sthompsa err = EINVAL; 954184610Salfred break; 955184610Salfred } 956194677Sthompsa usbd_copy_out(pc, pos, &hdr, sizeof(hdr)); 957184610Salfred 958184610Salfred if ((hdr.len ^ hdr.ilen) != 0xFFFF) { 959184610Salfred /* we lost sync */ 960197566Sthompsa err = EINVAL; 961184610Salfred break; 962184610Salfred } 963184610Salfred pos += sizeof(hdr); 964184610Salfred 965184610Salfred len = le16toh(hdr.len); 966197566Sthompsa if ((pos + len) > actlen) { 967184610Salfred /* invalid length */ 968197566Sthompsa err = EINVAL; 969184610Salfred break; 970184610Salfred } 971213436Syongari uether_rxbuf(ue, pc, pos, len); 972184610Salfred 973197566Sthompsa pos += len + (len % 2); 974184610Salfred } 975213436Syongari } else 976213436Syongari uether_rxbuf(ue, pc, 0, actlen); 977184610Salfred 978197566Sthompsa if (err != 0) 979197566Sthompsa ifp->if_ierrors++; 980184610Salfred 981188412Sthompsa /* FALLTHROUGH */ 982184610Salfred case USB_ST_SETUP: 983184610Salfredtr_setup: 984194677Sthompsa usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer)); 985194228Sthompsa usbd_transfer_submit(xfer); 986194228Sthompsa uether_rxflush(ue); 987184610Salfred return; 988184610Salfred 989184610Salfred default: /* Error */ 990194677Sthompsa DPRINTF("bulk read error, %s\n", usbd_errstr(error)); 991188412Sthompsa 992194677Sthompsa if (error != USB_ERR_CANCELLED) { 993184610Salfred /* try to clear stall first */ 994194677Sthompsa usbd_xfer_set_stall(xfer); 995188412Sthompsa goto tr_setup; 996184610Salfred } 997184610Salfred return; 998184610Salfred 999184610Salfred } 1000184610Salfred} 1001184610Salfred 1002184610Salfred#if ((AXE_BULK_BUF_SIZE >= 0x10000) || (AXE_BULK_BUF_SIZE < (MCLBYTES+4))) 1003184610Salfred#error "Please update axe_bulk_write_callback()!" 1004184610Salfred#endif 1005184610Salfred 1006184610Salfredstatic void 1007194677Sthompsaaxe_bulk_write_callback(struct usb_xfer *xfer, usb_error_t error) 1008184610Salfred{ 1009194677Sthompsa struct axe_softc *sc = usbd_xfer_softc(xfer); 1010184610Salfred struct axe_sframe_hdr hdr; 1011194228Sthompsa struct ifnet *ifp = uether_getifp(&sc->sc_ue); 1012194677Sthompsa struct usb_page_cache *pc; 1013184610Salfred struct mbuf *m; 1014216284Syongari int nframes, pos; 1015184610Salfred 1016184610Salfred switch (USB_GET_STATE(xfer)) { 1017184610Salfred case USB_ST_TRANSFERRED: 1018184610Salfred DPRINTFN(11, "transfer complete\n"); 1019213424Syongari ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 1020188412Sthompsa /* FALLTHROUGH */ 1021184610Salfred case USB_ST_SETUP: 1022188412Sthompsatr_setup: 1023213424Syongari if ((sc->sc_flags & AXE_FLAG_LINK) == 0 || 1024213424Syongari (ifp->if_drv_flags & IFF_DRV_OACTIVE) != 0) { 1025184610Salfred /* 1026213424Syongari * Don't send anything if there is no link or 1027213424Syongari * controller is busy. 1028184610Salfred */ 1029188412Sthompsa return; 1030184610Salfred } 1031184610Salfred 1032216284Syongari for (nframes = 0; nframes < 16 && 1033216284Syongari !IFQ_DRV_IS_EMPTY(&ifp->if_snd); nframes++) { 1034184610Salfred IFQ_DRV_DEQUEUE(&ifp->if_snd, m); 1035216284Syongari if (m == NULL) 1036216284Syongari break; 1037216284Syongari usbd_xfer_set_frame_offset(xfer, nframes * MCLBYTES, 1038216284Syongari nframes); 1039216284Syongari pos = 0; 1040216284Syongari pc = usbd_xfer_get_frame(xfer, nframes); 1041215968Syongari if (AXE_IS_178_FAMILY(sc)) { 1042184610Salfred hdr.len = htole16(m->m_pkthdr.len); 1043184610Salfred hdr.ilen = ~hdr.len; 1044194677Sthompsa usbd_copy_in(pc, pos, &hdr, sizeof(hdr)); 1045184610Salfred pos += sizeof(hdr); 1046216284Syongari usbd_m_copy_in(pc, pos, m, 0, m->m_pkthdr.len); 1047216284Syongari pos += m->m_pkthdr.len; 1048216284Syongari if ((pos % 512) == 0) { 1049216284Syongari hdr.len = 0; 1050216284Syongari hdr.ilen = 0xffff; 1051216284Syongari usbd_copy_in(pc, pos, &hdr, 1052216284Syongari sizeof(hdr)); 1053216284Syongari pos += sizeof(hdr); 1054216284Syongari } 1055216284Syongari } else { 1056216284Syongari usbd_m_copy_in(pc, pos, m, 0, m->m_pkthdr.len); 1057216284Syongari pos += m->m_pkthdr.len; 1058184610Salfred } 1059184610Salfred 1060184610Salfred /* 1061213423Syongari * XXX 1062213423Syongari * Update TX packet counter here. This is not 1063213423Syongari * correct way but it seems that there is no way 1064213423Syongari * to know how many packets are sent at the end 1065213423Syongari * of transfer because controller combines 1066213423Syongari * multiple writes into single one if there is 1067213423Syongari * room in TX buffer of controller. 1068213423Syongari */ 1069213423Syongari ifp->if_opackets++; 1070213423Syongari 1071213423Syongari /* 1072188412Sthompsa * if there's a BPF listener, bounce a copy 1073188412Sthompsa * of this frame to him: 1074188412Sthompsa */ 1075184610Salfred BPF_MTAP(ifp, m); 1076184610Salfred 1077184610Salfred m_freem(m); 1078184610Salfred 1079216284Syongari /* Set frame length. */ 1080216284Syongari usbd_xfer_set_frame_len(xfer, nframes, pos); 1081184610Salfred } 1082216284Syongari if (nframes != 0) { 1083216284Syongari usbd_xfer_set_frames(xfer, nframes); 1084216284Syongari usbd_transfer_submit(xfer); 1085216284Syongari ifp->if_drv_flags |= IFF_DRV_OACTIVE; 1086216284Syongari } 1087184610Salfred return; 1088216284Syongari /* NOTREACHED */ 1089184610Salfred default: /* Error */ 1090184610Salfred DPRINTFN(11, "transfer error, %s\n", 1091194677Sthompsa usbd_errstr(error)); 1092184610Salfred 1093188412Sthompsa ifp->if_oerrors++; 1094213424Syongari ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 1095188412Sthompsa 1096194677Sthompsa if (error != USB_ERR_CANCELLED) { 1097184610Salfred /* try to clear stall first */ 1098194677Sthompsa usbd_xfer_set_stall(xfer); 1099188412Sthompsa goto tr_setup; 1100184610Salfred } 1101184610Salfred return; 1102184610Salfred 1103184610Salfred } 1104184610Salfred} 1105184610Salfred 1106184610Salfredstatic void 1107192984Sthompsaaxe_tick(struct usb_ether *ue) 1108184610Salfred{ 1109194228Sthompsa struct axe_softc *sc = uether_getsc(ue); 1110184610Salfred struct mii_data *mii = GET_MII(sc); 1111184610Salfred 1112188412Sthompsa AXE_LOCK_ASSERT(sc, MA_OWNED); 1113188412Sthompsa 1114184610Salfred mii_tick(mii); 1115188553Sthompsa if ((sc->sc_flags & AXE_FLAG_LINK) == 0) { 1116188553Sthompsa axe_miibus_statchg(ue->ue_dev); 1117188553Sthompsa if ((sc->sc_flags & AXE_FLAG_LINK) != 0) 1118188553Sthompsa axe_start(ue); 1119186730Salfred } 1120184610Salfred} 1121184610Salfred 1122184610Salfredstatic void 1123192984Sthompsaaxe_start(struct usb_ether *ue) 1124184610Salfred{ 1125194228Sthompsa struct axe_softc *sc = uether_getsc(ue); 1126184610Salfred 1127188412Sthompsa /* 1128188412Sthompsa * start the USB transfers, if not already started: 1129188412Sthompsa */ 1130194228Sthompsa usbd_transfer_start(sc->sc_xfer[AXE_BULK_DT_RD]); 1131194228Sthompsa usbd_transfer_start(sc->sc_xfer[AXE_BULK_DT_WR]); 1132184610Salfred} 1133184610Salfred 1134184610Salfredstatic void 1135192984Sthompsaaxe_init(struct usb_ether *ue) 1136184610Salfred{ 1137194228Sthompsa struct axe_softc *sc = uether_getsc(ue); 1138194228Sthompsa struct ifnet *ifp = uether_getifp(ue); 1139184610Salfred uint16_t rxmode; 1140184610Salfred 1141188412Sthompsa AXE_LOCK_ASSERT(sc, MA_OWNED); 1142184610Salfred 1143215963Syongari if ((ifp->if_drv_flags & IFF_DRV_RUNNING) != 0) 1144215963Syongari return; 1145215963Syongari 1146188412Sthompsa /* Cancel pending I/O */ 1147188412Sthompsa axe_stop(ue); 1148184610Salfred 1149215962Syongari axe_reset(sc); 1150215962Syongari 1151197567Sthompsa /* Set MAC address. */ 1152215968Syongari if (AXE_IS_178_FAMILY(sc)) 1153197567Sthompsa axe_cmd(sc, AXE_178_CMD_WRITE_NODEID, 0, 0, IF_LLADDR(ifp)); 1154197567Sthompsa else 1155197567Sthompsa axe_cmd(sc, AXE_172_CMD_WRITE_NODEID, 0, 0, IF_LLADDR(ifp)); 1156184610Salfred 1157184610Salfred /* Set transmitter IPG values */ 1158215968Syongari if (AXE_IS_178_FAMILY(sc)) 1159188412Sthompsa axe_cmd(sc, AXE_178_CMD_WRITE_IPG012, sc->sc_ipgs[2], 1160184610Salfred (sc->sc_ipgs[1] << 8) | (sc->sc_ipgs[0]), NULL); 1161215968Syongari else { 1162188412Sthompsa axe_cmd(sc, AXE_172_CMD_WRITE_IPG0, 0, sc->sc_ipgs[0], NULL); 1163188412Sthompsa axe_cmd(sc, AXE_172_CMD_WRITE_IPG1, 0, sc->sc_ipgs[1], NULL); 1164188412Sthompsa axe_cmd(sc, AXE_172_CMD_WRITE_IPG2, 0, sc->sc_ipgs[2], NULL); 1165184610Salfred } 1166184610Salfred 1167224020Syongari /* AX88772B uses different maximum frame burst configuration. */ 1168224020Syongari if (sc->sc_flags & AXE_FLAG_772B) 1169224020Syongari axe_cmd(sc, AXE_772B_CMD_RXCTL_WRITE_CFG, 1170224020Syongari ax88772b_mfb_table[AX88772B_MFB_16K].threshold, 1171224020Syongari ax88772b_mfb_table[AX88772B_MFB_16K].byte_cnt, NULL); 1172224020Syongari 1173224020Syongari /* Enable receiver, set RX mode. */ 1174184610Salfred rxmode = (AXE_RXCMD_MULTICAST | AXE_RXCMD_ENABLE); 1175215968Syongari if (AXE_IS_178_FAMILY(sc)) { 1176224020Syongari if (sc->sc_flags & AXE_FLAG_772B) { 1177224020Syongari /* 1178224020Syongari * Select RX header format type 1. Aligning IP 1179224020Syongari * header on 4 byte boundary is not needed 1180224020Syongari * because we always copy the received frame in 1181224020Syongari * RX handler. 1182224020Syongari */ 1183224020Syongari rxmode |= AXE_772B_RXCMD_HDR_TYPE_1; 1184224020Syongari } else { 1185224020Syongari /* 1186224020Syongari * Default Rx buffer size is too small to get 1187224020Syongari * maximum performance. 1188224020Syongari */ 1189224020Syongari rxmode |= AXE_178_RXCMD_MFB_16384; 1190224020Syongari } 1191184610Salfred } else { 1192184610Salfred rxmode |= AXE_172_RXCMD_UNICAST; 1193184610Salfred } 1194184610Salfred 1195184610Salfred /* If we want promiscuous mode, set the allframes bit. */ 1196188412Sthompsa if (ifp->if_flags & IFF_PROMISC) 1197184610Salfred rxmode |= AXE_RXCMD_PROMISC; 1198188412Sthompsa 1199188412Sthompsa if (ifp->if_flags & IFF_BROADCAST) 1200184610Salfred rxmode |= AXE_RXCMD_BROADCAST; 1201184610Salfred 1202188412Sthompsa axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, rxmode, NULL); 1203188412Sthompsa 1204184610Salfred /* Load the multicast filter. */ 1205188412Sthompsa axe_setmulti(ue); 1206184610Salfred 1207194677Sthompsa usbd_xfer_set_stall(sc->sc_xfer[AXE_BULK_DT_WR]); 1208184610Salfred 1209188412Sthompsa ifp->if_drv_flags |= IFF_DRV_RUNNING; 1210215964Syongari /* Switch to selected media. */ 1211215964Syongari axe_ifmedia_upd(ifp); 1212188412Sthompsa axe_start(ue); 1213184610Salfred} 1214184610Salfred 1215184610Salfredstatic void 1216192984Sthompsaaxe_setpromisc(struct usb_ether *ue) 1217184610Salfred{ 1218194228Sthompsa struct axe_softc *sc = uether_getsc(ue); 1219194228Sthompsa struct ifnet *ifp = uether_getifp(ue); 1220184610Salfred uint16_t rxmode; 1221184610Salfred 1222188412Sthompsa axe_cmd(sc, AXE_CMD_RXCTL_READ, 0, 0, &rxmode); 1223184610Salfred 1224184610Salfred rxmode = le16toh(rxmode); 1225184610Salfred 1226188412Sthompsa if (ifp->if_flags & IFF_PROMISC) { 1227184610Salfred rxmode |= AXE_RXCMD_PROMISC; 1228184610Salfred } else { 1229184610Salfred rxmode &= ~AXE_RXCMD_PROMISC; 1230184610Salfred } 1231184610Salfred 1232188412Sthompsa axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, rxmode, NULL); 1233184610Salfred 1234188412Sthompsa axe_setmulti(ue); 1235184610Salfred} 1236184610Salfred 1237184610Salfredstatic void 1238192984Sthompsaaxe_stop(struct usb_ether *ue) 1239184610Salfred{ 1240194228Sthompsa struct axe_softc *sc = uether_getsc(ue); 1241194228Sthompsa struct ifnet *ifp = uether_getifp(ue); 1242184610Salfred 1243188412Sthompsa AXE_LOCK_ASSERT(sc, MA_OWNED); 1244184610Salfred 1245213424Syongari ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE); 1246186730Salfred sc->sc_flags &= ~AXE_FLAG_LINK; 1247184610Salfred 1248184610Salfred /* 1249184610Salfred * stop all the transfers, if not already stopped: 1250184610Salfred */ 1251194228Sthompsa usbd_transfer_stop(sc->sc_xfer[AXE_BULK_DT_WR]); 1252194228Sthompsa usbd_transfer_stop(sc->sc_xfer[AXE_BULK_DT_RD]); 1253184610Salfred} 1254