siis.c revision 208410
1/*- 2 * Copyright (c) 2009 Alexander Motin <mav@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer, 10 * without modification, immediately at the beginning of the file. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 */ 26 27#include <sys/cdefs.h> 28__FBSDID("$FreeBSD: head/sys/dev/siis/siis.c 208410 2010-05-22 07:32:47Z mav $"); 29 30#include <sys/param.h> 31#include <sys/module.h> 32#include <sys/systm.h> 33#include <sys/kernel.h> 34#include <sys/ata.h> 35#include <sys/bus.h> 36#include <sys/endian.h> 37#include <sys/malloc.h> 38#include <sys/lock.h> 39#include <sys/mutex.h> 40#include <sys/sema.h> 41#include <sys/taskqueue.h> 42#include <vm/uma.h> 43#include <machine/stdarg.h> 44#include <machine/resource.h> 45#include <machine/bus.h> 46#include <sys/rman.h> 47#include <dev/pci/pcivar.h> 48#include <dev/pci/pcireg.h> 49#include "siis.h" 50 51#include <cam/cam.h> 52#include <cam/cam_ccb.h> 53#include <cam/cam_sim.h> 54#include <cam/cam_xpt_sim.h> 55#include <cam/cam_debug.h> 56 57/* local prototypes */ 58static int siis_setup_interrupt(device_t dev); 59static void siis_intr(void *data); 60static int siis_suspend(device_t dev); 61static int siis_resume(device_t dev); 62static int siis_ch_init(device_t dev); 63static int siis_ch_deinit(device_t dev); 64static int siis_ch_suspend(device_t dev); 65static int siis_ch_resume(device_t dev); 66static void siis_ch_intr_locked(void *data); 67static void siis_ch_intr(void *data); 68static void siis_begin_transaction(device_t dev, union ccb *ccb); 69static void siis_dmasetprd(void *arg, bus_dma_segment_t *segs, int nsegs, int error); 70static void siis_execute_transaction(struct siis_slot *slot); 71static void siis_timeout(struct siis_slot *slot); 72static void siis_end_transaction(struct siis_slot *slot, enum siis_err_type et); 73static int siis_setup_fis(device_t dev, struct siis_cmd *ctp, union ccb *ccb, int tag); 74static void siis_dmainit(device_t dev); 75static void siis_dmasetupc_cb(void *xsc, bus_dma_segment_t *segs, int nsegs, int error); 76static void siis_dmafini(device_t dev); 77static void siis_slotsalloc(device_t dev); 78static void siis_slotsfree(device_t dev); 79static void siis_reset(device_t dev); 80static void siis_portinit(device_t dev); 81static int siis_wait_ready(device_t dev, int t); 82 83static int siis_sata_connect(struct siis_channel *ch); 84 85static void siis_issue_read_log(device_t dev); 86static void siis_process_read_log(device_t dev, union ccb *ccb); 87 88static void siisaction(struct cam_sim *sim, union ccb *ccb); 89static void siispoll(struct cam_sim *sim); 90 91MALLOC_DEFINE(M_SIIS, "SIIS driver", "SIIS driver data buffers"); 92 93static struct { 94 uint32_t id; 95 const char *name; 96 int ports; 97 int quirks; 98#define SIIS_Q_SNTF 1 99#define SIIS_Q_NOMSI 2 100} siis_ids[] = { 101 {0x31241095, "SiI3124", 4, 0}, 102 {0x31248086, "SiI3124", 4, 0}, 103 {0x31321095, "SiI3132", 2, SIIS_Q_SNTF|SIIS_Q_NOMSI}, 104 {0x02421095, "SiI3132", 2, SIIS_Q_SNTF|SIIS_Q_NOMSI}, 105 {0x02441095, "SiI3132", 2, SIIS_Q_SNTF|SIIS_Q_NOMSI}, 106 {0x31311095, "SiI3131", 1, SIIS_Q_SNTF|SIIS_Q_NOMSI}, 107 {0x35311095, "SiI3531", 1, SIIS_Q_SNTF|SIIS_Q_NOMSI}, 108 {0, NULL, 0, 0} 109}; 110 111static int 112siis_probe(device_t dev) 113{ 114 char buf[64]; 115 int i; 116 uint32_t devid = pci_get_devid(dev); 117 118 for (i = 0; siis_ids[i].id != 0; i++) { 119 if (siis_ids[i].id == devid) { 120 snprintf(buf, sizeof(buf), "%s SATA controller", 121 siis_ids[i].name); 122 device_set_desc_copy(dev, buf); 123 return (BUS_PROBE_VENDOR); 124 } 125 } 126 return (ENXIO); 127} 128 129static int 130siis_attach(device_t dev) 131{ 132 struct siis_controller *ctlr = device_get_softc(dev); 133 uint32_t devid = pci_get_devid(dev); 134 device_t child; 135 int error, i, unit; 136 137 ctlr->dev = dev; 138 for (i = 0; siis_ids[i].id != 0; i++) { 139 if (siis_ids[i].id == devid) 140 break; 141 } 142 ctlr->quirks = siis_ids[i].quirks; 143 /* Global memory */ 144 ctlr->r_grid = PCIR_BAR(0); 145 if (!(ctlr->r_gmem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 146 &ctlr->r_grid, RF_ACTIVE))) 147 return (ENXIO); 148 ctlr->gctl = ATA_INL(ctlr->r_gmem, SIIS_GCTL); 149 /* Channels memory */ 150 ctlr->r_rid = PCIR_BAR(2); 151 if (!(ctlr->r_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 152 &ctlr->r_rid, RF_ACTIVE))) 153 return (ENXIO); 154 /* Setup our own memory management for channels. */ 155 ctlr->sc_iomem.rm_type = RMAN_ARRAY; 156 ctlr->sc_iomem.rm_descr = "I/O memory addresses"; 157 if ((error = rman_init(&ctlr->sc_iomem)) != 0) { 158 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 159 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_grid, ctlr->r_gmem); 160 return (error); 161 } 162 if ((error = rman_manage_region(&ctlr->sc_iomem, 163 rman_get_start(ctlr->r_mem), rman_get_end(ctlr->r_mem))) != 0) { 164 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 165 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_grid, ctlr->r_gmem); 166 rman_fini(&ctlr->sc_iomem); 167 return (error); 168 } 169 pci_enable_busmaster(dev); 170 /* Reset controller */ 171 siis_resume(dev); 172 /* Number of HW channels */ 173 ctlr->channels = siis_ids[i].ports; 174 /* Setup interrupts. */ 175 if (siis_setup_interrupt(dev)) { 176 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 177 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_grid, ctlr->r_gmem); 178 rman_fini(&ctlr->sc_iomem); 179 return ENXIO; 180 } 181 /* Attach all channels on this controller */ 182 for (unit = 0; unit < ctlr->channels; unit++) { 183 child = device_add_child(dev, "siisch", -1); 184 if (child == NULL) 185 device_printf(dev, "failed to add channel device\n"); 186 else 187 device_set_ivars(child, (void *)(intptr_t)unit); 188 } 189 bus_generic_attach(dev); 190 return 0; 191} 192 193static int 194siis_detach(device_t dev) 195{ 196 struct siis_controller *ctlr = device_get_softc(dev); 197 device_t *children; 198 int nchildren, i; 199 200 /* Detach & delete all children */ 201 if (!device_get_children(dev, &children, &nchildren)) { 202 for (i = 0; i < nchildren; i++) 203 device_delete_child(dev, children[i]); 204 free(children, M_TEMP); 205 } 206 /* Free interrupts. */ 207 if (ctlr->irq.r_irq) { 208 bus_teardown_intr(dev, ctlr->irq.r_irq, 209 ctlr->irq.handle); 210 bus_release_resource(dev, SYS_RES_IRQ, 211 ctlr->irq.r_irq_rid, ctlr->irq.r_irq); 212 } 213 pci_release_msi(dev); 214 /* Free memory. */ 215 rman_fini(&ctlr->sc_iomem); 216 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 217 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_grid, ctlr->r_gmem); 218 return (0); 219} 220 221static int 222siis_suspend(device_t dev) 223{ 224 struct siis_controller *ctlr = device_get_softc(dev); 225 226 bus_generic_suspend(dev); 227 /* Put controller into reset state. */ 228 ctlr->gctl |= SIIS_GCTL_GRESET; 229 ATA_OUTL(ctlr->r_gmem, SIIS_GCTL, ctlr->gctl); 230 return 0; 231} 232 233static int 234siis_resume(device_t dev) 235{ 236 struct siis_controller *ctlr = device_get_softc(dev); 237 238 /* Set PCIe max read request size to at least 1024 bytes */ 239 if (pci_get_max_read_req(dev) < 1024) 240 pci_set_max_read_req(dev, 1024); 241 /* Put controller into reset state. */ 242 ctlr->gctl |= SIIS_GCTL_GRESET; 243 ATA_OUTL(ctlr->r_gmem, SIIS_GCTL, ctlr->gctl); 244 DELAY(10000); 245 /* Get controller out of reset state and enable port interrupts. */ 246 ctlr->gctl &= ~(SIIS_GCTL_GRESET | SIIS_GCTL_I2C_IE); 247 ctlr->gctl |= 0x0000000f; 248 ATA_OUTL(ctlr->r_gmem, SIIS_GCTL, ctlr->gctl); 249 return (bus_generic_resume(dev)); 250} 251 252static int 253siis_setup_interrupt(device_t dev) 254{ 255 struct siis_controller *ctlr = device_get_softc(dev); 256 int msi = ctlr->quirks & SIIS_Q_NOMSI ? 0 : 1; 257 258 /* Process hints. */ 259 resource_int_value(device_get_name(dev), 260 device_get_unit(dev), "msi", &msi); 261 if (msi < 0) 262 msi = 0; 263 else if (msi > 0) 264 msi = min(1, pci_msi_count(dev)); 265 /* Allocate MSI if needed/present. */ 266 if (msi && pci_alloc_msi(dev, &msi) != 0) 267 msi = 0; 268 /* Allocate all IRQs. */ 269 ctlr->irq.r_irq_rid = msi ? 1 : 0; 270 if (!(ctlr->irq.r_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, 271 &ctlr->irq.r_irq_rid, RF_SHAREABLE | RF_ACTIVE))) { 272 device_printf(dev, "unable to map interrupt\n"); 273 return ENXIO; 274 } 275 if ((bus_setup_intr(dev, ctlr->irq.r_irq, ATA_INTR_FLAGS, NULL, 276 siis_intr, ctlr, &ctlr->irq.handle))) { 277 /* SOS XXX release r_irq */ 278 device_printf(dev, "unable to setup interrupt\n"); 279 return ENXIO; 280 } 281 return (0); 282} 283 284/* 285 * Common case interrupt handler. 286 */ 287static void 288siis_intr(void *data) 289{ 290 struct siis_controller *ctlr = (struct siis_controller *)data; 291 u_int32_t is; 292 void *arg; 293 int unit; 294 295 is = ATA_INL(ctlr->r_gmem, SIIS_IS); 296 for (unit = 0; unit < ctlr->channels; unit++) { 297 if ((is & SIIS_IS_PORT(unit)) != 0 && 298 (arg = ctlr->interrupt[unit].argument)) { 299 ctlr->interrupt[unit].function(arg); 300 } 301 } 302 /* Acknowledge interrupt, if MSI enabled. */ 303 if (ctlr->irq.r_irq_rid) { 304 ATA_OUTL(ctlr->r_gmem, SIIS_GCTL, 305 ctlr->gctl | SIIS_GCTL_MSIACK); 306 } 307} 308 309static struct resource * 310siis_alloc_resource(device_t dev, device_t child, int type, int *rid, 311 u_long start, u_long end, u_long count, u_int flags) 312{ 313 struct siis_controller *ctlr = device_get_softc(dev); 314 int unit = ((struct siis_channel *)device_get_softc(child))->unit; 315 struct resource *res = NULL; 316 int offset = unit << 13; 317 long st; 318 319 switch (type) { 320 case SYS_RES_MEMORY: 321 st = rman_get_start(ctlr->r_mem); 322 res = rman_reserve_resource(&ctlr->sc_iomem, st + offset, 323 st + offset + 0x2000, 0x2000, RF_ACTIVE, child); 324 if (res) { 325 bus_space_handle_t bsh; 326 bus_space_tag_t bst; 327 bsh = rman_get_bushandle(ctlr->r_mem); 328 bst = rman_get_bustag(ctlr->r_mem); 329 bus_space_subregion(bst, bsh, offset, 0x2000, &bsh); 330 rman_set_bushandle(res, bsh); 331 rman_set_bustag(res, bst); 332 } 333 break; 334 case SYS_RES_IRQ: 335 if (*rid == ATA_IRQ_RID) 336 res = ctlr->irq.r_irq; 337 break; 338 } 339 return (res); 340} 341 342static int 343siis_release_resource(device_t dev, device_t child, int type, int rid, 344 struct resource *r) 345{ 346 347 switch (type) { 348 case SYS_RES_MEMORY: 349 rman_release_resource(r); 350 return (0); 351 case SYS_RES_IRQ: 352 if (rid != ATA_IRQ_RID) 353 return ENOENT; 354 return (0); 355 } 356 return (EINVAL); 357} 358 359static int 360siis_setup_intr(device_t dev, device_t child, struct resource *irq, 361 int flags, driver_filter_t *filter, driver_intr_t *function, 362 void *argument, void **cookiep) 363{ 364 struct siis_controller *ctlr = device_get_softc(dev); 365 int unit = (intptr_t)device_get_ivars(child); 366 367 if (filter != NULL) { 368 printf("siis.c: we cannot use a filter here\n"); 369 return (EINVAL); 370 } 371 ctlr->interrupt[unit].function = function; 372 ctlr->interrupt[unit].argument = argument; 373 return (0); 374} 375 376static int 377siis_teardown_intr(device_t dev, device_t child, struct resource *irq, 378 void *cookie) 379{ 380 struct siis_controller *ctlr = device_get_softc(dev); 381 int unit = (intptr_t)device_get_ivars(child); 382 383 ctlr->interrupt[unit].function = NULL; 384 ctlr->interrupt[unit].argument = NULL; 385 return (0); 386} 387 388static int 389siis_print_child(device_t dev, device_t child) 390{ 391 int retval; 392 393 retval = bus_print_child_header(dev, child); 394 retval += printf(" at channel %d", 395 (int)(intptr_t)device_get_ivars(child)); 396 retval += bus_print_child_footer(dev, child); 397 398 return (retval); 399} 400 401static int 402siis_child_location_str(device_t dev, device_t child, char *buf, 403 size_t buflen) 404{ 405 406 snprintf(buf, buflen, "channel=%d", 407 (int)(intptr_t)device_get_ivars(child)); 408 return (0); 409} 410 411devclass_t siis_devclass; 412static device_method_t siis_methods[] = { 413 DEVMETHOD(device_probe, siis_probe), 414 DEVMETHOD(device_attach, siis_attach), 415 DEVMETHOD(device_detach, siis_detach), 416 DEVMETHOD(device_suspend, siis_suspend), 417 DEVMETHOD(device_resume, siis_resume), 418 DEVMETHOD(bus_print_child, siis_print_child), 419 DEVMETHOD(bus_alloc_resource, siis_alloc_resource), 420 DEVMETHOD(bus_release_resource, siis_release_resource), 421 DEVMETHOD(bus_setup_intr, siis_setup_intr), 422 DEVMETHOD(bus_teardown_intr,siis_teardown_intr), 423 DEVMETHOD(bus_child_location_str, siis_child_location_str), 424 { 0, 0 } 425}; 426static driver_t siis_driver = { 427 "siis", 428 siis_methods, 429 sizeof(struct siis_controller) 430}; 431DRIVER_MODULE(siis, pci, siis_driver, siis_devclass, 0, 0); 432MODULE_VERSION(siis, 1); 433MODULE_DEPEND(siis, cam, 1, 1, 1); 434 435static int 436siis_ch_probe(device_t dev) 437{ 438 439 device_set_desc_copy(dev, "SIIS channel"); 440 return (0); 441} 442 443static int 444siis_ch_attach(device_t dev) 445{ 446 struct siis_controller *ctlr = device_get_softc(device_get_parent(dev)); 447 struct siis_channel *ch = device_get_softc(dev); 448 struct cam_devq *devq; 449 int rid, error, i, sata_rev = 0; 450 451 ch->dev = dev; 452 ch->unit = (intptr_t)device_get_ivars(dev); 453 ch->quirks = ctlr->quirks; 454 resource_int_value(device_get_name(dev), 455 device_get_unit(dev), "pm_level", &ch->pm_level); 456 resource_int_value(device_get_name(dev), 457 device_get_unit(dev), "sata_rev", &sata_rev); 458 for (i = 0; i < 16; i++) { 459 ch->user[i].revision = sata_rev; 460 ch->user[i].mode = 0; 461 ch->user[i].bytecount = 8192; 462 ch->user[i].tags = SIIS_MAX_SLOTS; 463 ch->curr[i] = ch->user[i]; 464 if (ch->pm_level) 465 ch->user[i].caps = CTS_SATA_CAPS_H_PMREQ; 466 } 467 mtx_init(&ch->mtx, "SIIS channel lock", NULL, MTX_DEF); 468 rid = ch->unit; 469 if (!(ch->r_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 470 &rid, RF_ACTIVE))) 471 return (ENXIO); 472 siis_dmainit(dev); 473 siis_slotsalloc(dev); 474 siis_ch_init(dev); 475 mtx_lock(&ch->mtx); 476 rid = ATA_IRQ_RID; 477 if (!(ch->r_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, 478 &rid, RF_SHAREABLE | RF_ACTIVE))) { 479 bus_release_resource(dev, SYS_RES_MEMORY, ch->unit, ch->r_mem); 480 device_printf(dev, "Unable to map interrupt\n"); 481 return (ENXIO); 482 } 483 if ((bus_setup_intr(dev, ch->r_irq, ATA_INTR_FLAGS, NULL, 484 siis_ch_intr_locked, dev, &ch->ih))) { 485 device_printf(dev, "Unable to setup interrupt\n"); 486 error = ENXIO; 487 goto err1; 488 } 489 /* Create the device queue for our SIM. */ 490 devq = cam_simq_alloc(SIIS_MAX_SLOTS); 491 if (devq == NULL) { 492 device_printf(dev, "Unable to allocate simq\n"); 493 error = ENOMEM; 494 goto err1; 495 } 496 /* Construct SIM entry */ 497 ch->sim = cam_sim_alloc(siisaction, siispoll, "siisch", ch, 498 device_get_unit(dev), &ch->mtx, 2, SIIS_MAX_SLOTS, devq); 499 if (ch->sim == NULL) { 500 device_printf(dev, "unable to allocate sim\n"); 501 error = ENOMEM; 502 goto err2; 503 } 504 if (xpt_bus_register(ch->sim, dev, 0) != CAM_SUCCESS) { 505 device_printf(dev, "unable to register xpt bus\n"); 506 error = ENXIO; 507 goto err2; 508 } 509 if (xpt_create_path(&ch->path, /*periph*/NULL, cam_sim_path(ch->sim), 510 CAM_TARGET_WILDCARD, CAM_LUN_WILDCARD) != CAM_REQ_CMP) { 511 device_printf(dev, "unable to create path\n"); 512 error = ENXIO; 513 goto err3; 514 } 515 mtx_unlock(&ch->mtx); 516 return (0); 517 518err3: 519 xpt_bus_deregister(cam_sim_path(ch->sim)); 520err2: 521 cam_sim_free(ch->sim, /*free_devq*/TRUE); 522err1: 523 bus_release_resource(dev, SYS_RES_IRQ, ATA_IRQ_RID, ch->r_irq); 524 bus_release_resource(dev, SYS_RES_MEMORY, ch->unit, ch->r_mem); 525 mtx_unlock(&ch->mtx); 526 return (error); 527} 528 529static int 530siis_ch_detach(device_t dev) 531{ 532 struct siis_channel *ch = device_get_softc(dev); 533 534 mtx_lock(&ch->mtx); 535 xpt_async(AC_LOST_DEVICE, ch->path, NULL); 536 xpt_free_path(ch->path); 537 xpt_bus_deregister(cam_sim_path(ch->sim)); 538 cam_sim_free(ch->sim, /*free_devq*/TRUE); 539 mtx_unlock(&ch->mtx); 540 541 bus_teardown_intr(dev, ch->r_irq, ch->ih); 542 bus_release_resource(dev, SYS_RES_IRQ, ATA_IRQ_RID, ch->r_irq); 543 544 siis_ch_deinit(dev); 545 siis_slotsfree(dev); 546 siis_dmafini(dev); 547 548 bus_release_resource(dev, SYS_RES_MEMORY, ch->unit, ch->r_mem); 549 mtx_destroy(&ch->mtx); 550 return (0); 551} 552 553static int 554siis_ch_init(device_t dev) 555{ 556 struct siis_channel *ch = device_get_softc(dev); 557 558 /* Get port out of reset state. */ 559 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_PORT_RESET); 560 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_32BIT); 561 if (ch->pm_present) 562 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_PME); 563 else 564 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_PME); 565 /* Enable port interrupts */ 566 ATA_OUTL(ch->r_mem, SIIS_P_IESET, SIIS_P_IX_ENABLED); 567 return (0); 568} 569 570static int 571siis_ch_deinit(device_t dev) 572{ 573 struct siis_channel *ch = device_get_softc(dev); 574 575 /* Put port into reset state. */ 576 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_PORT_RESET); 577 return (0); 578} 579 580static int 581siis_ch_suspend(device_t dev) 582{ 583 struct siis_channel *ch = device_get_softc(dev); 584 585 mtx_lock(&ch->mtx); 586 xpt_freeze_simq(ch->sim, 1); 587 while (ch->oslots) 588 msleep(ch, &ch->mtx, PRIBIO, "siissusp", hz/100); 589 siis_ch_deinit(dev); 590 mtx_unlock(&ch->mtx); 591 return (0); 592} 593 594static int 595siis_ch_resume(device_t dev) 596{ 597 struct siis_channel *ch = device_get_softc(dev); 598 599 mtx_lock(&ch->mtx); 600 siis_ch_init(dev); 601 siis_reset(dev); 602 xpt_release_simq(ch->sim, TRUE); 603 mtx_unlock(&ch->mtx); 604 return (0); 605} 606 607devclass_t siisch_devclass; 608static device_method_t siisch_methods[] = { 609 DEVMETHOD(device_probe, siis_ch_probe), 610 DEVMETHOD(device_attach, siis_ch_attach), 611 DEVMETHOD(device_detach, siis_ch_detach), 612 DEVMETHOD(device_suspend, siis_ch_suspend), 613 DEVMETHOD(device_resume, siis_ch_resume), 614 { 0, 0 } 615}; 616static driver_t siisch_driver = { 617 "siisch", 618 siisch_methods, 619 sizeof(struct siis_channel) 620}; 621DRIVER_MODULE(siisch, siis, siisch_driver, siis_devclass, 0, 0); 622 623struct siis_dc_cb_args { 624 bus_addr_t maddr; 625 int error; 626}; 627 628static void 629siis_dmainit(device_t dev) 630{ 631 struct siis_channel *ch = device_get_softc(dev); 632 struct siis_dc_cb_args dcba; 633 634 /* Command area. */ 635 if (bus_dma_tag_create(bus_get_dma_tag(dev), 1024, 0, 636 BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, 637 NULL, NULL, SIIS_WORK_SIZE, 1, SIIS_WORK_SIZE, 638 0, NULL, NULL, &ch->dma.work_tag)) 639 goto error; 640 if (bus_dmamem_alloc(ch->dma.work_tag, (void **)&ch->dma.work, 0, 641 &ch->dma.work_map)) 642 goto error; 643 if (bus_dmamap_load(ch->dma.work_tag, ch->dma.work_map, ch->dma.work, 644 SIIS_WORK_SIZE, siis_dmasetupc_cb, &dcba, 0) || dcba.error) { 645 bus_dmamem_free(ch->dma.work_tag, ch->dma.work, ch->dma.work_map); 646 goto error; 647 } 648 ch->dma.work_bus = dcba.maddr; 649 /* Data area. */ 650 if (bus_dma_tag_create(bus_get_dma_tag(dev), 1, 0, 651 BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, 652 NULL, NULL, 653 SIIS_SG_ENTRIES * PAGE_SIZE * SIIS_MAX_SLOTS, 654 SIIS_SG_ENTRIES, 0xFFFFFFFF, 655 0, busdma_lock_mutex, &ch->mtx, &ch->dma.data_tag)) { 656 goto error; 657 } 658 return; 659 660error: 661 device_printf(dev, "WARNING - DMA initialization failed\n"); 662 siis_dmafini(dev); 663} 664 665static void 666siis_dmasetupc_cb(void *xsc, bus_dma_segment_t *segs, int nsegs, int error) 667{ 668 struct siis_dc_cb_args *dcba = (struct siis_dc_cb_args *)xsc; 669 670 if (!(dcba->error = error)) 671 dcba->maddr = segs[0].ds_addr; 672} 673 674static void 675siis_dmafini(device_t dev) 676{ 677 struct siis_channel *ch = device_get_softc(dev); 678 679 if (ch->dma.data_tag) { 680 bus_dma_tag_destroy(ch->dma.data_tag); 681 ch->dma.data_tag = NULL; 682 } 683 if (ch->dma.work_bus) { 684 bus_dmamap_unload(ch->dma.work_tag, ch->dma.work_map); 685 bus_dmamem_free(ch->dma.work_tag, ch->dma.work, ch->dma.work_map); 686 ch->dma.work_bus = 0; 687 ch->dma.work_map = NULL; 688 ch->dma.work = NULL; 689 } 690 if (ch->dma.work_tag) { 691 bus_dma_tag_destroy(ch->dma.work_tag); 692 ch->dma.work_tag = NULL; 693 } 694} 695 696static void 697siis_slotsalloc(device_t dev) 698{ 699 struct siis_channel *ch = device_get_softc(dev); 700 int i; 701 702 /* Alloc and setup command/dma slots */ 703 bzero(ch->slot, sizeof(ch->slot)); 704 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 705 struct siis_slot *slot = &ch->slot[i]; 706 707 slot->dev = dev; 708 slot->slot = i; 709 slot->state = SIIS_SLOT_EMPTY; 710 slot->ccb = NULL; 711 callout_init_mtx(&slot->timeout, &ch->mtx, 0); 712 713 if (bus_dmamap_create(ch->dma.data_tag, 0, &slot->dma.data_map)) 714 device_printf(ch->dev, "FAILURE - create data_map\n"); 715 } 716} 717 718static void 719siis_slotsfree(device_t dev) 720{ 721 struct siis_channel *ch = device_get_softc(dev); 722 int i; 723 724 /* Free all dma slots */ 725 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 726 struct siis_slot *slot = &ch->slot[i]; 727 728 callout_drain(&slot->timeout); 729 if (slot->dma.data_map) { 730 bus_dmamap_destroy(ch->dma.data_tag, slot->dma.data_map); 731 slot->dma.data_map = NULL; 732 } 733 } 734} 735 736static void 737siis_notify_events(device_t dev) 738{ 739 struct siis_channel *ch = device_get_softc(dev); 740 struct cam_path *dpath; 741 u_int32_t status; 742 int i; 743 744 if (ch->quirks & SIIS_Q_SNTF) { 745 status = ATA_INL(ch->r_mem, SIIS_P_SNTF); 746 ATA_OUTL(ch->r_mem, SIIS_P_SNTF, status); 747 } else { 748 /* 749 * Without SNTF we have no idea which device sent notification. 750 * If PMP is connected, assume it, else - device. 751 */ 752 status = (ch->pm_present) ? 0x8000 : 0x0001; 753 } 754 if (bootverbose) 755 device_printf(dev, "SNTF 0x%04x\n", status); 756 for (i = 0; i < 16; i++) { 757 if ((status & (1 << i)) == 0) 758 continue; 759 if (xpt_create_path(&dpath, NULL, 760 xpt_path_path_id(ch->path), i, 0) == CAM_REQ_CMP) { 761 xpt_async(AC_SCSI_AEN, dpath, NULL); 762 xpt_free_path(dpath); 763 } 764 } 765 766} 767 768static void 769siis_phy_check_events(device_t dev) 770{ 771 struct siis_channel *ch = device_get_softc(dev); 772 773 /* If we have a connection event, deal with it */ 774 if (ch->pm_level == 0) { 775 u_int32_t status = ATA_INL(ch->r_mem, SIIS_P_SSTS); 776 union ccb *ccb; 777 778 if (bootverbose) { 779 if (((status & ATA_SS_DET_MASK) == ATA_SS_DET_PHY_ONLINE) && 780 ((status & ATA_SS_SPD_MASK) != ATA_SS_SPD_NO_SPEED) && 781 ((status & ATA_SS_IPM_MASK) == ATA_SS_IPM_ACTIVE)) { 782 device_printf(dev, "CONNECT requested\n"); 783 } else 784 device_printf(dev, "DISCONNECT requested\n"); 785 } 786 siis_reset(dev); 787 if ((ccb = xpt_alloc_ccb_nowait()) == NULL) 788 return; 789 if (xpt_create_path(&ccb->ccb_h.path, NULL, 790 cam_sim_path(ch->sim), 791 CAM_TARGET_WILDCARD, CAM_LUN_WILDCARD) != CAM_REQ_CMP) { 792 xpt_free_ccb(ccb); 793 return; 794 } 795 xpt_rescan(ccb); 796 } 797} 798 799static void 800siis_ch_intr_locked(void *data) 801{ 802 device_t dev = (device_t)data; 803 struct siis_channel *ch = device_get_softc(dev); 804 805 mtx_lock(&ch->mtx); 806 siis_ch_intr(data); 807 mtx_unlock(&ch->mtx); 808} 809 810static void 811siis_ch_intr(void *data) 812{ 813 device_t dev = (device_t)data; 814 struct siis_channel *ch = device_get_softc(dev); 815 uint32_t istatus, sstatus, ctx, estatus, ok, err = 0; 816 enum siis_err_type et; 817 int i, ccs, port, tslots; 818 819 mtx_assert(&ch->mtx, MA_OWNED); 820 /* Read command statuses. */ 821 sstatus = ATA_INL(ch->r_mem, SIIS_P_SS); 822 ok = ch->rslots & ~sstatus; 823 /* Complete all successfull commands. */ 824 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 825 if ((ok >> i) & 1) 826 siis_end_transaction(&ch->slot[i], SIIS_ERR_NONE); 827 } 828 /* Do we have any other events? */ 829 if ((sstatus & SIIS_P_SS_ATTN) == 0) 830 return; 831 /* Read and clear interrupt statuses. */ 832 istatus = ATA_INL(ch->r_mem, SIIS_P_IS) & 833 (0xFFFF & ~SIIS_P_IX_COMMCOMP); 834 ATA_OUTL(ch->r_mem, SIIS_P_IS, istatus); 835 /* Process PHY events */ 836 if (istatus & SIIS_P_IX_PHYRDYCHG) 837 siis_phy_check_events(dev); 838 /* Process NOTIFY events */ 839 if (istatus & SIIS_P_IX_SDBN) 840 siis_notify_events(dev); 841 /* Process command errors */ 842 if (istatus & SIIS_P_IX_COMMERR) { 843 estatus = ATA_INL(ch->r_mem, SIIS_P_CMDERR); 844 ctx = ATA_INL(ch->r_mem, SIIS_P_CTX); 845 ccs = (ctx & SIIS_P_CTX_SLOT) >> SIIS_P_CTX_SLOT_SHIFT; 846 port = (ctx & SIIS_P_CTX_PMP) >> SIIS_P_CTX_PMP_SHIFT; 847 err = ch->rslots & sstatus; 848//device_printf(dev, "%s ERROR ss %08x is %08x rs %08x es %d act %d port %d serr %08x\n", 849// __func__, sstatus, istatus, ch->rslots, estatus, ccs, port, 850// ATA_INL(ch->r_mem, SIIS_P_SERR)); 851 852 if (!ch->readlog && !ch->recovery) { 853 xpt_freeze_simq(ch->sim, ch->numrslots); 854 ch->recovery = 1; 855 } 856 if (ch->frozen) { 857 union ccb *fccb = ch->frozen; 858 ch->frozen = NULL; 859 fccb->ccb_h.status &= ~CAM_STATUS_MASK; 860 fccb->ccb_h.status |= CAM_REQUEUE_REQ | CAM_RELEASE_SIMQ; 861 if (!(fccb->ccb_h.status & CAM_DEV_QFRZN)) { 862 xpt_freeze_devq(fccb->ccb_h.path, 1); 863 fccb->ccb_h.status |= CAM_DEV_QFRZN; 864 } 865 xpt_done(fccb); 866 } 867 if (estatus == SIIS_P_CMDERR_DEV || 868 estatus == SIIS_P_CMDERR_SDB || 869 estatus == SIIS_P_CMDERR_DATAFIS) { 870 tslots = ch->numtslots[port]; 871 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 872 /* XXX: requests in loading state. */ 873 if (((ch->rslots >> i) & 1) == 0) 874 continue; 875 if (ch->slot[i].ccb->ccb_h.target_id != port) 876 continue; 877 if (tslots == 0) { 878 /* Untagged operation. */ 879 if (i == ccs) 880 et = SIIS_ERR_TFE; 881 else 882 et = SIIS_ERR_INNOCENT; 883 } else { 884 /* Tagged operation. */ 885 et = SIIS_ERR_NCQ; 886 } 887 siis_end_transaction(&ch->slot[i], et); 888 } 889 /* 890 * We can't reinit port if there are some other 891 * commands active, use resume to complete them. 892 */ 893 if (ch->rslots != 0) 894 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_RESUME); 895 } else { 896 if (estatus == SIIS_P_CMDERR_SENDFIS || 897 estatus == SIIS_P_CMDERR_INCSTATE || 898 estatus == SIIS_P_CMDERR_PPE || 899 estatus == SIIS_P_CMDERR_SERVICE) { 900 et = SIIS_ERR_SATA; 901 } else 902 et = SIIS_ERR_INVALID; 903 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 904 /* XXX: requests in loading state. */ 905 if (((ch->rslots >> i) & 1) == 0) 906 continue; 907 siis_end_transaction(&ch->slot[i], et); 908 } 909 } 910 } 911} 912 913/* Must be called with channel locked. */ 914static int 915siis_check_collision(device_t dev, union ccb *ccb) 916{ 917 struct siis_channel *ch = device_get_softc(dev); 918 919 mtx_assert(&ch->mtx, MA_OWNED); 920 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 921 (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) { 922 /* Tagged command while we have no supported tag free. */ 923 if (((~ch->oslots) & (0x7fffffff >> (31 - 924 ch->curr[ccb->ccb_h.target_id].tags))) == 0) 925 return (1); 926 } 927 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 928 (ccb->ataio.cmd.flags & (CAM_ATAIO_CONTROL | CAM_ATAIO_NEEDRESULT))) { 929 /* Atomic command while anything active. */ 930 if (ch->numrslots != 0) 931 return (1); 932 } 933 /* We have some atomic command running. */ 934 if (ch->aslots != 0) 935 return (1); 936 return (0); 937} 938 939/* Must be called with channel locked. */ 940static void 941siis_begin_transaction(device_t dev, union ccb *ccb) 942{ 943 struct siis_channel *ch = device_get_softc(dev); 944 struct siis_slot *slot; 945 int tag, tags; 946 947 mtx_assert(&ch->mtx, MA_OWNED); 948 /* Choose empty slot. */ 949 tags = SIIS_MAX_SLOTS; 950 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 951 (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) 952 tags = ch->curr[ccb->ccb_h.target_id].tags; 953 tag = fls((~ch->oslots) & (0x7fffffff >> (31 - tags))) - 1; 954 /* Occupy chosen slot. */ 955 slot = &ch->slot[tag]; 956 slot->ccb = ccb; 957 /* Update channel stats. */ 958 ch->oslots |= (1 << slot->slot); 959 ch->numrslots++; 960 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 961 (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) { 962 ch->numtslots[ccb->ccb_h.target_id]++; 963 } 964 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 965 (ccb->ataio.cmd.flags & (CAM_ATAIO_CONTROL | CAM_ATAIO_NEEDRESULT))) 966 ch->aslots |= (1 << slot->slot); 967 slot->dma.nsegs = 0; 968 /* If request moves data, setup and load SG list */ 969 if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) { 970 void *buf; 971 bus_size_t size; 972 973 slot->state = SIIS_SLOT_LOADING; 974 if (ccb->ccb_h.func_code == XPT_ATA_IO) { 975 buf = ccb->ataio.data_ptr; 976 size = ccb->ataio.dxfer_len; 977 } else { 978 buf = ccb->csio.data_ptr; 979 size = ccb->csio.dxfer_len; 980 } 981 bus_dmamap_load(ch->dma.data_tag, slot->dma.data_map, 982 buf, size, siis_dmasetprd, slot, 0); 983 } else 984 siis_execute_transaction(slot); 985} 986 987/* Locked by busdma engine. */ 988static void 989siis_dmasetprd(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 990{ 991 struct siis_slot *slot = arg; 992 struct siis_channel *ch = device_get_softc(slot->dev); 993 struct siis_cmd *ctp; 994 struct siis_dma_prd *prd; 995 int i; 996 997 mtx_assert(&ch->mtx, MA_OWNED); 998 if (error) { 999 device_printf(slot->dev, "DMA load error\n"); 1000 if (!ch->readlog) 1001 xpt_freeze_simq(ch->sim, 1); 1002 siis_end_transaction(slot, SIIS_ERR_INVALID); 1003 return; 1004 } 1005 KASSERT(nsegs <= SIIS_SG_ENTRIES, ("too many DMA segment entries\n")); 1006 /* Get a piece of the workspace for this request */ 1007 ctp = (struct siis_cmd *) 1008 (ch->dma.work + SIIS_CT_OFFSET + (SIIS_CT_SIZE * slot->slot)); 1009 /* Fill S/G table */ 1010 if (slot->ccb->ccb_h.func_code == XPT_ATA_IO) 1011 prd = &ctp->u.ata.prd[0]; 1012 else 1013 prd = &ctp->u.atapi.prd[0]; 1014 for (i = 0; i < nsegs; i++) { 1015 prd[i].dba = htole64(segs[i].ds_addr); 1016 prd[i].dbc = htole32(segs[i].ds_len); 1017 prd[i].control = 0; 1018 } 1019 prd[nsegs - 1].control = htole32(SIIS_PRD_TRM); 1020 slot->dma.nsegs = nsegs; 1021 bus_dmamap_sync(ch->dma.data_tag, slot->dma.data_map, 1022 ((slot->ccb->ccb_h.flags & CAM_DIR_IN) ? 1023 BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE)); 1024 siis_execute_transaction(slot); 1025} 1026 1027/* Must be called with channel locked. */ 1028static void 1029siis_execute_transaction(struct siis_slot *slot) 1030{ 1031 device_t dev = slot->dev; 1032 struct siis_channel *ch = device_get_softc(dev); 1033 struct siis_cmd *ctp; 1034 union ccb *ccb = slot->ccb; 1035 u_int64_t prb_bus; 1036 1037 mtx_assert(&ch->mtx, MA_OWNED); 1038 /* Get a piece of the workspace for this request */ 1039 ctp = (struct siis_cmd *) 1040 (ch->dma.work + SIIS_CT_OFFSET + (SIIS_CT_SIZE * slot->slot)); 1041 ctp->control = 0; 1042 ctp->protocol_override = 0; 1043 ctp->transfer_count = 0; 1044 /* Special handling for Soft Reset command. */ 1045 if (ccb->ccb_h.func_code == XPT_ATA_IO) { 1046 if (ccb->ataio.cmd.flags & CAM_ATAIO_CONTROL) { 1047 ctp->control |= htole16(SIIS_PRB_SOFT_RESET); 1048 } else { 1049 ctp->control |= htole16(SIIS_PRB_PROTOCOL_OVERRIDE); 1050 if (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA) { 1051 ctp->protocol_override |= 1052 htole16(SIIS_PRB_PROTO_NCQ); 1053 } 1054 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) { 1055 ctp->protocol_override |= 1056 htole16(SIIS_PRB_PROTO_READ); 1057 } else 1058 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_OUT) { 1059 ctp->protocol_override |= 1060 htole16(SIIS_PRB_PROTO_WRITE); 1061 } 1062 } 1063 } else if (ccb->ccb_h.func_code == XPT_SCSI_IO) { 1064 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) 1065 ctp->control |= htole16(SIIS_PRB_PACKET_READ); 1066 else 1067 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_OUT) 1068 ctp->control |= htole16(SIIS_PRB_PACKET_WRITE); 1069 } 1070 /* Special handling for Soft Reset command. */ 1071 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 1072 (ccb->ataio.cmd.flags & CAM_ATAIO_CONTROL) && 1073 (ccb->ataio.cmd.control & ATA_A_RESET)) { 1074 /* Kick controller into sane state */ 1075 siis_portinit(dev); 1076 } 1077 /* Setup the FIS for this request */ 1078 if (!siis_setup_fis(dev, ctp, ccb, slot->slot)) { 1079 device_printf(ch->dev, "Setting up SATA FIS failed\n"); 1080 if (!ch->readlog) 1081 xpt_freeze_simq(ch->sim, 1); 1082 siis_end_transaction(slot, SIIS_ERR_INVALID); 1083 return; 1084 } 1085 bus_dmamap_sync(ch->dma.work_tag, ch->dma.work_map, 1086 BUS_DMASYNC_PREWRITE); 1087 /* Issue command to the controller. */ 1088 slot->state = SIIS_SLOT_RUNNING; 1089 ch->rslots |= (1 << slot->slot); 1090 prb_bus = ch->dma.work_bus + 1091 SIIS_CT_OFFSET + (SIIS_CT_SIZE * slot->slot); 1092 ATA_OUTL(ch->r_mem, SIIS_P_CACTL(slot->slot), prb_bus); 1093 ATA_OUTL(ch->r_mem, SIIS_P_CACTH(slot->slot), prb_bus >> 32); 1094 /* Start command execution timeout */ 1095 callout_reset(&slot->timeout, (int)ccb->ccb_h.timeout * hz / 1000, 1096 (timeout_t*)siis_timeout, slot); 1097 return; 1098} 1099 1100/* Must be called with channel locked. */ 1101static void 1102siis_process_timeout(device_t dev) 1103{ 1104 struct siis_channel *ch = device_get_softc(dev); 1105 int i; 1106 1107 mtx_assert(&ch->mtx, MA_OWNED); 1108 if (!ch->readlog && !ch->recovery) { 1109 xpt_freeze_simq(ch->sim, ch->numrslots); 1110 ch->recovery = 1; 1111 } 1112 /* Handle the rest of commands. */ 1113 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1114 /* Do we have a running request on slot? */ 1115 if (ch->slot[i].state < SIIS_SLOT_RUNNING) 1116 continue; 1117 siis_end_transaction(&ch->slot[i], SIIS_ERR_TIMEOUT); 1118 } 1119} 1120 1121/* Must be called with channel locked. */ 1122static void 1123siis_rearm_timeout(device_t dev) 1124{ 1125 struct siis_channel *ch = device_get_softc(dev); 1126 int i; 1127 1128 mtx_assert(&ch->mtx, MA_OWNED); 1129 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1130 struct siis_slot *slot = &ch->slot[i]; 1131 1132 /* Do we have a running request on slot? */ 1133 if (slot->state < SIIS_SLOT_RUNNING) 1134 continue; 1135 if ((ch->toslots & (1 << i)) == 0) 1136 continue; 1137 callout_reset(&slot->timeout, 1138 (int)slot->ccb->ccb_h.timeout * hz / 1000, 1139 (timeout_t*)siis_timeout, slot); 1140 } 1141} 1142 1143/* Locked by callout mechanism. */ 1144static void 1145siis_timeout(struct siis_slot *slot) 1146{ 1147 device_t dev = slot->dev; 1148 struct siis_channel *ch = device_get_softc(dev); 1149 1150 mtx_assert(&ch->mtx, MA_OWNED); 1151 /* Check for stale timeout. */ 1152 if (slot->state < SIIS_SLOT_RUNNING) 1153 return; 1154 device_printf(dev, "Timeout on slot %d\n", slot->slot); 1155 device_printf(dev, "%s is %08x ss %08x rs %08x es %08x sts %08x serr %08x\n", 1156 __func__, ATA_INL(ch->r_mem, SIIS_P_IS), 1157 ATA_INL(ch->r_mem, SIIS_P_SS), ch->rslots, 1158 ATA_INL(ch->r_mem, SIIS_P_CMDERR), ATA_INL(ch->r_mem, SIIS_P_STS), 1159 ATA_INL(ch->r_mem, SIIS_P_SERR)); 1160 1161 if (ch->toslots == 0) 1162 xpt_freeze_simq(ch->sim, 1); 1163 ch->toslots |= (1 << slot->slot); 1164 if ((ch->rslots & ~ch->toslots) == 0) 1165 siis_process_timeout(dev); 1166 else 1167 device_printf(dev, " ... waiting for slots %08x\n", 1168 ch->rslots & ~ch->toslots); 1169} 1170 1171/* Must be called with channel locked. */ 1172static void 1173siis_end_transaction(struct siis_slot *slot, enum siis_err_type et) 1174{ 1175 device_t dev = slot->dev; 1176 struct siis_channel *ch = device_get_softc(dev); 1177 union ccb *ccb = slot->ccb; 1178 1179 mtx_assert(&ch->mtx, MA_OWNED); 1180 bus_dmamap_sync(ch->dma.work_tag, ch->dma.work_map, 1181 BUS_DMASYNC_POSTWRITE); 1182 /* Read result registers to the result struct 1183 * May be incorrect if several commands finished same time, 1184 * so read only when sure or have to. 1185 */ 1186 if (ccb->ccb_h.func_code == XPT_ATA_IO) { 1187 struct ata_res *res = &ccb->ataio.res; 1188 if ((et == SIIS_ERR_TFE) || 1189 (ccb->ataio.cmd.flags & CAM_ATAIO_NEEDRESULT)) { 1190 int offs = SIIS_P_LRAM_SLOT(slot->slot) + 8; 1191 1192 res->status = ATA_INB(ch->r_mem, offs + 2); 1193 res->error = ATA_INB(ch->r_mem, offs + 3); 1194 res->lba_low = ATA_INB(ch->r_mem, offs + 4); 1195 res->lba_mid = ATA_INB(ch->r_mem, offs + 5); 1196 res->lba_high = ATA_INB(ch->r_mem, offs + 6); 1197 res->device = ATA_INB(ch->r_mem, offs + 7); 1198 res->lba_low_exp = ATA_INB(ch->r_mem, offs + 8); 1199 res->lba_mid_exp = ATA_INB(ch->r_mem, offs + 9); 1200 res->lba_high_exp = ATA_INB(ch->r_mem, offs + 10); 1201 res->sector_count = ATA_INB(ch->r_mem, offs + 12); 1202 res->sector_count_exp = ATA_INB(ch->r_mem, offs + 13); 1203 } else 1204 bzero(res, sizeof(*res)); 1205 } 1206 if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) { 1207 bus_dmamap_sync(ch->dma.data_tag, slot->dma.data_map, 1208 (ccb->ccb_h.flags & CAM_DIR_IN) ? 1209 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1210 bus_dmamap_unload(ch->dma.data_tag, slot->dma.data_map); 1211 } 1212 /* Set proper result status. */ 1213 if (et != SIIS_ERR_NONE || ch->recovery) { 1214 ch->eslots |= (1 << slot->slot); 1215 ccb->ccb_h.status |= CAM_RELEASE_SIMQ; 1216 } 1217 /* In case of error, freeze device for proper recovery. */ 1218 if (et != SIIS_ERR_NONE && 1219 !(ccb->ccb_h.status & CAM_DEV_QFRZN)) { 1220 xpt_freeze_devq(ccb->ccb_h.path, 1); 1221 ccb->ccb_h.status |= CAM_DEV_QFRZN; 1222 } 1223 ccb->ccb_h.status &= ~CAM_STATUS_MASK; 1224 switch (et) { 1225 case SIIS_ERR_NONE: 1226 ccb->ccb_h.status |= CAM_REQ_CMP; 1227 if (ccb->ccb_h.func_code == XPT_SCSI_IO) 1228 ccb->csio.scsi_status = SCSI_STATUS_OK; 1229 break; 1230 case SIIS_ERR_INVALID: 1231 ch->fatalerr = 1; 1232 ccb->ccb_h.status |= CAM_REQ_INVALID; 1233 break; 1234 case SIIS_ERR_INNOCENT: 1235 ccb->ccb_h.status |= CAM_REQUEUE_REQ; 1236 break; 1237 case SIIS_ERR_TFE: 1238 case SIIS_ERR_NCQ: 1239 if (ccb->ccb_h.func_code == XPT_SCSI_IO) { 1240 ccb->ccb_h.status |= CAM_SCSI_STATUS_ERROR; 1241 ccb->csio.scsi_status = SCSI_STATUS_CHECK_COND; 1242 } else { 1243 ccb->ccb_h.status |= CAM_ATA_STATUS_ERROR; 1244 } 1245 break; 1246 case SIIS_ERR_SATA: 1247 ch->fatalerr = 1; 1248 ccb->ccb_h.status |= CAM_UNCOR_PARITY; 1249 break; 1250 case SIIS_ERR_TIMEOUT: 1251 ch->fatalerr = 1; 1252 ccb->ccb_h.status |= CAM_CMD_TIMEOUT; 1253 break; 1254 default: 1255 ccb->ccb_h.status |= CAM_REQ_CMP_ERR; 1256 } 1257 /* Free slot. */ 1258 ch->oslots &= ~(1 << slot->slot); 1259 ch->rslots &= ~(1 << slot->slot); 1260 ch->aslots &= ~(1 << slot->slot); 1261 if (et != SIIS_ERR_TIMEOUT) { 1262 if (ch->toslots == (1 << slot->slot)) 1263 xpt_release_simq(ch->sim, TRUE); 1264 ch->toslots &= ~(1 << slot->slot); 1265 } 1266 slot->state = SIIS_SLOT_EMPTY; 1267 slot->ccb = NULL; 1268 /* Update channel stats. */ 1269 ch->numrslots--; 1270 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 1271 (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) { 1272 ch->numtslots[ccb->ccb_h.target_id]--; 1273 } 1274 /* If it was our READ LOG command - process it. */ 1275 if (ch->readlog) { 1276 siis_process_read_log(dev, ccb); 1277 /* If it was NCQ command error, put result on hold. */ 1278 } else if (et == SIIS_ERR_NCQ) { 1279 ch->hold[slot->slot] = ccb; 1280 ch->numhslots++; 1281 } else 1282 xpt_done(ccb); 1283 /* Unfreeze frozen command. */ 1284 if (ch->frozen && !siis_check_collision(dev, ch->frozen)) { 1285 union ccb *fccb = ch->frozen; 1286 ch->frozen = NULL; 1287 siis_begin_transaction(dev, fccb); 1288 xpt_release_simq(ch->sim, TRUE); 1289 } 1290 /* If we have no other active commands, ... */ 1291 if (ch->rslots == 0) { 1292 /* if there were timeouts or fatal error - reset port. */ 1293 if (ch->toslots != 0 || ch->fatalerr) { 1294 siis_reset(dev); 1295 } else { 1296 /* if we have slots in error, we can reinit port. */ 1297 if (ch->eslots != 0) 1298 siis_portinit(dev); 1299 /* if there commands on hold, we can do READ LOG. */ 1300 if (!ch->readlog && ch->numhslots) 1301 siis_issue_read_log(dev); 1302 } 1303 /* If all the reset of commands are in timeout - abort them. */ 1304 } else if ((ch->rslots & ~ch->toslots) == 0 && 1305 et != SIIS_ERR_TIMEOUT) 1306 siis_rearm_timeout(dev); 1307} 1308 1309static void 1310siis_issue_read_log(device_t dev) 1311{ 1312 struct siis_channel *ch = device_get_softc(dev); 1313 union ccb *ccb; 1314 struct ccb_ataio *ataio; 1315 int i; 1316 1317 /* Find some holden command. */ 1318 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1319 if (ch->hold[i]) 1320 break; 1321 } 1322 if (i == SIIS_MAX_SLOTS) 1323 return; 1324 ch->readlog = 1; 1325 ccb = xpt_alloc_ccb_nowait(); 1326 if (ccb == NULL) { 1327 device_printf(dev, "Unable allocate READ LOG command"); 1328 return; /* XXX */ 1329 } 1330 ccb->ccb_h = ch->hold[i]->ccb_h; /* Reuse old header. */ 1331 ccb->ccb_h.func_code = XPT_ATA_IO; 1332 ccb->ccb_h.flags = CAM_DIR_IN; 1333 ccb->ccb_h.timeout = 1000; /* 1s should be enough. */ 1334 ataio = &ccb->ataio; 1335 ataio->data_ptr = malloc(512, M_SIIS, M_NOWAIT); 1336 if (ataio->data_ptr == NULL) { 1337 device_printf(dev, "Unable allocate memory for READ LOG command"); 1338 return; /* XXX */ 1339 } 1340 ataio->dxfer_len = 512; 1341 bzero(&ataio->cmd, sizeof(ataio->cmd)); 1342 ataio->cmd.flags = CAM_ATAIO_48BIT; 1343 ataio->cmd.command = 0x2F; /* READ LOG EXT */ 1344 ataio->cmd.sector_count = 1; 1345 ataio->cmd.sector_count_exp = 0; 1346 ataio->cmd.lba_low = 0x10; 1347 ataio->cmd.lba_mid = 0; 1348 ataio->cmd.lba_mid_exp = 0; 1349 siis_begin_transaction(dev, ccb); 1350} 1351 1352static void 1353siis_process_read_log(device_t dev, union ccb *ccb) 1354{ 1355 struct siis_channel *ch = device_get_softc(dev); 1356 uint8_t *data; 1357 struct ata_res *res; 1358 int i; 1359 1360 ch->readlog = 0; 1361 data = ccb->ataio.data_ptr; 1362 if ((ccb->ccb_h.status & CAM_STATUS_MASK) == CAM_REQ_CMP && 1363 (data[0] & 0x80) == 0) { 1364 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1365 if (!ch->hold[i]) 1366 continue; 1367 if (ch->hold[i]->ccb_h.target_id != ccb->ccb_h.target_id) 1368 continue; 1369 if ((data[0] & 0x1F) == i) { 1370 res = &ch->hold[i]->ataio.res; 1371 res->status = data[2]; 1372 res->error = data[3]; 1373 res->lba_low = data[4]; 1374 res->lba_mid = data[5]; 1375 res->lba_high = data[6]; 1376 res->device = data[7]; 1377 res->lba_low_exp = data[8]; 1378 res->lba_mid_exp = data[9]; 1379 res->lba_high_exp = data[10]; 1380 res->sector_count = data[12]; 1381 res->sector_count_exp = data[13]; 1382 } else { 1383 ch->hold[i]->ccb_h.status &= ~CAM_STATUS_MASK; 1384 ch->hold[i]->ccb_h.status |= CAM_REQUEUE_REQ; 1385 } 1386 xpt_done(ch->hold[i]); 1387 ch->hold[i] = NULL; 1388 ch->numhslots--; 1389 } 1390 } else { 1391 if ((ccb->ccb_h.status & CAM_STATUS_MASK) != CAM_REQ_CMP) 1392 device_printf(dev, "Error while READ LOG EXT\n"); 1393 else if ((data[0] & 0x80) == 0) { 1394 device_printf(dev, "Non-queued command error in READ LOG EXT\n"); 1395 } 1396 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1397 if (!ch->hold[i]) 1398 continue; 1399 if (ch->hold[i]->ccb_h.target_id != ccb->ccb_h.target_id) 1400 continue; 1401 xpt_done(ch->hold[i]); 1402 ch->hold[i] = NULL; 1403 ch->numhslots--; 1404 } 1405 } 1406 free(ccb->ataio.data_ptr, M_SIIS); 1407 xpt_free_ccb(ccb); 1408} 1409 1410static void 1411siis_portinit(device_t dev) 1412{ 1413 struct siis_channel *ch = device_get_softc(dev); 1414 int i; 1415 1416 ch->eslots = 0; 1417 ch->recovery = 0; 1418 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_RESUME); 1419 for (i = 0; i < 16; i++) { 1420 ATA_OUTL(ch->r_mem, SIIS_P_PMPSTS(i), 0), 1421 ATA_OUTL(ch->r_mem, SIIS_P_PMPQACT(i), 0); 1422 } 1423 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_PORT_INIT); 1424 siis_wait_ready(dev, 1000); 1425} 1426 1427static int 1428siis_devreset(device_t dev) 1429{ 1430 struct siis_channel *ch = device_get_softc(dev); 1431 int timeout = 0; 1432 uint32_t val; 1433 1434 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_DEV_RESET); 1435 while (((val = ATA_INL(ch->r_mem, SIIS_P_STS)) & 1436 SIIS_P_CTL_DEV_RESET) != 0) { 1437 DELAY(1000); 1438 if (timeout++ > 100) { 1439 device_printf(dev, "device reset stuck (timeout %dms) " 1440 "status = %08x\n", timeout, val); 1441 return (EBUSY); 1442 } 1443 } 1444 return (0); 1445} 1446 1447static int 1448siis_wait_ready(device_t dev, int t) 1449{ 1450 struct siis_channel *ch = device_get_softc(dev); 1451 int timeout = 0; 1452 uint32_t val; 1453 1454 while (((val = ATA_INL(ch->r_mem, SIIS_P_STS)) & 1455 SIIS_P_CTL_READY) == 0) { 1456 DELAY(1000); 1457 if (timeout++ > t) { 1458 device_printf(dev, "port is not ready (timeout %dms) " 1459 "status = %08x\n", t, val); 1460 return (EBUSY); 1461 } 1462 } 1463 return (0); 1464} 1465 1466static void 1467siis_reset(device_t dev) 1468{ 1469 struct siis_channel *ch = device_get_softc(dev); 1470 int i, retry = 0, sata_rev; 1471 uint32_t val; 1472 1473 xpt_freeze_simq(ch->sim, 1); 1474 if (bootverbose) 1475 device_printf(dev, "SIIS reset...\n"); 1476 if (!ch->readlog && !ch->recovery) 1477 xpt_freeze_simq(ch->sim, ch->numrslots); 1478 /* Requeue frozen command. */ 1479 if (ch->frozen) { 1480 union ccb *fccb = ch->frozen; 1481 ch->frozen = NULL; 1482 fccb->ccb_h.status &= ~CAM_STATUS_MASK; 1483 fccb->ccb_h.status |= CAM_REQUEUE_REQ | CAM_RELEASE_SIMQ; 1484 if (!(fccb->ccb_h.status & CAM_DEV_QFRZN)) { 1485 xpt_freeze_devq(fccb->ccb_h.path, 1); 1486 fccb->ccb_h.status |= CAM_DEV_QFRZN; 1487 } 1488 xpt_done(fccb); 1489 } 1490 /* Requeue all running commands. */ 1491 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1492 /* Do we have a running request on slot? */ 1493 if (ch->slot[i].state < SIIS_SLOT_RUNNING) 1494 continue; 1495 /* XXX; Commands in loading state. */ 1496 siis_end_transaction(&ch->slot[i], SIIS_ERR_INNOCENT); 1497 } 1498 /* Finish all holden commands as-is. */ 1499 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1500 if (!ch->hold[i]) 1501 continue; 1502 xpt_done(ch->hold[i]); 1503 ch->hold[i] = NULL; 1504 ch->numhslots--; 1505 } 1506 if (ch->toslots != 0) 1507 xpt_release_simq(ch->sim, TRUE); 1508 ch->eslots = 0; 1509 ch->recovery = 0; 1510 ch->toslots = 0; 1511 ch->fatalerr = 0; 1512 /* Disable port interrupts */ 1513 ATA_OUTL(ch->r_mem, SIIS_P_IECLR, 0x0000FFFF); 1514 /* Set speed limit. */ 1515 sata_rev = ch->user[ch->pm_present ? 15 : 0].revision; 1516 if (sata_rev == 1) 1517 val = ATA_SC_SPD_SPEED_GEN1; 1518 else if (sata_rev == 2) 1519 val = ATA_SC_SPD_SPEED_GEN2; 1520 else if (sata_rev == 3) 1521 val = ATA_SC_SPD_SPEED_GEN3; 1522 else 1523 val = 0; 1524 ATA_OUTL(ch->r_mem, SIIS_P_SCTL, 1525 ATA_SC_DET_IDLE | val | ((ch->pm_level > 0) ? 0 : 1526 (ATA_SC_IPM_DIS_PARTIAL | ATA_SC_IPM_DIS_SLUMBER))); 1527retry: 1528 siis_devreset(dev); 1529 /* Reset and reconnect PHY, */ 1530 if (!siis_sata_connect(ch)) { 1531 ch->devices = 0; 1532 /* Enable port interrupts */ 1533 ATA_OUTL(ch->r_mem, SIIS_P_IESET, SIIS_P_IX_ENABLED); 1534 if (bootverbose) 1535 device_printf(dev, 1536 "SIIS reset done: phy reset found no device\n"); 1537 /* Tell the XPT about the event */ 1538 xpt_async(AC_BUS_RESET, ch->path, NULL); 1539 xpt_release_simq(ch->sim, TRUE); 1540 return; 1541 } 1542 /* Wait for clearing busy status. */ 1543 if (siis_wait_ready(dev, 10000)) { 1544 device_printf(dev, "device ready timeout\n"); 1545 if (!retry) { 1546 device_printf(dev, "trying full port reset ...\n"); 1547 /* Get port to the reset state. */ 1548 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_PORT_RESET); 1549 DELAY(10000); 1550 /* Get port out of reset state. */ 1551 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_PORT_RESET); 1552 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_32BIT); 1553 if (ch->pm_present) 1554 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_PME); 1555 else 1556 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_PME); 1557 siis_wait_ready(dev, 5000); 1558 retry = 1; 1559 goto retry; 1560 } 1561 } 1562 ch->devices = 1; 1563 /* Enable port interrupts */ 1564 ATA_OUTL(ch->r_mem, SIIS_P_IS, 0xFFFFFFFF); 1565 ATA_OUTL(ch->r_mem, SIIS_P_IESET, SIIS_P_IX_ENABLED); 1566 if (bootverbose) 1567 device_printf(dev, "SIIS reset done: devices=%08x\n", ch->devices); 1568 /* Tell the XPT about the event */ 1569 xpt_async(AC_BUS_RESET, ch->path, NULL); 1570 xpt_release_simq(ch->sim, TRUE); 1571} 1572 1573static int 1574siis_setup_fis(device_t dev, struct siis_cmd *ctp, union ccb *ccb, int tag) 1575{ 1576 struct siis_channel *ch = device_get_softc(dev); 1577 u_int8_t *fis = &ctp->fis[0]; 1578 1579 bzero(fis, 24); 1580 fis[0] = 0x27; /* host to device */ 1581 fis[1] = (ccb->ccb_h.target_id & 0x0f); 1582 if (ccb->ccb_h.func_code == XPT_SCSI_IO) { 1583 fis[1] |= 0x80; 1584 fis[2] = ATA_PACKET_CMD; 1585 if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE && 1586 ch->curr[ccb->ccb_h.target_id].mode >= ATA_DMA) 1587 fis[3] = ATA_F_DMA; 1588 else { 1589 fis[5] = ccb->csio.dxfer_len; 1590 fis[6] = ccb->csio.dxfer_len >> 8; 1591 } 1592 fis[7] = ATA_D_LBA; 1593 fis[15] = ATA_A_4BIT; 1594 bzero(ctp->u.atapi.ccb, 16); 1595 bcopy((ccb->ccb_h.flags & CAM_CDB_POINTER) ? 1596 ccb->csio.cdb_io.cdb_ptr : ccb->csio.cdb_io.cdb_bytes, 1597 ctp->u.atapi.ccb, ccb->csio.cdb_len); 1598 } else if ((ccb->ataio.cmd.flags & CAM_ATAIO_CONTROL) == 0) { 1599 fis[1] |= 0x80; 1600 fis[2] = ccb->ataio.cmd.command; 1601 fis[3] = ccb->ataio.cmd.features; 1602 fis[4] = ccb->ataio.cmd.lba_low; 1603 fis[5] = ccb->ataio.cmd.lba_mid; 1604 fis[6] = ccb->ataio.cmd.lba_high; 1605 fis[7] = ccb->ataio.cmd.device; 1606 fis[8] = ccb->ataio.cmd.lba_low_exp; 1607 fis[9] = ccb->ataio.cmd.lba_mid_exp; 1608 fis[10] = ccb->ataio.cmd.lba_high_exp; 1609 fis[11] = ccb->ataio.cmd.features_exp; 1610 if (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA) { 1611 fis[12] = tag << 3; 1612 fis[13] = 0; 1613 } else { 1614 fis[12] = ccb->ataio.cmd.sector_count; 1615 fis[13] = ccb->ataio.cmd.sector_count_exp; 1616 } 1617 fis[15] = ATA_A_4BIT; 1618 } else { 1619 /* Soft reset. */ 1620 } 1621 return (20); 1622} 1623 1624static int 1625siis_sata_connect(struct siis_channel *ch) 1626{ 1627 u_int32_t status; 1628 int timeout; 1629 1630 /* Wait up to 100ms for "connect well" */ 1631 for (timeout = 0; timeout < 100 ; timeout++) { 1632 status = ATA_INL(ch->r_mem, SIIS_P_SSTS); 1633 if (((status & ATA_SS_DET_MASK) == ATA_SS_DET_PHY_ONLINE) && 1634 ((status & ATA_SS_SPD_MASK) != ATA_SS_SPD_NO_SPEED) && 1635 ((status & ATA_SS_IPM_MASK) == ATA_SS_IPM_ACTIVE)) 1636 break; 1637 DELAY(1000); 1638 } 1639 if (timeout >= 100) { 1640 if (bootverbose) { 1641 device_printf(ch->dev, "SATA connect timeout status=%08x\n", 1642 status); 1643 } 1644 return (0); 1645 } 1646 if (bootverbose) { 1647 device_printf(ch->dev, "SATA connect time=%dms status=%08x\n", 1648 timeout, status); 1649 } 1650 /* Clear SATA error register */ 1651 ATA_OUTL(ch->r_mem, SIIS_P_SERR, 0xffffffff); 1652 return (1); 1653} 1654 1655static int 1656siis_check_ids(device_t dev, union ccb *ccb) 1657{ 1658 1659 if (ccb->ccb_h.target_id > 15) { 1660 ccb->ccb_h.status = CAM_TID_INVALID; 1661 xpt_done(ccb); 1662 return (-1); 1663 } 1664 if (ccb->ccb_h.target_lun != 0) { 1665 ccb->ccb_h.status = CAM_LUN_INVALID; 1666 xpt_done(ccb); 1667 return (-1); 1668 } 1669 return (0); 1670} 1671 1672static void 1673siisaction(struct cam_sim *sim, union ccb *ccb) 1674{ 1675 device_t dev; 1676 struct siis_channel *ch; 1677 1678 CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_TRACE, ("siisaction func_code=%x\n", 1679 ccb->ccb_h.func_code)); 1680 1681 ch = (struct siis_channel *)cam_sim_softc(sim); 1682 dev = ch->dev; 1683 mtx_assert(&ch->mtx, MA_OWNED); 1684 switch (ccb->ccb_h.func_code) { 1685 /* Common cases first */ 1686 case XPT_ATA_IO: /* Execute the requested I/O operation */ 1687 case XPT_SCSI_IO: 1688 if (siis_check_ids(dev, ccb)) 1689 return; 1690 if (ch->devices == 0 || 1691 (ch->pm_present == 0 && 1692 ccb->ccb_h.target_id > 0 && ccb->ccb_h.target_id < 15)) { 1693 ccb->ccb_h.status = CAM_SEL_TIMEOUT; 1694 break; 1695 } 1696 /* Check for command collision. */ 1697 if (siis_check_collision(dev, ccb)) { 1698 /* Freeze command. */ 1699 ch->frozen = ccb; 1700 /* We have only one frozen slot, so freeze simq also. */ 1701 xpt_freeze_simq(ch->sim, 1); 1702 return; 1703 } 1704 siis_begin_transaction(dev, ccb); 1705 return; 1706 case XPT_EN_LUN: /* Enable LUN as a target */ 1707 case XPT_TARGET_IO: /* Execute target I/O request */ 1708 case XPT_ACCEPT_TARGET_IO: /* Accept Host Target Mode CDB */ 1709 case XPT_CONT_TARGET_IO: /* Continue Host Target I/O Connection*/ 1710 case XPT_ABORT: /* Abort the specified CCB */ 1711 /* XXX Implement */ 1712 ccb->ccb_h.status = CAM_REQ_INVALID; 1713 break; 1714 case XPT_SET_TRAN_SETTINGS: 1715 { 1716 struct ccb_trans_settings *cts = &ccb->cts; 1717 struct siis_device *d; 1718 1719 if (siis_check_ids(dev, ccb)) 1720 return; 1721 if (cts->type == CTS_TYPE_CURRENT_SETTINGS) 1722 d = &ch->curr[ccb->ccb_h.target_id]; 1723 else 1724 d = &ch->user[ccb->ccb_h.target_id]; 1725 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_REVISION) 1726 d->revision = cts->xport_specific.sata.revision; 1727 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_MODE) 1728 d->mode = cts->xport_specific.sata.mode; 1729 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_BYTECOUNT) 1730 d->bytecount = min(8192, cts->xport_specific.sata.bytecount); 1731 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_TAGS) 1732 d->tags = min(SIIS_MAX_SLOTS, cts->xport_specific.sata.tags); 1733 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_PM) { 1734 ch->pm_present = cts->xport_specific.sata.pm_present; 1735 if (ch->pm_present) 1736 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_PME); 1737 else 1738 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_PME); 1739 } 1740 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_TAGS) 1741 d->atapi = cts->xport_specific.sata.atapi; 1742 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_CAPS) 1743 d->caps = cts->xport_specific.sata.caps; 1744 ccb->ccb_h.status = CAM_REQ_CMP; 1745 break; 1746 } 1747 case XPT_GET_TRAN_SETTINGS: 1748 /* Get default/user set transfer settings for the target */ 1749 { 1750 struct ccb_trans_settings *cts = &ccb->cts; 1751 struct siis_device *d; 1752 uint32_t status; 1753 1754 if (siis_check_ids(dev, ccb)) 1755 return; 1756 if (cts->type == CTS_TYPE_CURRENT_SETTINGS) 1757 d = &ch->curr[ccb->ccb_h.target_id]; 1758 else 1759 d = &ch->user[ccb->ccb_h.target_id]; 1760 cts->protocol = PROTO_ATA; 1761 cts->protocol_version = PROTO_VERSION_UNSPECIFIED; 1762 cts->transport = XPORT_SATA; 1763 cts->transport_version = XPORT_VERSION_UNSPECIFIED; 1764 cts->proto_specific.valid = 0; 1765 cts->xport_specific.sata.valid = 0; 1766 if (cts->type == CTS_TYPE_CURRENT_SETTINGS && 1767 (ccb->ccb_h.target_id == 15 || 1768 (ccb->ccb_h.target_id == 0 && !ch->pm_present))) { 1769 status = ATA_INL(ch->r_mem, SIIS_P_SSTS) & ATA_SS_SPD_MASK; 1770 if (status & 0x0f0) { 1771 cts->xport_specific.sata.revision = 1772 (status & 0x0f0) >> 4; 1773 cts->xport_specific.sata.valid |= 1774 CTS_SATA_VALID_REVISION; 1775 } 1776 cts->xport_specific.sata.caps = d->caps & CTS_SATA_CAPS_D; 1777 if (ch->pm_level) 1778 cts->xport_specific.sata.caps |= CTS_SATA_CAPS_H_PMREQ; 1779 cts->xport_specific.sata.caps &= 1780 ch->user[ccb->ccb_h.target_id].caps; 1781 cts->xport_specific.sata.valid |= CTS_SATA_VALID_CAPS; 1782 } else { 1783 cts->xport_specific.sata.revision = d->revision; 1784 cts->xport_specific.sata.valid |= CTS_SATA_VALID_REVISION; 1785 cts->xport_specific.sata.caps = d->caps; 1786 cts->xport_specific.sata.valid |= CTS_SATA_VALID_CAPS; 1787 } 1788 cts->xport_specific.sata.mode = d->mode; 1789 cts->xport_specific.sata.valid |= CTS_SATA_VALID_MODE; 1790 cts->xport_specific.sata.bytecount = d->bytecount; 1791 cts->xport_specific.sata.valid |= CTS_SATA_VALID_BYTECOUNT; 1792 cts->xport_specific.sata.pm_present = ch->pm_present; 1793 cts->xport_specific.sata.valid |= CTS_SATA_VALID_PM; 1794 cts->xport_specific.sata.tags = d->tags; 1795 cts->xport_specific.sata.valid |= CTS_SATA_VALID_TAGS; 1796 cts->xport_specific.sata.atapi = d->atapi; 1797 cts->xport_specific.sata.valid |= CTS_SATA_VALID_ATAPI; 1798 ccb->ccb_h.status = CAM_REQ_CMP; 1799 break; 1800 } 1801 case XPT_RESET_BUS: /* Reset the specified SCSI bus */ 1802 case XPT_RESET_DEV: /* Bus Device Reset the specified SCSI device */ 1803 siis_reset(dev); 1804 ccb->ccb_h.status = CAM_REQ_CMP; 1805 break; 1806 case XPT_TERM_IO: /* Terminate the I/O process */ 1807 /* XXX Implement */ 1808 ccb->ccb_h.status = CAM_REQ_INVALID; 1809 break; 1810 case XPT_PATH_INQ: /* Path routing inquiry */ 1811 { 1812 struct ccb_pathinq *cpi = &ccb->cpi; 1813 1814 cpi->version_num = 1; /* XXX??? */ 1815 cpi->hba_inquiry = PI_SDTR_ABLE | PI_TAG_ABLE; 1816 cpi->hba_inquiry |= PI_SATAPM; 1817 cpi->target_sprt = 0; 1818 cpi->hba_misc = PIM_SEQSCAN; 1819 cpi->hba_eng_cnt = 0; 1820 cpi->max_target = 15; 1821 cpi->max_lun = 0; 1822 cpi->initiator_id = 0; 1823 cpi->bus_id = cam_sim_bus(sim); 1824 cpi->base_transfer_speed = 150000; 1825 strncpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN); 1826 strncpy(cpi->hba_vid, "SIIS", HBA_IDLEN); 1827 strncpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN); 1828 cpi->unit_number = cam_sim_unit(sim); 1829 cpi->transport = XPORT_SATA; 1830 cpi->transport_version = XPORT_VERSION_UNSPECIFIED; 1831 cpi->protocol = PROTO_ATA; 1832 cpi->protocol_version = PROTO_VERSION_UNSPECIFIED; 1833 cpi->ccb_h.status = CAM_REQ_CMP; 1834 cpi->maxio = MAXPHYS; 1835 break; 1836 } 1837 default: 1838 ccb->ccb_h.status = CAM_REQ_INVALID; 1839 break; 1840 } 1841 xpt_done(ccb); 1842} 1843 1844static void 1845siispoll(struct cam_sim *sim) 1846{ 1847 struct siis_channel *ch = (struct siis_channel *)cam_sim_softc(sim); 1848 1849 siis_ch_intr(ch->dev); 1850} 1851