siis.c revision 208393
1/*- 2 * Copyright (c) 2009 Alexander Motin <mav@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer, 10 * without modification, immediately at the beginning of the file. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 */ 26 27#include <sys/cdefs.h> 28__FBSDID("$FreeBSD: head/sys/dev/siis/siis.c 208393 2010-05-21 17:26:16Z mav $"); 29 30#include <sys/param.h> 31#include <sys/module.h> 32#include <sys/systm.h> 33#include <sys/kernel.h> 34#include <sys/ata.h> 35#include <sys/bus.h> 36#include <sys/endian.h> 37#include <sys/malloc.h> 38#include <sys/lock.h> 39#include <sys/mutex.h> 40#include <sys/sema.h> 41#include <sys/taskqueue.h> 42#include <vm/uma.h> 43#include <machine/stdarg.h> 44#include <machine/resource.h> 45#include <machine/bus.h> 46#include <sys/rman.h> 47#include <dev/pci/pcivar.h> 48#include <dev/pci/pcireg.h> 49#include "siis.h" 50 51#include <cam/cam.h> 52#include <cam/cam_ccb.h> 53#include <cam/cam_sim.h> 54#include <cam/cam_xpt_sim.h> 55#include <cam/cam_debug.h> 56 57/* local prototypes */ 58static int siis_setup_interrupt(device_t dev); 59static void siis_intr(void *data); 60static int siis_suspend(device_t dev); 61static int siis_resume(device_t dev); 62static int siis_ch_init(device_t dev); 63static int siis_ch_deinit(device_t dev); 64static int siis_ch_suspend(device_t dev); 65static int siis_ch_resume(device_t dev); 66static void siis_ch_intr_locked(void *data); 67static void siis_ch_intr(void *data); 68static void siis_begin_transaction(device_t dev, union ccb *ccb); 69static void siis_dmasetprd(void *arg, bus_dma_segment_t *segs, int nsegs, int error); 70static void siis_execute_transaction(struct siis_slot *slot); 71static void siis_timeout(struct siis_slot *slot); 72static void siis_end_transaction(struct siis_slot *slot, enum siis_err_type et); 73static int siis_setup_fis(device_t dev, struct siis_cmd *ctp, union ccb *ccb, int tag); 74static void siis_dmainit(device_t dev); 75static void siis_dmasetupc_cb(void *xsc, bus_dma_segment_t *segs, int nsegs, int error); 76static void siis_dmafini(device_t dev); 77static void siis_slotsalloc(device_t dev); 78static void siis_slotsfree(device_t dev); 79static void siis_reset(device_t dev); 80static void siis_portinit(device_t dev); 81static int siis_wait_ready(device_t dev, int t); 82 83static int siis_sata_connect(struct siis_channel *ch); 84 85static void siis_issue_read_log(device_t dev); 86static void siis_process_read_log(device_t dev, union ccb *ccb); 87 88static void siisaction(struct cam_sim *sim, union ccb *ccb); 89static void siispoll(struct cam_sim *sim); 90 91MALLOC_DEFINE(M_SIIS, "SIIS driver", "SIIS driver data buffers"); 92 93static struct { 94 uint32_t id; 95 const char *name; 96 int ports; 97 int quirks; 98#define SIIS_Q_SNTF 1 99#define SIIS_Q_NOMSI 2 100} siis_ids[] = { 101 {0x31241095, "SiI3124", 4, 0}, 102 {0x31248086, "SiI3124", 4, 0}, 103 {0x31321095, "SiI3132", 2, SIIS_Q_SNTF|SIIS_Q_NOMSI}, 104 {0x02421095, "SiI3132", 2, SIIS_Q_SNTF|SIIS_Q_NOMSI}, 105 {0x02441095, "SiI3132", 2, SIIS_Q_SNTF|SIIS_Q_NOMSI}, 106 {0x31311095, "SiI3131", 1, SIIS_Q_SNTF|SIIS_Q_NOMSI}, 107 {0x35311095, "SiI3531", 1, SIIS_Q_SNTF|SIIS_Q_NOMSI}, 108 {0, NULL, 0, 0} 109}; 110 111static int 112siis_probe(device_t dev) 113{ 114 char buf[64]; 115 int i; 116 uint32_t devid = pci_get_devid(dev); 117 118 for (i = 0; siis_ids[i].id != 0; i++) { 119 if (siis_ids[i].id == devid) { 120 snprintf(buf, sizeof(buf), "%s SATA controller", 121 siis_ids[i].name); 122 device_set_desc_copy(dev, buf); 123 return (BUS_PROBE_VENDOR); 124 } 125 } 126 return (ENXIO); 127} 128 129static int 130siis_attach(device_t dev) 131{ 132 struct siis_controller *ctlr = device_get_softc(dev); 133 uint32_t devid = pci_get_devid(dev); 134 device_t child; 135 int error, i, unit; 136 137 ctlr->dev = dev; 138 for (i = 0; siis_ids[i].id != 0; i++) { 139 if (siis_ids[i].id == devid) 140 break; 141 } 142 ctlr->quirks = siis_ids[i].quirks; 143 /* Global memory */ 144 ctlr->r_grid = PCIR_BAR(0); 145 if (!(ctlr->r_gmem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 146 &ctlr->r_grid, RF_ACTIVE))) 147 return (ENXIO); 148 ctlr->gctl = ATA_INL(ctlr->r_gmem, SIIS_GCTL); 149 /* Channels memory */ 150 ctlr->r_rid = PCIR_BAR(2); 151 if (!(ctlr->r_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 152 &ctlr->r_rid, RF_ACTIVE))) 153 return (ENXIO); 154 /* Setup our own memory management for channels. */ 155 ctlr->sc_iomem.rm_type = RMAN_ARRAY; 156 ctlr->sc_iomem.rm_descr = "I/O memory addresses"; 157 if ((error = rman_init(&ctlr->sc_iomem)) != 0) { 158 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 159 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_grid, ctlr->r_gmem); 160 return (error); 161 } 162 if ((error = rman_manage_region(&ctlr->sc_iomem, 163 rman_get_start(ctlr->r_mem), rman_get_end(ctlr->r_mem))) != 0) { 164 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 165 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_grid, ctlr->r_gmem); 166 rman_fini(&ctlr->sc_iomem); 167 return (error); 168 } 169 pci_enable_busmaster(dev); 170 /* Reset controller */ 171 siis_resume(dev); 172 /* Number of HW channels */ 173 ctlr->channels = siis_ids[i].ports; 174 /* Setup interrupts. */ 175 if (siis_setup_interrupt(dev)) { 176 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 177 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_grid, ctlr->r_gmem); 178 rman_fini(&ctlr->sc_iomem); 179 return ENXIO; 180 } 181 /* Attach all channels on this controller */ 182 for (unit = 0; unit < ctlr->channels; unit++) { 183 child = device_add_child(dev, "siisch", -1); 184 if (child == NULL) 185 device_printf(dev, "failed to add channel device\n"); 186 else 187 device_set_ivars(child, (void *)(intptr_t)unit); 188 } 189 bus_generic_attach(dev); 190 return 0; 191} 192 193static int 194siis_detach(device_t dev) 195{ 196 struct siis_controller *ctlr = device_get_softc(dev); 197 device_t *children; 198 int nchildren, i; 199 200 /* Detach & delete all children */ 201 if (!device_get_children(dev, &children, &nchildren)) { 202 for (i = 0; i < nchildren; i++) 203 device_delete_child(dev, children[i]); 204 free(children, M_TEMP); 205 } 206 /* Free interrupts. */ 207 if (ctlr->irq.r_irq) { 208 bus_teardown_intr(dev, ctlr->irq.r_irq, 209 ctlr->irq.handle); 210 bus_release_resource(dev, SYS_RES_IRQ, 211 ctlr->irq.r_irq_rid, ctlr->irq.r_irq); 212 } 213 pci_release_msi(dev); 214 /* Free memory. */ 215 rman_fini(&ctlr->sc_iomem); 216 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 217 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_grid, ctlr->r_gmem); 218 return (0); 219} 220 221static int 222siis_suspend(device_t dev) 223{ 224 struct siis_controller *ctlr = device_get_softc(dev); 225 226 bus_generic_suspend(dev); 227 /* Put controller into reset state. */ 228 ctlr->gctl |= SIIS_GCTL_GRESET; 229 ATA_OUTL(ctlr->r_gmem, SIIS_GCTL, ctlr->gctl); 230 return 0; 231} 232 233static int 234siis_resume(device_t dev) 235{ 236 struct siis_controller *ctlr = device_get_softc(dev); 237 238 /* Set PCIe max read request size to at least 1024 bytes */ 239 if (pci_get_max_read_req(dev) < 1024) 240 pci_set_max_read_req(dev, 1024); 241 /* Put controller into reset state. */ 242 ctlr->gctl |= SIIS_GCTL_GRESET; 243 ATA_OUTL(ctlr->r_gmem, SIIS_GCTL, ctlr->gctl); 244 DELAY(10000); 245 /* Get controller out of reset state and enable port interrupts. */ 246 ctlr->gctl &= ~(SIIS_GCTL_GRESET | SIIS_GCTL_I2C_IE); 247 ctlr->gctl |= 0x0000000f; 248 ATA_OUTL(ctlr->r_gmem, SIIS_GCTL, ctlr->gctl); 249 return (bus_generic_resume(dev)); 250} 251 252static int 253siis_setup_interrupt(device_t dev) 254{ 255 struct siis_controller *ctlr = device_get_softc(dev); 256 int msi = ctlr->quirks & SIIS_Q_NOMSI ? 0 : 1; 257 258 /* Process hints. */ 259 resource_int_value(device_get_name(dev), 260 device_get_unit(dev), "msi", &msi); 261 if (msi < 0) 262 msi = 0; 263 else if (msi > 0) 264 msi = min(1, pci_msi_count(dev)); 265 /* Allocate MSI if needed/present. */ 266 if (msi && pci_alloc_msi(dev, &msi) != 0) 267 msi = 0; 268 /* Allocate all IRQs. */ 269 ctlr->irq.r_irq_rid = msi ? 1 : 0; 270 if (!(ctlr->irq.r_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, 271 &ctlr->irq.r_irq_rid, RF_SHAREABLE | RF_ACTIVE))) { 272 device_printf(dev, "unable to map interrupt\n"); 273 return ENXIO; 274 } 275 if ((bus_setup_intr(dev, ctlr->irq.r_irq, ATA_INTR_FLAGS, NULL, 276 siis_intr, ctlr, &ctlr->irq.handle))) { 277 /* SOS XXX release r_irq */ 278 device_printf(dev, "unable to setup interrupt\n"); 279 return ENXIO; 280 } 281 return (0); 282} 283 284/* 285 * Common case interrupt handler. 286 */ 287static void 288siis_intr(void *data) 289{ 290 struct siis_controller *ctlr = (struct siis_controller *)data; 291 u_int32_t is; 292 void *arg; 293 int unit; 294 295 is = ATA_INL(ctlr->r_gmem, SIIS_IS); 296 for (unit = 0; unit < ctlr->channels; unit++) { 297 if ((is & SIIS_IS_PORT(unit)) != 0 && 298 (arg = ctlr->interrupt[unit].argument)) { 299 ctlr->interrupt[unit].function(arg); 300 } 301 } 302 /* Acknowledge interrupt, if MSI enabled. */ 303 if (ctlr->irq.r_irq_rid) { 304 ATA_OUTL(ctlr->r_gmem, SIIS_GCTL, 305 ctlr->gctl | SIIS_GCTL_MSIACK); 306 } 307} 308 309static struct resource * 310siis_alloc_resource(device_t dev, device_t child, int type, int *rid, 311 u_long start, u_long end, u_long count, u_int flags) 312{ 313 struct siis_controller *ctlr = device_get_softc(dev); 314 int unit = ((struct siis_channel *)device_get_softc(child))->unit; 315 struct resource *res = NULL; 316 int offset = unit << 13; 317 long st; 318 319 switch (type) { 320 case SYS_RES_MEMORY: 321 st = rman_get_start(ctlr->r_mem); 322 res = rman_reserve_resource(&ctlr->sc_iomem, st + offset, 323 st + offset + 0x2000, 0x2000, RF_ACTIVE, child); 324 if (res) { 325 bus_space_handle_t bsh; 326 bus_space_tag_t bst; 327 bsh = rman_get_bushandle(ctlr->r_mem); 328 bst = rman_get_bustag(ctlr->r_mem); 329 bus_space_subregion(bst, bsh, offset, 0x2000, &bsh); 330 rman_set_bushandle(res, bsh); 331 rman_set_bustag(res, bst); 332 } 333 break; 334 case SYS_RES_IRQ: 335 if (*rid == ATA_IRQ_RID) 336 res = ctlr->irq.r_irq; 337 break; 338 } 339 return (res); 340} 341 342static int 343siis_release_resource(device_t dev, device_t child, int type, int rid, 344 struct resource *r) 345{ 346 347 switch (type) { 348 case SYS_RES_MEMORY: 349 rman_release_resource(r); 350 return (0); 351 case SYS_RES_IRQ: 352 if (rid != ATA_IRQ_RID) 353 return ENOENT; 354 return (0); 355 } 356 return (EINVAL); 357} 358 359static int 360siis_setup_intr(device_t dev, device_t child, struct resource *irq, 361 int flags, driver_filter_t *filter, driver_intr_t *function, 362 void *argument, void **cookiep) 363{ 364 struct siis_controller *ctlr = device_get_softc(dev); 365 int unit = (intptr_t)device_get_ivars(child); 366 367 if (filter != NULL) { 368 printf("siis.c: we cannot use a filter here\n"); 369 return (EINVAL); 370 } 371 ctlr->interrupt[unit].function = function; 372 ctlr->interrupt[unit].argument = argument; 373 return (0); 374} 375 376static int 377siis_teardown_intr(device_t dev, device_t child, struct resource *irq, 378 void *cookie) 379{ 380 struct siis_controller *ctlr = device_get_softc(dev); 381 int unit = (intptr_t)device_get_ivars(child); 382 383 ctlr->interrupt[unit].function = NULL; 384 ctlr->interrupt[unit].argument = NULL; 385 return (0); 386} 387 388static int 389siis_print_child(device_t dev, device_t child) 390{ 391 int retval; 392 393 retval = bus_print_child_header(dev, child); 394 retval += printf(" at channel %d", 395 (int)(intptr_t)device_get_ivars(child)); 396 retval += bus_print_child_footer(dev, child); 397 398 return (retval); 399} 400 401devclass_t siis_devclass; 402static device_method_t siis_methods[] = { 403 DEVMETHOD(device_probe, siis_probe), 404 DEVMETHOD(device_attach, siis_attach), 405 DEVMETHOD(device_detach, siis_detach), 406 DEVMETHOD(device_suspend, siis_suspend), 407 DEVMETHOD(device_resume, siis_resume), 408 DEVMETHOD(bus_print_child, siis_print_child), 409 DEVMETHOD(bus_alloc_resource, siis_alloc_resource), 410 DEVMETHOD(bus_release_resource, siis_release_resource), 411 DEVMETHOD(bus_setup_intr, siis_setup_intr), 412 DEVMETHOD(bus_teardown_intr,siis_teardown_intr), 413 { 0, 0 } 414}; 415static driver_t siis_driver = { 416 "siis", 417 siis_methods, 418 sizeof(struct siis_controller) 419}; 420DRIVER_MODULE(siis, pci, siis_driver, siis_devclass, 0, 0); 421MODULE_VERSION(siis, 1); 422MODULE_DEPEND(siis, cam, 1, 1, 1); 423 424static int 425siis_ch_probe(device_t dev) 426{ 427 428 device_set_desc_copy(dev, "SIIS channel"); 429 return (0); 430} 431 432static int 433siis_ch_attach(device_t dev) 434{ 435 struct siis_controller *ctlr = device_get_softc(device_get_parent(dev)); 436 struct siis_channel *ch = device_get_softc(dev); 437 struct cam_devq *devq; 438 int rid, error, i, sata_rev = 0; 439 440 ch->dev = dev; 441 ch->unit = (intptr_t)device_get_ivars(dev); 442 ch->quirks = ctlr->quirks; 443 resource_int_value(device_get_name(dev), 444 device_get_unit(dev), "pm_level", &ch->pm_level); 445 resource_int_value(device_get_name(dev), 446 device_get_unit(dev), "sata_rev", &sata_rev); 447 for (i = 0; i < 16; i++) { 448 ch->user[i].revision = sata_rev; 449 ch->user[i].mode = 0; 450 ch->user[i].bytecount = 8192; 451 ch->user[i].tags = SIIS_MAX_SLOTS; 452 ch->curr[i] = ch->user[i]; 453 if (ch->pm_level) 454 ch->user[i].caps = CTS_SATA_CAPS_H_PMREQ; 455 } 456 mtx_init(&ch->mtx, "SIIS channel lock", NULL, MTX_DEF); 457 rid = ch->unit; 458 if (!(ch->r_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 459 &rid, RF_ACTIVE))) 460 return (ENXIO); 461 siis_dmainit(dev); 462 siis_slotsalloc(dev); 463 siis_ch_init(dev); 464 mtx_lock(&ch->mtx); 465 rid = ATA_IRQ_RID; 466 if (!(ch->r_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, 467 &rid, RF_SHAREABLE | RF_ACTIVE))) { 468 bus_release_resource(dev, SYS_RES_MEMORY, ch->unit, ch->r_mem); 469 device_printf(dev, "Unable to map interrupt\n"); 470 return (ENXIO); 471 } 472 if ((bus_setup_intr(dev, ch->r_irq, ATA_INTR_FLAGS, NULL, 473 siis_ch_intr_locked, dev, &ch->ih))) { 474 device_printf(dev, "Unable to setup interrupt\n"); 475 error = ENXIO; 476 goto err1; 477 } 478 /* Create the device queue for our SIM. */ 479 devq = cam_simq_alloc(SIIS_MAX_SLOTS); 480 if (devq == NULL) { 481 device_printf(dev, "Unable to allocate simq\n"); 482 error = ENOMEM; 483 goto err1; 484 } 485 /* Construct SIM entry */ 486 ch->sim = cam_sim_alloc(siisaction, siispoll, "siisch", ch, 487 device_get_unit(dev), &ch->mtx, 2, SIIS_MAX_SLOTS, devq); 488 if (ch->sim == NULL) { 489 device_printf(dev, "unable to allocate sim\n"); 490 error = ENOMEM; 491 goto err2; 492 } 493 if (xpt_bus_register(ch->sim, dev, 0) != CAM_SUCCESS) { 494 device_printf(dev, "unable to register xpt bus\n"); 495 error = ENXIO; 496 goto err2; 497 } 498 if (xpt_create_path(&ch->path, /*periph*/NULL, cam_sim_path(ch->sim), 499 CAM_TARGET_WILDCARD, CAM_LUN_WILDCARD) != CAM_REQ_CMP) { 500 device_printf(dev, "unable to create path\n"); 501 error = ENXIO; 502 goto err3; 503 } 504 mtx_unlock(&ch->mtx); 505 return (0); 506 507err3: 508 xpt_bus_deregister(cam_sim_path(ch->sim)); 509err2: 510 cam_sim_free(ch->sim, /*free_devq*/TRUE); 511err1: 512 bus_release_resource(dev, SYS_RES_IRQ, ATA_IRQ_RID, ch->r_irq); 513 bus_release_resource(dev, SYS_RES_MEMORY, ch->unit, ch->r_mem); 514 mtx_unlock(&ch->mtx); 515 return (error); 516} 517 518static int 519siis_ch_detach(device_t dev) 520{ 521 struct siis_channel *ch = device_get_softc(dev); 522 523 mtx_lock(&ch->mtx); 524 xpt_async(AC_LOST_DEVICE, ch->path, NULL); 525 xpt_free_path(ch->path); 526 xpt_bus_deregister(cam_sim_path(ch->sim)); 527 cam_sim_free(ch->sim, /*free_devq*/TRUE); 528 mtx_unlock(&ch->mtx); 529 530 bus_teardown_intr(dev, ch->r_irq, ch->ih); 531 bus_release_resource(dev, SYS_RES_IRQ, ATA_IRQ_RID, ch->r_irq); 532 533 siis_ch_deinit(dev); 534 siis_slotsfree(dev); 535 siis_dmafini(dev); 536 537 bus_release_resource(dev, SYS_RES_MEMORY, ch->unit, ch->r_mem); 538 mtx_destroy(&ch->mtx); 539 return (0); 540} 541 542static int 543siis_ch_init(device_t dev) 544{ 545 struct siis_channel *ch = device_get_softc(dev); 546 547 /* Get port out of reset state. */ 548 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_PORT_RESET); 549 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_32BIT); 550 if (ch->pm_present) 551 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_PME); 552 else 553 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_PME); 554 /* Enable port interrupts */ 555 ATA_OUTL(ch->r_mem, SIIS_P_IESET, SIIS_P_IX_ENABLED); 556 return (0); 557} 558 559static int 560siis_ch_deinit(device_t dev) 561{ 562 struct siis_channel *ch = device_get_softc(dev); 563 564 /* Put port into reset state. */ 565 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_PORT_RESET); 566 return (0); 567} 568 569static int 570siis_ch_suspend(device_t dev) 571{ 572 struct siis_channel *ch = device_get_softc(dev); 573 574 mtx_lock(&ch->mtx); 575 xpt_freeze_simq(ch->sim, 1); 576 while (ch->oslots) 577 msleep(ch, &ch->mtx, PRIBIO, "siissusp", hz/100); 578 siis_ch_deinit(dev); 579 mtx_unlock(&ch->mtx); 580 return (0); 581} 582 583static int 584siis_ch_resume(device_t dev) 585{ 586 struct siis_channel *ch = device_get_softc(dev); 587 588 mtx_lock(&ch->mtx); 589 siis_ch_init(dev); 590 siis_reset(dev); 591 xpt_release_simq(ch->sim, TRUE); 592 mtx_unlock(&ch->mtx); 593 return (0); 594} 595 596devclass_t siisch_devclass; 597static device_method_t siisch_methods[] = { 598 DEVMETHOD(device_probe, siis_ch_probe), 599 DEVMETHOD(device_attach, siis_ch_attach), 600 DEVMETHOD(device_detach, siis_ch_detach), 601 DEVMETHOD(device_suspend, siis_ch_suspend), 602 DEVMETHOD(device_resume, siis_ch_resume), 603 { 0, 0 } 604}; 605static driver_t siisch_driver = { 606 "siisch", 607 siisch_methods, 608 sizeof(struct siis_channel) 609}; 610DRIVER_MODULE(siisch, siis, siisch_driver, siis_devclass, 0, 0); 611 612struct siis_dc_cb_args { 613 bus_addr_t maddr; 614 int error; 615}; 616 617static void 618siis_dmainit(device_t dev) 619{ 620 struct siis_channel *ch = device_get_softc(dev); 621 struct siis_dc_cb_args dcba; 622 623 /* Command area. */ 624 if (bus_dma_tag_create(bus_get_dma_tag(dev), 1024, 0, 625 BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, 626 NULL, NULL, SIIS_WORK_SIZE, 1, SIIS_WORK_SIZE, 627 0, NULL, NULL, &ch->dma.work_tag)) 628 goto error; 629 if (bus_dmamem_alloc(ch->dma.work_tag, (void **)&ch->dma.work, 0, 630 &ch->dma.work_map)) 631 goto error; 632 if (bus_dmamap_load(ch->dma.work_tag, ch->dma.work_map, ch->dma.work, 633 SIIS_WORK_SIZE, siis_dmasetupc_cb, &dcba, 0) || dcba.error) { 634 bus_dmamem_free(ch->dma.work_tag, ch->dma.work, ch->dma.work_map); 635 goto error; 636 } 637 ch->dma.work_bus = dcba.maddr; 638 /* Data area. */ 639 if (bus_dma_tag_create(bus_get_dma_tag(dev), 1, 0, 640 BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, 641 NULL, NULL, 642 SIIS_SG_ENTRIES * PAGE_SIZE * SIIS_MAX_SLOTS, 643 SIIS_SG_ENTRIES, 0xFFFFFFFF, 644 0, busdma_lock_mutex, &ch->mtx, &ch->dma.data_tag)) { 645 goto error; 646 } 647 return; 648 649error: 650 device_printf(dev, "WARNING - DMA initialization failed\n"); 651 siis_dmafini(dev); 652} 653 654static void 655siis_dmasetupc_cb(void *xsc, bus_dma_segment_t *segs, int nsegs, int error) 656{ 657 struct siis_dc_cb_args *dcba = (struct siis_dc_cb_args *)xsc; 658 659 if (!(dcba->error = error)) 660 dcba->maddr = segs[0].ds_addr; 661} 662 663static void 664siis_dmafini(device_t dev) 665{ 666 struct siis_channel *ch = device_get_softc(dev); 667 668 if (ch->dma.data_tag) { 669 bus_dma_tag_destroy(ch->dma.data_tag); 670 ch->dma.data_tag = NULL; 671 } 672 if (ch->dma.work_bus) { 673 bus_dmamap_unload(ch->dma.work_tag, ch->dma.work_map); 674 bus_dmamem_free(ch->dma.work_tag, ch->dma.work, ch->dma.work_map); 675 ch->dma.work_bus = 0; 676 ch->dma.work_map = NULL; 677 ch->dma.work = NULL; 678 } 679 if (ch->dma.work_tag) { 680 bus_dma_tag_destroy(ch->dma.work_tag); 681 ch->dma.work_tag = NULL; 682 } 683} 684 685static void 686siis_slotsalloc(device_t dev) 687{ 688 struct siis_channel *ch = device_get_softc(dev); 689 int i; 690 691 /* Alloc and setup command/dma slots */ 692 bzero(ch->slot, sizeof(ch->slot)); 693 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 694 struct siis_slot *slot = &ch->slot[i]; 695 696 slot->dev = dev; 697 slot->slot = i; 698 slot->state = SIIS_SLOT_EMPTY; 699 slot->ccb = NULL; 700 callout_init_mtx(&slot->timeout, &ch->mtx, 0); 701 702 if (bus_dmamap_create(ch->dma.data_tag, 0, &slot->dma.data_map)) 703 device_printf(ch->dev, "FAILURE - create data_map\n"); 704 } 705} 706 707static void 708siis_slotsfree(device_t dev) 709{ 710 struct siis_channel *ch = device_get_softc(dev); 711 int i; 712 713 /* Free all dma slots */ 714 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 715 struct siis_slot *slot = &ch->slot[i]; 716 717 callout_drain(&slot->timeout); 718 if (slot->dma.data_map) { 719 bus_dmamap_destroy(ch->dma.data_tag, slot->dma.data_map); 720 slot->dma.data_map = NULL; 721 } 722 } 723} 724 725static void 726siis_notify_events(device_t dev) 727{ 728 struct siis_channel *ch = device_get_softc(dev); 729 struct cam_path *dpath; 730 u_int32_t status; 731 int i; 732 733 if (ch->quirks & SIIS_Q_SNTF) { 734 status = ATA_INL(ch->r_mem, SIIS_P_SNTF); 735 ATA_OUTL(ch->r_mem, SIIS_P_SNTF, status); 736 } else { 737 /* 738 * Without SNTF we have no idea which device sent notification. 739 * If PMP is connected, assume it, else - device. 740 */ 741 status = (ch->pm_present) ? 0x8000 : 0x0001; 742 } 743 if (bootverbose) 744 device_printf(dev, "SNTF 0x%04x\n", status); 745 for (i = 0; i < 16; i++) { 746 if ((status & (1 << i)) == 0) 747 continue; 748 if (xpt_create_path(&dpath, NULL, 749 xpt_path_path_id(ch->path), i, 0) == CAM_REQ_CMP) { 750 xpt_async(AC_SCSI_AEN, dpath, NULL); 751 xpt_free_path(dpath); 752 } 753 } 754 755} 756 757static void 758siis_phy_check_events(device_t dev) 759{ 760 struct siis_channel *ch = device_get_softc(dev); 761 762 /* If we have a connection event, deal with it */ 763 if (ch->pm_level == 0) { 764 u_int32_t status = ATA_INL(ch->r_mem, SIIS_P_SSTS); 765 union ccb *ccb; 766 767 if (bootverbose) { 768 if (((status & ATA_SS_DET_MASK) == ATA_SS_DET_PHY_ONLINE) && 769 ((status & ATA_SS_SPD_MASK) != ATA_SS_SPD_NO_SPEED) && 770 ((status & ATA_SS_IPM_MASK) == ATA_SS_IPM_ACTIVE)) { 771 device_printf(dev, "CONNECT requested\n"); 772 } else 773 device_printf(dev, "DISCONNECT requested\n"); 774 } 775 siis_reset(dev); 776 if ((ccb = xpt_alloc_ccb_nowait()) == NULL) 777 return; 778 if (xpt_create_path(&ccb->ccb_h.path, NULL, 779 cam_sim_path(ch->sim), 780 CAM_TARGET_WILDCARD, CAM_LUN_WILDCARD) != CAM_REQ_CMP) { 781 xpt_free_ccb(ccb); 782 return; 783 } 784 xpt_rescan(ccb); 785 } 786} 787 788static void 789siis_ch_intr_locked(void *data) 790{ 791 device_t dev = (device_t)data; 792 struct siis_channel *ch = device_get_softc(dev); 793 794 mtx_lock(&ch->mtx); 795 siis_ch_intr(data); 796 mtx_unlock(&ch->mtx); 797} 798 799static void 800siis_ch_intr(void *data) 801{ 802 device_t dev = (device_t)data; 803 struct siis_channel *ch = device_get_softc(dev); 804 uint32_t istatus, sstatus, ctx, estatus, ok, err = 0; 805 enum siis_err_type et; 806 int i, ccs, port, tslots; 807 808 mtx_assert(&ch->mtx, MA_OWNED); 809 /* Read command statuses. */ 810 sstatus = ATA_INL(ch->r_mem, SIIS_P_SS); 811 ok = ch->rslots & ~sstatus; 812 /* Complete all successfull commands. */ 813 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 814 if ((ok >> i) & 1) 815 siis_end_transaction(&ch->slot[i], SIIS_ERR_NONE); 816 } 817 /* Do we have any other events? */ 818 if ((sstatus & SIIS_P_SS_ATTN) == 0) 819 return; 820 /* Read and clear interrupt statuses. */ 821 istatus = ATA_INL(ch->r_mem, SIIS_P_IS) & 822 (0xFFFF & ~SIIS_P_IX_COMMCOMP); 823 ATA_OUTL(ch->r_mem, SIIS_P_IS, istatus); 824 /* Process PHY events */ 825 if (istatus & SIIS_P_IX_PHYRDYCHG) 826 siis_phy_check_events(dev); 827 /* Process NOTIFY events */ 828 if (istatus & SIIS_P_IX_SDBN) 829 siis_notify_events(dev); 830 /* Process command errors */ 831 if (istatus & SIIS_P_IX_COMMERR) { 832 estatus = ATA_INL(ch->r_mem, SIIS_P_CMDERR); 833 ctx = ATA_INL(ch->r_mem, SIIS_P_CTX); 834 ccs = (ctx & SIIS_P_CTX_SLOT) >> SIIS_P_CTX_SLOT_SHIFT; 835 port = (ctx & SIIS_P_CTX_PMP) >> SIIS_P_CTX_PMP_SHIFT; 836 err = ch->rslots & sstatus; 837//device_printf(dev, "%s ERROR ss %08x is %08x rs %08x es %d act %d port %d serr %08x\n", 838// __func__, sstatus, istatus, ch->rslots, estatus, ccs, port, 839// ATA_INL(ch->r_mem, SIIS_P_SERR)); 840 841 if (!ch->readlog && !ch->recovery) { 842 xpt_freeze_simq(ch->sim, ch->numrslots); 843 ch->recovery = 1; 844 } 845 if (ch->frozen) { 846 union ccb *fccb = ch->frozen; 847 ch->frozen = NULL; 848 fccb->ccb_h.status &= ~CAM_STATUS_MASK; 849 fccb->ccb_h.status |= CAM_REQUEUE_REQ | CAM_RELEASE_SIMQ; 850 if (!(fccb->ccb_h.status & CAM_DEV_QFRZN)) { 851 xpt_freeze_devq(fccb->ccb_h.path, 1); 852 fccb->ccb_h.status |= CAM_DEV_QFRZN; 853 } 854 xpt_done(fccb); 855 } 856 if (estatus == SIIS_P_CMDERR_DEV || 857 estatus == SIIS_P_CMDERR_SDB || 858 estatus == SIIS_P_CMDERR_DATAFIS) { 859 tslots = ch->numtslots[port]; 860 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 861 /* XXX: requests in loading state. */ 862 if (((ch->rslots >> i) & 1) == 0) 863 continue; 864 if (ch->slot[i].ccb->ccb_h.target_id != port) 865 continue; 866 if (tslots == 0) { 867 /* Untagged operation. */ 868 if (i == ccs) 869 et = SIIS_ERR_TFE; 870 else 871 et = SIIS_ERR_INNOCENT; 872 } else { 873 /* Tagged operation. */ 874 et = SIIS_ERR_NCQ; 875 } 876 siis_end_transaction(&ch->slot[i], et); 877 } 878 /* 879 * We can't reinit port if there are some other 880 * commands active, use resume to complete them. 881 */ 882 if (ch->rslots != 0) 883 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_RESUME); 884 } else { 885 if (estatus == SIIS_P_CMDERR_SENDFIS || 886 estatus == SIIS_P_CMDERR_INCSTATE || 887 estatus == SIIS_P_CMDERR_PPE || 888 estatus == SIIS_P_CMDERR_SERVICE) { 889 et = SIIS_ERR_SATA; 890 } else 891 et = SIIS_ERR_INVALID; 892 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 893 /* XXX: requests in loading state. */ 894 if (((ch->rslots >> i) & 1) == 0) 895 continue; 896 siis_end_transaction(&ch->slot[i], et); 897 } 898 } 899 } 900} 901 902/* Must be called with channel locked. */ 903static int 904siis_check_collision(device_t dev, union ccb *ccb) 905{ 906 struct siis_channel *ch = device_get_softc(dev); 907 908 mtx_assert(&ch->mtx, MA_OWNED); 909 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 910 (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) { 911 /* Tagged command while we have no supported tag free. */ 912 if (((~ch->oslots) & (0x7fffffff >> (31 - 913 ch->curr[ccb->ccb_h.target_id].tags))) == 0) 914 return (1); 915 } 916 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 917 (ccb->ataio.cmd.flags & (CAM_ATAIO_CONTROL | CAM_ATAIO_NEEDRESULT))) { 918 /* Atomic command while anything active. */ 919 if (ch->numrslots != 0) 920 return (1); 921 } 922 /* We have some atomic command running. */ 923 if (ch->aslots != 0) 924 return (1); 925 return (0); 926} 927 928/* Must be called with channel locked. */ 929static void 930siis_begin_transaction(device_t dev, union ccb *ccb) 931{ 932 struct siis_channel *ch = device_get_softc(dev); 933 struct siis_slot *slot; 934 int tag, tags; 935 936 mtx_assert(&ch->mtx, MA_OWNED); 937 /* Choose empty slot. */ 938 tags = SIIS_MAX_SLOTS; 939 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 940 (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) 941 tags = ch->curr[ccb->ccb_h.target_id].tags; 942 tag = fls((~ch->oslots) & (0x7fffffff >> (31 - tags))) - 1; 943 /* Occupy chosen slot. */ 944 slot = &ch->slot[tag]; 945 slot->ccb = ccb; 946 /* Update channel stats. */ 947 ch->oslots |= (1 << slot->slot); 948 ch->numrslots++; 949 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 950 (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) { 951 ch->numtslots[ccb->ccb_h.target_id]++; 952 } 953 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 954 (ccb->ataio.cmd.flags & (CAM_ATAIO_CONTROL | CAM_ATAIO_NEEDRESULT))) 955 ch->aslots |= (1 << slot->slot); 956 slot->dma.nsegs = 0; 957 /* If request moves data, setup and load SG list */ 958 if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) { 959 void *buf; 960 bus_size_t size; 961 962 slot->state = SIIS_SLOT_LOADING; 963 if (ccb->ccb_h.func_code == XPT_ATA_IO) { 964 buf = ccb->ataio.data_ptr; 965 size = ccb->ataio.dxfer_len; 966 } else { 967 buf = ccb->csio.data_ptr; 968 size = ccb->csio.dxfer_len; 969 } 970 bus_dmamap_load(ch->dma.data_tag, slot->dma.data_map, 971 buf, size, siis_dmasetprd, slot, 0); 972 } else 973 siis_execute_transaction(slot); 974} 975 976/* Locked by busdma engine. */ 977static void 978siis_dmasetprd(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 979{ 980 struct siis_slot *slot = arg; 981 struct siis_channel *ch = device_get_softc(slot->dev); 982 struct siis_cmd *ctp; 983 struct siis_dma_prd *prd; 984 int i; 985 986 mtx_assert(&ch->mtx, MA_OWNED); 987 if (error) { 988 device_printf(slot->dev, "DMA load error\n"); 989 if (!ch->readlog) 990 xpt_freeze_simq(ch->sim, 1); 991 siis_end_transaction(slot, SIIS_ERR_INVALID); 992 return; 993 } 994 KASSERT(nsegs <= SIIS_SG_ENTRIES, ("too many DMA segment entries\n")); 995 /* Get a piece of the workspace for this request */ 996 ctp = (struct siis_cmd *) 997 (ch->dma.work + SIIS_CT_OFFSET + (SIIS_CT_SIZE * slot->slot)); 998 /* Fill S/G table */ 999 if (slot->ccb->ccb_h.func_code == XPT_ATA_IO) 1000 prd = &ctp->u.ata.prd[0]; 1001 else 1002 prd = &ctp->u.atapi.prd[0]; 1003 for (i = 0; i < nsegs; i++) { 1004 prd[i].dba = htole64(segs[i].ds_addr); 1005 prd[i].dbc = htole32(segs[i].ds_len); 1006 prd[i].control = 0; 1007 } 1008 prd[nsegs - 1].control = htole32(SIIS_PRD_TRM); 1009 slot->dma.nsegs = nsegs; 1010 bus_dmamap_sync(ch->dma.data_tag, slot->dma.data_map, 1011 ((slot->ccb->ccb_h.flags & CAM_DIR_IN) ? 1012 BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE)); 1013 siis_execute_transaction(slot); 1014} 1015 1016/* Must be called with channel locked. */ 1017static void 1018siis_execute_transaction(struct siis_slot *slot) 1019{ 1020 device_t dev = slot->dev; 1021 struct siis_channel *ch = device_get_softc(dev); 1022 struct siis_cmd *ctp; 1023 union ccb *ccb = slot->ccb; 1024 u_int64_t prb_bus; 1025 1026 mtx_assert(&ch->mtx, MA_OWNED); 1027 /* Get a piece of the workspace for this request */ 1028 ctp = (struct siis_cmd *) 1029 (ch->dma.work + SIIS_CT_OFFSET + (SIIS_CT_SIZE * slot->slot)); 1030 ctp->control = 0; 1031 ctp->protocol_override = 0; 1032 ctp->transfer_count = 0; 1033 /* Special handling for Soft Reset command. */ 1034 if (ccb->ccb_h.func_code == XPT_ATA_IO) { 1035 if (ccb->ataio.cmd.flags & CAM_ATAIO_CONTROL) { 1036 ctp->control |= htole16(SIIS_PRB_SOFT_RESET); 1037 } else { 1038 ctp->control |= htole16(SIIS_PRB_PROTOCOL_OVERRIDE); 1039 if (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA) { 1040 ctp->protocol_override |= 1041 htole16(SIIS_PRB_PROTO_NCQ); 1042 } 1043 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) { 1044 ctp->protocol_override |= 1045 htole16(SIIS_PRB_PROTO_READ); 1046 } else 1047 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_OUT) { 1048 ctp->protocol_override |= 1049 htole16(SIIS_PRB_PROTO_WRITE); 1050 } 1051 } 1052 } else if (ccb->ccb_h.func_code == XPT_SCSI_IO) { 1053 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) 1054 ctp->control |= htole16(SIIS_PRB_PACKET_READ); 1055 else 1056 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_OUT) 1057 ctp->control |= htole16(SIIS_PRB_PACKET_WRITE); 1058 } 1059 /* Special handling for Soft Reset command. */ 1060 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 1061 (ccb->ataio.cmd.flags & CAM_ATAIO_CONTROL) && 1062 (ccb->ataio.cmd.control & ATA_A_RESET)) { 1063 /* Kick controller into sane state */ 1064 siis_portinit(dev); 1065 } 1066 /* Setup the FIS for this request */ 1067 if (!siis_setup_fis(dev, ctp, ccb, slot->slot)) { 1068 device_printf(ch->dev, "Setting up SATA FIS failed\n"); 1069 if (!ch->readlog) 1070 xpt_freeze_simq(ch->sim, 1); 1071 siis_end_transaction(slot, SIIS_ERR_INVALID); 1072 return; 1073 } 1074 bus_dmamap_sync(ch->dma.work_tag, ch->dma.work_map, 1075 BUS_DMASYNC_PREWRITE); 1076 /* Issue command to the controller. */ 1077 slot->state = SIIS_SLOT_RUNNING; 1078 ch->rslots |= (1 << slot->slot); 1079 prb_bus = ch->dma.work_bus + 1080 SIIS_CT_OFFSET + (SIIS_CT_SIZE * slot->slot); 1081 ATA_OUTL(ch->r_mem, SIIS_P_CACTL(slot->slot), prb_bus); 1082 ATA_OUTL(ch->r_mem, SIIS_P_CACTH(slot->slot), prb_bus >> 32); 1083 /* Start command execution timeout */ 1084 callout_reset(&slot->timeout, (int)ccb->ccb_h.timeout * hz / 1000, 1085 (timeout_t*)siis_timeout, slot); 1086 return; 1087} 1088 1089/* Must be called with channel locked. */ 1090static void 1091siis_process_timeout(device_t dev) 1092{ 1093 struct siis_channel *ch = device_get_softc(dev); 1094 int i; 1095 1096 mtx_assert(&ch->mtx, MA_OWNED); 1097 if (!ch->readlog && !ch->recovery) { 1098 xpt_freeze_simq(ch->sim, ch->numrslots); 1099 ch->recovery = 1; 1100 } 1101 /* Handle the rest of commands. */ 1102 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1103 /* Do we have a running request on slot? */ 1104 if (ch->slot[i].state < SIIS_SLOT_RUNNING) 1105 continue; 1106 siis_end_transaction(&ch->slot[i], SIIS_ERR_TIMEOUT); 1107 } 1108} 1109 1110/* Must be called with channel locked. */ 1111static void 1112siis_rearm_timeout(device_t dev) 1113{ 1114 struct siis_channel *ch = device_get_softc(dev); 1115 int i; 1116 1117 mtx_assert(&ch->mtx, MA_OWNED); 1118 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1119 struct siis_slot *slot = &ch->slot[i]; 1120 1121 /* Do we have a running request on slot? */ 1122 if (slot->state < SIIS_SLOT_RUNNING) 1123 continue; 1124 if ((ch->toslots & (1 << i)) == 0) 1125 continue; 1126 callout_reset(&slot->timeout, 1127 (int)slot->ccb->ccb_h.timeout * hz / 1000, 1128 (timeout_t*)siis_timeout, slot); 1129 } 1130} 1131 1132/* Locked by callout mechanism. */ 1133static void 1134siis_timeout(struct siis_slot *slot) 1135{ 1136 device_t dev = slot->dev; 1137 struct siis_channel *ch = device_get_softc(dev); 1138 1139 mtx_assert(&ch->mtx, MA_OWNED); 1140 /* Check for stale timeout. */ 1141 if (slot->state < SIIS_SLOT_RUNNING) 1142 return; 1143 device_printf(dev, "Timeout on slot %d\n", slot->slot); 1144 device_printf(dev, "%s is %08x ss %08x rs %08x es %08x sts %08x serr %08x\n", 1145 __func__, ATA_INL(ch->r_mem, SIIS_P_IS), 1146 ATA_INL(ch->r_mem, SIIS_P_SS), ch->rslots, 1147 ATA_INL(ch->r_mem, SIIS_P_CMDERR), ATA_INL(ch->r_mem, SIIS_P_STS), 1148 ATA_INL(ch->r_mem, SIIS_P_SERR)); 1149 1150 if (ch->toslots == 0) 1151 xpt_freeze_simq(ch->sim, 1); 1152 ch->toslots |= (1 << slot->slot); 1153 if ((ch->rslots & ~ch->toslots) == 0) 1154 siis_process_timeout(dev); 1155 else 1156 device_printf(dev, " ... waiting for slots %08x\n", 1157 ch->rslots & ~ch->toslots); 1158} 1159 1160/* Must be called with channel locked. */ 1161static void 1162siis_end_transaction(struct siis_slot *slot, enum siis_err_type et) 1163{ 1164 device_t dev = slot->dev; 1165 struct siis_channel *ch = device_get_softc(dev); 1166 union ccb *ccb = slot->ccb; 1167 1168 mtx_assert(&ch->mtx, MA_OWNED); 1169 bus_dmamap_sync(ch->dma.work_tag, ch->dma.work_map, 1170 BUS_DMASYNC_POSTWRITE); 1171 /* Read result registers to the result struct 1172 * May be incorrect if several commands finished same time, 1173 * so read only when sure or have to. 1174 */ 1175 if (ccb->ccb_h.func_code == XPT_ATA_IO) { 1176 struct ata_res *res = &ccb->ataio.res; 1177 if ((et == SIIS_ERR_TFE) || 1178 (ccb->ataio.cmd.flags & CAM_ATAIO_NEEDRESULT)) { 1179 int offs = SIIS_P_LRAM_SLOT(slot->slot) + 8; 1180 1181 res->status = ATA_INB(ch->r_mem, offs + 2); 1182 res->error = ATA_INB(ch->r_mem, offs + 3); 1183 res->lba_low = ATA_INB(ch->r_mem, offs + 4); 1184 res->lba_mid = ATA_INB(ch->r_mem, offs + 5); 1185 res->lba_high = ATA_INB(ch->r_mem, offs + 6); 1186 res->device = ATA_INB(ch->r_mem, offs + 7); 1187 res->lba_low_exp = ATA_INB(ch->r_mem, offs + 8); 1188 res->lba_mid_exp = ATA_INB(ch->r_mem, offs + 9); 1189 res->lba_high_exp = ATA_INB(ch->r_mem, offs + 10); 1190 res->sector_count = ATA_INB(ch->r_mem, offs + 12); 1191 res->sector_count_exp = ATA_INB(ch->r_mem, offs + 13); 1192 } else 1193 bzero(res, sizeof(*res)); 1194 } 1195 if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) { 1196 bus_dmamap_sync(ch->dma.data_tag, slot->dma.data_map, 1197 (ccb->ccb_h.flags & CAM_DIR_IN) ? 1198 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1199 bus_dmamap_unload(ch->dma.data_tag, slot->dma.data_map); 1200 } 1201 /* Set proper result status. */ 1202 if (et != SIIS_ERR_NONE || ch->recovery) { 1203 ch->eslots |= (1 << slot->slot); 1204 ccb->ccb_h.status |= CAM_RELEASE_SIMQ; 1205 } 1206 /* In case of error, freeze device for proper recovery. */ 1207 if (et != SIIS_ERR_NONE && 1208 !(ccb->ccb_h.status & CAM_DEV_QFRZN)) { 1209 xpt_freeze_devq(ccb->ccb_h.path, 1); 1210 ccb->ccb_h.status |= CAM_DEV_QFRZN; 1211 } 1212 ccb->ccb_h.status &= ~CAM_STATUS_MASK; 1213 switch (et) { 1214 case SIIS_ERR_NONE: 1215 ccb->ccb_h.status |= CAM_REQ_CMP; 1216 if (ccb->ccb_h.func_code == XPT_SCSI_IO) 1217 ccb->csio.scsi_status = SCSI_STATUS_OK; 1218 break; 1219 case SIIS_ERR_INVALID: 1220 ch->fatalerr = 1; 1221 ccb->ccb_h.status |= CAM_REQ_INVALID; 1222 break; 1223 case SIIS_ERR_INNOCENT: 1224 ccb->ccb_h.status |= CAM_REQUEUE_REQ; 1225 break; 1226 case SIIS_ERR_TFE: 1227 case SIIS_ERR_NCQ: 1228 if (ccb->ccb_h.func_code == XPT_SCSI_IO) { 1229 ccb->ccb_h.status |= CAM_SCSI_STATUS_ERROR; 1230 ccb->csio.scsi_status = SCSI_STATUS_CHECK_COND; 1231 } else { 1232 ccb->ccb_h.status |= CAM_ATA_STATUS_ERROR; 1233 } 1234 break; 1235 case SIIS_ERR_SATA: 1236 ch->fatalerr = 1; 1237 ccb->ccb_h.status |= CAM_UNCOR_PARITY; 1238 break; 1239 case SIIS_ERR_TIMEOUT: 1240 ch->fatalerr = 1; 1241 ccb->ccb_h.status |= CAM_CMD_TIMEOUT; 1242 break; 1243 default: 1244 ccb->ccb_h.status |= CAM_REQ_CMP_ERR; 1245 } 1246 /* Free slot. */ 1247 ch->oslots &= ~(1 << slot->slot); 1248 ch->rslots &= ~(1 << slot->slot); 1249 ch->aslots &= ~(1 << slot->slot); 1250 if (et != SIIS_ERR_TIMEOUT) { 1251 if (ch->toslots == (1 << slot->slot)) 1252 xpt_release_simq(ch->sim, TRUE); 1253 ch->toslots &= ~(1 << slot->slot); 1254 } 1255 slot->state = SIIS_SLOT_EMPTY; 1256 slot->ccb = NULL; 1257 /* Update channel stats. */ 1258 ch->numrslots--; 1259 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 1260 (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) { 1261 ch->numtslots[ccb->ccb_h.target_id]--; 1262 } 1263 /* If it was our READ LOG command - process it. */ 1264 if (ch->readlog) { 1265 siis_process_read_log(dev, ccb); 1266 /* If it was NCQ command error, put result on hold. */ 1267 } else if (et == SIIS_ERR_NCQ) { 1268 ch->hold[slot->slot] = ccb; 1269 ch->numhslots++; 1270 } else 1271 xpt_done(ccb); 1272 /* Unfreeze frozen command. */ 1273 if (ch->frozen && !siis_check_collision(dev, ch->frozen)) { 1274 union ccb *fccb = ch->frozen; 1275 ch->frozen = NULL; 1276 siis_begin_transaction(dev, fccb); 1277 xpt_release_simq(ch->sim, TRUE); 1278 } 1279 /* If we have no other active commands, ... */ 1280 if (ch->rslots == 0) { 1281 /* if there were timeouts or fatal error - reset port. */ 1282 if (ch->toslots != 0 || ch->fatalerr) { 1283 siis_reset(dev); 1284 } else { 1285 /* if we have slots in error, we can reinit port. */ 1286 if (ch->eslots != 0) 1287 siis_portinit(dev); 1288 /* if there commands on hold, we can do READ LOG. */ 1289 if (!ch->readlog && ch->numhslots) 1290 siis_issue_read_log(dev); 1291 } 1292 /* If all the reset of commands are in timeout - abort them. */ 1293 } else if ((ch->rslots & ~ch->toslots) == 0 && 1294 et != SIIS_ERR_TIMEOUT) 1295 siis_rearm_timeout(dev); 1296} 1297 1298static void 1299siis_issue_read_log(device_t dev) 1300{ 1301 struct siis_channel *ch = device_get_softc(dev); 1302 union ccb *ccb; 1303 struct ccb_ataio *ataio; 1304 int i; 1305 1306 /* Find some holden command. */ 1307 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1308 if (ch->hold[i]) 1309 break; 1310 } 1311 if (i == SIIS_MAX_SLOTS) 1312 return; 1313 ch->readlog = 1; 1314 ccb = xpt_alloc_ccb_nowait(); 1315 if (ccb == NULL) { 1316 device_printf(dev, "Unable allocate READ LOG command"); 1317 return; /* XXX */ 1318 } 1319 ccb->ccb_h = ch->hold[i]->ccb_h; /* Reuse old header. */ 1320 ccb->ccb_h.func_code = XPT_ATA_IO; 1321 ccb->ccb_h.flags = CAM_DIR_IN; 1322 ccb->ccb_h.timeout = 1000; /* 1s should be enough. */ 1323 ataio = &ccb->ataio; 1324 ataio->data_ptr = malloc(512, M_SIIS, M_NOWAIT); 1325 if (ataio->data_ptr == NULL) { 1326 device_printf(dev, "Unable allocate memory for READ LOG command"); 1327 return; /* XXX */ 1328 } 1329 ataio->dxfer_len = 512; 1330 bzero(&ataio->cmd, sizeof(ataio->cmd)); 1331 ataio->cmd.flags = CAM_ATAIO_48BIT; 1332 ataio->cmd.command = 0x2F; /* READ LOG EXT */ 1333 ataio->cmd.sector_count = 1; 1334 ataio->cmd.sector_count_exp = 0; 1335 ataio->cmd.lba_low = 0x10; 1336 ataio->cmd.lba_mid = 0; 1337 ataio->cmd.lba_mid_exp = 0; 1338 siis_begin_transaction(dev, ccb); 1339} 1340 1341static void 1342siis_process_read_log(device_t dev, union ccb *ccb) 1343{ 1344 struct siis_channel *ch = device_get_softc(dev); 1345 uint8_t *data; 1346 struct ata_res *res; 1347 int i; 1348 1349 ch->readlog = 0; 1350 data = ccb->ataio.data_ptr; 1351 if ((ccb->ccb_h.status & CAM_STATUS_MASK) == CAM_REQ_CMP && 1352 (data[0] & 0x80) == 0) { 1353 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1354 if (!ch->hold[i]) 1355 continue; 1356 if (ch->hold[i]->ccb_h.target_id != ccb->ccb_h.target_id) 1357 continue; 1358 if ((data[0] & 0x1F) == i) { 1359 res = &ch->hold[i]->ataio.res; 1360 res->status = data[2]; 1361 res->error = data[3]; 1362 res->lba_low = data[4]; 1363 res->lba_mid = data[5]; 1364 res->lba_high = data[6]; 1365 res->device = data[7]; 1366 res->lba_low_exp = data[8]; 1367 res->lba_mid_exp = data[9]; 1368 res->lba_high_exp = data[10]; 1369 res->sector_count = data[12]; 1370 res->sector_count_exp = data[13]; 1371 } else { 1372 ch->hold[i]->ccb_h.status &= ~CAM_STATUS_MASK; 1373 ch->hold[i]->ccb_h.status |= CAM_REQUEUE_REQ; 1374 } 1375 xpt_done(ch->hold[i]); 1376 ch->hold[i] = NULL; 1377 ch->numhslots--; 1378 } 1379 } else { 1380 if ((ccb->ccb_h.status & CAM_STATUS_MASK) != CAM_REQ_CMP) 1381 device_printf(dev, "Error while READ LOG EXT\n"); 1382 else if ((data[0] & 0x80) == 0) { 1383 device_printf(dev, "Non-queued command error in READ LOG EXT\n"); 1384 } 1385 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1386 if (!ch->hold[i]) 1387 continue; 1388 if (ch->hold[i]->ccb_h.target_id != ccb->ccb_h.target_id) 1389 continue; 1390 xpt_done(ch->hold[i]); 1391 ch->hold[i] = NULL; 1392 ch->numhslots--; 1393 } 1394 } 1395 free(ccb->ataio.data_ptr, M_SIIS); 1396 xpt_free_ccb(ccb); 1397} 1398 1399static void 1400siis_portinit(device_t dev) 1401{ 1402 struct siis_channel *ch = device_get_softc(dev); 1403 int i; 1404 1405 ch->eslots = 0; 1406 ch->recovery = 0; 1407 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_RESUME); 1408 for (i = 0; i < 16; i++) { 1409 ATA_OUTL(ch->r_mem, SIIS_P_PMPSTS(i), 0), 1410 ATA_OUTL(ch->r_mem, SIIS_P_PMPQACT(i), 0); 1411 } 1412 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_PORT_INIT); 1413 siis_wait_ready(dev, 1000); 1414} 1415 1416static int 1417siis_devreset(device_t dev) 1418{ 1419 struct siis_channel *ch = device_get_softc(dev); 1420 int timeout = 0; 1421 uint32_t val; 1422 1423 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_DEV_RESET); 1424 while (((val = ATA_INL(ch->r_mem, SIIS_P_STS)) & 1425 SIIS_P_CTL_DEV_RESET) != 0) { 1426 DELAY(1000); 1427 if (timeout++ > 100) { 1428 device_printf(dev, "device reset stuck (timeout %dms) " 1429 "status = %08x\n", timeout, val); 1430 return (EBUSY); 1431 } 1432 } 1433 return (0); 1434} 1435 1436static int 1437siis_wait_ready(device_t dev, int t) 1438{ 1439 struct siis_channel *ch = device_get_softc(dev); 1440 int timeout = 0; 1441 uint32_t val; 1442 1443 while (((val = ATA_INL(ch->r_mem, SIIS_P_STS)) & 1444 SIIS_P_CTL_READY) == 0) { 1445 DELAY(1000); 1446 if (timeout++ > t) { 1447 device_printf(dev, "port is not ready (timeout %dms) " 1448 "status = %08x\n", t, val); 1449 return (EBUSY); 1450 } 1451 } 1452 return (0); 1453} 1454 1455static void 1456siis_reset(device_t dev) 1457{ 1458 struct siis_channel *ch = device_get_softc(dev); 1459 int i, retry = 0, sata_rev; 1460 uint32_t val; 1461 1462 xpt_freeze_simq(ch->sim, 1); 1463 if (bootverbose) 1464 device_printf(dev, "SIIS reset...\n"); 1465 if (!ch->readlog && !ch->recovery) 1466 xpt_freeze_simq(ch->sim, ch->numrslots); 1467 /* Requeue frozen command. */ 1468 if (ch->frozen) { 1469 union ccb *fccb = ch->frozen; 1470 ch->frozen = NULL; 1471 fccb->ccb_h.status &= ~CAM_STATUS_MASK; 1472 fccb->ccb_h.status |= CAM_REQUEUE_REQ | CAM_RELEASE_SIMQ; 1473 if (!(fccb->ccb_h.status & CAM_DEV_QFRZN)) { 1474 xpt_freeze_devq(fccb->ccb_h.path, 1); 1475 fccb->ccb_h.status |= CAM_DEV_QFRZN; 1476 } 1477 xpt_done(fccb); 1478 } 1479 /* Requeue all running commands. */ 1480 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1481 /* Do we have a running request on slot? */ 1482 if (ch->slot[i].state < SIIS_SLOT_RUNNING) 1483 continue; 1484 /* XXX; Commands in loading state. */ 1485 siis_end_transaction(&ch->slot[i], SIIS_ERR_INNOCENT); 1486 } 1487 /* Finish all holden commands as-is. */ 1488 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1489 if (!ch->hold[i]) 1490 continue; 1491 xpt_done(ch->hold[i]); 1492 ch->hold[i] = NULL; 1493 ch->numhslots--; 1494 } 1495 if (ch->toslots != 0) 1496 xpt_release_simq(ch->sim, TRUE); 1497 ch->eslots = 0; 1498 ch->recovery = 0; 1499 ch->toslots = 0; 1500 ch->fatalerr = 0; 1501 /* Disable port interrupts */ 1502 ATA_OUTL(ch->r_mem, SIIS_P_IECLR, 0x0000FFFF); 1503 /* Set speed limit. */ 1504 sata_rev = ch->user[ch->pm_present ? 15 : 0].revision; 1505 if (sata_rev == 1) 1506 val = ATA_SC_SPD_SPEED_GEN1; 1507 else if (sata_rev == 2) 1508 val = ATA_SC_SPD_SPEED_GEN2; 1509 else if (sata_rev == 3) 1510 val = ATA_SC_SPD_SPEED_GEN3; 1511 else 1512 val = 0; 1513 ATA_OUTL(ch->r_mem, SIIS_P_SCTL, 1514 ATA_SC_DET_IDLE | val | ((ch->pm_level > 0) ? 0 : 1515 (ATA_SC_IPM_DIS_PARTIAL | ATA_SC_IPM_DIS_SLUMBER))); 1516retry: 1517 siis_devreset(dev); 1518 /* Reset and reconnect PHY, */ 1519 if (!siis_sata_connect(ch)) { 1520 ch->devices = 0; 1521 /* Enable port interrupts */ 1522 ATA_OUTL(ch->r_mem, SIIS_P_IESET, SIIS_P_IX_ENABLED); 1523 if (bootverbose) 1524 device_printf(dev, 1525 "SIIS reset done: phy reset found no device\n"); 1526 /* Tell the XPT about the event */ 1527 xpt_async(AC_BUS_RESET, ch->path, NULL); 1528 xpt_release_simq(ch->sim, TRUE); 1529 return; 1530 } 1531 /* Wait for clearing busy status. */ 1532 if (siis_wait_ready(dev, 10000)) { 1533 device_printf(dev, "device ready timeout\n"); 1534 if (!retry) { 1535 device_printf(dev, "trying full port reset ...\n"); 1536 /* Get port to the reset state. */ 1537 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_PORT_RESET); 1538 DELAY(10000); 1539 /* Get port out of reset state. */ 1540 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_PORT_RESET); 1541 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_32BIT); 1542 if (ch->pm_present) 1543 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_PME); 1544 else 1545 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_PME); 1546 siis_wait_ready(dev, 5000); 1547 retry = 1; 1548 goto retry; 1549 } 1550 } 1551 ch->devices = 1; 1552 /* Enable port interrupts */ 1553 ATA_OUTL(ch->r_mem, SIIS_P_IS, 0xFFFFFFFF); 1554 ATA_OUTL(ch->r_mem, SIIS_P_IESET, SIIS_P_IX_ENABLED); 1555 if (bootverbose) 1556 device_printf(dev, "SIIS reset done: devices=%08x\n", ch->devices); 1557 /* Tell the XPT about the event */ 1558 xpt_async(AC_BUS_RESET, ch->path, NULL); 1559 xpt_release_simq(ch->sim, TRUE); 1560} 1561 1562static int 1563siis_setup_fis(device_t dev, struct siis_cmd *ctp, union ccb *ccb, int tag) 1564{ 1565 struct siis_channel *ch = device_get_softc(dev); 1566 u_int8_t *fis = &ctp->fis[0]; 1567 1568 bzero(fis, 24); 1569 fis[0] = 0x27; /* host to device */ 1570 fis[1] = (ccb->ccb_h.target_id & 0x0f); 1571 if (ccb->ccb_h.func_code == XPT_SCSI_IO) { 1572 fis[1] |= 0x80; 1573 fis[2] = ATA_PACKET_CMD; 1574 if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE && 1575 ch->curr[ccb->ccb_h.target_id].mode >= ATA_DMA) 1576 fis[3] = ATA_F_DMA; 1577 else { 1578 fis[5] = ccb->csio.dxfer_len; 1579 fis[6] = ccb->csio.dxfer_len >> 8; 1580 } 1581 fis[7] = ATA_D_LBA; 1582 fis[15] = ATA_A_4BIT; 1583 bzero(ctp->u.atapi.ccb, 16); 1584 bcopy((ccb->ccb_h.flags & CAM_CDB_POINTER) ? 1585 ccb->csio.cdb_io.cdb_ptr : ccb->csio.cdb_io.cdb_bytes, 1586 ctp->u.atapi.ccb, ccb->csio.cdb_len); 1587 } else if ((ccb->ataio.cmd.flags & CAM_ATAIO_CONTROL) == 0) { 1588 fis[1] |= 0x80; 1589 fis[2] = ccb->ataio.cmd.command; 1590 fis[3] = ccb->ataio.cmd.features; 1591 fis[4] = ccb->ataio.cmd.lba_low; 1592 fis[5] = ccb->ataio.cmd.lba_mid; 1593 fis[6] = ccb->ataio.cmd.lba_high; 1594 fis[7] = ccb->ataio.cmd.device; 1595 fis[8] = ccb->ataio.cmd.lba_low_exp; 1596 fis[9] = ccb->ataio.cmd.lba_mid_exp; 1597 fis[10] = ccb->ataio.cmd.lba_high_exp; 1598 fis[11] = ccb->ataio.cmd.features_exp; 1599 if (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA) { 1600 fis[12] = tag << 3; 1601 fis[13] = 0; 1602 } else { 1603 fis[12] = ccb->ataio.cmd.sector_count; 1604 fis[13] = ccb->ataio.cmd.sector_count_exp; 1605 } 1606 fis[15] = ATA_A_4BIT; 1607 } else { 1608 /* Soft reset. */ 1609 } 1610 return (20); 1611} 1612 1613static int 1614siis_sata_connect(struct siis_channel *ch) 1615{ 1616 u_int32_t status; 1617 int timeout; 1618 1619 /* Wait up to 100ms for "connect well" */ 1620 for (timeout = 0; timeout < 100 ; timeout++) { 1621 status = ATA_INL(ch->r_mem, SIIS_P_SSTS); 1622 if (((status & ATA_SS_DET_MASK) == ATA_SS_DET_PHY_ONLINE) && 1623 ((status & ATA_SS_SPD_MASK) != ATA_SS_SPD_NO_SPEED) && 1624 ((status & ATA_SS_IPM_MASK) == ATA_SS_IPM_ACTIVE)) 1625 break; 1626 DELAY(1000); 1627 } 1628 if (timeout >= 100) { 1629 if (bootverbose) { 1630 device_printf(ch->dev, "SATA connect timeout status=%08x\n", 1631 status); 1632 } 1633 return (0); 1634 } 1635 if (bootverbose) { 1636 device_printf(ch->dev, "SATA connect time=%dms status=%08x\n", 1637 timeout, status); 1638 } 1639 /* Clear SATA error register */ 1640 ATA_OUTL(ch->r_mem, SIIS_P_SERR, 0xffffffff); 1641 return (1); 1642} 1643 1644static int 1645siis_check_ids(device_t dev, union ccb *ccb) 1646{ 1647 1648 if (ccb->ccb_h.target_id > 15) { 1649 ccb->ccb_h.status = CAM_TID_INVALID; 1650 xpt_done(ccb); 1651 return (-1); 1652 } 1653 if (ccb->ccb_h.target_lun != 0) { 1654 ccb->ccb_h.status = CAM_LUN_INVALID; 1655 xpt_done(ccb); 1656 return (-1); 1657 } 1658 return (0); 1659} 1660 1661static void 1662siisaction(struct cam_sim *sim, union ccb *ccb) 1663{ 1664 device_t dev; 1665 struct siis_channel *ch; 1666 1667 CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_TRACE, ("siisaction func_code=%x\n", 1668 ccb->ccb_h.func_code)); 1669 1670 ch = (struct siis_channel *)cam_sim_softc(sim); 1671 dev = ch->dev; 1672 mtx_assert(&ch->mtx, MA_OWNED); 1673 switch (ccb->ccb_h.func_code) { 1674 /* Common cases first */ 1675 case XPT_ATA_IO: /* Execute the requested I/O operation */ 1676 case XPT_SCSI_IO: 1677 if (siis_check_ids(dev, ccb)) 1678 return; 1679 if (ch->devices == 0 || 1680 (ch->pm_present == 0 && 1681 ccb->ccb_h.target_id > 0 && ccb->ccb_h.target_id < 15)) { 1682 ccb->ccb_h.status = CAM_SEL_TIMEOUT; 1683 break; 1684 } 1685 /* Check for command collision. */ 1686 if (siis_check_collision(dev, ccb)) { 1687 /* Freeze command. */ 1688 ch->frozen = ccb; 1689 /* We have only one frozen slot, so freeze simq also. */ 1690 xpt_freeze_simq(ch->sim, 1); 1691 return; 1692 } 1693 siis_begin_transaction(dev, ccb); 1694 return; 1695 case XPT_EN_LUN: /* Enable LUN as a target */ 1696 case XPT_TARGET_IO: /* Execute target I/O request */ 1697 case XPT_ACCEPT_TARGET_IO: /* Accept Host Target Mode CDB */ 1698 case XPT_CONT_TARGET_IO: /* Continue Host Target I/O Connection*/ 1699 case XPT_ABORT: /* Abort the specified CCB */ 1700 /* XXX Implement */ 1701 ccb->ccb_h.status = CAM_REQ_INVALID; 1702 break; 1703 case XPT_SET_TRAN_SETTINGS: 1704 { 1705 struct ccb_trans_settings *cts = &ccb->cts; 1706 struct siis_device *d; 1707 1708 if (siis_check_ids(dev, ccb)) 1709 return; 1710 if (cts->type == CTS_TYPE_CURRENT_SETTINGS) 1711 d = &ch->curr[ccb->ccb_h.target_id]; 1712 else 1713 d = &ch->user[ccb->ccb_h.target_id]; 1714 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_REVISION) 1715 d->revision = cts->xport_specific.sata.revision; 1716 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_MODE) 1717 d->mode = cts->xport_specific.sata.mode; 1718 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_BYTECOUNT) 1719 d->bytecount = min(8192, cts->xport_specific.sata.bytecount); 1720 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_TAGS) 1721 d->tags = min(SIIS_MAX_SLOTS, cts->xport_specific.sata.tags); 1722 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_PM) { 1723 ch->pm_present = cts->xport_specific.sata.pm_present; 1724 if (ch->pm_present) 1725 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_PME); 1726 else 1727 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_PME); 1728 } 1729 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_TAGS) 1730 d->atapi = cts->xport_specific.sata.atapi; 1731 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_CAPS) 1732 d->caps = cts->xport_specific.sata.caps; 1733 ccb->ccb_h.status = CAM_REQ_CMP; 1734 break; 1735 } 1736 case XPT_GET_TRAN_SETTINGS: 1737 /* Get default/user set transfer settings for the target */ 1738 { 1739 struct ccb_trans_settings *cts = &ccb->cts; 1740 struct siis_device *d; 1741 uint32_t status; 1742 1743 if (siis_check_ids(dev, ccb)) 1744 return; 1745 if (cts->type == CTS_TYPE_CURRENT_SETTINGS) 1746 d = &ch->curr[ccb->ccb_h.target_id]; 1747 else 1748 d = &ch->user[ccb->ccb_h.target_id]; 1749 cts->protocol = PROTO_ATA; 1750 cts->protocol_version = PROTO_VERSION_UNSPECIFIED; 1751 cts->transport = XPORT_SATA; 1752 cts->transport_version = XPORT_VERSION_UNSPECIFIED; 1753 cts->proto_specific.valid = 0; 1754 cts->xport_specific.sata.valid = 0; 1755 if (cts->type == CTS_TYPE_CURRENT_SETTINGS && 1756 (ccb->ccb_h.target_id == 15 || 1757 (ccb->ccb_h.target_id == 0 && !ch->pm_present))) { 1758 status = ATA_INL(ch->r_mem, SIIS_P_SSTS) & ATA_SS_SPD_MASK; 1759 if (status & 0x0f0) { 1760 cts->xport_specific.sata.revision = 1761 (status & 0x0f0) >> 4; 1762 cts->xport_specific.sata.valid |= 1763 CTS_SATA_VALID_REVISION; 1764 } 1765 cts->xport_specific.sata.caps = d->caps & CTS_SATA_CAPS_D; 1766 if (ch->pm_level) 1767 cts->xport_specific.sata.caps |= CTS_SATA_CAPS_H_PMREQ; 1768 cts->xport_specific.sata.caps &= 1769 ch->user[ccb->ccb_h.target_id].caps; 1770 cts->xport_specific.sata.valid |= CTS_SATA_VALID_CAPS; 1771 } else { 1772 cts->xport_specific.sata.revision = d->revision; 1773 cts->xport_specific.sata.valid |= CTS_SATA_VALID_REVISION; 1774 cts->xport_specific.sata.caps = d->caps; 1775 cts->xport_specific.sata.valid |= CTS_SATA_VALID_CAPS; 1776 } 1777 cts->xport_specific.sata.mode = d->mode; 1778 cts->xport_specific.sata.valid |= CTS_SATA_VALID_MODE; 1779 cts->xport_specific.sata.bytecount = d->bytecount; 1780 cts->xport_specific.sata.valid |= CTS_SATA_VALID_BYTECOUNT; 1781 cts->xport_specific.sata.pm_present = ch->pm_present; 1782 cts->xport_specific.sata.valid |= CTS_SATA_VALID_PM; 1783 cts->xport_specific.sata.tags = d->tags; 1784 cts->xport_specific.sata.valid |= CTS_SATA_VALID_TAGS; 1785 cts->xport_specific.sata.atapi = d->atapi; 1786 cts->xport_specific.sata.valid |= CTS_SATA_VALID_ATAPI; 1787 ccb->ccb_h.status = CAM_REQ_CMP; 1788 break; 1789 } 1790 case XPT_RESET_BUS: /* Reset the specified SCSI bus */ 1791 case XPT_RESET_DEV: /* Bus Device Reset the specified SCSI device */ 1792 siis_reset(dev); 1793 ccb->ccb_h.status = CAM_REQ_CMP; 1794 break; 1795 case XPT_TERM_IO: /* Terminate the I/O process */ 1796 /* XXX Implement */ 1797 ccb->ccb_h.status = CAM_REQ_INVALID; 1798 break; 1799 case XPT_PATH_INQ: /* Path routing inquiry */ 1800 { 1801 struct ccb_pathinq *cpi = &ccb->cpi; 1802 1803 cpi->version_num = 1; /* XXX??? */ 1804 cpi->hba_inquiry = PI_SDTR_ABLE | PI_TAG_ABLE; 1805 cpi->hba_inquiry |= PI_SATAPM; 1806 cpi->target_sprt = 0; 1807 cpi->hba_misc = PIM_SEQSCAN; 1808 cpi->hba_eng_cnt = 0; 1809 cpi->max_target = 15; 1810 cpi->max_lun = 0; 1811 cpi->initiator_id = 0; 1812 cpi->bus_id = cam_sim_bus(sim); 1813 cpi->base_transfer_speed = 150000; 1814 strncpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN); 1815 strncpy(cpi->hba_vid, "SIIS", HBA_IDLEN); 1816 strncpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN); 1817 cpi->unit_number = cam_sim_unit(sim); 1818 cpi->transport = XPORT_SATA; 1819 cpi->transport_version = XPORT_VERSION_UNSPECIFIED; 1820 cpi->protocol = PROTO_ATA; 1821 cpi->protocol_version = PROTO_VERSION_UNSPECIFIED; 1822 cpi->ccb_h.status = CAM_REQ_CMP; 1823 cpi->maxio = MAXPHYS; 1824 break; 1825 } 1826 default: 1827 ccb->ccb_h.status = CAM_REQ_INVALID; 1828 break; 1829 } 1830 xpt_done(ccb); 1831} 1832 1833static void 1834siispoll(struct cam_sim *sim) 1835{ 1836 struct siis_channel *ch = (struct siis_channel *)cam_sim_softc(sim); 1837 1838 siis_ch_intr(ch->dev); 1839} 1840