siis.c revision 207431
1/*- 2 * Copyright (c) 2009 Alexander Motin <mav@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer, 10 * without modification, immediately at the beginning of the file. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 */ 26 27#include <sys/cdefs.h> 28__FBSDID("$FreeBSD: head/sys/dev/siis/siis.c 207431 2010-04-30 08:22:47Z mav $"); 29 30#include <sys/param.h> 31#include <sys/module.h> 32#include <sys/systm.h> 33#include <sys/kernel.h> 34#include <sys/ata.h> 35#include <sys/bus.h> 36#include <sys/endian.h> 37#include <sys/malloc.h> 38#include <sys/lock.h> 39#include <sys/mutex.h> 40#include <sys/sema.h> 41#include <sys/taskqueue.h> 42#include <vm/uma.h> 43#include <machine/stdarg.h> 44#include <machine/resource.h> 45#include <machine/bus.h> 46#include <sys/rman.h> 47#include <dev/pci/pcivar.h> 48#include <dev/pci/pcireg.h> 49#include "siis.h" 50 51#include <cam/cam.h> 52#include <cam/cam_ccb.h> 53#include <cam/cam_sim.h> 54#include <cam/cam_xpt_sim.h> 55#include <cam/cam_debug.h> 56 57/* local prototypes */ 58static int siis_setup_interrupt(device_t dev); 59static void siis_intr(void *data); 60static int siis_suspend(device_t dev); 61static int siis_resume(device_t dev); 62static int siis_ch_suspend(device_t dev); 63static int siis_ch_resume(device_t dev); 64static void siis_ch_intr_locked(void *data); 65static void siis_ch_intr(void *data); 66static void siis_begin_transaction(device_t dev, union ccb *ccb); 67static void siis_dmasetprd(void *arg, bus_dma_segment_t *segs, int nsegs, int error); 68static void siis_execute_transaction(struct siis_slot *slot); 69static void siis_timeout(struct siis_slot *slot); 70static void siis_end_transaction(struct siis_slot *slot, enum siis_err_type et); 71static int siis_setup_fis(device_t dev, struct siis_cmd *ctp, union ccb *ccb, int tag); 72static void siis_dmainit(device_t dev); 73static void siis_dmasetupc_cb(void *xsc, bus_dma_segment_t *segs, int nsegs, int error); 74static void siis_dmafini(device_t dev); 75static void siis_slotsalloc(device_t dev); 76static void siis_slotsfree(device_t dev); 77static void siis_reset(device_t dev); 78static void siis_portinit(device_t dev); 79static int siis_wait_ready(device_t dev, int t); 80 81static int siis_sata_connect(struct siis_channel *ch); 82 83static void siis_issue_read_log(device_t dev); 84static void siis_process_read_log(device_t dev, union ccb *ccb); 85 86static void siisaction(struct cam_sim *sim, union ccb *ccb); 87static void siispoll(struct cam_sim *sim); 88 89MALLOC_DEFINE(M_SIIS, "SIIS driver", "SIIS driver data buffers"); 90 91static struct { 92 uint32_t id; 93 const char *name; 94 int ports; 95 int quirks; 96#define SIIS_Q_SNTF 1 97#define SIIS_Q_NOMSI 2 98} siis_ids[] = { 99 {0x31241095, "SiI3124", 4, 0}, 100 {0x31248086, "SiI3124", 4, 0}, 101 {0x31321095, "SiI3132", 2, SIIS_Q_SNTF|SIIS_Q_NOMSI}, 102 {0x02421095, "SiI3132", 2, SIIS_Q_SNTF|SIIS_Q_NOMSI}, 103 {0x02441095, "SiI3132", 2, SIIS_Q_SNTF|SIIS_Q_NOMSI}, 104 {0x31311095, "SiI3131", 1, SIIS_Q_SNTF|SIIS_Q_NOMSI}, 105 {0x35311095, "SiI3531", 1, SIIS_Q_SNTF|SIIS_Q_NOMSI}, 106 {0, NULL, 0, 0} 107}; 108 109static int 110siis_probe(device_t dev) 111{ 112 char buf[64]; 113 int i; 114 uint32_t devid = pci_get_devid(dev); 115 116 for (i = 0; siis_ids[i].id != 0; i++) { 117 if (siis_ids[i].id == devid) { 118 snprintf(buf, sizeof(buf), "%s SATA controller", 119 siis_ids[i].name); 120 device_set_desc_copy(dev, buf); 121 return (BUS_PROBE_VENDOR); 122 } 123 } 124 return (ENXIO); 125} 126 127static int 128siis_attach(device_t dev) 129{ 130 struct siis_controller *ctlr = device_get_softc(dev); 131 uint32_t devid = pci_get_devid(dev); 132 device_t child; 133 int error, i, unit; 134 135 ctlr->dev = dev; 136 for (i = 0; siis_ids[i].id != 0; i++) { 137 if (siis_ids[i].id == devid) 138 break; 139 } 140 ctlr->quirks = siis_ids[i].quirks; 141 /* Global memory */ 142 ctlr->r_grid = PCIR_BAR(0); 143 if (!(ctlr->r_gmem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 144 &ctlr->r_grid, RF_ACTIVE))) 145 return (ENXIO); 146 ctlr->gctl = ATA_INL(ctlr->r_gmem, SIIS_GCTL); 147 /* Channels memory */ 148 ctlr->r_rid = PCIR_BAR(2); 149 if (!(ctlr->r_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 150 &ctlr->r_rid, RF_ACTIVE))) 151 return (ENXIO); 152 /* Setup our own memory management for channels. */ 153 ctlr->sc_iomem.rm_type = RMAN_ARRAY; 154 ctlr->sc_iomem.rm_descr = "I/O memory addresses"; 155 if ((error = rman_init(&ctlr->sc_iomem)) != 0) { 156 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 157 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_grid, ctlr->r_gmem); 158 return (error); 159 } 160 if ((error = rman_manage_region(&ctlr->sc_iomem, 161 rman_get_start(ctlr->r_mem), rman_get_end(ctlr->r_mem))) != 0) { 162 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 163 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_grid, ctlr->r_gmem); 164 rman_fini(&ctlr->sc_iomem); 165 return (error); 166 } 167 pci_enable_busmaster(dev); 168 /* Reset controller */ 169 siis_resume(dev); 170 /* Number of HW channels */ 171 ctlr->channels = siis_ids[i].ports; 172 /* Setup interrupts. */ 173 if (siis_setup_interrupt(dev)) { 174 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 175 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_grid, ctlr->r_gmem); 176 rman_fini(&ctlr->sc_iomem); 177 return ENXIO; 178 } 179 /* Attach all channels on this controller */ 180 for (unit = 0; unit < ctlr->channels; unit++) { 181 child = device_add_child(dev, "siisch", -1); 182 if (child == NULL) 183 device_printf(dev, "failed to add channel device\n"); 184 else 185 device_set_ivars(child, (void *)(intptr_t)unit); 186 } 187 bus_generic_attach(dev); 188 return 0; 189} 190 191static int 192siis_detach(device_t dev) 193{ 194 struct siis_controller *ctlr = device_get_softc(dev); 195 device_t *children; 196 int nchildren, i; 197 198 /* Detach & delete all children */ 199 if (!device_get_children(dev, &children, &nchildren)) { 200 for (i = 0; i < nchildren; i++) 201 device_delete_child(dev, children[i]); 202 free(children, M_TEMP); 203 } 204 /* Free interrupts. */ 205 if (ctlr->irq.r_irq) { 206 bus_teardown_intr(dev, ctlr->irq.r_irq, 207 ctlr->irq.handle); 208 bus_release_resource(dev, SYS_RES_IRQ, 209 ctlr->irq.r_irq_rid, ctlr->irq.r_irq); 210 } 211 pci_release_msi(dev); 212 /* Free memory. */ 213 rman_fini(&ctlr->sc_iomem); 214 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 215 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_grid, ctlr->r_gmem); 216 return (0); 217} 218 219static int 220siis_suspend(device_t dev) 221{ 222 struct siis_controller *ctlr = device_get_softc(dev); 223 224 bus_generic_suspend(dev); 225 /* Put controller into reset state. */ 226 ctlr->gctl |= SIIS_GCTL_GRESET; 227 ATA_OUTL(ctlr->r_gmem, SIIS_GCTL, ctlr->gctl); 228 return 0; 229} 230 231static int 232siis_resume(device_t dev) 233{ 234 struct siis_controller *ctlr = device_get_softc(dev); 235 236 /* Set PCIe max read request size to at least 1024 bytes */ 237 if (pci_get_max_read_req(dev) < 1024) 238 pci_set_max_read_req(dev, 1024); 239 /* Put controller into reset state. */ 240 ctlr->gctl |= SIIS_GCTL_GRESET; 241 ATA_OUTL(ctlr->r_gmem, SIIS_GCTL, ctlr->gctl); 242 DELAY(10000); 243 /* Get controller out of reset state and enable port interrupts. */ 244 ctlr->gctl &= ~(SIIS_GCTL_GRESET | SIIS_GCTL_I2C_IE); 245 ctlr->gctl |= 0x0000000f; 246 ATA_OUTL(ctlr->r_gmem, SIIS_GCTL, ctlr->gctl); 247 return (bus_generic_resume(dev)); 248} 249 250static int 251siis_setup_interrupt(device_t dev) 252{ 253 struct siis_controller *ctlr = device_get_softc(dev); 254 int msi = ctlr->quirks & SIIS_Q_NOMSI ? 0 : 1; 255 256 /* Process hints. */ 257 resource_int_value(device_get_name(dev), 258 device_get_unit(dev), "msi", &msi); 259 if (msi < 0) 260 msi = 0; 261 else if (msi > 0) 262 msi = min(1, pci_msi_count(dev)); 263 /* Allocate MSI if needed/present. */ 264 if (msi && pci_alloc_msi(dev, &msi) != 0) 265 msi = 0; 266 /* Allocate all IRQs. */ 267 ctlr->irq.r_irq_rid = msi ? 1 : 0; 268 if (!(ctlr->irq.r_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, 269 &ctlr->irq.r_irq_rid, RF_SHAREABLE | RF_ACTIVE))) { 270 device_printf(dev, "unable to map interrupt\n"); 271 return ENXIO; 272 } 273 if ((bus_setup_intr(dev, ctlr->irq.r_irq, ATA_INTR_FLAGS, NULL, 274 siis_intr, ctlr, &ctlr->irq.handle))) { 275 /* SOS XXX release r_irq */ 276 device_printf(dev, "unable to setup interrupt\n"); 277 return ENXIO; 278 } 279 return (0); 280} 281 282/* 283 * Common case interrupt handler. 284 */ 285static void 286siis_intr(void *data) 287{ 288 struct siis_controller *ctlr = (struct siis_controller *)data; 289 u_int32_t is; 290 void *arg; 291 int unit; 292 293 is = ATA_INL(ctlr->r_gmem, SIIS_IS); 294 for (unit = 0; unit < ctlr->channels; unit++) { 295 if ((is & SIIS_IS_PORT(unit)) != 0 && 296 (arg = ctlr->interrupt[unit].argument)) { 297 ctlr->interrupt[unit].function(arg); 298 } 299 } 300 /* Acknowledge interrupt, if MSI enabled. */ 301 if (ctlr->irq.r_irq_rid) { 302 ATA_OUTL(ctlr->r_gmem, SIIS_GCTL, 303 ctlr->gctl | SIIS_GCTL_MSIACK); 304 } 305} 306 307static struct resource * 308siis_alloc_resource(device_t dev, device_t child, int type, int *rid, 309 u_long start, u_long end, u_long count, u_int flags) 310{ 311 struct siis_controller *ctlr = device_get_softc(dev); 312 int unit = ((struct siis_channel *)device_get_softc(child))->unit; 313 struct resource *res = NULL; 314 int offset = unit << 13; 315 long st; 316 317 switch (type) { 318 case SYS_RES_MEMORY: 319 st = rman_get_start(ctlr->r_mem); 320 res = rman_reserve_resource(&ctlr->sc_iomem, st + offset, 321 st + offset + 0x2000, 0x2000, RF_ACTIVE, child); 322 if (res) { 323 bus_space_handle_t bsh; 324 bus_space_tag_t bst; 325 bsh = rman_get_bushandle(ctlr->r_mem); 326 bst = rman_get_bustag(ctlr->r_mem); 327 bus_space_subregion(bst, bsh, offset, 0x2000, &bsh); 328 rman_set_bushandle(res, bsh); 329 rman_set_bustag(res, bst); 330 } 331 break; 332 case SYS_RES_IRQ: 333 if (*rid == ATA_IRQ_RID) 334 res = ctlr->irq.r_irq; 335 break; 336 } 337 return (res); 338} 339 340static int 341siis_release_resource(device_t dev, device_t child, int type, int rid, 342 struct resource *r) 343{ 344 345 switch (type) { 346 case SYS_RES_MEMORY: 347 rman_release_resource(r); 348 return (0); 349 case SYS_RES_IRQ: 350 if (rid != ATA_IRQ_RID) 351 return ENOENT; 352 return (0); 353 } 354 return (EINVAL); 355} 356 357static int 358siis_setup_intr(device_t dev, device_t child, struct resource *irq, 359 int flags, driver_filter_t *filter, driver_intr_t *function, 360 void *argument, void **cookiep) 361{ 362 struct siis_controller *ctlr = device_get_softc(dev); 363 int unit = (intptr_t)device_get_ivars(child); 364 365 if (filter != NULL) { 366 printf("siis.c: we cannot use a filter here\n"); 367 return (EINVAL); 368 } 369 ctlr->interrupt[unit].function = function; 370 ctlr->interrupt[unit].argument = argument; 371 return (0); 372} 373 374static int 375siis_teardown_intr(device_t dev, device_t child, struct resource *irq, 376 void *cookie) 377{ 378 struct siis_controller *ctlr = device_get_softc(dev); 379 int unit = (intptr_t)device_get_ivars(child); 380 381 ctlr->interrupt[unit].function = NULL; 382 ctlr->interrupt[unit].argument = NULL; 383 return (0); 384} 385 386static int 387siis_print_child(device_t dev, device_t child) 388{ 389 int retval; 390 391 retval = bus_print_child_header(dev, child); 392 retval += printf(" at channel %d", 393 (int)(intptr_t)device_get_ivars(child)); 394 retval += bus_print_child_footer(dev, child); 395 396 return (retval); 397} 398 399devclass_t siis_devclass; 400static device_method_t siis_methods[] = { 401 DEVMETHOD(device_probe, siis_probe), 402 DEVMETHOD(device_attach, siis_attach), 403 DEVMETHOD(device_detach, siis_detach), 404 DEVMETHOD(device_suspend, siis_suspend), 405 DEVMETHOD(device_resume, siis_resume), 406 DEVMETHOD(bus_print_child, siis_print_child), 407 DEVMETHOD(bus_alloc_resource, siis_alloc_resource), 408 DEVMETHOD(bus_release_resource, siis_release_resource), 409 DEVMETHOD(bus_setup_intr, siis_setup_intr), 410 DEVMETHOD(bus_teardown_intr,siis_teardown_intr), 411 { 0, 0 } 412}; 413static driver_t siis_driver = { 414 "siis", 415 siis_methods, 416 sizeof(struct siis_controller) 417}; 418DRIVER_MODULE(siis, pci, siis_driver, siis_devclass, 0, 0); 419MODULE_VERSION(siis, 1); 420MODULE_DEPEND(siis, cam, 1, 1, 1); 421 422static int 423siis_ch_probe(device_t dev) 424{ 425 426 device_set_desc_copy(dev, "SIIS channel"); 427 return (0); 428} 429 430static int 431siis_ch_attach(device_t dev) 432{ 433 struct siis_controller *ctlr = device_get_softc(device_get_parent(dev)); 434 struct siis_channel *ch = device_get_softc(dev); 435 struct cam_devq *devq; 436 int rid, error, i, sata_rev = 0; 437 438 ch->dev = dev; 439 ch->unit = (intptr_t)device_get_ivars(dev); 440 ch->quirks = ctlr->quirks; 441 resource_int_value(device_get_name(dev), 442 device_get_unit(dev), "pm_level", &ch->pm_level); 443 resource_int_value(device_get_name(dev), 444 device_get_unit(dev), "sata_rev", &sata_rev); 445 for (i = 0; i < 16; i++) { 446 ch->user[i].revision = sata_rev; 447 ch->user[i].mode = 0; 448 ch->user[i].bytecount = 8192; 449 ch->user[i].tags = SIIS_MAX_SLOTS; 450 ch->curr[i] = ch->user[i]; 451 } 452 mtx_init(&ch->mtx, "SIIS channel lock", NULL, MTX_DEF); 453 rid = ch->unit; 454 if (!(ch->r_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 455 &rid, RF_ACTIVE))) 456 return (ENXIO); 457 siis_dmainit(dev); 458 siis_slotsalloc(dev); 459 siis_ch_resume(dev); 460 mtx_lock(&ch->mtx); 461 rid = ATA_IRQ_RID; 462 if (!(ch->r_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, 463 &rid, RF_SHAREABLE | RF_ACTIVE))) { 464 bus_release_resource(dev, SYS_RES_MEMORY, ch->unit, ch->r_mem); 465 device_printf(dev, "Unable to map interrupt\n"); 466 return (ENXIO); 467 } 468 if ((bus_setup_intr(dev, ch->r_irq, ATA_INTR_FLAGS, NULL, 469 siis_ch_intr_locked, dev, &ch->ih))) { 470 device_printf(dev, "Unable to setup interrupt\n"); 471 error = ENXIO; 472 goto err1; 473 } 474 /* Create the device queue for our SIM. */ 475 devq = cam_simq_alloc(SIIS_MAX_SLOTS); 476 if (devq == NULL) { 477 device_printf(dev, "Unable to allocate simq\n"); 478 error = ENOMEM; 479 goto err1; 480 } 481 /* Construct SIM entry */ 482 ch->sim = cam_sim_alloc(siisaction, siispoll, "siisch", ch, 483 device_get_unit(dev), &ch->mtx, 2, SIIS_MAX_SLOTS, devq); 484 if (ch->sim == NULL) { 485 device_printf(dev, "unable to allocate sim\n"); 486 error = ENOMEM; 487 goto err2; 488 } 489 if (xpt_bus_register(ch->sim, dev, 0) != CAM_SUCCESS) { 490 device_printf(dev, "unable to register xpt bus\n"); 491 error = ENXIO; 492 goto err2; 493 } 494 if (xpt_create_path(&ch->path, /*periph*/NULL, cam_sim_path(ch->sim), 495 CAM_TARGET_WILDCARD, CAM_LUN_WILDCARD) != CAM_REQ_CMP) { 496 device_printf(dev, "unable to create path\n"); 497 error = ENXIO; 498 goto err3; 499 } 500 mtx_unlock(&ch->mtx); 501 return (0); 502 503err3: 504 xpt_bus_deregister(cam_sim_path(ch->sim)); 505err2: 506 cam_sim_free(ch->sim, /*free_devq*/TRUE); 507err1: 508 bus_release_resource(dev, SYS_RES_IRQ, ATA_IRQ_RID, ch->r_irq); 509 bus_release_resource(dev, SYS_RES_MEMORY, ch->unit, ch->r_mem); 510 mtx_unlock(&ch->mtx); 511 return (error); 512} 513 514static int 515siis_ch_detach(device_t dev) 516{ 517 struct siis_channel *ch = device_get_softc(dev); 518 519 mtx_lock(&ch->mtx); 520 xpt_async(AC_LOST_DEVICE, ch->path, NULL); 521 xpt_free_path(ch->path); 522 xpt_bus_deregister(cam_sim_path(ch->sim)); 523 cam_sim_free(ch->sim, /*free_devq*/TRUE); 524 mtx_unlock(&ch->mtx); 525 526 bus_teardown_intr(dev, ch->r_irq, ch->ih); 527 bus_release_resource(dev, SYS_RES_IRQ, ATA_IRQ_RID, ch->r_irq); 528 529 siis_ch_suspend(dev); 530 siis_slotsfree(dev); 531 siis_dmafini(dev); 532 533 bus_release_resource(dev, SYS_RES_MEMORY, ch->unit, ch->r_mem); 534 mtx_destroy(&ch->mtx); 535 return (0); 536} 537 538static int 539siis_ch_suspend(device_t dev) 540{ 541 struct siis_channel *ch = device_get_softc(dev); 542 543 /* Put port into reset state. */ 544 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_PORT_RESET); 545 return (0); 546} 547 548static int 549siis_ch_resume(device_t dev) 550{ 551 struct siis_channel *ch = device_get_softc(dev); 552 553 /* Get port out of reset state. */ 554 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_PORT_RESET); 555 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_32BIT); 556 if (ch->pm_present) 557 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_PME); 558 else 559 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_PME); 560 /* Enable port interrupts */ 561 ATA_OUTL(ch->r_mem, SIIS_P_IESET, SIIS_P_IX_ENABLED); 562 return (0); 563} 564 565devclass_t siisch_devclass; 566static device_method_t siisch_methods[] = { 567 DEVMETHOD(device_probe, siis_ch_probe), 568 DEVMETHOD(device_attach, siis_ch_attach), 569 DEVMETHOD(device_detach, siis_ch_detach), 570 DEVMETHOD(device_suspend, siis_ch_suspend), 571 DEVMETHOD(device_resume, siis_ch_resume), 572 { 0, 0 } 573}; 574static driver_t siisch_driver = { 575 "siisch", 576 siisch_methods, 577 sizeof(struct siis_channel) 578}; 579DRIVER_MODULE(siisch, siis, siisch_driver, siis_devclass, 0, 0); 580 581struct siis_dc_cb_args { 582 bus_addr_t maddr; 583 int error; 584}; 585 586static void 587siis_dmainit(device_t dev) 588{ 589 struct siis_channel *ch = device_get_softc(dev); 590 struct siis_dc_cb_args dcba; 591 592 /* Command area. */ 593 if (bus_dma_tag_create(bus_get_dma_tag(dev), 1024, 0, 594 BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, 595 NULL, NULL, SIIS_WORK_SIZE, 1, SIIS_WORK_SIZE, 596 0, NULL, NULL, &ch->dma.work_tag)) 597 goto error; 598 if (bus_dmamem_alloc(ch->dma.work_tag, (void **)&ch->dma.work, 0, 599 &ch->dma.work_map)) 600 goto error; 601 if (bus_dmamap_load(ch->dma.work_tag, ch->dma.work_map, ch->dma.work, 602 SIIS_WORK_SIZE, siis_dmasetupc_cb, &dcba, 0) || dcba.error) { 603 bus_dmamem_free(ch->dma.work_tag, ch->dma.work, ch->dma.work_map); 604 goto error; 605 } 606 ch->dma.work_bus = dcba.maddr; 607 /* Data area. */ 608 if (bus_dma_tag_create(bus_get_dma_tag(dev), 1, 0, 609 BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, 610 NULL, NULL, 611 SIIS_SG_ENTRIES * PAGE_SIZE * SIIS_MAX_SLOTS, 612 SIIS_SG_ENTRIES, 0xFFFFFFFF, 613 0, busdma_lock_mutex, &ch->mtx, &ch->dma.data_tag)) { 614 goto error; 615 } 616 return; 617 618error: 619 device_printf(dev, "WARNING - DMA initialization failed\n"); 620 siis_dmafini(dev); 621} 622 623static void 624siis_dmasetupc_cb(void *xsc, bus_dma_segment_t *segs, int nsegs, int error) 625{ 626 struct siis_dc_cb_args *dcba = (struct siis_dc_cb_args *)xsc; 627 628 if (!(dcba->error = error)) 629 dcba->maddr = segs[0].ds_addr; 630} 631 632static void 633siis_dmafini(device_t dev) 634{ 635 struct siis_channel *ch = device_get_softc(dev); 636 637 if (ch->dma.data_tag) { 638 bus_dma_tag_destroy(ch->dma.data_tag); 639 ch->dma.data_tag = NULL; 640 } 641 if (ch->dma.work_bus) { 642 bus_dmamap_unload(ch->dma.work_tag, ch->dma.work_map); 643 bus_dmamem_free(ch->dma.work_tag, ch->dma.work, ch->dma.work_map); 644 ch->dma.work_bus = 0; 645 ch->dma.work_map = NULL; 646 ch->dma.work = NULL; 647 } 648 if (ch->dma.work_tag) { 649 bus_dma_tag_destroy(ch->dma.work_tag); 650 ch->dma.work_tag = NULL; 651 } 652} 653 654static void 655siis_slotsalloc(device_t dev) 656{ 657 struct siis_channel *ch = device_get_softc(dev); 658 int i; 659 660 /* Alloc and setup command/dma slots */ 661 bzero(ch->slot, sizeof(ch->slot)); 662 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 663 struct siis_slot *slot = &ch->slot[i]; 664 665 slot->dev = dev; 666 slot->slot = i; 667 slot->state = SIIS_SLOT_EMPTY; 668 slot->ccb = NULL; 669 callout_init_mtx(&slot->timeout, &ch->mtx, 0); 670 671 if (bus_dmamap_create(ch->dma.data_tag, 0, &slot->dma.data_map)) 672 device_printf(ch->dev, "FAILURE - create data_map\n"); 673 } 674} 675 676static void 677siis_slotsfree(device_t dev) 678{ 679 struct siis_channel *ch = device_get_softc(dev); 680 int i; 681 682 /* Free all dma slots */ 683 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 684 struct siis_slot *slot = &ch->slot[i]; 685 686 callout_drain(&slot->timeout); 687 if (slot->dma.data_map) { 688 bus_dmamap_destroy(ch->dma.data_tag, slot->dma.data_map); 689 slot->dma.data_map = NULL; 690 } 691 } 692} 693 694static void 695siis_notify_events(device_t dev) 696{ 697 struct siis_channel *ch = device_get_softc(dev); 698 struct cam_path *dpath; 699 u_int32_t status; 700 int i; 701 702 if (ch->quirks & SIIS_Q_SNTF) { 703 status = ATA_INL(ch->r_mem, SIIS_P_SNTF); 704 ATA_OUTL(ch->r_mem, SIIS_P_SNTF, status); 705 } else { 706 /* 707 * Without SNTF we have no idea which device sent notification. 708 * If PMP is connected, assume it, else - device. 709 */ 710 status = (ch->pm_present) ? 0x8000 : 0x0001; 711 } 712 if (bootverbose) 713 device_printf(dev, "SNTF 0x%04x\n", status); 714 for (i = 0; i < 16; i++) { 715 if ((status & (1 << i)) == 0) 716 continue; 717 if (xpt_create_path(&dpath, NULL, 718 xpt_path_path_id(ch->path), i, 0) == CAM_REQ_CMP) { 719 xpt_async(AC_SCSI_AEN, dpath, NULL); 720 xpt_free_path(dpath); 721 } 722 } 723 724} 725 726static void 727siis_phy_check_events(device_t dev) 728{ 729 struct siis_channel *ch = device_get_softc(dev); 730 731 /* If we have a connection event, deal with it */ 732 if (ch->pm_level == 0) { 733 u_int32_t status = ATA_INL(ch->r_mem, SIIS_P_SSTS); 734 union ccb *ccb; 735 736 if (bootverbose) { 737 if (((status & ATA_SS_DET_MASK) == ATA_SS_DET_PHY_ONLINE) && 738 ((status & ATA_SS_SPD_MASK) != ATA_SS_SPD_NO_SPEED) && 739 ((status & ATA_SS_IPM_MASK) == ATA_SS_IPM_ACTIVE)) { 740 device_printf(dev, "CONNECT requested\n"); 741 } else 742 device_printf(dev, "DISCONNECT requested\n"); 743 } 744 siis_reset(dev); 745 if ((ccb = xpt_alloc_ccb_nowait()) == NULL) 746 return; 747 if (xpt_create_path(&ccb->ccb_h.path, NULL, 748 cam_sim_path(ch->sim), 749 CAM_TARGET_WILDCARD, CAM_LUN_WILDCARD) != CAM_REQ_CMP) { 750 xpt_free_ccb(ccb); 751 return; 752 } 753 xpt_rescan(ccb); 754 } 755} 756 757static void 758siis_ch_intr_locked(void *data) 759{ 760 device_t dev = (device_t)data; 761 struct siis_channel *ch = device_get_softc(dev); 762 763 mtx_lock(&ch->mtx); 764 siis_ch_intr(data); 765 mtx_unlock(&ch->mtx); 766} 767 768static void 769siis_ch_intr(void *data) 770{ 771 device_t dev = (device_t)data; 772 struct siis_channel *ch = device_get_softc(dev); 773 uint32_t istatus, sstatus, ctx, estatus, ok, err = 0; 774 enum siis_err_type et; 775 int i, ccs, port, tslots; 776 777 mtx_assert(&ch->mtx, MA_OWNED); 778 /* Read command statuses. */ 779 sstatus = ATA_INL(ch->r_mem, SIIS_P_SS); 780 ok = ch->rslots & ~sstatus; 781 /* Complete all successfull commands. */ 782 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 783 if ((ok >> i) & 1) 784 siis_end_transaction(&ch->slot[i], SIIS_ERR_NONE); 785 } 786 /* Do we have any other events? */ 787 if ((sstatus & SIIS_P_SS_ATTN) == 0) 788 return; 789 /* Read and clear interrupt statuses. */ 790 istatus = ATA_INL(ch->r_mem, SIIS_P_IS) & 791 (0xFFFF & ~SIIS_P_IX_COMMCOMP); 792 ATA_OUTL(ch->r_mem, SIIS_P_IS, istatus); 793 /* Process PHY events */ 794 if (istatus & SIIS_P_IX_PHYRDYCHG) 795 siis_phy_check_events(dev); 796 /* Process NOTIFY events */ 797 if (istatus & SIIS_P_IX_SDBN) 798 siis_notify_events(dev); 799 /* Process command errors */ 800 if (istatus & SIIS_P_IX_COMMERR) { 801 estatus = ATA_INL(ch->r_mem, SIIS_P_CMDERR); 802 ctx = ATA_INL(ch->r_mem, SIIS_P_CTX); 803 ccs = (ctx & SIIS_P_CTX_SLOT) >> SIIS_P_CTX_SLOT_SHIFT; 804 port = (ctx & SIIS_P_CTX_PMP) >> SIIS_P_CTX_PMP_SHIFT; 805 err = ch->rslots & sstatus; 806//device_printf(dev, "%s ERROR ss %08x is %08x rs %08x es %d act %d port %d serr %08x\n", 807// __func__, sstatus, istatus, ch->rslots, estatus, ccs, port, 808// ATA_INL(ch->r_mem, SIIS_P_SERR)); 809 810 if (!ch->readlog && !ch->recovery) { 811 xpt_freeze_simq(ch->sim, ch->numrslots); 812 ch->recovery = 1; 813 } 814 if (ch->frozen) { 815 union ccb *fccb = ch->frozen; 816 ch->frozen = NULL; 817 fccb->ccb_h.status &= ~CAM_STATUS_MASK; 818 fccb->ccb_h.status |= CAM_REQUEUE_REQ | CAM_RELEASE_SIMQ; 819 if (!(fccb->ccb_h.status & CAM_DEV_QFRZN)) { 820 xpt_freeze_devq(fccb->ccb_h.path, 1); 821 fccb->ccb_h.status |= CAM_DEV_QFRZN; 822 } 823 xpt_done(fccb); 824 } 825 if (estatus == SIIS_P_CMDERR_DEV || 826 estatus == SIIS_P_CMDERR_SDB || 827 estatus == SIIS_P_CMDERR_DATAFIS) { 828 tslots = ch->numtslots[port]; 829 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 830 /* XXX: requests in loading state. */ 831 if (((ch->rslots >> i) & 1) == 0) 832 continue; 833 if (ch->slot[i].ccb->ccb_h.target_id != port) 834 continue; 835 if (tslots == 0) { 836 /* Untagged operation. */ 837 if (i == ccs) 838 et = SIIS_ERR_TFE; 839 else 840 et = SIIS_ERR_INNOCENT; 841 } else { 842 /* Tagged operation. */ 843 et = SIIS_ERR_NCQ; 844 } 845 siis_end_transaction(&ch->slot[i], et); 846 } 847 /* 848 * We can't reinit port if there are some other 849 * commands active, use resume to complete them. 850 */ 851 if (ch->rslots != 0) 852 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_RESUME); 853 } else { 854 if (estatus == SIIS_P_CMDERR_SENDFIS || 855 estatus == SIIS_P_CMDERR_INCSTATE || 856 estatus == SIIS_P_CMDERR_PPE || 857 estatus == SIIS_P_CMDERR_SERVICE) { 858 et = SIIS_ERR_SATA; 859 } else 860 et = SIIS_ERR_INVALID; 861 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 862 /* XXX: requests in loading state. */ 863 if (((ch->rslots >> i) & 1) == 0) 864 continue; 865 siis_end_transaction(&ch->slot[i], et); 866 } 867 } 868 } 869} 870 871/* Must be called with channel locked. */ 872static int 873siis_check_collision(device_t dev, union ccb *ccb) 874{ 875 struct siis_channel *ch = device_get_softc(dev); 876 877 mtx_assert(&ch->mtx, MA_OWNED); 878 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 879 (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) { 880 /* Tagged command while we have no supported tag free. */ 881 if (((~ch->oslots) & (0x7fffffff >> (31 - 882 ch->curr[ccb->ccb_h.target_id].tags))) == 0) 883 return (1); 884 } 885 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 886 (ccb->ataio.cmd.flags & (CAM_ATAIO_CONTROL | CAM_ATAIO_NEEDRESULT))) { 887 /* Atomic command while anything active. */ 888 if (ch->numrslots != 0) 889 return (1); 890 } 891 /* We have some atomic command running. */ 892 if (ch->aslots != 0) 893 return (1); 894 return (0); 895} 896 897/* Must be called with channel locked. */ 898static void 899siis_begin_transaction(device_t dev, union ccb *ccb) 900{ 901 struct siis_channel *ch = device_get_softc(dev); 902 struct siis_slot *slot; 903 int tag, tags; 904 905 mtx_assert(&ch->mtx, MA_OWNED); 906 /* Choose empty slot. */ 907 tags = SIIS_MAX_SLOTS; 908 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 909 (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) 910 tags = ch->curr[ccb->ccb_h.target_id].tags; 911 tag = fls((~ch->oslots) & (0x7fffffff >> (31 - tags))) - 1; 912 /* Occupy chosen slot. */ 913 slot = &ch->slot[tag]; 914 slot->ccb = ccb; 915 /* Update channel stats. */ 916 ch->oslots |= (1 << slot->slot); 917 ch->numrslots++; 918 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 919 (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) { 920 ch->numtslots[ccb->ccb_h.target_id]++; 921 } 922 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 923 (ccb->ataio.cmd.flags & (CAM_ATAIO_CONTROL | CAM_ATAIO_NEEDRESULT))) 924 ch->aslots |= (1 << slot->slot); 925 slot->dma.nsegs = 0; 926 /* If request moves data, setup and load SG list */ 927 if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) { 928 void *buf; 929 bus_size_t size; 930 931 slot->state = SIIS_SLOT_LOADING; 932 if (ccb->ccb_h.func_code == XPT_ATA_IO) { 933 buf = ccb->ataio.data_ptr; 934 size = ccb->ataio.dxfer_len; 935 } else { 936 buf = ccb->csio.data_ptr; 937 size = ccb->csio.dxfer_len; 938 } 939 bus_dmamap_load(ch->dma.data_tag, slot->dma.data_map, 940 buf, size, siis_dmasetprd, slot, 0); 941 } else 942 siis_execute_transaction(slot); 943} 944 945/* Locked by busdma engine. */ 946static void 947siis_dmasetprd(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 948{ 949 struct siis_slot *slot = arg; 950 struct siis_channel *ch = device_get_softc(slot->dev); 951 struct siis_cmd *ctp; 952 struct siis_dma_prd *prd; 953 int i; 954 955 mtx_assert(&ch->mtx, MA_OWNED); 956 if (error) { 957 device_printf(slot->dev, "DMA load error\n"); 958 if (!ch->readlog) 959 xpt_freeze_simq(ch->sim, 1); 960 siis_end_transaction(slot, SIIS_ERR_INVALID); 961 return; 962 } 963 KASSERT(nsegs <= SIIS_SG_ENTRIES, ("too many DMA segment entries\n")); 964 /* Get a piece of the workspace for this request */ 965 ctp = (struct siis_cmd *) 966 (ch->dma.work + SIIS_CT_OFFSET + (SIIS_CT_SIZE * slot->slot)); 967 /* Fill S/G table */ 968 if (slot->ccb->ccb_h.func_code == XPT_ATA_IO) 969 prd = &ctp->u.ata.prd[0]; 970 else 971 prd = &ctp->u.atapi.prd[0]; 972 for (i = 0; i < nsegs; i++) { 973 prd[i].dba = htole64(segs[i].ds_addr); 974 prd[i].dbc = htole32(segs[i].ds_len); 975 prd[i].control = 0; 976 } 977 prd[nsegs - 1].control = htole32(SIIS_PRD_TRM); 978 slot->dma.nsegs = nsegs; 979 bus_dmamap_sync(ch->dma.data_tag, slot->dma.data_map, 980 ((slot->ccb->ccb_h.flags & CAM_DIR_IN) ? 981 BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE)); 982 siis_execute_transaction(slot); 983} 984 985/* Must be called with channel locked. */ 986static void 987siis_execute_transaction(struct siis_slot *slot) 988{ 989 device_t dev = slot->dev; 990 struct siis_channel *ch = device_get_softc(dev); 991 struct siis_cmd *ctp; 992 union ccb *ccb = slot->ccb; 993 u_int64_t prb_bus; 994 995 mtx_assert(&ch->mtx, MA_OWNED); 996 /* Get a piece of the workspace for this request */ 997 ctp = (struct siis_cmd *) 998 (ch->dma.work + SIIS_CT_OFFSET + (SIIS_CT_SIZE * slot->slot)); 999 ctp->control = 0; 1000 ctp->protocol_override = 0; 1001 ctp->transfer_count = 0; 1002 /* Special handling for Soft Reset command. */ 1003 if (ccb->ccb_h.func_code == XPT_ATA_IO) { 1004 if (ccb->ataio.cmd.flags & CAM_ATAIO_CONTROL) { 1005 ctp->control |= htole16(SIIS_PRB_SOFT_RESET); 1006 } else { 1007 ctp->control |= htole16(SIIS_PRB_PROTOCOL_OVERRIDE); 1008 if (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA) { 1009 ctp->protocol_override |= 1010 htole16(SIIS_PRB_PROTO_NCQ); 1011 } 1012 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) { 1013 ctp->protocol_override |= 1014 htole16(SIIS_PRB_PROTO_READ); 1015 } else 1016 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_OUT) { 1017 ctp->protocol_override |= 1018 htole16(SIIS_PRB_PROTO_WRITE); 1019 } 1020 } 1021 } else if (ccb->ccb_h.func_code == XPT_SCSI_IO) { 1022 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) 1023 ctp->control |= htole16(SIIS_PRB_PACKET_READ); 1024 else 1025 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_OUT) 1026 ctp->control |= htole16(SIIS_PRB_PACKET_WRITE); 1027 } 1028 /* Special handling for Soft Reset command. */ 1029 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 1030 (ccb->ataio.cmd.flags & CAM_ATAIO_CONTROL) && 1031 (ccb->ataio.cmd.control & ATA_A_RESET)) { 1032 /* Kick controller into sane state */ 1033 siis_portinit(dev); 1034 } 1035 /* Setup the FIS for this request */ 1036 if (!siis_setup_fis(dev, ctp, ccb, slot->slot)) { 1037 device_printf(ch->dev, "Setting up SATA FIS failed\n"); 1038 if (!ch->readlog) 1039 xpt_freeze_simq(ch->sim, 1); 1040 siis_end_transaction(slot, SIIS_ERR_INVALID); 1041 return; 1042 } 1043 bus_dmamap_sync(ch->dma.work_tag, ch->dma.work_map, 1044 BUS_DMASYNC_PREWRITE); 1045 /* Issue command to the controller. */ 1046 slot->state = SIIS_SLOT_RUNNING; 1047 ch->rslots |= (1 << slot->slot); 1048 prb_bus = ch->dma.work_bus + 1049 SIIS_CT_OFFSET + (SIIS_CT_SIZE * slot->slot); 1050 ATA_OUTL(ch->r_mem, SIIS_P_CACTL(slot->slot), prb_bus); 1051 ATA_OUTL(ch->r_mem, SIIS_P_CACTH(slot->slot), prb_bus >> 32); 1052 /* Start command execution timeout */ 1053 callout_reset(&slot->timeout, (int)ccb->ccb_h.timeout * hz / 1000, 1054 (timeout_t*)siis_timeout, slot); 1055 return; 1056} 1057 1058/* Must be called with channel locked. */ 1059static void 1060siis_process_timeout(device_t dev) 1061{ 1062 struct siis_channel *ch = device_get_softc(dev); 1063 int i; 1064 1065 mtx_assert(&ch->mtx, MA_OWNED); 1066 if (!ch->readlog && !ch->recovery) { 1067 xpt_freeze_simq(ch->sim, ch->numrslots); 1068 ch->recovery = 1; 1069 } 1070 /* Handle the rest of commands. */ 1071 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1072 /* Do we have a running request on slot? */ 1073 if (ch->slot[i].state < SIIS_SLOT_RUNNING) 1074 continue; 1075 siis_end_transaction(&ch->slot[i], SIIS_ERR_TIMEOUT); 1076 } 1077} 1078 1079/* Must be called with channel locked. */ 1080static void 1081siis_rearm_timeout(device_t dev) 1082{ 1083 struct siis_channel *ch = device_get_softc(dev); 1084 int i; 1085 1086 mtx_assert(&ch->mtx, MA_OWNED); 1087 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1088 struct siis_slot *slot = &ch->slot[i]; 1089 1090 /* Do we have a running request on slot? */ 1091 if (slot->state < SIIS_SLOT_RUNNING) 1092 continue; 1093 if ((ch->toslots & (1 << i)) == 0) 1094 continue; 1095 callout_reset(&slot->timeout, 1096 (int)slot->ccb->ccb_h.timeout * hz / 1000, 1097 (timeout_t*)siis_timeout, slot); 1098 } 1099} 1100 1101/* Locked by callout mechanism. */ 1102static void 1103siis_timeout(struct siis_slot *slot) 1104{ 1105 device_t dev = slot->dev; 1106 struct siis_channel *ch = device_get_softc(dev); 1107 1108 mtx_assert(&ch->mtx, MA_OWNED); 1109 /* Check for stale timeout. */ 1110 if (slot->state < SIIS_SLOT_RUNNING) 1111 return; 1112 device_printf(dev, "Timeout on slot %d\n", slot->slot); 1113 device_printf(dev, "%s is %08x ss %08x rs %08x es %08x sts %08x serr %08x\n", 1114 __func__, ATA_INL(ch->r_mem, SIIS_P_IS), 1115 ATA_INL(ch->r_mem, SIIS_P_SS), ch->rslots, 1116 ATA_INL(ch->r_mem, SIIS_P_CMDERR), ATA_INL(ch->r_mem, SIIS_P_STS), 1117 ATA_INL(ch->r_mem, SIIS_P_SERR)); 1118 1119 if (ch->toslots == 0) 1120 xpt_freeze_simq(ch->sim, 1); 1121 ch->toslots |= (1 << slot->slot); 1122 if ((ch->rslots & ~ch->toslots) == 0) 1123 siis_process_timeout(dev); 1124 else 1125 device_printf(dev, " ... waiting for slots %08x\n", 1126 ch->rslots & ~ch->toslots); 1127} 1128 1129/* Must be called with channel locked. */ 1130static void 1131siis_end_transaction(struct siis_slot *slot, enum siis_err_type et) 1132{ 1133 device_t dev = slot->dev; 1134 struct siis_channel *ch = device_get_softc(dev); 1135 union ccb *ccb = slot->ccb; 1136 1137 mtx_assert(&ch->mtx, MA_OWNED); 1138 bus_dmamap_sync(ch->dma.work_tag, ch->dma.work_map, 1139 BUS_DMASYNC_POSTWRITE); 1140 /* Read result registers to the result struct 1141 * May be incorrect if several commands finished same time, 1142 * so read only when sure or have to. 1143 */ 1144 if (ccb->ccb_h.func_code == XPT_ATA_IO) { 1145 struct ata_res *res = &ccb->ataio.res; 1146 if ((et == SIIS_ERR_TFE) || 1147 (ccb->ataio.cmd.flags & CAM_ATAIO_NEEDRESULT)) { 1148 int offs = SIIS_P_LRAM_SLOT(slot->slot) + 8; 1149 1150 res->status = ATA_INB(ch->r_mem, offs + 2); 1151 res->error = ATA_INB(ch->r_mem, offs + 3); 1152 res->lba_low = ATA_INB(ch->r_mem, offs + 4); 1153 res->lba_mid = ATA_INB(ch->r_mem, offs + 5); 1154 res->lba_high = ATA_INB(ch->r_mem, offs + 6); 1155 res->device = ATA_INB(ch->r_mem, offs + 7); 1156 res->lba_low_exp = ATA_INB(ch->r_mem, offs + 8); 1157 res->lba_mid_exp = ATA_INB(ch->r_mem, offs + 9); 1158 res->lba_high_exp = ATA_INB(ch->r_mem, offs + 10); 1159 res->sector_count = ATA_INB(ch->r_mem, offs + 12); 1160 res->sector_count_exp = ATA_INB(ch->r_mem, offs + 13); 1161 } else 1162 bzero(res, sizeof(*res)); 1163 } 1164 if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) { 1165 bus_dmamap_sync(ch->dma.data_tag, slot->dma.data_map, 1166 (ccb->ccb_h.flags & CAM_DIR_IN) ? 1167 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1168 bus_dmamap_unload(ch->dma.data_tag, slot->dma.data_map); 1169 } 1170 /* Set proper result status. */ 1171 if (et != SIIS_ERR_NONE || ch->recovery) { 1172 ch->eslots |= (1 << slot->slot); 1173 ccb->ccb_h.status |= CAM_RELEASE_SIMQ; 1174 } 1175 /* In case of error, freeze device for proper recovery. */ 1176 if (et != SIIS_ERR_NONE && 1177 !(ccb->ccb_h.status & CAM_DEV_QFRZN)) { 1178 xpt_freeze_devq(ccb->ccb_h.path, 1); 1179 ccb->ccb_h.status |= CAM_DEV_QFRZN; 1180 } 1181 ccb->ccb_h.status &= ~CAM_STATUS_MASK; 1182 switch (et) { 1183 case SIIS_ERR_NONE: 1184 ccb->ccb_h.status |= CAM_REQ_CMP; 1185 if (ccb->ccb_h.func_code == XPT_SCSI_IO) 1186 ccb->csio.scsi_status = SCSI_STATUS_OK; 1187 break; 1188 case SIIS_ERR_INVALID: 1189 ch->fatalerr = 1; 1190 ccb->ccb_h.status |= CAM_REQ_INVALID; 1191 break; 1192 case SIIS_ERR_INNOCENT: 1193 ccb->ccb_h.status |= CAM_REQUEUE_REQ; 1194 break; 1195 case SIIS_ERR_TFE: 1196 case SIIS_ERR_NCQ: 1197 if (ccb->ccb_h.func_code == XPT_SCSI_IO) { 1198 ccb->ccb_h.status |= CAM_SCSI_STATUS_ERROR; 1199 ccb->csio.scsi_status = SCSI_STATUS_CHECK_COND; 1200 } else { 1201 ccb->ccb_h.status |= CAM_ATA_STATUS_ERROR; 1202 } 1203 break; 1204 case SIIS_ERR_SATA: 1205 ch->fatalerr = 1; 1206 ccb->ccb_h.status |= CAM_UNCOR_PARITY; 1207 break; 1208 case SIIS_ERR_TIMEOUT: 1209 ch->fatalerr = 1; 1210 ccb->ccb_h.status |= CAM_CMD_TIMEOUT; 1211 break; 1212 default: 1213 ccb->ccb_h.status |= CAM_REQ_CMP_ERR; 1214 } 1215 /* Free slot. */ 1216 ch->oslots &= ~(1 << slot->slot); 1217 ch->rslots &= ~(1 << slot->slot); 1218 ch->aslots &= ~(1 << slot->slot); 1219 if (et != SIIS_ERR_TIMEOUT) { 1220 if (ch->toslots == (1 << slot->slot)) 1221 xpt_release_simq(ch->sim, TRUE); 1222 ch->toslots &= ~(1 << slot->slot); 1223 } 1224 slot->state = SIIS_SLOT_EMPTY; 1225 slot->ccb = NULL; 1226 /* Update channel stats. */ 1227 ch->numrslots--; 1228 if ((ccb->ccb_h.func_code == XPT_ATA_IO) && 1229 (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) { 1230 ch->numtslots[ccb->ccb_h.target_id]--; 1231 } 1232 /* If it was our READ LOG command - process it. */ 1233 if (ch->readlog) { 1234 siis_process_read_log(dev, ccb); 1235 /* If it was NCQ command error, put result on hold. */ 1236 } else if (et == SIIS_ERR_NCQ) { 1237 ch->hold[slot->slot] = ccb; 1238 ch->numhslots++; 1239 } else 1240 xpt_done(ccb); 1241 /* Unfreeze frozen command. */ 1242 if (ch->frozen && !siis_check_collision(dev, ch->frozen)) { 1243 union ccb *fccb = ch->frozen; 1244 ch->frozen = NULL; 1245 siis_begin_transaction(dev, fccb); 1246 xpt_release_simq(ch->sim, TRUE); 1247 } 1248 /* If we have no other active commands, ... */ 1249 if (ch->rslots == 0) { 1250 /* if there were timeouts or fatal error - reset port. */ 1251 if (ch->toslots != 0 || ch->fatalerr) { 1252 siis_reset(dev); 1253 } else { 1254 /* if we have slots in error, we can reinit port. */ 1255 if (ch->eslots != 0) 1256 siis_portinit(dev); 1257 /* if there commands on hold, we can do READ LOG. */ 1258 if (!ch->readlog && ch->numhslots) 1259 siis_issue_read_log(dev); 1260 } 1261 /* If all the reset of commands are in timeout - abort them. */ 1262 } else if ((ch->rslots & ~ch->toslots) == 0 && 1263 et != SIIS_ERR_TIMEOUT) 1264 siis_rearm_timeout(dev); 1265} 1266 1267static void 1268siis_issue_read_log(device_t dev) 1269{ 1270 struct siis_channel *ch = device_get_softc(dev); 1271 union ccb *ccb; 1272 struct ccb_ataio *ataio; 1273 int i; 1274 1275 /* Find some holden command. */ 1276 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1277 if (ch->hold[i]) 1278 break; 1279 } 1280 if (i == SIIS_MAX_SLOTS) 1281 return; 1282 ch->readlog = 1; 1283 ccb = xpt_alloc_ccb_nowait(); 1284 if (ccb == NULL) { 1285 device_printf(dev, "Unable allocate READ LOG command"); 1286 return; /* XXX */ 1287 } 1288 ccb->ccb_h = ch->hold[i]->ccb_h; /* Reuse old header. */ 1289 ccb->ccb_h.func_code = XPT_ATA_IO; 1290 ccb->ccb_h.flags = CAM_DIR_IN; 1291 ccb->ccb_h.timeout = 1000; /* 1s should be enough. */ 1292 ataio = &ccb->ataio; 1293 ataio->data_ptr = malloc(512, M_SIIS, M_NOWAIT); 1294 if (ataio->data_ptr == NULL) { 1295 device_printf(dev, "Unable allocate memory for READ LOG command"); 1296 return; /* XXX */ 1297 } 1298 ataio->dxfer_len = 512; 1299 bzero(&ataio->cmd, sizeof(ataio->cmd)); 1300 ataio->cmd.flags = CAM_ATAIO_48BIT; 1301 ataio->cmd.command = 0x2F; /* READ LOG EXT */ 1302 ataio->cmd.sector_count = 1; 1303 ataio->cmd.sector_count_exp = 0; 1304 ataio->cmd.lba_low = 0x10; 1305 ataio->cmd.lba_mid = 0; 1306 ataio->cmd.lba_mid_exp = 0; 1307 siis_begin_transaction(dev, ccb); 1308} 1309 1310static void 1311siis_process_read_log(device_t dev, union ccb *ccb) 1312{ 1313 struct siis_channel *ch = device_get_softc(dev); 1314 uint8_t *data; 1315 struct ata_res *res; 1316 int i; 1317 1318 ch->readlog = 0; 1319 data = ccb->ataio.data_ptr; 1320 if ((ccb->ccb_h.status & CAM_STATUS_MASK) == CAM_REQ_CMP && 1321 (data[0] & 0x80) == 0) { 1322 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1323 if (!ch->hold[i]) 1324 continue; 1325 if (ch->hold[i]->ccb_h.target_id != ccb->ccb_h.target_id) 1326 continue; 1327 if ((data[0] & 0x1F) == i) { 1328 res = &ch->hold[i]->ataio.res; 1329 res->status = data[2]; 1330 res->error = data[3]; 1331 res->lba_low = data[4]; 1332 res->lba_mid = data[5]; 1333 res->lba_high = data[6]; 1334 res->device = data[7]; 1335 res->lba_low_exp = data[8]; 1336 res->lba_mid_exp = data[9]; 1337 res->lba_high_exp = data[10]; 1338 res->sector_count = data[12]; 1339 res->sector_count_exp = data[13]; 1340 } else { 1341 ch->hold[i]->ccb_h.status &= ~CAM_STATUS_MASK; 1342 ch->hold[i]->ccb_h.status |= CAM_REQUEUE_REQ; 1343 } 1344 xpt_done(ch->hold[i]); 1345 ch->hold[i] = NULL; 1346 ch->numhslots--; 1347 } 1348 } else { 1349 if ((ccb->ccb_h.status & CAM_STATUS_MASK) != CAM_REQ_CMP) 1350 device_printf(dev, "Error while READ LOG EXT\n"); 1351 else if ((data[0] & 0x80) == 0) { 1352 device_printf(dev, "Non-queued command error in READ LOG EXT\n"); 1353 } 1354 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1355 if (!ch->hold[i]) 1356 continue; 1357 if (ch->hold[i]->ccb_h.target_id != ccb->ccb_h.target_id) 1358 continue; 1359 xpt_done(ch->hold[i]); 1360 ch->hold[i] = NULL; 1361 ch->numhslots--; 1362 } 1363 } 1364 free(ccb->ataio.data_ptr, M_SIIS); 1365 xpt_free_ccb(ccb); 1366} 1367 1368static void 1369siis_portinit(device_t dev) 1370{ 1371 struct siis_channel *ch = device_get_softc(dev); 1372 int i; 1373 1374 ch->eslots = 0; 1375 ch->recovery = 0; 1376 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_RESUME); 1377 for (i = 0; i < 16; i++) { 1378 ATA_OUTL(ch->r_mem, SIIS_P_PMPSTS(i), 0), 1379 ATA_OUTL(ch->r_mem, SIIS_P_PMPQACT(i), 0); 1380 } 1381 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_PORT_INIT); 1382 siis_wait_ready(dev, 1000); 1383} 1384 1385static int 1386siis_devreset(device_t dev) 1387{ 1388 struct siis_channel *ch = device_get_softc(dev); 1389 int timeout = 0; 1390 uint32_t val; 1391 1392 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_DEV_RESET); 1393 while (((val = ATA_INL(ch->r_mem, SIIS_P_STS)) & 1394 SIIS_P_CTL_DEV_RESET) != 0) { 1395 DELAY(1000); 1396 if (timeout++ > 100) { 1397 device_printf(dev, "device reset stuck (timeout %dms) " 1398 "status = %08x\n", timeout, val); 1399 return (EBUSY); 1400 } 1401 } 1402 return (0); 1403} 1404 1405static int 1406siis_wait_ready(device_t dev, int t) 1407{ 1408 struct siis_channel *ch = device_get_softc(dev); 1409 int timeout = 0; 1410 uint32_t val; 1411 1412 while (((val = ATA_INL(ch->r_mem, SIIS_P_STS)) & 1413 SIIS_P_CTL_READY) == 0) { 1414 DELAY(1000); 1415 if (timeout++ > t) { 1416 device_printf(dev, "port is not ready (timeout %dms) " 1417 "status = %08x\n", t, val); 1418 return (EBUSY); 1419 } 1420 } 1421 return (0); 1422} 1423 1424static void 1425siis_reset(device_t dev) 1426{ 1427 struct siis_channel *ch = device_get_softc(dev); 1428 int i, retry = 0, sata_rev; 1429 uint32_t val; 1430 1431 xpt_freeze_simq(ch->sim, 1); 1432 if (bootverbose) 1433 device_printf(dev, "SIIS reset...\n"); 1434 if (!ch->readlog && !ch->recovery) 1435 xpt_freeze_simq(ch->sim, ch->numrslots); 1436 /* Requeue frozen command. */ 1437 if (ch->frozen) { 1438 union ccb *fccb = ch->frozen; 1439 ch->frozen = NULL; 1440 fccb->ccb_h.status &= ~CAM_STATUS_MASK; 1441 fccb->ccb_h.status |= CAM_REQUEUE_REQ | CAM_RELEASE_SIMQ; 1442 if (!(fccb->ccb_h.status & CAM_DEV_QFRZN)) { 1443 xpt_freeze_devq(fccb->ccb_h.path, 1); 1444 fccb->ccb_h.status |= CAM_DEV_QFRZN; 1445 } 1446 xpt_done(fccb); 1447 } 1448 /* Requeue all running commands. */ 1449 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1450 /* Do we have a running request on slot? */ 1451 if (ch->slot[i].state < SIIS_SLOT_RUNNING) 1452 continue; 1453 /* XXX; Commands in loading state. */ 1454 siis_end_transaction(&ch->slot[i], SIIS_ERR_INNOCENT); 1455 } 1456 /* Finish all holden commands as-is. */ 1457 for (i = 0; i < SIIS_MAX_SLOTS; i++) { 1458 if (!ch->hold[i]) 1459 continue; 1460 xpt_done(ch->hold[i]); 1461 ch->hold[i] = NULL; 1462 ch->numhslots--; 1463 } 1464 if (ch->toslots != 0) 1465 xpt_release_simq(ch->sim, TRUE); 1466 ch->eslots = 0; 1467 ch->recovery = 0; 1468 ch->toslots = 0; 1469 ch->fatalerr = 0; 1470 /* Disable port interrupts */ 1471 ATA_OUTL(ch->r_mem, SIIS_P_IECLR, 0x0000FFFF); 1472 /* Set speed limit. */ 1473 sata_rev = ch->user[ch->pm_present ? 15 : 0].revision; 1474 if (sata_rev == 1) 1475 val = ATA_SC_SPD_SPEED_GEN1; 1476 else if (sata_rev == 2) 1477 val = ATA_SC_SPD_SPEED_GEN2; 1478 else if (sata_rev == 3) 1479 val = ATA_SC_SPD_SPEED_GEN3; 1480 else 1481 val = 0; 1482 ATA_OUTL(ch->r_mem, SIIS_P_SCTL, 1483 ATA_SC_DET_IDLE | val | ((ch->pm_level > 0) ? 0 : 1484 (ATA_SC_IPM_DIS_PARTIAL | ATA_SC_IPM_DIS_SLUMBER))); 1485retry: 1486 siis_devreset(dev); 1487 /* Reset and reconnect PHY, */ 1488 if (!siis_sata_connect(ch)) { 1489 ch->devices = 0; 1490 /* Enable port interrupts */ 1491 ATA_OUTL(ch->r_mem, SIIS_P_IESET, SIIS_P_IX_ENABLED); 1492 if (bootverbose) 1493 device_printf(dev, 1494 "SIIS reset done: phy reset found no device\n"); 1495 /* Tell the XPT about the event */ 1496 xpt_async(AC_BUS_RESET, ch->path, NULL); 1497 xpt_release_simq(ch->sim, TRUE); 1498 return; 1499 } 1500 /* Wait for clearing busy status. */ 1501 if (siis_wait_ready(dev, 10000)) { 1502 device_printf(dev, "device ready timeout\n"); 1503 if (!retry) { 1504 device_printf(dev, "trying full port reset ...\n"); 1505 /* Get port to the reset state. */ 1506 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_PORT_RESET); 1507 DELAY(10000); 1508 /* Get port out of reset state. */ 1509 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_PORT_RESET); 1510 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_32BIT); 1511 if (ch->pm_present) 1512 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_PME); 1513 else 1514 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_PME); 1515 siis_wait_ready(dev, 5000); 1516 retry = 1; 1517 goto retry; 1518 } 1519 } 1520 ch->devices = 1; 1521 /* Enable port interrupts */ 1522 ATA_OUTL(ch->r_mem, SIIS_P_IS, 0xFFFFFFFF); 1523 ATA_OUTL(ch->r_mem, SIIS_P_IESET, SIIS_P_IX_ENABLED); 1524 if (bootverbose) 1525 device_printf(dev, "SIIS reset done: devices=%08x\n", ch->devices); 1526 /* Tell the XPT about the event */ 1527 xpt_async(AC_BUS_RESET, ch->path, NULL); 1528 xpt_release_simq(ch->sim, TRUE); 1529} 1530 1531static int 1532siis_setup_fis(device_t dev, struct siis_cmd *ctp, union ccb *ccb, int tag) 1533{ 1534 struct siis_channel *ch = device_get_softc(dev); 1535 u_int8_t *fis = &ctp->fis[0]; 1536 1537 bzero(fis, 24); 1538 fis[0] = 0x27; /* host to device */ 1539 fis[1] = (ccb->ccb_h.target_id & 0x0f); 1540 if (ccb->ccb_h.func_code == XPT_SCSI_IO) { 1541 fis[1] |= 0x80; 1542 fis[2] = ATA_PACKET_CMD; 1543 if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE && 1544 ch->curr[ccb->ccb_h.target_id].mode >= ATA_DMA) 1545 fis[3] = ATA_F_DMA; 1546 else { 1547 fis[5] = ccb->csio.dxfer_len; 1548 fis[6] = ccb->csio.dxfer_len >> 8; 1549 } 1550 fis[7] = ATA_D_LBA; 1551 fis[15] = ATA_A_4BIT; 1552 bzero(ctp->u.atapi.ccb, 16); 1553 bcopy((ccb->ccb_h.flags & CAM_CDB_POINTER) ? 1554 ccb->csio.cdb_io.cdb_ptr : ccb->csio.cdb_io.cdb_bytes, 1555 ctp->u.atapi.ccb, ccb->csio.cdb_len); 1556 } else if ((ccb->ataio.cmd.flags & CAM_ATAIO_CONTROL) == 0) { 1557 fis[1] |= 0x80; 1558 fis[2] = ccb->ataio.cmd.command; 1559 fis[3] = ccb->ataio.cmd.features; 1560 fis[4] = ccb->ataio.cmd.lba_low; 1561 fis[5] = ccb->ataio.cmd.lba_mid; 1562 fis[6] = ccb->ataio.cmd.lba_high; 1563 fis[7] = ccb->ataio.cmd.device; 1564 fis[8] = ccb->ataio.cmd.lba_low_exp; 1565 fis[9] = ccb->ataio.cmd.lba_mid_exp; 1566 fis[10] = ccb->ataio.cmd.lba_high_exp; 1567 fis[11] = ccb->ataio.cmd.features_exp; 1568 if (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA) { 1569 fis[12] = tag << 3; 1570 fis[13] = 0; 1571 } else { 1572 fis[12] = ccb->ataio.cmd.sector_count; 1573 fis[13] = ccb->ataio.cmd.sector_count_exp; 1574 } 1575 fis[15] = ATA_A_4BIT; 1576 } else { 1577 /* Soft reset. */ 1578 } 1579 return (20); 1580} 1581 1582static int 1583siis_sata_connect(struct siis_channel *ch) 1584{ 1585 u_int32_t status; 1586 int timeout; 1587 1588 /* Wait up to 100ms for "connect well" */ 1589 for (timeout = 0; timeout < 100 ; timeout++) { 1590 status = ATA_INL(ch->r_mem, SIIS_P_SSTS); 1591 if (((status & ATA_SS_DET_MASK) == ATA_SS_DET_PHY_ONLINE) && 1592 ((status & ATA_SS_SPD_MASK) != ATA_SS_SPD_NO_SPEED) && 1593 ((status & ATA_SS_IPM_MASK) == ATA_SS_IPM_ACTIVE)) 1594 break; 1595 DELAY(1000); 1596 } 1597 if (timeout >= 100) { 1598 if (bootverbose) { 1599 device_printf(ch->dev, "SATA connect timeout status=%08x\n", 1600 status); 1601 } 1602 return (0); 1603 } 1604 if (bootverbose) { 1605 device_printf(ch->dev, "SATA connect time=%dms status=%08x\n", 1606 timeout, status); 1607 } 1608 /* Clear SATA error register */ 1609 ATA_OUTL(ch->r_mem, SIIS_P_SERR, 0xffffffff); 1610 return (1); 1611} 1612 1613static int 1614siis_check_ids(device_t dev, union ccb *ccb) 1615{ 1616 1617 if (ccb->ccb_h.target_id > 15) { 1618 ccb->ccb_h.status = CAM_TID_INVALID; 1619 xpt_done(ccb); 1620 return (-1); 1621 } 1622 if (ccb->ccb_h.target_lun != 0) { 1623 ccb->ccb_h.status = CAM_LUN_INVALID; 1624 xpt_done(ccb); 1625 return (-1); 1626 } 1627 return (0); 1628} 1629 1630static void 1631siisaction(struct cam_sim *sim, union ccb *ccb) 1632{ 1633 device_t dev; 1634 struct siis_channel *ch; 1635 1636 CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_TRACE, ("siisaction func_code=%x\n", 1637 ccb->ccb_h.func_code)); 1638 1639 ch = (struct siis_channel *)cam_sim_softc(sim); 1640 dev = ch->dev; 1641 mtx_assert(&ch->mtx, MA_OWNED); 1642 switch (ccb->ccb_h.func_code) { 1643 /* Common cases first */ 1644 case XPT_ATA_IO: /* Execute the requested I/O operation */ 1645 case XPT_SCSI_IO: 1646 if (siis_check_ids(dev, ccb)) 1647 return; 1648 if (ch->devices == 0 || 1649 (ch->pm_present == 0 && 1650 ccb->ccb_h.target_id > 0 && ccb->ccb_h.target_id < 15)) { 1651 ccb->ccb_h.status = CAM_SEL_TIMEOUT; 1652 break; 1653 } 1654 /* Check for command collision. */ 1655 if (siis_check_collision(dev, ccb)) { 1656 /* Freeze command. */ 1657 ch->frozen = ccb; 1658 /* We have only one frozen slot, so freeze simq also. */ 1659 xpt_freeze_simq(ch->sim, 1); 1660 return; 1661 } 1662 siis_begin_transaction(dev, ccb); 1663 return; 1664 case XPT_EN_LUN: /* Enable LUN as a target */ 1665 case XPT_TARGET_IO: /* Execute target I/O request */ 1666 case XPT_ACCEPT_TARGET_IO: /* Accept Host Target Mode CDB */ 1667 case XPT_CONT_TARGET_IO: /* Continue Host Target I/O Connection*/ 1668 case XPT_ABORT: /* Abort the specified CCB */ 1669 /* XXX Implement */ 1670 ccb->ccb_h.status = CAM_REQ_INVALID; 1671 break; 1672 case XPT_SET_TRAN_SETTINGS: 1673 { 1674 struct ccb_trans_settings *cts = &ccb->cts; 1675 struct siis_device *d; 1676 1677 if (siis_check_ids(dev, ccb)) 1678 return; 1679 if (cts->type == CTS_TYPE_CURRENT_SETTINGS) 1680 d = &ch->curr[ccb->ccb_h.target_id]; 1681 else 1682 d = &ch->user[ccb->ccb_h.target_id]; 1683 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_REVISION) 1684 d->revision = cts->xport_specific.sata.revision; 1685 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_MODE) 1686 d->mode = cts->xport_specific.sata.mode; 1687 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_BYTECOUNT) 1688 d->bytecount = min(8192, cts->xport_specific.sata.bytecount); 1689 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_TAGS) 1690 d->tags = min(SIIS_MAX_SLOTS, cts->xport_specific.sata.tags); 1691 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_PM) { 1692 ch->pm_present = cts->xport_specific.sata.pm_present; 1693 if (ch->pm_present) 1694 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_PME); 1695 else 1696 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_PME); 1697 } 1698 if (cts->xport_specific.sata.valid & CTS_SATA_VALID_TAGS) 1699 d->atapi = cts->xport_specific.sata.atapi; 1700 ccb->ccb_h.status = CAM_REQ_CMP; 1701 break; 1702 } 1703 case XPT_GET_TRAN_SETTINGS: 1704 /* Get default/user set transfer settings for the target */ 1705 { 1706 struct ccb_trans_settings *cts = &ccb->cts; 1707 struct siis_device *d; 1708 uint32_t status; 1709 1710 if (siis_check_ids(dev, ccb)) 1711 return; 1712 if (cts->type == CTS_TYPE_CURRENT_SETTINGS) 1713 d = &ch->curr[ccb->ccb_h.target_id]; 1714 else 1715 d = &ch->user[ccb->ccb_h.target_id]; 1716 cts->protocol = PROTO_ATA; 1717 cts->protocol_version = PROTO_VERSION_UNSPECIFIED; 1718 cts->transport = XPORT_SATA; 1719 cts->transport_version = XPORT_VERSION_UNSPECIFIED; 1720 cts->proto_specific.valid = 0; 1721 cts->xport_specific.sata.valid = 0; 1722 if (cts->type == CTS_TYPE_CURRENT_SETTINGS && 1723 (ccb->ccb_h.target_id == 15 || 1724 (ccb->ccb_h.target_id == 0 && !ch->pm_present))) { 1725 status = ATA_INL(ch->r_mem, SIIS_P_SSTS) & ATA_SS_SPD_MASK; 1726 if (status & 0x0f0) { 1727 cts->xport_specific.sata.revision = 1728 (status & 0x0f0) >> 4; 1729 cts->xport_specific.sata.valid |= 1730 CTS_SATA_VALID_REVISION; 1731 } 1732 } else { 1733 cts->xport_specific.sata.revision = d->revision; 1734 cts->xport_specific.sata.valid |= CTS_SATA_VALID_REVISION; 1735 } 1736 cts->xport_specific.sata.mode = d->mode; 1737 cts->xport_specific.sata.valid |= CTS_SATA_VALID_MODE; 1738 cts->xport_specific.sata.bytecount = d->bytecount; 1739 cts->xport_specific.sata.valid |= CTS_SATA_VALID_BYTECOUNT; 1740 cts->xport_specific.sata.pm_present = ch->pm_present; 1741 cts->xport_specific.sata.valid |= CTS_SATA_VALID_PM; 1742 cts->xport_specific.sata.tags = d->tags; 1743 cts->xport_specific.sata.valid |= CTS_SATA_VALID_TAGS; 1744 cts->xport_specific.sata.atapi = d->atapi; 1745 cts->xport_specific.sata.valid |= CTS_SATA_VALID_ATAPI; 1746 ccb->ccb_h.status = CAM_REQ_CMP; 1747 break; 1748 } 1749 case XPT_RESET_BUS: /* Reset the specified SCSI bus */ 1750 case XPT_RESET_DEV: /* Bus Device Reset the specified SCSI device */ 1751 siis_reset(dev); 1752 ccb->ccb_h.status = CAM_REQ_CMP; 1753 break; 1754 case XPT_TERM_IO: /* Terminate the I/O process */ 1755 /* XXX Implement */ 1756 ccb->ccb_h.status = CAM_REQ_INVALID; 1757 break; 1758 case XPT_PATH_INQ: /* Path routing inquiry */ 1759 { 1760 struct ccb_pathinq *cpi = &ccb->cpi; 1761 1762 cpi->version_num = 1; /* XXX??? */ 1763 cpi->hba_inquiry = PI_SDTR_ABLE | PI_TAG_ABLE; 1764 cpi->hba_inquiry |= PI_SATAPM; 1765 cpi->target_sprt = 0; 1766 cpi->hba_misc = PIM_SEQSCAN; 1767 cpi->hba_eng_cnt = 0; 1768 cpi->max_target = 15; 1769 cpi->max_lun = 0; 1770 cpi->initiator_id = 0; 1771 cpi->bus_id = cam_sim_bus(sim); 1772 cpi->base_transfer_speed = 150000; 1773 strncpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN); 1774 strncpy(cpi->hba_vid, "SIIS", HBA_IDLEN); 1775 strncpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN); 1776 cpi->unit_number = cam_sim_unit(sim); 1777 cpi->transport = XPORT_SATA; 1778 cpi->transport_version = XPORT_VERSION_UNSPECIFIED; 1779 cpi->protocol = PROTO_ATA; 1780 cpi->protocol_version = PROTO_VERSION_UNSPECIFIED; 1781 cpi->ccb_h.status = CAM_REQ_CMP; 1782 cpi->maxio = MAXPHYS; 1783 break; 1784 } 1785 default: 1786 ccb->ccb_h.status = CAM_REQ_INVALID; 1787 break; 1788 } 1789 xpt_done(ccb); 1790} 1791 1792static void 1793siispoll(struct cam_sim *sim) 1794{ 1795 struct siis_channel *ch = (struct siis_channel *)cam_sim_softc(sim); 1796 1797 siis_ch_intr(ch->dev); 1798} 1799