1227064Sbz/* 2250340Sdavidcs * Copyright (c) 2011-2013 Qlogic Corporation 3227064Sbz * All rights reserved. 4227064Sbz * 5227064Sbz * Redistribution and use in source and binary forms, with or without 6227064Sbz * modification, are permitted provided that the following conditions 7227064Sbz * are met: 8227064Sbz * 9227064Sbz * 1. Redistributions of source code must retain the above copyright 10227064Sbz * notice, this list of conditions and the following disclaimer. 11227064Sbz * 2. Redistributions in binary form must reproduce the above copyright 12227064Sbz * notice, this list of conditions and the following disclaimer in the 13227064Sbz * documentation and/or other materials provided with the distribution. 14227064Sbz * 15227064Sbz * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 16227064Sbz * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17227064Sbz * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18227064Sbz * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 19227064Sbz * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 20227064Sbz * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 21227064Sbz * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 22227064Sbz * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 23227064Sbz * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 24227064Sbz * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 25227064Sbz * POSSIBILITY OF SUCH DAMAGE. 26227064Sbz * 27227064Sbz * $FreeBSD$ 28227064Sbz */ 29227064Sbz 30227064Sbz/* 31227064Sbz * File: qla_def.h 32227064Sbz * Author : David C Somayajulu, Qlogic Corporation, Aliso Viejo, CA 92656. 33227064Sbz */ 34227064Sbz 35227064Sbz#ifndef _QLA_DEF_H_ 36227064Sbz#define _QLA_DEF_H_ 37227064Sbz 38227064Sbz#define BIT_0 (0x1 << 0) 39227064Sbz#define BIT_1 (0x1 << 1) 40227064Sbz#define BIT_2 (0x1 << 2) 41227064Sbz#define BIT_3 (0x1 << 3) 42227064Sbz#define BIT_4 (0x1 << 4) 43227064Sbz#define BIT_5 (0x1 << 5) 44227064Sbz#define BIT_6 (0x1 << 6) 45227064Sbz#define BIT_7 (0x1 << 7) 46227064Sbz#define BIT_8 (0x1 << 8) 47227064Sbz#define BIT_9 (0x1 << 9) 48227064Sbz#define BIT_10 (0x1 << 10) 49227064Sbz#define BIT_11 (0x1 << 11) 50227064Sbz#define BIT_12 (0x1 << 12) 51227064Sbz#define BIT_13 (0x1 << 13) 52227064Sbz#define BIT_14 (0x1 << 14) 53227064Sbz#define BIT_15 (0x1 << 15) 54227064Sbz#define BIT_16 (0x1 << 16) 55227064Sbz#define BIT_17 (0x1 << 17) 56227064Sbz#define BIT_18 (0x1 << 18) 57227064Sbz#define BIT_19 (0x1 << 19) 58227064Sbz#define BIT_20 (0x1 << 20) 59227064Sbz#define BIT_21 (0x1 << 21) 60227064Sbz#define BIT_22 (0x1 << 22) 61227064Sbz#define BIT_23 (0x1 << 23) 62227064Sbz#define BIT_24 (0x1 << 24) 63227064Sbz#define BIT_25 (0x1 << 25) 64227064Sbz#define BIT_26 (0x1 << 26) 65227064Sbz#define BIT_27 (0x1 << 27) 66227064Sbz#define BIT_28 (0x1 << 28) 67227064Sbz#define BIT_29 (0x1 << 29) 68227064Sbz#define BIT_30 (0x1 << 30) 69227064Sbz#define BIT_31 (0x1 << 31) 70227064Sbz 71227064Sbzstruct qla_rx_buf { 72227064Sbz struct mbuf *m_head; 73227064Sbz bus_dmamap_t map; 74227064Sbz bus_addr_t paddr; 75227064Sbz uint32_t handle; 76227064Sbz void *next; 77227064Sbz}; 78227064Sbztypedef struct qla_rx_buf qla_rx_buf_t; 79227064Sbz 80227064Sbzstruct qla_tx_buf { 81227064Sbz struct mbuf *m_head; 82227064Sbz bus_dmamap_t map; 83227064Sbz}; 84227064Sbztypedef struct qla_tx_buf qla_tx_buf_t; 85227064Sbz 86227064Sbz#define QLA_MAX_SEGMENTS 63 /* maximum # of segs in a sg list */ 87227064Sbz#define QLA_MAX_FRAME_SIZE MJUM9BYTES 88227064Sbz#define QLA_STD_FRAME_SIZE 1514 89227547Sbz#define QLA_MAX_TSO_FRAME_SIZE ((64 * 1024 - 1) + 22) 90227064Sbz 91227064Sbz/* Number of MSIX/MSI Vectors required */ 92227064Sbz#define Q8_MSI_COUNT 4 93227064Sbz 94227064Sbzstruct qla_ivec { 95227064Sbz struct resource *irq; 96227064Sbz void *handle; 97227064Sbz int irq_rid; 98227064Sbz void *ha; 99227064Sbz struct task rcv_task; 100227064Sbz struct taskqueue *rcv_tq; 101227064Sbz}; 102227064Sbz 103227064Sbztypedef struct qla_ivec qla_ivec_t; 104227064Sbz 105227064Sbz#define QLA_WATCHDOG_CALLOUT_TICKS 1 106227064Sbz 107227064Sbz/* 108227064Sbz * Adapter structure contains the hardware independant information of the 109227064Sbz * pci function. 110227064Sbz */ 111227064Sbzstruct qla_host { 112227064Sbz volatile struct { 113227064Sbz volatile uint32_t 114227064Sbz qla_watchdog_active :1, 115227064Sbz qla_watchdog_exit :1, 116227064Sbz qla_watchdog_pause :1, 117227064Sbz lro_init :1, 118227064Sbz stop_rcv :1, 119227064Sbz link_up :1, 120227064Sbz parent_tag :1, 121227064Sbz lock_init :1; 122227064Sbz } flags; 123227064Sbz 124227064Sbz device_t pci_dev; 125227064Sbz 126227064Sbz uint8_t pci_func; 127227064Sbz uint16_t watchdog_ticks; 128227064Sbz uint8_t resvd; 129227064Sbz 130227064Sbz /* ioctl related */ 131227064Sbz struct cdev *ioctl_dev; 132227064Sbz 133227064Sbz /* register mapping */ 134227064Sbz struct resource *pci_reg; 135227064Sbz int reg_rid; 136227064Sbz 137227064Sbz /* interrupts */ 138227064Sbz struct resource *irq; 139227064Sbz int msix_count; 140227064Sbz void *intr_handle; 141227064Sbz qla_ivec_t irq_vec[Q8_MSI_COUNT]; 142227064Sbz 143227064Sbz /* parent dma tag */ 144227064Sbz bus_dma_tag_t parent_tag; 145227064Sbz 146227064Sbz /* interface to o.s */ 147227064Sbz struct ifnet *ifp; 148227064Sbz 149227064Sbz struct ifmedia media; 150227064Sbz uint16_t max_frame_size; 151227064Sbz uint16_t rsrvd0; 152227064Sbz int if_flags; 153227064Sbz 154227064Sbz /* hardware access lock */ 155227064Sbz struct mtx hw_lock; 156227064Sbz volatile uint32_t hw_lock_held; 157227064Sbz 158227064Sbz /* transmit and receive buffers */ 159227064Sbz qla_tx_buf_t tx_buf[NUM_TX_DESCRIPTORS]; 160227064Sbz bus_dma_tag_t tx_tag; 161227064Sbz struct mtx tx_lock; 162227064Sbz struct task tx_task; 163227064Sbz struct taskqueue *tx_tq; 164227064Sbz struct callout tx_callout; 165227064Sbz 166227064Sbz qla_rx_buf_t rx_buf[NUM_RX_DESCRIPTORS]; 167227064Sbz qla_rx_buf_t rx_jbuf[NUM_RX_JUMBO_DESCRIPTORS]; 168227064Sbz bus_dma_tag_t rx_tag; 169227064Sbz 170227064Sbz struct mtx rx_lock; 171227064Sbz struct mtx rxj_lock; 172227064Sbz 173227064Sbz /* stats */ 174227064Sbz uint32_t err_m_getcl; 175227064Sbz uint32_t err_m_getjcl; 176227064Sbz uint32_t err_tx_dmamap_create; 177227064Sbz uint32_t err_tx_dmamap_load; 178227064Sbz uint32_t err_tx_defrag; 179227064Sbz 180227064Sbz uint64_t rx_frames; 181227064Sbz uint64_t rx_bytes; 182227064Sbz 183227064Sbz uint64_t tx_frames; 184227064Sbz uint64_t tx_bytes; 185227064Sbz 186227064Sbz uint32_t fw_ver_major; 187227064Sbz uint32_t fw_ver_minor; 188227064Sbz uint32_t fw_ver_sub; 189227064Sbz uint32_t fw_ver_build; 190227064Sbz 191227064Sbz /* hardware specific */ 192227064Sbz qla_hw_t hw; 193227064Sbz 194227064Sbz /* debug stuff */ 195227064Sbz volatile const char *qla_lock; 196227064Sbz volatile const char *qla_unlock; 197250340Sdavidcs 198250340Sdavidcs uint8_t fw_ver_str[32]; 199227064Sbz}; 200227064Sbztypedef struct qla_host qla_host_t; 201227064Sbz 202227064Sbz/* note that align has to be a power of 2 */ 203227064Sbz#define QL_ALIGN(size, align) (size + (align - 1)) & ~(align - 1); 204227064Sbz#define QL_MIN(x, y) ((x < y) ? x : y) 205227064Sbz 206227064Sbz#define QL_RUNNING(ifp) \ 207227064Sbz ((ifp->if_drv_flags & (IFF_DRV_RUNNING | IFF_DRV_OACTIVE)) == \ 208227064Sbz IFF_DRV_RUNNING) 209227064Sbz 210227064Sbz#endif /* #ifndef _QLA_DEF_H_ */ 211