1/*- 2 * Copyright (c) 2000 3 * Bill Paul <wpaul@ee.columbia.edu>. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 3. All advertising materials mentioning features or use of this software 14 * must display the following acknowledgement: 15 * This product includes software developed by Bill Paul. 16 * 4. Neither the name of the author nor the names of any co-contributors 17 * may be used to endorse or promote products derived from this software 18 * without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 30 * THE POSSIBILITY OF SUCH DAMAGE. 31 * 32 * $FreeBSD$ 33 */ 34 35#ifndef _DEV_MII_XMPHYREG_H_ 36#define _DEV_MII_XMPHYREG_H_ 37 38/* 39 * XaQti XMAC II PHY registers 40 */ 41 42#define XMPHY_MII_BMCR 0x00 43#define XMPHY_BMCR_RESET 0x8000 44#define XMPHY_BMCR_LOOP 0x4000 45#define XMPHY_BMCR_AUTOEN 0x1000 /* Autoneg enabled */ 46#define XMPHY_BMCR_PDOWN 0x0800 /* Power down */ 47#define XMPHY_BMCR_ISO 0x0400 /* Isolate */ 48#define XMPHY_BMCR_STARTNEG 0x0200 /* Restart autoneg */ 49#define XMPHY_BMCR_FDX 0x0100 /* Duplex mode */ 50 51#define XMPHY_MII_BMSR 0x01 52#define XMPHY_BMSR_EXTSTS 0x0100 /* Extended status present */ 53#define XMPHY_BMSR_ACOMP 0x0020 /* Autoneg complete */ 54#define XMPHY_BMSR_RFAULT 0x0010 /* Remote fault condition occurred */ 55#define XMPHY_BMSR_ANEG 0x0008 /* Autoneg capable */ 56#define XMPHY_BMSR_LINK 0x0004 /* Link status */ 57#define XMPHY_BMSR_EXT 0x0001 /* Extended capability */ 58 59#define XMPHY_MII_ANAR 0x04 60#define XMPHY_ANAR_NP 0x8000 /* Next page */ 61#define XMPHY_ANAR_ACK 0x4000 /* Next page or base received */ 62#define XMPHY_ANAR_RFBITS 0x3000 /* Remote fault bits */ 63#define XMPHY_ANAR_PAUSEBITS 0x0180 /* Pause bits */ 64#define XMPHY_ANAR_HDX 0x0040 /* Select half duplex */ 65#define XMPHY_ANAR_FDX 0x0020 /* Select full duplex */ 66 67#define XMPHY_MII_ANLPAR 0x05 68#define XMPHY_ANLPAR_NP 0x8000 /* Next page */ 69#define XMPHY_ANLPAR_ACK 0x4000 /* Next page or base received */ 70#define XMPHY_ANLPAR_RFBITS 0x3000 /* Remote fault bits */ 71#define XMPHY_ANLPAR_PAUSEBITS 0x0180 /* Pause bits */ 72#define XMPHY_ANLPAR_HDX 0x0040 /* Select half duplex */ 73#define XMPHY_ANLPAR_FDX 0x0020 /* Select full duplex */ 74 75#define XMPHY_RF_OK 0x0000 /* No error -- link is good */ 76#define XMPHY_RF_LINKFAIL 0x1000 /* Link failure */ 77#define XMPHY_RF_OFFLINE 0x2000 /* Offline */ 78#define XMPHY_RF_ANEGFAIL 0x3000 /* Autonegotiation error */ 79 80#define XMPHY_PAUSE_NOPAUSE 0x0000 /* No pause possible */ 81#define XMPHY_PAUSE_ASYMETRIC 0x0080 /* Asymetric pause toward LP */ 82#define XMPHY_PAUSE_SYMETRIC 0x0100 /* Symetric pause */ 83#define XMPHY_PAUSE_BOTH 0x0180 /* Both sym and asym pause */ 84 85#define XMPHY_MII_ANER 0x06 86#define XMPHY_ANER_LPNP 0x0008 /* Link partner can next page */ 87#define XMPHY_ANER_NP 0x0004 /* Local PHY can next page */ 88#define XMPHY_ANER_RX 0x0002 /* Next page received */ 89 90#define XMPHY_MII_NEXTP 0x07 /* Next page */ 91#define XMPHY_NEXTP_MORE 0x8000 /* More next pages to follow */ 92#define XMPHY_NEXTP_ACK1 0x4000 /* Ack bit received OK */ 93#define XMPHY_NEXTP_MP 0x2000 /* Page is message page */ 94#define XMPHY_NEXTP_ACK2 0x1000 /* can comply with message (r/o) */ 95#define XMPHY_NEXTP_TOGGLE 0x0800 /* sync with LP */ 96#define XMPHY_NEXTP_MESSAGE 0x07FF /* message */ 97 98#define XMPHY_MII_NEXTPLP 0x08 /* Next page of link partner */ 99#define XMPHY_NEXTPLP_MORE 0x8000 /* More next pages to follow */ 100#define XMPHY_NEXTPLP_ACK1 0x4000 /* Ack bit received OK */ 101#define XMPHY_NEXTPLP_MP 0x2000 /* Page is message page */ 102#define XMPHY_NEXTPLP_ACK2 0x1000 /* can comply with message (r/o) */ 103#define XMPHY_NEXTPLP_TOGGLE 0x0800 /* sync with LP */ 104#define XMPHY_NEXTPLP_MESSAGE 0x07FF /* message */ 105 106#define XMPHY_MII_EXTSTS 0x0F /* Extended status */ 107#define XMPHY_EXTSTS_FDX 0x8000 /* 1000base-X FD capable */ 108#define XMPHY_EXTSTS_HDX 0x4000 /* 1000base-X HD capable */ 109 110#define XMPHY_MII_RESAB 0x10 /* Resolved ability */ 111#define XMPHY_RESAB_PAUSEBITS 0x0180 /* Pause bits */ 112#define XMPHY_RESAB_HDX 0x0040 /* Half duplex selected */ 113#define XMPHY_RESAB_FDX 0x0020 /* Full duplex selected */ 114#define XMPHY_RESAB_ABLMIS 0x0010 /* Ability mismatch */ 115#define XMPHY_RESAB_PAUSEMIS 0x0008 /* Pause mismatch */ 116 117#endif /* _DEV_MII_XMPHYREG_H_ */ 118