1139749Simp/*- 275353Smjacob * Principal Author: Parag Patel 375353Smjacob * Copyright (c) 2001 475353Smjacob * All rights reserved. 575353Smjacob * 675353Smjacob * Redistribution and use in source and binary forms, with or without 775353Smjacob * modification, are permitted provided that the following conditions 875353Smjacob * are met: 975353Smjacob * 1. Redistributions of source code must retain the above copyright 1075353Smjacob * notice unmodified, this list of conditions, and the following 1175353Smjacob * disclaimer. 1275353Smjacob * 2. Redistributions in binary form must reproduce the above copyright 1375353Smjacob * notice, this list of conditions and the following disclaimer in the 1475353Smjacob * documentation and/or other materials provided with the distribution. 1575353Smjacob * 1675353Smjacob * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 1775353Smjacob * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 1875353Smjacob * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 1975353Smjacob * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 2075353Smjacob * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 2175353Smjacob * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 2275353Smjacob * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 2375353Smjacob * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 2475353Smjacob * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 2575353Smjacob * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 2675353Smjacob * SUCH DAMAGE. 2775353Smjacob * 28220938Smarius * Additional Copyright (c) 2001 by Traakan Software under same licence. 2975353Smjacob * Secondary Author: Matthew Jacob 3075353Smjacob */ 3175353Smjacob 32129843Smarius#include <sys/cdefs.h> 33129843Smarius__FBSDID("$FreeBSD$"); 34129843Smarius 3575353Smjacob/* 3675353Smjacob * driver for the Marvell 88E1000 series external 1000/100/10-BT PHY. 3775353Smjacob */ 3875353Smjacob 39120281Swilko/* 40120281Swilko * Support added for the Marvell 88E1011 (Alaska) 1000/100/10baseTX and 41120281Swilko * 1000baseSX PHY. 42120281Swilko * Nathan Binkert <nate@openbsd.org> 43120281Swilko * Jung-uk Kim <jkim@niksun.com> 44120281Swilko */ 45120281Swilko 4675353Smjacob#include <sys/param.h> 4775353Smjacob#include <sys/systm.h> 4875353Smjacob#include <sys/kernel.h> 49129876Sphk#include <sys/module.h> 5075353Smjacob#include <sys/socket.h> 5175353Smjacob#include <sys/bus.h> 5275353Smjacob 5375353Smjacob 5475353Smjacob#include <net/if.h> 5575353Smjacob#include <net/if_media.h> 5675353Smjacob 5775353Smjacob#include <dev/mii/mii.h> 5875353Smjacob#include <dev/mii/miivar.h> 59109514Sobrien#include "miidevs.h" 6075353Smjacob 6175353Smjacob#include <dev/mii/e1000phyreg.h> 6275353Smjacob 6375353Smjacob#include "miibus_if.h" 6475353Smjacob 65165095Syongaristatic int e1000phy_probe(device_t); 66165095Syongaristatic int e1000phy_attach(device_t); 6775353Smjacob 6875353Smjacobstatic device_method_t e1000phy_methods[] = { 6975353Smjacob /* device interface */ 7075353Smjacob DEVMETHOD(device_probe, e1000phy_probe), 7175353Smjacob DEVMETHOD(device_attach, e1000phy_attach), 7295722Sphk DEVMETHOD(device_detach, mii_phy_detach), 7375353Smjacob DEVMETHOD(device_shutdown, bus_generic_shutdown), 74227908Smarius DEVMETHOD_END 7575353Smjacob}; 7675353Smjacob 7775353Smjacobstatic devclass_t e1000phy_devclass; 7875353Smjacobstatic driver_t e1000phy_driver = { 79165099Syongari "e1000phy", 80165099Syongari e1000phy_methods, 81221407Smarius sizeof(struct mii_softc) 8275353Smjacob}; 83165099Syongari 8475353SmjacobDRIVER_MODULE(e1000phy, miibus, e1000phy_driver, e1000phy_devclass, 0, 0); 8575353Smjacob 8684145Sjlemonstatic int e1000phy_service(struct mii_softc *, struct mii_data *, int); 8784145Sjlemonstatic void e1000phy_status(struct mii_softc *); 8884145Sjlemonstatic void e1000phy_reset(struct mii_softc *); 89221407Smariusstatic int e1000phy_mii_phy_auto(struct mii_softc *, int); 9075353Smjacob 91165099Syongaristatic const struct mii_phydesc e1000phys[] = { 92165099Syongari MII_PHY_DESC(MARVELL, E1000), 93165099Syongari MII_PHY_DESC(MARVELL, E1011), 94165099Syongari MII_PHY_DESC(MARVELL, E1000_3), 95165099Syongari MII_PHY_DESC(MARVELL, E1000_5), 96165099Syongari MII_PHY_DESC(MARVELL, E1111), 97165099Syongari MII_PHY_DESC(xxMARVELL, E1000), 98165099Syongari MII_PHY_DESC(xxMARVELL, E1011), 99165099Syongari MII_PHY_DESC(xxMARVELL, E1000_3), 100221407Smarius MII_PHY_DESC(xxMARVELL, E1000S), 101165099Syongari MII_PHY_DESC(xxMARVELL, E1000_5), 102221407Smarius MII_PHY_DESC(xxMARVELL, E1101), 103221407Smarius MII_PHY_DESC(xxMARVELL, E3082), 104221407Smarius MII_PHY_DESC(xxMARVELL, E1112), 105221407Smarius MII_PHY_DESC(xxMARVELL, E1149), 106165099Syongari MII_PHY_DESC(xxMARVELL, E1111), 107221407Smarius MII_PHY_DESC(xxMARVELL, E1116), 108221407Smarius MII_PHY_DESC(xxMARVELL, E1116R), 109238874Shrs MII_PHY_DESC(xxMARVELL, E1116R_29), 110221407Smarius MII_PHY_DESC(xxMARVELL, E1118), 111242272Sjmallett MII_PHY_DESC(xxMARVELL, E1145), 112223688Simp MII_PHY_DESC(xxMARVELL, E1149R), 113221407Smarius MII_PHY_DESC(xxMARVELL, E3016), 114221407Smarius MII_PHY_DESC(xxMARVELL, PHYG65G), 115165099Syongari MII_PHY_END 116165099Syongari}; 11775353Smjacob 118221407Smariusstatic const struct mii_phy_funcs e1000phy_funcs = { 119221407Smarius e1000phy_service, 120221407Smarius e1000phy_status, 121221407Smarius e1000phy_reset 122221407Smarius}; 123221407Smarius 12475353Smjacobstatic int 12575353Smjacobe1000phy_probe(device_t dev) 12675353Smjacob{ 12775353Smjacob 128165099Syongari return (mii_phy_dev_probe(dev, e1000phys, BUS_PROBE_DEFAULT)); 12975353Smjacob} 13075353Smjacob 13175353Smjacobstatic int 13275353Smjacobe1000phy_attach(device_t dev) 13375353Smjacob{ 13475353Smjacob struct mii_softc *sc; 135197590Syongari struct ifnet *ifp; 13675353Smjacob 137221407Smarius sc = device_get_softc(dev); 13875353Smjacob 139221407Smarius mii_phy_dev_attach(dev, MIIF_NOMANPAUSE, &e1000phy_funcs, 0); 14075353Smjacob 141197590Syongari ifp = sc->mii_pdata->mii_ifp; 142213893Smarius if (strcmp(ifp->if_dname, "msk") == 0 && 143213893Smarius (sc->mii_flags & MIIF_MACPRIV0) != 0) 144213893Smarius sc->mii_flags |= MIIF_PHYPRIV0; 145197590Syongari 146221407Smarius switch (sc->mii_mpd_model) { 147221407Smarius case MII_MODEL_xxMARVELL_E1011: 148221407Smarius case MII_MODEL_xxMARVELL_E1112: 149165099Syongari if (PHY_READ(sc, E1000_ESSR) & E1000_ESSR_FIBER_LINK) 150165099Syongari sc->mii_flags |= MIIF_HAVEFIBER; 151165099Syongari break; 152221407Smarius case MII_MODEL_xxMARVELL_E1149: 153223688Simp case MII_MODEL_xxMARVELL_E1149R: 154183966Syongari /* 155183966Syongari * Some 88E1149 PHY's page select is initialized to 156183966Syongari * point to other bank instead of copper/fiber bank 157183966Syongari * which in turn resulted in wrong registers were 158183966Syongari * accessed during PHY operation. It is believed that 159183966Syongari * page 0 should be used for copper PHY so reinitialize 160183966Syongari * E1000_EADR to select default copper PHY. If parent 161183966Syongari * device know the type of PHY(either copper or fiber), 162183966Syongari * that information should be used to select default 163183966Syongari * type of PHY. 164183966Syongari */ 165183966Syongari PHY_WRITE(sc, E1000_EADR, 0); 166183966Syongari break; 167165099Syongari } 168165099Syongari 169221407Smarius PHY_RESET(sc); 17075353Smjacob 171221407Smarius sc->mii_capabilities = PHY_READ(sc, MII_BMSR) & sc->mii_capmask; 172192708Syongari if (sc->mii_capabilities & BMSR_EXTSTAT) 173192708Syongari sc->mii_extcapabilities = PHY_READ(sc, MII_EXTSR); 17484144Sjlemon device_printf(dev, " "); 175192708Syongari mii_phy_add_media(sc); 176192708Syongari printf("\n"); 17784144Sjlemon 17875353Smjacob MIIBUS_MEDIAINIT(sc->mii_dev); 179165095Syongari return (0); 18075353Smjacob} 18175353Smjacob 18275353Smjacobstatic void 18375353Smjacobe1000phy_reset(struct mii_softc *sc) 18475353Smjacob{ 185183493Syongari uint16_t reg, page; 18675353Smjacob 18775353Smjacob reg = PHY_READ(sc, E1000_SCR); 188165099Syongari if ((sc->mii_flags & MIIF_HAVEFIBER) != 0) { 189165099Syongari reg &= ~E1000_SCR_AUTO_X_MODE; 190165099Syongari PHY_WRITE(sc, E1000_SCR, reg); 191221407Smarius if (sc->mii_mpd_model == MII_MODEL_xxMARVELL_E1112) { 192165099Syongari /* Select 1000BASE-X only mode. */ 193183493Syongari page = PHY_READ(sc, E1000_EADR); 194165099Syongari PHY_WRITE(sc, E1000_EADR, 2); 195165099Syongari reg = PHY_READ(sc, E1000_SCR); 196165099Syongari reg &= ~E1000_SCR_MODE_MASK; 197165099Syongari reg |= E1000_SCR_MODE_1000BX; 198165099Syongari PHY_WRITE(sc, E1000_SCR, reg); 199214566Smarius if ((sc->mii_flags & MIIF_PHYPRIV0) != 0) { 200197590Syongari /* Set SIGDET polarity low for SFP module. */ 201197590Syongari PHY_WRITE(sc, E1000_EADR, 1); 202197590Syongari reg = PHY_READ(sc, E1000_SCR); 203197590Syongari reg |= E1000_SCR_FIB_SIGDET_POLARITY; 204197590Syongari PHY_WRITE(sc, E1000_SCR, reg); 205197590Syongari } 206183493Syongari PHY_WRITE(sc, E1000_EADR, page); 207165099Syongari } 208165099Syongari } else { 209221407Smarius switch (sc->mii_mpd_model) { 210221407Smarius case MII_MODEL_xxMARVELL_E1111: 211221407Smarius case MII_MODEL_xxMARVELL_E1112: 212221407Smarius case MII_MODEL_xxMARVELL_E1116: 213238874Shrs case MII_MODEL_xxMARVELL_E1116R_29: 214221407Smarius case MII_MODEL_xxMARVELL_E1118: 215221407Smarius case MII_MODEL_xxMARVELL_E1149: 216223688Simp case MII_MODEL_xxMARVELL_E1149R: 217221407Smarius case MII_MODEL_xxMARVELL_PHYG65G: 218165099Syongari /* Disable energy detect mode. */ 219165099Syongari reg &= ~E1000_SCR_EN_DETECT_MASK; 220165099Syongari reg |= E1000_SCR_AUTO_X_MODE; 221238874Shrs if (sc->mii_mpd_model == MII_MODEL_xxMARVELL_E1116 || 222238874Shrs sc->mii_mpd_model == MII_MODEL_xxMARVELL_E1116R_29) 223173133Syongari reg &= ~E1000_SCR_POWER_DOWN; 224192713Syongari reg |= E1000_SCR_ASSERT_CRS_ON_TX; 225165099Syongari break; 226221407Smarius case MII_MODEL_xxMARVELL_E3082: 227165099Syongari reg |= (E1000_SCR_AUTO_X_MODE >> 1); 228192713Syongari reg |= E1000_SCR_ASSERT_CRS_ON_TX; 229165099Syongari break; 230221407Smarius case MII_MODEL_xxMARVELL_E3016: 231192713Syongari reg |= E1000_SCR_AUTO_MDIX; 232192713Syongari reg &= ~(E1000_SCR_EN_DETECT | 233192713Syongari E1000_SCR_SCRAMBLER_DISABLE); 234192713Syongari reg |= E1000_SCR_LPNP; 235192713Syongari /* XXX Enable class A driver for Yukon FE+ A0. */ 236192713Syongari PHY_WRITE(sc, 0x1C, PHY_READ(sc, 0x1C) | 0x0001); 237192713Syongari break; 238165099Syongari default: 239165099Syongari reg &= ~E1000_SCR_AUTO_X_MODE; 240192713Syongari reg |= E1000_SCR_ASSERT_CRS_ON_TX; 241165099Syongari break; 242165099Syongari } 243221407Smarius if (sc->mii_mpd_model != MII_MODEL_xxMARVELL_E3016) { 244192713Syongari /* Auto correction for reversed cable polarity. */ 245192713Syongari reg &= ~E1000_SCR_POLARITY_REVERSAL; 246192713Syongari } 247165099Syongari PHY_WRITE(sc, E1000_SCR, reg); 248173133Syongari 249221407Smarius if (sc->mii_mpd_model == MII_MODEL_xxMARVELL_E1116 || 250238874Shrs sc->mii_mpd_model == MII_MODEL_xxMARVELL_E1116R_29 || 251223688Simp sc->mii_mpd_model == MII_MODEL_xxMARVELL_E1149 || 252223688Simp sc->mii_mpd_model == MII_MODEL_xxMARVELL_E1149R) { 253173133Syongari PHY_WRITE(sc, E1000_EADR, 2); 254173133Syongari reg = PHY_READ(sc, E1000_SCR); 255173133Syongari reg |= E1000_SCR_RGMII_POWER_UP; 256173133Syongari PHY_WRITE(sc, E1000_SCR, reg); 257196366Syongari PHY_WRITE(sc, E1000_EADR, 0); 258173133Syongari } 259165099Syongari } 26075353Smjacob 261221407Smarius switch (sc->mii_mpd_model) { 262221407Smarius case MII_MODEL_xxMARVELL_E3082: 263221407Smarius case MII_MODEL_xxMARVELL_E1112: 264221407Smarius case MII_MODEL_xxMARVELL_E1118: 265193291Syongari break; 266221407Smarius case MII_MODEL_xxMARVELL_E1116: 267238874Shrs case MII_MODEL_xxMARVELL_E1116R_29: 268193291Syongari page = PHY_READ(sc, E1000_EADR); 269193291Syongari /* Select page 3, LED control register. */ 270193291Syongari PHY_WRITE(sc, E1000_EADR, 3); 271193291Syongari PHY_WRITE(sc, E1000_SCR, 272193291Syongari E1000_SCR_LED_LOS(1) | /* Link/Act */ 273193291Syongari E1000_SCR_LED_INIT(8) | /* 10Mbps */ 274193291Syongari E1000_SCR_LED_STAT1(7) | /* 100Mbps */ 275193291Syongari E1000_SCR_LED_STAT0(7)); /* 1000Mbps */ 276193291Syongari /* Set blink rate. */ 277193291Syongari PHY_WRITE(sc, E1000_IER, E1000_PULSE_DUR(E1000_PULSE_170MS) | 278193291Syongari E1000_BLINK_RATE(E1000_BLINK_84MS)); 279193291Syongari PHY_WRITE(sc, E1000_EADR, page); 280165099Syongari break; 281221407Smarius case MII_MODEL_xxMARVELL_E3016: 282192713Syongari /* LED2 -> ACT, LED1 -> LINK, LED0 -> SPEED. */ 283192713Syongari PHY_WRITE(sc, 0x16, 0x0B << 8 | 0x05 << 4 | 0x04); 284192713Syongari /* Integrated register calibration workaround. */ 285192713Syongari PHY_WRITE(sc, 0x1D, 17); 286192713Syongari PHY_WRITE(sc, 0x1E, 0x3F60); 287192713Syongari break; 288165099Syongari default: 289165099Syongari /* Force TX_CLK to 25MHz clock. */ 290165099Syongari reg = PHY_READ(sc, E1000_ESCR); 291165099Syongari reg |= E1000_ESCR_TX_CLK_25; 292165099Syongari PHY_WRITE(sc, E1000_ESCR, reg); 293165099Syongari break; 294165099Syongari } 295165099Syongari 296165099Syongari /* Reset the PHY so all changes take effect. */ 29775353Smjacob reg = PHY_READ(sc, E1000_CR); 29875353Smjacob reg |= E1000_CR_RESET; 29975353Smjacob PHY_WRITE(sc, E1000_CR, reg); 30075353Smjacob} 30175353Smjacob 30284145Sjlemonstatic int 30375353Smjacobe1000phy_service(struct mii_softc *sc, struct mii_data *mii, int cmd) 30475353Smjacob{ 30575353Smjacob struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 306165099Syongari uint16_t speed, gig; 30775353Smjacob int reg; 30875353Smjacob 30975353Smjacob switch (cmd) { 31075353Smjacob case MII_POLLSTAT: 31175353Smjacob break; 31275353Smjacob 31375353Smjacob case MII_MEDIACHG: 31475353Smjacob /* 31575353Smjacob * If the interface is not up, don't do anything. 31675353Smjacob */ 317165095Syongari if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 31875353Smjacob break; 31975353Smjacob 320165099Syongari if (IFM_SUBTYPE(ife->ifm_media) == IFM_AUTO) { 321221407Smarius e1000phy_mii_phy_auto(sc, ife->ifm_media); 32275353Smjacob break; 323165099Syongari } 32475353Smjacob 325165099Syongari speed = 0; 326165099Syongari switch (IFM_SUBTYPE(ife->ifm_media)) { 32795673Sphk case IFM_1000_T: 328192708Syongari if ((sc->mii_extcapabilities & 329192708Syongari (EXTSR_1000TFDX | EXTSR_1000THDX)) == 0) 330165099Syongari return (EINVAL); 331165099Syongari speed = E1000_CR_SPEED_1000; 33275353Smjacob break; 333120281Swilko case IFM_1000_SX: 334192708Syongari if ((sc->mii_extcapabilities & 335192708Syongari (EXTSR_1000XFDX | EXTSR_1000XHDX)) == 0) 336165099Syongari return (EINVAL); 337165099Syongari speed = E1000_CR_SPEED_1000; 338120281Swilko break; 33975353Smjacob case IFM_100_TX: 340165099Syongari speed = E1000_CR_SPEED_100; 34175353Smjacob break; 34275353Smjacob case IFM_10_T: 343165099Syongari speed = E1000_CR_SPEED_10; 34475353Smjacob break; 345165099Syongari case IFM_NONE: 346165099Syongari reg = PHY_READ(sc, E1000_CR); 347165099Syongari PHY_WRITE(sc, E1000_CR, 348165099Syongari reg | E1000_CR_ISOLATE | E1000_CR_POWER_DOWN); 349165099Syongari goto done; 35075353Smjacob default: 35175353Smjacob return (EINVAL); 35275353Smjacob } 35375353Smjacob 354217412Smarius if ((ife->ifm_media & IFM_FDX) != 0) { 355165099Syongari speed |= E1000_CR_FULL_DUPLEX; 356165099Syongari gig = E1000_1GCR_1000T_FD; 357165099Syongari } else 358165099Syongari gig = E1000_1GCR_1000T; 359165099Syongari 360165099Syongari reg = PHY_READ(sc, E1000_CR); 361165099Syongari reg &= ~E1000_CR_AUTO_NEG_ENABLE; 362165099Syongari PHY_WRITE(sc, E1000_CR, reg | E1000_CR_RESET); 363165099Syongari 364215297Smarius if (IFM_SUBTYPE(ife->ifm_media) == IFM_1000_T) { 365215297Smarius gig |= E1000_1GCR_MS_ENABLE; 366215297Smarius if ((ife->ifm_media & IFM_ETH_MASTER) != 0) 367215297Smarius gig |= E1000_1GCR_MS_VALUE; 368215297Smarius } else if ((sc->mii_extcapabilities & 369215297Smarius (EXTSR_1000TFDX | EXTSR_1000THDX)) != 0) 370217412Smarius gig = 0; 371217412Smarius PHY_WRITE(sc, E1000_1GCR, gig); 372165099Syongari PHY_WRITE(sc, E1000_AR, E1000_AR_SELECTOR_FIELD); 373165099Syongari PHY_WRITE(sc, E1000_CR, speed | E1000_CR_RESET); 374165099Syongaridone: 37575353Smjacob break; 37675353Smjacob case MII_TICK: 37775353Smjacob /* 37884145Sjlemon * Is the interface even up? 37975353Smjacob */ 38084145Sjlemon if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 38175353Smjacob return (0); 38275353Smjacob 38375353Smjacob /* 38484145Sjlemon * Only used for autonegotiation. 38575353Smjacob */ 386173667Syongari if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) { 387173667Syongari sc->mii_ticks = 0; 38884145Sjlemon break; 389173667Syongari } 39075353Smjacob 39175353Smjacob /* 39284145Sjlemon * check for link. 39384145Sjlemon * Read the status register twice; BMSR_LINK is latch-low. 39475353Smjacob */ 39584145Sjlemon reg = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR); 396165099Syongari if (reg & BMSR_LINK) { 397165099Syongari sc->mii_ticks = 0; 39884145Sjlemon break; 399165099Syongari } 40075353Smjacob 401165099Syongari /* Announce link loss right after it happens. */ 402173667Syongari if (sc->mii_ticks++ == 0) 403173667Syongari break; 404165099Syongari if (sc->mii_ticks <= sc->mii_anegticks) 405192709Syongari break; 40675353Smjacob 40784145Sjlemon sc->mii_ticks = 0; 408221407Smarius PHY_RESET(sc); 409221407Smarius e1000phy_mii_phy_auto(sc, ife->ifm_media); 410165099Syongari break; 41175353Smjacob } 41275353Smjacob 41375353Smjacob /* Update the media status. */ 414221407Smarius PHY_STATUS(sc); 41575353Smjacob 41675353Smjacob /* Callback if something changed. */ 41784145Sjlemon mii_phy_update(sc, cmd); 41875353Smjacob return (0); 41975353Smjacob} 42075353Smjacob 42184145Sjlemonstatic void 42275353Smjacobe1000phy_status(struct mii_softc *sc) 42375353Smjacob{ 42475353Smjacob struct mii_data *mii = sc->mii_pdata; 425215297Smarius int bmcr, bmsr, ssr; 42675353Smjacob 42775353Smjacob mii->mii_media_status = IFM_AVALID; 42875353Smjacob mii->mii_media_active = IFM_ETHER; 42975353Smjacob 43075353Smjacob bmsr = PHY_READ(sc, E1000_SR) | PHY_READ(sc, E1000_SR); 43175353Smjacob bmcr = PHY_READ(sc, E1000_CR); 43275353Smjacob ssr = PHY_READ(sc, E1000_SSR); 43375353Smjacob 43475353Smjacob if (bmsr & E1000_SR_LINK_STATUS) 43575353Smjacob mii->mii_media_status |= IFM_ACTIVE; 43675353Smjacob 43775353Smjacob if (bmcr & E1000_CR_LOOPBACK) 43875353Smjacob mii->mii_media_active |= IFM_LOOP; 43975353Smjacob 440192710Syongari if ((bmcr & E1000_CR_AUTO_NEG_ENABLE) != 0 && 441192710Syongari (ssr & E1000_SSR_SPD_DPLX_RESOLVED) == 0) { 44275353Smjacob /* Erg, still trying, I guess... */ 44375353Smjacob mii->mii_media_active |= IFM_NONE; 44475353Smjacob return; 44575353Smjacob } 44675353Smjacob 447120281Swilko if ((sc->mii_flags & MIIF_HAVEFIBER) == 0) { 448192710Syongari switch (ssr & E1000_SSR_SPEED) { 449192710Syongari case E1000_SSR_1000MBS: 450120281Swilko mii->mii_media_active |= IFM_1000_T; 451192710Syongari break; 452192710Syongari case E1000_SSR_100MBS: 453120281Swilko mii->mii_media_active |= IFM_100_TX; 454192710Syongari break; 455192710Syongari case E1000_SSR_10MBS: 456120281Swilko mii->mii_media_active |= IFM_10_T; 457192710Syongari break; 458192710Syongari default: 459192710Syongari mii->mii_media_active |= IFM_NONE; 460192710Syongari return; 461192710Syongari } 462120281Swilko } else { 463197588Syongari /* 464197588Syongari * Some fiber PHY(88E1112) does not seem to set resolved 465197588Syongari * speed so always assume we've got IFM_1000_SX. 466197588Syongari */ 467197588Syongari mii->mii_media_active |= IFM_1000_SX; 468120281Swilko } 46975353Smjacob 470215297Smarius if (ssr & E1000_SSR_DUPLEX) { 47175353Smjacob mii->mii_media_active |= IFM_FDX; 472215297Smarius if ((sc->mii_flags & MIIF_HAVEFIBER) == 0) 473215297Smarius mii->mii_media_active |= mii_phy_flowstatus(sc); 474215297Smarius } else 47575353Smjacob mii->mii_media_active |= IFM_HDX; 47675353Smjacob 477215297Smarius if (IFM_SUBTYPE(mii->mii_media_active) == IFM_1000_T) { 478215297Smarius if (((PHY_READ(sc, E1000_1GSR) | PHY_READ(sc, E1000_1GSR)) & 479215297Smarius E1000_1GSR_MS_CONFIG_RES) != 0) 480215297Smarius mii->mii_media_active |= IFM_ETH_MASTER; 48175353Smjacob } 48275353Smjacob} 48375353Smjacob 48475353Smjacobstatic int 485221407Smariuse1000phy_mii_phy_auto(struct mii_softc *sc, int media) 48675353Smjacob{ 487192711Syongari uint16_t reg; 48875353Smjacob 489192711Syongari if ((sc->mii_flags & MIIF_HAVEFIBER) == 0) { 490192711Syongari reg = PHY_READ(sc, E1000_AR); 491215923Smarius reg &= ~(E1000_AR_PAUSE | E1000_AR_ASM_DIR); 492192711Syongari reg |= E1000_AR_10T | E1000_AR_10T_FD | 493215297Smarius E1000_AR_100TX | E1000_AR_100TX_FD; 494215297Smarius if ((media & IFM_FLOW) != 0 || 495215297Smarius (sc->mii_flags & MIIF_FORCEPAUSE) != 0) 496215297Smarius reg |= E1000_AR_PAUSE | E1000_AR_ASM_DIR; 497192711Syongari PHY_WRITE(sc, E1000_AR, reg | E1000_AR_SELECTOR_FIELD); 498192711Syongari } else 499215297Smarius PHY_WRITE(sc, E1000_AR, E1000_FA_1000X_FD | E1000_FA_1000X); 500192708Syongari if ((sc->mii_extcapabilities & (EXTSR_1000TFDX | EXTSR_1000THDX)) != 0) 501165099Syongari PHY_WRITE(sc, E1000_1GCR, 502165099Syongari E1000_1GCR_1000T_FD | E1000_1GCR_1000T); 503165099Syongari PHY_WRITE(sc, E1000_CR, 504165099Syongari E1000_CR_AUTO_NEG_ENABLE | E1000_CR_RESTART_AUTO_NEG); 50575353Smjacob 50675353Smjacob return (EJUSTRETURN); 50775353Smjacob} 508