1179055Sjfv/****************************************************************************** 2171384Sjfv 3247822Sjfv Copyright (c) 2001-2013, Intel Corporation 4179055Sjfv All rights reserved. 5179055Sjfv 6179055Sjfv Redistribution and use in source and binary forms, with or without 7179055Sjfv modification, are permitted provided that the following conditions are met: 8179055Sjfv 9179055Sjfv 1. Redistributions of source code must retain the above copyright notice, 10179055Sjfv this list of conditions and the following disclaimer. 11179055Sjfv 12179055Sjfv 2. Redistributions in binary form must reproduce the above copyright 13179055Sjfv notice, this list of conditions and the following disclaimer in the 14179055Sjfv documentation and/or other materials provided with the distribution. 15179055Sjfv 16179055Sjfv 3. Neither the name of the Intel Corporation nor the names of its 17179055Sjfv contributors may be used to endorse or promote products derived from 18179055Sjfv this software without specific prior written permission. 19179055Sjfv 20179055Sjfv THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21179055Sjfv AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22179055Sjfv IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23179055Sjfv ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24179055Sjfv LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25179055Sjfv CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26179055Sjfv SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27179055Sjfv INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28179055Sjfv CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29179055Sjfv ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30179055Sjfv POSSIBILITY OF SUCH DAMAGE. 31171384Sjfv 32179055Sjfv******************************************************************************/ 33179055Sjfv/*$FreeBSD$*/ 34171384Sjfv 35171384Sjfv#ifndef _IXGBE_OS_H_ 36171384Sjfv#define _IXGBE_OS_H_ 37171384Sjfv 38171384Sjfv#include <sys/types.h> 39171384Sjfv#include <sys/param.h> 40230775Sjfv#include <sys/endian.h> 41171384Sjfv#include <sys/systm.h> 42171384Sjfv#include <sys/mbuf.h> 43171384Sjfv#include <sys/protosw.h> 44171384Sjfv#include <sys/socket.h> 45171384Sjfv#include <sys/malloc.h> 46171384Sjfv#include <sys/kernel.h> 47171384Sjfv#include <sys/bus.h> 48171384Sjfv#include <machine/bus.h> 49171384Sjfv#include <sys/rman.h> 50171384Sjfv#include <machine/resource.h> 51171384Sjfv#include <vm/vm.h> 52171384Sjfv#include <vm/pmap.h> 53171384Sjfv#include <machine/clock.h> 54171384Sjfv#include <dev/pci/pcivar.h> 55171384Sjfv#include <dev/pci/pcireg.h> 56171384Sjfv 57171384Sjfv#define ASSERT(x) if(!(x)) panic("IXGBE: x") 58238149Sjfv#define EWARN(H, W, S) printf(W) 59171384Sjfv 60171384Sjfv/* The happy-fun DELAY macro is defined in /usr/src/sys/i386/include/clock.h */ 61171384Sjfv#define usec_delay(x) DELAY(x) 62171384Sjfv#define msec_delay(x) DELAY(1000*(x)) 63171384Sjfv 64171384Sjfv#define DBG 0 65171384Sjfv#define MSGOUT(S, A, B) printf(S "\n", A, B) 66171384Sjfv#define DEBUGFUNC(F) DEBUGOUT(F); 67171384Sjfv#if DBG 68171384Sjfv #define DEBUGOUT(S) printf(S "\n") 69171384Sjfv #define DEBUGOUT1(S,A) printf(S "\n",A) 70171384Sjfv #define DEBUGOUT2(S,A,B) printf(S "\n",A,B) 71171384Sjfv #define DEBUGOUT3(S,A,B,C) printf(S "\n",A,B,C) 72240466Seadler #define DEBUGOUT4(S,A,B,C,D) printf(S "\n",A,B,C,D) 73240466Seadler #define DEBUGOUT5(S,A,B,C,D,E) printf(S "\n",A,B,C,D,E) 74240466Seadler #define DEBUGOUT6(S,A,B,C,D,E,F) printf(S "\n",A,B,C,D,E,F) 75171384Sjfv #define DEBUGOUT7(S,A,B,C,D,E,F,G) printf(S "\n",A,B,C,D,E,F,G) 76251964Sjfv #define ERROR_REPORT1(S,A) printf(S "\n",A) 77251964Sjfv #define ERROR_REPORT2(S,A,B) printf(S "\n",A,B) 78251964Sjfv #define ERROR_REPORT3(S,A,B,C) printf(S "\n",A,B,C) 79171384Sjfv#else 80171384Sjfv #define DEBUGOUT(S) 81171384Sjfv #define DEBUGOUT1(S,A) 82171384Sjfv #define DEBUGOUT2(S,A,B) 83171384Sjfv #define DEBUGOUT3(S,A,B,C) 84240466Seadler #define DEBUGOUT4(S,A,B,C,D) 85240466Seadler #define DEBUGOUT5(S,A,B,C,D,E) 86171384Sjfv #define DEBUGOUT6(S,A,B,C,D,E,F) 87171384Sjfv #define DEBUGOUT7(S,A,B,C,D,E,F,G) 88251964Sjfv 89251964Sjfv #define ERROR_REPORT1(S,A) 90251964Sjfv #define ERROR_REPORT2(S,A,B) 91251964Sjfv #define ERROR_REPORT3(S,A,B,C) 92171384Sjfv#endif 93171384Sjfv 94171384Sjfv#define FALSE 0 95185352Sjfv#define false 0 /* shared code requires this */ 96171384Sjfv#define TRUE 1 97185352Sjfv#define true 1 98171384Sjfv#define CMD_MEM_WRT_INVALIDATE 0x0010 /* BIT_4 */ 99171384Sjfv#define PCI_COMMAND_REGISTER PCIR_COMMAND 100230775Sjfv 101247822Sjfv/* Shared code dropped this define.. */ 102247822Sjfv#define IXGBE_INTEL_VENDOR_ID 0x8086 103247822Sjfv 104230775Sjfv/* Bunch of defines for shared code bogosity */ 105194875Sjfv#define UNREFERENCED_PARAMETER(_p) 106230775Sjfv#define UNREFERENCED_1PARAMETER(_p) 107230775Sjfv#define UNREFERENCED_2PARAMETER(_p, _q) 108230775Sjfv#define UNREFERENCED_3PARAMETER(_p, _q, _r) 109230775Sjfv#define UNREFERENCED_4PARAMETER(_p, _q, _r, _s) 110171384Sjfv 111194875Sjfv 112215911Sjfv#define IXGBE_NTOHL(_i) ntohl(_i) 113215911Sjfv#define IXGBE_NTOHS(_i) ntohs(_i) 114171384Sjfv 115230775Sjfv/* XXX these need to be revisited */ 116230775Sjfv#define IXGBE_CPU_TO_LE32 le32toh 117230775Sjfv#define IXGBE_LE32_TO_CPUS le32dec 118230775Sjfv 119185352Sjfvtypedef uint8_t u8; 120185352Sjfvtypedef int8_t s8; 121185352Sjfvtypedef uint16_t u16; 122251964Sjfvtypedef int16_t s16; 123185352Sjfvtypedef uint32_t u32; 124185352Sjfvtypedef int32_t s32; 125185352Sjfvtypedef uint64_t u64; 126230790Sjfv#ifndef __bool_true_false_are_defined 127185352Sjfvtypedef boolean_t bool; 128230790Sjfv#endif 129185352Sjfv 130238149Sjfv/* shared code requires this */ 131238149Sjfv#define __le16 u16 132238149Sjfv#define __le32 u32 133238149Sjfv#define __le64 u64 134238149Sjfv#define __be16 u16 135238149Sjfv#define __be32 u32 136238149Sjfv#define __be64 u64 137238149Sjfv 138171384Sjfv#define le16_to_cpu 139171384Sjfv 140190873Sjfv#if __FreeBSD_version < 800000 141179055Sjfv#if defined(__i386__) || defined(__amd64__) 142179055Sjfv#define mb() __asm volatile("mfence" ::: "memory") 143179055Sjfv#define wmb() __asm volatile("sfence" ::: "memory") 144179055Sjfv#define rmb() __asm volatile("lfence" ::: "memory") 145179055Sjfv#else 146179055Sjfv#define mb() 147179055Sjfv#define rmb() 148179055Sjfv#define wmb() 149179055Sjfv#endif 150190873Sjfv#endif 151179055Sjfv 152200239Sjfv#if defined(__i386__) || defined(__amd64__) 153200239Sjfvstatic __inline 154200239Sjfvvoid prefetch(void *x) 155200239Sjfv{ 156200239Sjfv __asm volatile("prefetcht0 %0" :: "m" (*(unsigned long *)x)); 157200239Sjfv} 158200239Sjfv#else 159200239Sjfv#define prefetch(x) 160200239Sjfv#endif 161200239Sjfv 162239940Sscottl/* 163239940Sscottl * Optimized bcopy thanks to Luigi Rizzo's investigative work. Assumes 164239940Sscottl * non-overlapping regions and 32-byte padding on both src and dst. 165239940Sscottl */ 166239940Sscottlstatic __inline int 167239940Sscottlixgbe_bcopy(void *_src, void *_dst, int l) 168239940Sscottl{ 169239940Sscottl uint64_t *src = _src; 170239940Sscottl uint64_t *dst = _dst; 171239940Sscottl 172239940Sscottl for (; l > 0; l -= 32) { 173239940Sscottl *dst++ = *src++; 174239940Sscottl *dst++ = *src++; 175239940Sscottl *dst++ = *src++; 176239940Sscottl *dst++ = *src++; 177239940Sscottl } 178239940Sscottl return (0); 179239940Sscottl} 180239940Sscottl 181171384Sjfvstruct ixgbe_osdep 182171384Sjfv{ 183171384Sjfv bus_space_tag_t mem_bus_space_tag; 184171384Sjfv bus_space_handle_t mem_bus_space_handle; 185171384Sjfv struct device *dev; 186171384Sjfv}; 187171384Sjfv 188190873Sjfv/* These routines are needed by the shared code */ 189171384Sjfvstruct ixgbe_hw; 190171384Sjfvextern u16 ixgbe_read_pci_cfg(struct ixgbe_hw *, u32); 191171384Sjfv#define IXGBE_READ_PCIE_WORD ixgbe_read_pci_cfg 192171384Sjfv 193190873Sjfvextern void ixgbe_write_pci_cfg(struct ixgbe_hw *, u32, u16); 194190873Sjfv#define IXGBE_WRITE_PCIE_WORD ixgbe_write_pci_cfg 195190873Sjfv 196171384Sjfv#define IXGBE_WRITE_FLUSH(a) IXGBE_READ_REG(a, IXGBE_STATUS) 197171384Sjfv 198171384Sjfv#define IXGBE_READ_REG(a, reg) (\ 199171384Sjfv bus_space_read_4( ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_tag, \ 200171384Sjfv ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_handle, \ 201171384Sjfv reg)) 202171384Sjfv 203171384Sjfv#define IXGBE_WRITE_REG(a, reg, value) (\ 204171384Sjfv bus_space_write_4( ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_tag, \ 205171384Sjfv ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_handle, \ 206171384Sjfv reg, value)) 207171384Sjfv 208171384Sjfv 209171384Sjfv#define IXGBE_READ_REG_ARRAY(a, reg, offset) (\ 210171384Sjfv bus_space_read_4( ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_tag, \ 211171384Sjfv ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_handle, \ 212171384Sjfv (reg + ((offset) << 2)))) 213171384Sjfv 214171384Sjfv#define IXGBE_WRITE_REG_ARRAY(a, reg, offset, value) (\ 215171384Sjfv bus_space_write_4( ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_tag, \ 216171384Sjfv ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_handle, \ 217171384Sjfv (reg + ((offset) << 2)), value)) 218171384Sjfv 219171384Sjfv 220171384Sjfv#endif /* _IXGBE_OS_H_ */ 221