11541Srgrimes/*-
21541Srgrimes * Copyright (c) 2010 Chelsio Communications, Inc.
31541Srgrimes * All rights reserved.
41541Srgrimes * Written by: Navdeep Parhar <np@FreeBSD.org>
51541Srgrimes *
61541Srgrimes * Redistribution and use in source and binary forms, with or without
71541Srgrimes * modification, are permitted provided that the following conditions
81541Srgrimes * are met:
91541Srgrimes * 1. Redistributions of source code must retain the above copyright
101541Srgrimes *    notice, this list of conditions and the following disclaimer.
111541Srgrimes * 2. Redistributions in binary form must reproduce the above copyright
121541Srgrimes *    notice, this list of conditions and the following disclaimer in the
131541Srgrimes *    documentation and/or other materials provided with the distribution.
141541Srgrimes *
151541Srgrimes * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
161541Srgrimes * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
171541Srgrimes * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
181541Srgrimes * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
191541Srgrimes * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
201541Srgrimes * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
211541Srgrimes * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
221541Srgrimes * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
231541Srgrimes * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
241541Srgrimes * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
251541Srgrimes * SUCH DAMAGE.
261541Srgrimes *
271541Srgrimes * $FreeBSD$
281541Srgrimes *
291541Srgrimes */
301541Srgrimes
311541Srgrimes#ifndef __T4_OFFLOAD_H__
321541Srgrimes#define __T4_OFFLOAD_H__
331541Srgrimes
3444510Swollman#define INIT_ULPTX_WRH(w, wrlen, atomic, tid) do { \
351541Srgrimes	(w)->wr_hi = htonl(V_FW_WR_OP(FW_ULPTX_WR) | V_FW_WR_ATOMIC(atomic)); \
361541Srgrimes	(w)->wr_mid = htonl(V_FW_WR_LEN16(DIV_ROUND_UP(wrlen, 16)) | \
37116182Sobrien			       V_FW_WR_FLOWID(tid)); \
38116182Sobrien	(w)->wr_lo = cpu_to_be64(0); \
39116182Sobrien} while (0)
40187664Srwatson
41187664Srwatson#define INIT_ULPTX_WR(w, wrlen, atomic, tid) \
421541Srgrimes    INIT_ULPTX_WRH(&((w)->wr), wrlen, atomic, tid)
431541Srgrimes
44177859Sjeff#define INIT_TP_WR(w, tid) do { \
4533392Sphk	(w)->wr.wr_hi = htonl(V_FW_WR_OP(FW_TP_WR) | \
46127969Scperciva                              V_FW_WR_IMMDLEN(sizeof(*w) - sizeof(w->wr))); \
47177859Sjeff	(w)->wr.wr_mid = htonl(V_FW_WR_LEN16(DIV_ROUND_UP(sizeof(*w), 16)) | \
481541Srgrimes                               V_FW_WR_FLOWID(tid)); \
49133229Srwatson	(w)->wr.wr_lo = cpu_to_be64(0); \
5074914Sjhb} while (0)
51177859Sjeff
5268840Sjhb#define INIT_TP_WR_MIT_CPL(w, cpl, tid) do { \
53150188Sjhb	INIT_TP_WR(w, tid); \
54187664Srwatson	OPCODE_TID(w) = htonl(MK_OPCODE_TID(cpl, tid)); \
55171053Sattilio} while (0)
56115810Sphk
57177859SjeffTAILQ_HEAD(stid_head, stid_region);
581541Srgrimesstruct listen_ctx;
59220456Sattilio
60220456Sattiliostruct stid_region {
61220456Sattilio	TAILQ_ENTRY(stid_region) link;
62220456Sattilio	u_int used;	/* # of stids used by this region */
63187664Srwatson	u_int free;	/* # of contiguous stids free right after this region */
64211616Srpaulo};
65187664Srwatson
66187664Srwatson/*
67211616Srpaulo * Max # of ATIDs.  The absolute HW max is 16K but we keep it lower.
68187664Srwatson */
69187664Srwatson#define MAX_ATIDS 8192U
70187664Srwatson
71115810Sphkunion aopen_entry {
72115810Sphk	void *data;
73115810Sphk	union aopen_entry *next;
74115810Sphk};
75115810Sphk
76115810Sphk/*
77173760Sattilio * Holds the size, base address, free list start, etc of the TID, server TID,
78173760Sattilio * and active-open TID tables.  The tables themselves are allocated dynamically.
79173760Sattilio */
80115810Sphkstruct tid_info {
81115810Sphk	void **tid_tab;
82115810Sphk	u_int ntids;
8333392Sphk	u_int tids_in_use;
8433392Sphk
8533392Sphk	struct mtx stid_lock __aligned(CACHE_LINE_SIZE);
8633392Sphk	struct listen_ctx **stid_tab;
87243853Salfred	u_int nstids;
882112Swollman	u_int stid_base;
89200510Sluigi	u_int stids_in_use;
90220456Sattilio	u_int nstids_free_head;	/* # of available stids at the begining */
91220456Sattilio	struct stid_head stids;
92220456Sattilio
93220456Sattilio	struct mtx atid_lock __aligned(CACHE_LINE_SIZE);
94220456Sattilio	union aopen_entry *atid_tab;
95220456Sattilio	u_int natids;
96220456Sattilio	union aopen_entry *afree;
97220456Sattilio	u_int atids_in_use;
98220456Sattilio
99220456Sattilio	struct mtx ftid_lock __aligned(CACHE_LINE_SIZE);
100220456Sattilio	struct filter_entry *ftid_tab;
101220456Sattilio	u_int nftids;
102220456Sattilio	u_int ftid_base;
103247467Sdavide	u_int ftids_in_use;
104220456Sattilio};
105200510Sluigi
106200510Sluigistruct t4_range {
107200510Sluigi	u_int start;
108200510Sluigi	u_int size;
109200510Sluigi};
110200510Sluigi
111200510Sluigistruct t4_virt_res {                      /* virtualized HW resources */
112200510Sluigi	struct t4_range ddp;
113200510Sluigi	struct t4_range iscsi;
114200510Sluigi	struct t4_range stag;
115200510Sluigi	struct t4_range rq;
116200510Sluigi	struct t4_range pbl;
117200510Sluigi	struct t4_range qp;
118200510Sluigi	struct t4_range cq;
119200510Sluigi	struct t4_range ocq;
120200510Sluigi	struct t4_range l2t;
121177859Sjeff};
122242402Sattilio
123242402Sattilio#ifdef TCP_OFFLOAD
124177859Sjeffenum {
125177859Sjeff	ULD_TOM = 1,
126177859Sjeff	ULD_IWARP = 2,
127177859Sjeff};
128177859Sjeff
129177859Sjeffstruct adapter;
130200510Sluigistruct port_info;
131177859Sjeffstruct uld_info {
132177859Sjeff	SLIST_ENTRY(uld_info) link;
133177859Sjeff	int refcount;
134212541Smav	int uld_id;
135177859Sjeff	int (*activate)(struct adapter *);
136128024Scperciva	int (*deactivate)(struct adapter *);
137177859Sjeff};
138220456Sattilio
139220456Sattiliostruct tom_tunables {
140220456Sattilio	int sndbuf;
141220456Sattilio	int ddp;
142220456Sattilio	int indsz;
143177859Sjeff	int ddp_thres;
144220456Sattilio	int rx_coalesce;
145177859Sjeff};
146177859Sjeff
147177859Sjeffint t4_register_uld(struct uld_info *);
148177859Sjeffint t4_unregister_uld(struct uld_info *);
149177859Sjeffint t4_activate_uld(struct adapter *, int);
150177859Sjeffint t4_deactivate_uld(struct adapter *, int);
151177859Sjeff#endif
152177859Sjeff
153177859Sjeff#endif
154220456Sattilio