ar5211_attach.c revision 217621 
1/*
2 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
3 * Copyright (c) 2002-2006 Atheros Communications, Inc.
4 *
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 *
17 * $FreeBSD: head/sys/dev/ath/ath_hal/ar5211/ar5211_attach.c 217621 2011-01-20 05:49:15Z adrian $
18 */
19#include "opt_ah.h"
20
21#include "ah.h"
22#include "ah_internal.h"
23#include "ah_devid.h"
24
25#include "ar5211/ar5211.h"
26#include "ar5211/ar5211reg.h"
27#include "ar5211/ar5211phy.h"
28
29#include "ah_eeprom_v3.h"
30
31static HAL_BOOL ar5211GetChannelEdges(struct ath_hal *ah,
32		uint16_t flags, uint16_t *low, uint16_t *high);
33static HAL_BOOL ar5211GetChipPowerLimits(struct ath_hal *ah,
34		struct ieee80211_channel *chan);
35
36static void ar5211ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore);
37static void ar5211DisablePCIE(struct ath_hal *ah);
38
39static const struct ath_hal_private ar5211hal = {{
40	.ah_magic			= AR5211_MAGIC,
41
42	.ah_getRateTable		= ar5211GetRateTable,
43	.ah_detach			= ar5211Detach,
44
45	/* Reset Functions */
46	.ah_reset			= ar5211Reset,
47	.ah_phyDisable			= ar5211PhyDisable,
48	.ah_disable			= ar5211Disable,
49	.ah_configPCIE			= ar5211ConfigPCIE,
50	.ah_disablePCIE			= ar5211DisablePCIE,
51	.ah_setPCUConfig		= ar5211SetPCUConfig,
52	.ah_perCalibration		= ar5211PerCalibration,
53	.ah_perCalibrationN		= ar5211PerCalibrationN,
54	.ah_resetCalValid		= ar5211ResetCalValid,
55	.ah_setTxPowerLimit		= ar5211SetTxPowerLimit,
56	.ah_getChanNoise		= ath_hal_getChanNoise,
57
58	/* Transmit functions */
59	.ah_updateTxTrigLevel		= ar5211UpdateTxTrigLevel,
60	.ah_setupTxQueue		= ar5211SetupTxQueue,
61	.ah_setTxQueueProps             = ar5211SetTxQueueProps,
62	.ah_getTxQueueProps             = ar5211GetTxQueueProps,
63	.ah_releaseTxQueue		= ar5211ReleaseTxQueue,
64	.ah_resetTxQueue		= ar5211ResetTxQueue,
65	.ah_getTxDP			= ar5211GetTxDP,
66	.ah_setTxDP			= ar5211SetTxDP,
67	.ah_numTxPending		= ar5211NumTxPending,
68	.ah_startTxDma			= ar5211StartTxDma,
69	.ah_stopTxDma			= ar5211StopTxDma,
70	.ah_setupTxDesc			= ar5211SetupTxDesc,
71	.ah_setupXTxDesc		= ar5211SetupXTxDesc,
72	.ah_fillTxDesc			= ar5211FillTxDesc,
73	.ah_procTxDesc			= ar5211ProcTxDesc,
74	.ah_getTxIntrQueue		= ar5211GetTxIntrQueue,
75	.ah_reqTxIntrDesc 		= ar5211IntrReqTxDesc,
76	.ah_getTxCompletionRates	= ar5211GetTxCompletionRates,
77
78	/* RX Functions */
79	.ah_getRxDP			= ar5211GetRxDP,
80	.ah_setRxDP			= ar5211SetRxDP,
81	.ah_enableReceive		= ar5211EnableReceive,
82	.ah_stopDmaReceive		= ar5211StopDmaReceive,
83	.ah_startPcuReceive		= ar5211StartPcuReceive,
84	.ah_stopPcuReceive		= ar5211StopPcuReceive,
85	.ah_setMulticastFilter		= ar5211SetMulticastFilter,
86	.ah_setMulticastFilterIndex	= ar5211SetMulticastFilterIndex,
87	.ah_clrMulticastFilterIndex	= ar5211ClrMulticastFilterIndex,
88	.ah_getRxFilter			= ar5211GetRxFilter,
89	.ah_setRxFilter			= ar5211SetRxFilter,
90	.ah_setupRxDesc			= ar5211SetupRxDesc,
91	.ah_procRxDesc			= ar5211ProcRxDesc,
92	.ah_rxMonitor			= ar5211AniPoll,
93	.ah_procMibEvent		= ar5211MibEvent,
94
95	/* Misc Functions */
96	.ah_getCapability		= ar5211GetCapability,
97	.ah_setCapability		= ar5211SetCapability,
98	.ah_getDiagState		= ar5211GetDiagState,
99	.ah_getMacAddress		= ar5211GetMacAddress,
100	.ah_setMacAddress		= ar5211SetMacAddress,
101	.ah_getBssIdMask		= ar5211GetBssIdMask,
102	.ah_setBssIdMask		= ar5211SetBssIdMask,
103	.ah_setRegulatoryDomain		= ar5211SetRegulatoryDomain,
104	.ah_setLedState			= ar5211SetLedState,
105	.ah_writeAssocid		= ar5211WriteAssocid,
106	.ah_gpioCfgInput		= ar5211GpioCfgInput,
107	.ah_gpioCfgOutput		= ar5211GpioCfgOutput,
108	.ah_gpioGet			= ar5211GpioGet,
109	.ah_gpioSet			= ar5211GpioSet,
110	.ah_gpioSetIntr			= ar5211GpioSetIntr,
111	.ah_getTsf32			= ar5211GetTsf32,
112	.ah_getTsf64			= ar5211GetTsf64,
113	.ah_resetTsf			= ar5211ResetTsf,
114	.ah_detectCardPresent		= ar5211DetectCardPresent,
115	.ah_updateMibCounters		= ar5211UpdateMibCounters,
116	.ah_getRfGain			= ar5211GetRfgain,
117	.ah_getDefAntenna		= ar5211GetDefAntenna,
118	.ah_setDefAntenna		= ar5211SetDefAntenna,
119	.ah_getAntennaSwitch		= ar5211GetAntennaSwitch,
120	.ah_setAntennaSwitch		= ar5211SetAntennaSwitch,
121	.ah_setSifsTime			= ar5211SetSifsTime,
122	.ah_getSifsTime			= ar5211GetSifsTime,
123	.ah_setSlotTime			= ar5211SetSlotTime,
124	.ah_getSlotTime			= ar5211GetSlotTime,
125	.ah_setAckTimeout		= ar5211SetAckTimeout,
126	.ah_getAckTimeout		= ar5211GetAckTimeout,
127	.ah_setAckCTSRate		= ar5211SetAckCTSRate,
128	.ah_getAckCTSRate		= ar5211GetAckCTSRate,
129	.ah_setCTSTimeout		= ar5211SetCTSTimeout,
130	.ah_getCTSTimeout		= ar5211GetCTSTimeout,
131	.ah_setDecompMask               = ar5211SetDecompMask,
132	.ah_setCoverageClass            = ar5211SetCoverageClass,
133
134	/* Key Cache Functions */
135	.ah_getKeyCacheSize		= ar5211GetKeyCacheSize,
136	.ah_resetKeyCacheEntry		= ar5211ResetKeyCacheEntry,
137	.ah_isKeyCacheEntryValid	= ar5211IsKeyCacheEntryValid,
138	.ah_setKeyCacheEntry		= ar5211SetKeyCacheEntry,
139	.ah_setKeyCacheEntryMac		= ar5211SetKeyCacheEntryMac,
140
141	/* Power Management Functions */
142	.ah_setPowerMode		= ar5211SetPowerMode,
143	.ah_getPowerMode		= ar5211GetPowerMode,
144
145	/* Beacon Functions */
146	.ah_setBeaconTimers		= ar5211SetBeaconTimers,
147	.ah_beaconInit			= ar5211BeaconInit,
148	.ah_setStationBeaconTimers	= ar5211SetStaBeaconTimers,
149	.ah_resetStationBeaconTimers	= ar5211ResetStaBeaconTimers,
150
151	/* Interrupt Functions */
152	.ah_isInterruptPending		= ar5211IsInterruptPending,
153	.ah_getPendingInterrupts	= ar5211GetPendingInterrupts,
154	.ah_getInterrupts		= ar5211GetInterrupts,
155	.ah_setInterrupts		= ar5211SetInterrupts },
156
157	.ah_getChannelEdges		= ar5211GetChannelEdges,
158	.ah_getWirelessModes		= ar5211GetWirelessModes,
159	.ah_eepromRead			= ar5211EepromRead,
160#ifdef AH_SUPPORT_WRITE_EEPROM
161	.ah_eepromWrite			= ar5211EepromWrite,
162#endif
163	.ah_getChipPowerLimits		= ar5211GetChipPowerLimits,
164};
165
166static HAL_BOOL ar5211ChipTest(struct ath_hal *);
167static HAL_BOOL ar5211FillCapabilityInfo(struct ath_hal *ah);
168
169/*
170 * Return the revsion id for the radio chip.  This
171 * fetched via the PHY.
172 */
173static uint32_t
174ar5211GetRadioRev(struct ath_hal *ah)
175{
176	uint32_t val;
177	int i;
178
179	OS_REG_WRITE(ah, (AR_PHY_BASE + (0x34 << 2)), 0x00001c16);
180	for (i = 0; i < 8; i++)
181		OS_REG_WRITE(ah, (AR_PHY_BASE + (0x20 << 2)), 0x00010000);
182	val = (OS_REG_READ(ah, AR_PHY_BASE + (256 << 2)) >> 24) & 0xff;
183	val = ((val & 0xf0) >> 4) | ((val & 0x0f) << 4);
184	return ath_hal_reverseBits(val, 8);
185}
186
187/*
188 * Attach for an AR5211 part.
189 */
190static struct ath_hal *
191ar5211Attach(uint16_t devid, HAL_SOFTC sc,
192	HAL_BUS_TAG st, HAL_BUS_HANDLE sh, HAL_STATUS *status)
193{
194#define	N(a)	(sizeof(a)/sizeof(a[0]))
195	struct ath_hal_5211 *ahp;
196	struct ath_hal *ah;
197	uint32_t val;
198	uint16_t eeval;
199	HAL_STATUS ecode;
200
201	HALDEBUG(AH_NULL, HAL_DEBUG_ATTACH, "%s: sc %p st %p sh %p\n",
202	    __func__, sc, (void*) st, (void*) sh);
203
204	/* NB: memory is returned zero'd */
205	ahp = ath_hal_malloc(sizeof (struct ath_hal_5211));
206	if (ahp == AH_NULL) {
207		HALDEBUG(AH_NULL, HAL_DEBUG_ANY,
208		    "%s: cannot allocate memory for state block\n", __func__);
209		ecode = HAL_ENOMEM;
210		goto bad;
211	}
212	ah = &ahp->ah_priv.h;
213	/* set initial values */
214	OS_MEMCPY(&ahp->ah_priv, &ar5211hal, sizeof(struct ath_hal_private));
215	ah->ah_sc = sc;
216	ah->ah_st = st;
217	ah->ah_sh = sh;
218
219	ah->ah_devid = devid;			/* NB: for AH_DEBUG_ALQ */
220	AH_PRIVATE(ah)->ah_devid = devid;
221	AH_PRIVATE(ah)->ah_subvendorid = 0;	/* XXX */
222
223	AH_PRIVATE(ah)->ah_powerLimit = MAX_RATE_POWER;
224	AH_PRIVATE(ah)->ah_tpScale = HAL_TP_SCALE_MAX;	/* no scaling */
225
226	ahp->ah_diversityControl = HAL_ANT_VARIABLE;
227	ahp->ah_staId1Defaults = 0;
228	ahp->ah_rssiThr = INIT_RSSI_THR;
229	ahp->ah_sifstime = (u_int) -1;
230	ahp->ah_slottime = (u_int) -1;
231	ahp->ah_acktimeout = (u_int) -1;
232	ahp->ah_ctstimeout = (u_int) -1;
233
234	if (!ar5211ChipReset(ah, AH_NULL)) {	/* reset chip */
235		HALDEBUG(ah, HAL_DEBUG_ANY, "%s: chip reset failed\n", __func__);
236		ecode = HAL_EIO;
237		goto bad;
238	}
239	if (AH_PRIVATE(ah)->ah_devid == AR5211_FPGA11B) {
240		/* set it back to OFDM mode to be able to read analog rev id */
241		OS_REG_WRITE(ah, AR5211_PHY_MODE, AR5211_PHY_MODE_OFDM);
242		OS_REG_WRITE(ah, AR_PHY_PLL_CTL, AR_PHY_PLL_CTL_44);
243		OS_DELAY(1000);
244	}
245
246	/* Read Revisions from Chips */
247	val = OS_REG_READ(ah, AR_SREV) & AR_SREV_ID_M;
248	AH_PRIVATE(ah)->ah_macVersion = val >> AR_SREV_ID_S;
249	AH_PRIVATE(ah)->ah_macRev = val & AR_SREV_REVISION_M;
250
251	if (AH_PRIVATE(ah)->ah_macVersion < AR_SREV_VERSION_MAUI_2 ||
252	    AH_PRIVATE(ah)->ah_macVersion > AR_SREV_VERSION_OAHU) {
253		HALDEBUG(ah, HAL_DEBUG_ANY,
254		    "%s: Mac Chip Rev 0x%x is not supported by this driver\n",
255		    __func__, AH_PRIVATE(ah)->ah_macVersion);
256		ecode = HAL_ENOTSUPP;
257		goto bad;
258	}
259
260	AH_PRIVATE(ah)->ah_phyRev = OS_REG_READ(ah, AR_PHY_CHIP_ID);
261
262	if (!ar5211ChipTest(ah)) {
263		HALDEBUG(ah, HAL_DEBUG_ANY, "%s: hardware self-test failed\n",
264		    __func__);
265		ecode = HAL_ESELFTEST;
266		goto bad;
267	}
268
269	/* Set correct Baseband to analog shift setting to access analog chips. */
270	if (AH_PRIVATE(ah)->ah_macVersion >= AR_SREV_VERSION_OAHU) {
271		OS_REG_WRITE(ah, AR_PHY_BASE, 0x00000007);
272	} else {
273		OS_REG_WRITE(ah, AR_PHY_BASE, 0x00000047);
274	}
275	OS_DELAY(2000);
276
277	/* Read Radio Chip Rev Extract */
278	AH_PRIVATE(ah)->ah_analog5GhzRev = ar5211GetRadioRev(ah);
279	if ((AH_PRIVATE(ah)->ah_analog5GhzRev & 0xf0) != RAD5_SREV_MAJOR) {
280		HALDEBUG(ah, HAL_DEBUG_ANY,
281		    "%s: 5G Radio Chip Rev 0x%02X is not supported by this "
282		    "driver\n", __func__, AH_PRIVATE(ah)->ah_analog5GhzRev);
283		ecode = HAL_ENOTSUPP;
284		goto bad;
285	}
286
287	val = (OS_REG_READ(ah, AR_PCICFG) & AR_PCICFG_EEPROM_SIZE_M) >>
288               AR_PCICFG_EEPROM_SIZE_S;
289	if (val != AR_PCICFG_EEPROM_SIZE_16K) {
290		HALDEBUG(ah, HAL_DEBUG_ANY, "%s: unsupported EEPROM size "
291		    "%u (0x%x) found\n", __func__, val, val);
292		ecode = HAL_EESIZE;
293		goto bad;
294	}
295	ecode = ath_hal_legacyEepromAttach(ah);
296	if (ecode != HAL_OK) {
297		goto bad;
298	}
299
300        /* If Bmode and AR5211, verify 2.4 analog exists */
301	if (AH_PRIVATE(ah)->ah_macVersion >= AR_SREV_VERSION_OAHU &&
302	    ath_hal_eepromGetFlag(ah, AR_EEP_BMODE)) {
303		/* Set correct Baseband to analog shift setting to access analog chips. */
304		OS_REG_WRITE(ah, AR_PHY_BASE, 0x00004007);
305		OS_DELAY(2000);
306		AH_PRIVATE(ah)->ah_analog2GhzRev = ar5211GetRadioRev(ah);
307
308		/* Set baseband for 5GHz chip */
309		OS_REG_WRITE(ah, AR_PHY_BASE, 0x00000007);
310		OS_DELAY(2000);
311		if ((AH_PRIVATE(ah)->ah_analog2GhzRev & 0xF0) != RAD2_SREV_MAJOR) {
312			HALDEBUG(ah, HAL_DEBUG_ANY,
313			    "%s: 2G Radio Chip Rev 0x%x is not supported by "
314			    "this driver\n", __func__,
315			    AH_PRIVATE(ah)->ah_analog2GhzRev);
316			ecode = HAL_ENOTSUPP;
317			goto bad;
318		}
319	} else {
320		ath_hal_eepromSet(ah, AR_EEP_BMODE, AH_FALSE);
321        }
322
323	ecode = ath_hal_eepromGet(ah, AR_EEP_REGDMN_0, &eeval);
324	if (ecode != HAL_OK) {
325		HALDEBUG(ah, HAL_DEBUG_ANY,
326		    "%s: cannot read regulatory domain from EEPROM\n",
327		    __func__);
328		goto bad;
329        }
330	AH_PRIVATE(ah)->ah_currentRD = eeval;
331	AH_PRIVATE(ah)->ah_getNfAdjust = ar5211GetNfAdjust;
332
333	/*
334	 * Got everything we need now to setup the capabilities.
335	 */
336	(void) ar5211FillCapabilityInfo(ah);
337
338	/* Initialize gain ladder thermal calibration structure */
339	ar5211InitializeGainValues(ah);
340
341	ecode = ath_hal_eepromGet(ah, AR_EEP_MACADDR, ahp->ah_macaddr);
342	if (ecode != HAL_OK) {
343		HALDEBUG(ah, HAL_DEBUG_ANY,
344		    "%s: error getting mac address from EEPROM\n", __func__);
345		goto bad;
346        }
347
348	HALDEBUG(ah, HAL_DEBUG_ATTACH, "%s: return\n", __func__);
349
350	return ah;
351bad:
352	if (ahp)
353		ar5211Detach((struct ath_hal *) ahp);
354	if (status)
355		*status = ecode;
356	return AH_NULL;
357#undef N
358}
359
360void
361ar5211Detach(struct ath_hal *ah)
362{
363	HALDEBUG(ah, HAL_DEBUG_ATTACH, "%s:\n", __func__);
364
365	HALASSERT(ah != AH_NULL);
366	HALASSERT(ah->ah_magic == AR5211_MAGIC);
367
368	ath_hal_eepromDetach(ah);
369	ath_hal_free(ah);
370}
371
372static HAL_BOOL
373ar5211ChipTest(struct ath_hal *ah)
374{
375	uint32_t regAddr[2] = { AR_STA_ID0, AR_PHY_BASE+(8 << 2) };
376	uint32_t regHold[2];
377	uint32_t patternData[4] =
378	    { 0x55555555, 0xaaaaaaaa, 0x66666666, 0x99999999 };
379	int i, j;
380
381	/* Test PHY & MAC registers */
382	for (i = 0; i < 2; i++) {
383		uint32_t addr = regAddr[i];
384		uint32_t wrData, rdData;
385
386		regHold[i] = OS_REG_READ(ah, addr);
387		for (j = 0; j < 0x100; j++) {
388			wrData = (j << 16) | j;
389			OS_REG_WRITE(ah, addr, wrData);
390			rdData = OS_REG_READ(ah, addr);
391			if (rdData != wrData) {
392				HALDEBUG(ah, HAL_DEBUG_ANY,
393"%s: address test failed addr: 0x%08x - wr:0x%08x != rd:0x%08x\n",
394				__func__, addr, wrData, rdData);
395				return AH_FALSE;
396			}
397		}
398		for (j = 0; j < 4; j++) {
399			wrData = patternData[j];
400			OS_REG_WRITE(ah, addr, wrData);
401			rdData = OS_REG_READ(ah, addr);
402			if (wrData != rdData) {
403				HALDEBUG(ah, HAL_DEBUG_ANY,
404"%s: address test failed addr: 0x%08x - wr:0x%08x != rd:0x%08x\n",
405					__func__, addr, wrData, rdData);
406				return AH_FALSE;
407			}
408		}
409		OS_REG_WRITE(ah, regAddr[i], regHold[i]);
410	}
411	OS_DELAY(100);
412	return AH_TRUE;
413}
414
415/*
416 * Store the channel edges for the requested operational mode
417 */
418static HAL_BOOL
419ar5211GetChannelEdges(struct ath_hal *ah,
420	uint16_t flags, uint16_t *low, uint16_t *high)
421{
422	if (flags & IEEE80211_CHAN_5GHZ) {
423		*low = 4920;
424		*high = 6100;
425		return AH_TRUE;
426	}
427	if (flags & IEEE80211_CHAN_2GHZ &&
428	    ath_hal_eepromGetFlag(ah, AR_EEP_BMODE)) {
429		*low = 2312;
430		*high = 2732;
431		return AH_TRUE;
432	}
433	return AH_FALSE;
434}
435
436static HAL_BOOL
437ar5211GetChipPowerLimits(struct ath_hal *ah, struct ieee80211_channel *chan)
438{
439	/* XXX fill in, this is just a placeholder */
440	HALDEBUG(ah, HAL_DEBUG_ATTACH,
441	    "%s: no min/max power for %u/0x%x\n",
442	    __func__, chan->ic_freq, chan->ic_flags);
443	chan->ic_maxpower = MAX_RATE_POWER;
444	chan->ic_minpower = 0;
445	return AH_TRUE;
446}
447
448static void
449ar5211ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore)
450{
451}
452
453static void
454ar5211DisablePCIE(struct ath_hal *ah)
455{
456}
457
458/*
459 * Fill all software cached or static hardware state information.
460 */
461static HAL_BOOL
462ar5211FillCapabilityInfo(struct ath_hal *ah)
463{
464	struct ath_hal_private *ahpriv = AH_PRIVATE(ah);
465	HAL_CAPABILITIES *pCap = &ahpriv->ah_caps;
466
467	/* Construct wireless mode from EEPROM */
468	pCap->halWirelessModes = 0;
469	if (ath_hal_eepromGetFlag(ah, AR_EEP_AMODE)) {
470		pCap->halWirelessModes |= HAL_MODE_11A;
471		if (!ath_hal_eepromGetFlag(ah, AR_EEP_TURBO5DISABLE))
472			pCap->halWirelessModes |= HAL_MODE_TURBO;
473	}
474	if (ath_hal_eepromGetFlag(ah, AR_EEP_BMODE))
475		pCap->halWirelessModes |= HAL_MODE_11B;
476
477	pCap->halLow2GhzChan = 2312;
478	pCap->halHigh2GhzChan = 2732;
479	pCap->halLow5GhzChan = 4920;
480	pCap->halHigh5GhzChan = 6100;
481
482	pCap->halChanSpreadSupport = AH_TRUE;
483	pCap->halSleepAfterBeaconBroken = AH_TRUE;
484	pCap->halPSPollBroken = AH_TRUE;
485	pCap->halVEOLSupport = AH_TRUE;
486
487	pCap->halTotalQueues = HAL_NUM_TX_QUEUES;
488	pCap->halKeyCacheSize = 128;
489
490	/* XXX not needed */
491	pCap->halChanHalfRate = AH_FALSE;
492	pCap->halChanQuarterRate = AH_FALSE;
493
494	if (ath_hal_eepromGetFlag(ah, AR_EEP_RFKILL) &&
495	    ath_hal_eepromGet(ah, AR_EEP_RFSILENT, &ahpriv->ah_rfsilent) == HAL_OK) {
496		/* NB: enabled by default */
497		ahpriv->ah_rfkillEnabled = AH_TRUE;
498		pCap->halRfSilentSupport = AH_TRUE;
499	}
500
501	pCap->halTstampPrecision = 13;
502	pCap->halIntrMask = HAL_INT_COMMON
503			| HAL_INT_RX
504			| HAL_INT_TX
505			| HAL_INT_FATAL
506			| HAL_INT_BNR
507			| HAL_INT_TIM
508			;
509
510	/* XXX might be ok w/ some chip revs */
511	ahpriv->ah_rxornIsFatal = AH_TRUE;
512	return AH_TRUE;
513}
514
515static const char*
516ar5211Probe(uint16_t vendorid, uint16_t devid)
517{
518	if (vendorid == ATHEROS_VENDOR_ID) {
519		if (devid == AR5211_DEVID || devid == AR5311_DEVID ||
520		    devid == AR5211_DEFAULT)
521			return "Atheros 5211";
522		if (devid == AR5211_FPGA11B)
523			return "Atheros 5211 (FPGA)";
524	}
525	return AH_NULL;
526}
527AH_CHIP(AR5211, ar5211Probe, ar5211Attach);
528