1183724Ssos/*-
2230132Suqs * Copyright (c) 1998 - 2008 S��ren Schmidt <sos@FreeBSD.org>
3183724Ssos * All rights reserved.
4183724Ssos *
5183724Ssos * Redistribution and use in source and binary forms, with or without
6183724Ssos * modification, are permitted provided that the following conditions
7183724Ssos * are met:
8183724Ssos * 1. Redistributions of source code must retain the above copyright
9183724Ssos *    notice, this list of conditions and the following disclaimer,
10183724Ssos *    without modification, immediately at the beginning of the file.
11183724Ssos * 2. Redistributions in binary form must reproduce the above copyright
12183724Ssos *    notice, this list of conditions and the following disclaimer in the
13183724Ssos *    documentation and/or other materials provided with the distribution.
14183724Ssos *
15183724Ssos * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16183724Ssos * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17183724Ssos * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18183724Ssos * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19183724Ssos * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20183724Ssos * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21183724Ssos * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22183724Ssos * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23183724Ssos * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24183724Ssos * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25183724Ssos */
26183724Ssos
27183724Ssos#include <sys/cdefs.h>
28183724Ssos__FBSDID("$FreeBSD$");
29183724Ssos
30183724Ssos#include <sys/param.h>
31183724Ssos#include <sys/module.h>
32183724Ssos#include <sys/systm.h>
33183724Ssos#include <sys/kernel.h>
34183724Ssos#include <sys/ata.h>
35183724Ssos#include <sys/bus.h>
36183724Ssos#include <sys/endian.h>
37183724Ssos#include <sys/malloc.h>
38183724Ssos#include <sys/lock.h>
39183724Ssos#include <sys/mutex.h>
40183724Ssos#include <sys/sema.h>
41183724Ssos#include <sys/taskqueue.h>
42183724Ssos#include <vm/uma.h>
43183724Ssos#include <machine/stdarg.h>
44183724Ssos#include <machine/resource.h>
45183724Ssos#include <machine/bus.h>
46183724Ssos#include <sys/rman.h>
47183724Ssos#include <dev/pci/pcivar.h>
48183724Ssos#include <dev/pci/pcireg.h>
49183724Ssos#include <dev/ata/ata-all.h>
50183724Ssos#include <dev/ata/ata-pci.h>
51183724Ssos#include <ata_if.h>
52183724Ssos
53183724Ssos/* local prototypes */
54183724Ssosstatic int ata_acard_chipinit(device_t dev);
55188765Smavstatic int ata_acard_ch_attach(device_t dev);
56183724Ssosstatic int ata_acard_status(device_t dev);
57200171Smavstatic int ata_acard_850_setmode(device_t dev, int target, int mode);
58200171Smavstatic int ata_acard_86X_setmode(device_t dev, int target, int mode);
59183724Ssos
60183724Ssos/* misc defines */
61183724Ssos#define ATP_OLD		1
62183724Ssos
63183724Ssos/*
64183724Ssos * Acard chipset support functions
65183724Ssos */
66183724Ssosstatic int
67183724Ssosata_acard_probe(device_t dev)
68183724Ssos{
69183724Ssos    struct ata_pci_controller *ctlr = device_get_softc(dev);
70242625Sdim    static const struct ata_chip_id ids[] =
71183724Ssos    {{ ATA_ATP850R, 0, ATP_OLD, 0x00, ATA_UDMA2, "ATP850" },
72183724Ssos     { ATA_ATP860A, 0, 0,       0x00, ATA_UDMA4, "ATP860A" },
73183724Ssos     { ATA_ATP860R, 0, 0,       0x00, ATA_UDMA4, "ATP860R" },
74183724Ssos     { ATA_ATP865A, 0, 0,       0x00, ATA_UDMA6, "ATP865A" },
75183724Ssos     { ATA_ATP865R, 0, 0,       0x00, ATA_UDMA6, "ATP865R" },
76183724Ssos     { 0, 0, 0, 0, 0, 0}};
77183724Ssos
78183724Ssos    if (pci_get_vendor(dev) != ATA_ACARD_ID)
79183724Ssos	return ENXIO;
80183724Ssos
81183724Ssos    if (!(ctlr->chip = ata_match_chip(dev, ids)))
82183724Ssos	return ENXIO;
83183724Ssos
84183724Ssos    ata_set_desc(dev);
85183724Ssos    ctlr->chipinit = ata_acard_chipinit;
86194893Smav    return (BUS_PROBE_DEFAULT);
87183724Ssos}
88183724Ssos
89183724Ssosstatic int
90183724Ssosata_acard_chipinit(device_t dev)
91183724Ssos{
92183724Ssos    struct ata_pci_controller *ctlr = device_get_softc(dev);
93183724Ssos
94183724Ssos    if (ata_setup_interrupt(dev, ata_generic_intr))
95183724Ssos	return ENXIO;
96183724Ssos
97188765Smav    ctlr->ch_attach = ata_acard_ch_attach;
98188769Smav    ctlr->ch_detach = ata_pci_ch_detach;
99183724Ssos    if (ctlr->chip->cfg1 == ATP_OLD) {
100183724Ssos	ctlr->setmode = ata_acard_850_setmode;
101249062Smav	/* Work around the lack of channel serialization in ATA_CAM. */
102249062Smav	ctlr->channels = 1;
103249062Smav	device_printf(dev, "second channel ignored\n");
104183724Ssos    }
105183724Ssos    else
106183724Ssos	ctlr->setmode = ata_acard_86X_setmode;
107183724Ssos    return 0;
108183724Ssos}
109183724Ssos
110183724Ssosstatic int
111188765Smavata_acard_ch_attach(device_t dev)
112183724Ssos{
113183724Ssos    struct ata_channel *ch = device_get_softc(dev);
114183724Ssos
115183724Ssos    /* setup the usual register normal pci style */
116188765Smav    if (ata_pci_ch_attach(dev))
117183724Ssos	return ENXIO;
118183724Ssos
119183724Ssos    ch->hw.status = ata_acard_status;
120200171Smav    ch->flags |= ATA_NO_ATAPI_DMA;
121183724Ssos    return 0;
122183724Ssos}
123183724Ssos
124183724Ssosstatic int
125183724Ssosata_acard_status(device_t dev)
126183724Ssos{
127183724Ssos    struct ata_channel *ch = device_get_softc(dev);
128183724Ssos
129183724Ssos    if (ch->dma.flags & ATA_DMA_ACTIVE) {
130183724Ssos	int bmstat = ATA_IDX_INB(ch, ATA_BMSTAT_PORT) & ATA_BMSTAT_MASK;
131183724Ssos
132183724Ssos	if ((bmstat & (ATA_BMSTAT_ACTIVE | ATA_BMSTAT_INTERRUPT)) !=
133183724Ssos	    ATA_BMSTAT_INTERRUPT)
134183724Ssos	    return 0;
135183724Ssos	ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, bmstat & ~ATA_BMSTAT_ERROR);
136183724Ssos	DELAY(1);
137183724Ssos	ATA_IDX_OUTB(ch, ATA_BMCMD_PORT,
138183724Ssos		     ATA_IDX_INB(ch, ATA_BMCMD_PORT) & ~ATA_BMCMD_START_STOP);
139183724Ssos	DELAY(1);
140183724Ssos    }
141183724Ssos    if (ATA_IDX_INB(ch, ATA_ALTSTAT) & ATA_S_BUSY) {
142183724Ssos	DELAY(100);
143183724Ssos	if (ATA_IDX_INB(ch, ATA_ALTSTAT) & ATA_S_BUSY)
144183724Ssos	    return 0;
145183724Ssos    }
146183724Ssos    return 1;
147183724Ssos}
148183724Ssos
149200171Smavstatic int
150200171Smavata_acard_850_setmode(device_t dev, int target, int mode)
151183724Ssos{
152200171Smav    device_t parent = device_get_parent(dev);
153200171Smav    struct ata_pci_controller *ctlr = device_get_softc(parent);
154200171Smav    struct ata_channel *ch = device_get_softc(dev);
155200171Smav    int devno = (ch->unit << 1) + target;
156183724Ssos
157200171Smav    mode = min(mode, ctlr->chip->max_dma);
158183724Ssos    /* XXX SOS missing WDMA0+1 + PIO modes */
159183724Ssos    if (mode >= ATA_WDMA2) {
160200171Smav	    u_int8_t reg54 = pci_read_config(parent, 0x54, 1);
161183724Ssos
162183724Ssos	    reg54 &= ~(0x03 << (devno << 1));
163183724Ssos	    if (mode >= ATA_UDMA0)
164183724Ssos		reg54 |= (((mode & ATA_MODE_MASK) + 1) << (devno << 1));
165200171Smav	    pci_write_config(parent, 0x54, reg54, 1);
166200171Smav	    pci_write_config(parent, 0x4a, 0xa6, 1);
167200171Smav	    pci_write_config(parent, 0x40 + (devno << 1), 0x0301, 2);
168183724Ssos    }
169183724Ssos    /* we could set PIO mode timings, but we assume the BIOS did that */
170200171Smav    return (mode);
171183724Ssos}
172183724Ssos
173200171Smavstatic int
174200171Smavata_acard_86X_setmode(device_t dev, int target, int mode)
175183724Ssos{
176200171Smav	device_t parent = device_get_parent(dev);
177200171Smav	struct ata_pci_controller *ctlr = device_get_softc(parent);
178200171Smav	struct ata_channel *ch = device_get_softc(dev);
179200171Smav	int devno = (ch->unit << 1) + target;
180183724Ssos
181200171Smav	mode = min(mode, ctlr->chip->max_dma);
182200171Smav	/* XXX SOS missing WDMA0+1 + PIO modes */
183200171Smav	if (mode >= ATA_WDMA2) {
184200171Smav		u_int16_t reg44 = pci_read_config(parent, 0x44, 2);
185183724Ssos
186200171Smav		reg44 &= ~(0x000f << (devno << 2));
187200171Smav		if (mode >= ATA_UDMA0)
188200171Smav			reg44 |= (((mode & ATA_MODE_MASK) + 1) << (devno << 2));
189200171Smav		pci_write_config(parent, 0x44, reg44, 2);
190200171Smav		pci_write_config(parent, 0x4a, 0xa6, 1);
191200171Smav		pci_write_config(parent, 0x40 + devno, 0x31, 1);
192183724Ssos	}
193200171Smav	/* we could set PIO mode timings, but we assume the BIOS did that */
194200171Smav	return (mode);
195183724Ssos}
196183724Ssos
197183724SsosATA_DECLARE_DRIVER(ata_acard);
198