cvmx-raid.h revision 215990
1210284Sjmallett/***********************license start*************** 2215990Sjmallett * Copyright (c) 2003-2010 Cavium Networks (support@cavium.com). All rights 3215990Sjmallett * reserved. 4210284Sjmallett * 5210284Sjmallett * 6215990Sjmallett * Redistribution and use in source and binary forms, with or without 7215990Sjmallett * modification, are permitted provided that the following conditions are 8215990Sjmallett * met: 9210284Sjmallett * 10215990Sjmallett * * Redistributions of source code must retain the above copyright 11215990Sjmallett * notice, this list of conditions and the following disclaimer. 12210284Sjmallett * 13215990Sjmallett * * Redistributions in binary form must reproduce the above 14215990Sjmallett * copyright notice, this list of conditions and the following 15215990Sjmallett * disclaimer in the documentation and/or other materials provided 16215990Sjmallett * with the distribution. 17215990Sjmallett 18215990Sjmallett * * Neither the name of Cavium Networks nor the names of 19215990Sjmallett * its contributors may be used to endorse or promote products 20215990Sjmallett * derived from this software without specific prior written 21215990Sjmallett * permission. 22215990Sjmallett 23215990Sjmallett * This Software, including technical data, may be subject to U.S. export control 24215990Sjmallett * laws, including the U.S. Export Administration Act and its associated 25215990Sjmallett * regulations, and may be subject to export or import regulations in other 26215990Sjmallett * countries. 27215990Sjmallett 28215990Sjmallett * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS" 29215990Sjmallett * AND WITH ALL FAULTS AND CAVIUM NETWORKS MAKES NO PROMISES, REPRESENTATIONS OR 30215990Sjmallett * WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO 31215990Sjmallett * THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR 32215990Sjmallett * DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM 33215990Sjmallett * SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE, 34215990Sjmallett * MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF 35215990Sjmallett * VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR 36215990Sjmallett * CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT OF USE OR 37215990Sjmallett * PERFORMANCE OF THE SOFTWARE LIES WITH YOU. 38210284Sjmallett ***********************license end**************************************/ 39210284Sjmallett 40210284Sjmallett 41210284Sjmallett 42210284Sjmallett 43210284Sjmallett 44210284Sjmallett 45215990Sjmallett 46210284Sjmallett/** 47210284Sjmallett * @file 48210284Sjmallett * 49210284Sjmallett * Interface to RAID block. This is not available on all chips. 50210284Sjmallett * 51215990Sjmallett * <hr>$Revision: 49448 $<hr> 52210284Sjmallett */ 53210284Sjmallett 54210284Sjmallett#ifndef __CVMX_RAID_H__ 55210284Sjmallett#define __CVMX_RAID_H__ 56210284Sjmallett 57210284Sjmallett#ifdef __cplusplus 58210284Sjmallettextern "C" { 59210284Sjmallett#endif 60210284Sjmallett 61210284Sjmallett/** 62210284Sjmallett * This structure defines the type of command words the RAID block 63210284Sjmallett * will accept. 64210284Sjmallett */ 65210284Sjmalletttypedef union 66210284Sjmallett{ 67210284Sjmallett uint64_t u64; 68210284Sjmallett struct 69210284Sjmallett { 70210284Sjmallett uint64_t reserved_37_63 : 27; /**< Must be zero */ 71210284Sjmallett uint64_t q_cmp : 1; /**< Indicates whether the Q pipe is in normal mode (CWORD[Q_CMP]=0) or in non-zero 72210284Sjmallett byte detect mode (CWORD[Q_CMP]=1). 73210284Sjmallett In non-zero byte detect mode, the Q OWORD[PTR] result is the non-zero detect 74210284Sjmallett result, which indicates the position of the first non-zero byte in the pipe result bytes. 75210284Sjmallett CWORD[Q_CMP] must not be set when CWORD[QOUT]=0, and must not be set 76210284Sjmallett when CWORD[Q_XOR] is set. */ 77210284Sjmallett uint64_t p_cmp : 1; /**< Indicates whether the P pipe is in normal mode (CWORD[P_CMP]=0) or in non-zero 78210284Sjmallett byte detect mode (CWORD[P_CMP]=1). 79210284Sjmallett In non-zero byte detect mode, the P OWORD[PTR] result is the non-zero detect 80210284Sjmallett result, which indicates the position of the first non-zero byte in the pipe result bytes. 81210284Sjmallett CWORD[P_CMP] must not be set when CWORD[POUT]=0, and must not be set 82210284Sjmallett when CWORD[P_XOR] is set. */ 83210284Sjmallett uint64_t q_xor : 1; /**< Indicates whether the Q output buffer bytes are the normal Q pipe result or the 84210284Sjmallett normal Q pipe result exclusive-OR'ed with the P pipe result. 85210284Sjmallett When CWORD[Q_XOR]=0 (and CWORD[Q_CMP]=0), the Q output buffer bytes are 86210284Sjmallett the normal Q pipe result, which does not include the P pipe result in any way. 87210284Sjmallett When CWORD[Q_XOR]=1, the Q output buffer bytes are the normal Q pipe result 88210284Sjmallett exclusive-OR'ed with the P pipe result, as if the P pipe result were another Q IWORD 89210284Sjmallett for the Q pipe with QMULT=1. 90210284Sjmallett CWORD[Q_XOR] must not be set unless both CWORD[POUT,QOUT] are set, and 91210284Sjmallett must not be set when CWORD[Q_CMP] is set. */ 92210284Sjmallett uint64_t p_xor : 1; /**< Indicates whether the P output buffer bytes are the normal P pipe result or the 93210284Sjmallett normal P pipe result exclusive-OR'ed with the Q pipe result. 94210284Sjmallett When CWORD[P_XOR]=0 (and CWORD[P_CMP]=0), the P output buffer bytes are 95210284Sjmallett the normal P pipe result, which does not include the Q pipe result in any way. 96210284Sjmallett When CWORD[P_XOR]=1, the P output buffer bytes are the normal P pipe result 97210284Sjmallett exclusive-OR'ed with the Q pipe result, as if the Q pipe result were another P 98210284Sjmallett IWORD for the P pipe. 99210284Sjmallett CWORD[P_XOR] must not be set unless both CWORD[POUT,QOUT] are set, and 100210284Sjmallett must not be set when CWORD[P_CMP] is set. */ 101210284Sjmallett uint64_t wqe : 1; /**< Indicates whether RAD submits a work queue entry or writes an L2/DRAM byte to 102210284Sjmallett zero after completing the instruction. 103210284Sjmallett When CWORD[WQE] is set and RESP[PTR]!=0, RAD adds the work queue entry 104210284Sjmallett indicated by RESP[PTR] to the selected POW input queue after completing the 105210284Sjmallett instruction. 106210284Sjmallett When CWORD[WQE] is clear and RESP[PTR]!=0, RAD writes the L2/DRAM byte 107210284Sjmallett indicated by RESP[PTR] to zero after completing the instruction. */ 108210284Sjmallett uint64_t qout : 1; /**< Indicates whether the Q pipe is used by this instruction. 109210284Sjmallett If CWORD[QOUT] is set, IWORD[QEN] must be set for at least one IWORD. 110210284Sjmallett At least one of CWORD[QOUT,POUT] must be set. */ 111210284Sjmallett uint64_t pout : 1; /**< Indicates whether the P pipe is used by this instruction. 112210284Sjmallett If CWORD[POUT] is set, IWORD[PEN] must be set for at least one IWORD. 113210284Sjmallett At least one of CWORD[QOUT,POUT] must be set. */ 114210284Sjmallett uint64_t iword : 6; /**< Indicates the number of input buffers used. 115210284Sjmallett 1 <= CWORD[IWORD] <= 32. */ 116210284Sjmallett uint64_t size : 24; /**< Indicates the size in bytes of all input buffers. When CWORD[Q_CMP,P_CMP]=0, 117210284Sjmallett also indicates the size of the Q/P output buffers. 118210284Sjmallett CWORD[SIZE] must be a multiple of 8B (i.e. <2:0> must be zero). */ 119210284Sjmallett } cword; 120210284Sjmallett struct 121210284Sjmallett { 122210284Sjmallett uint64_t reserved_58_63 : 6; /**< Must be zero */ 123210284Sjmallett uint64_t fw : 1; /**< When set, indicates that RAD can modify any byte in any (128B) cache line touched 124210284Sjmallett by L2/DRAM addresses OWORD[PTR] through OWORD[PTR]+CWORD[SIZE]�1. 125210284Sjmallett Setting OWORD[FW] can improve hardware performance, as some DRAM loads can 126210284Sjmallett be avoided on L2 cache misses. The Q OWORD[FW] must not be set when 127210284Sjmallett CWORD[Q_CMP] is set, and the P OWORD[FW] must not be set when 128210284Sjmallett CWORD[P_CMP] is set. */ 129210284Sjmallett uint64_t nc : 1; /**< When set, indicates that RAD should not allocate L2 cache space for the P/Q data on 130210284Sjmallett L2 cache misses. 131210284Sjmallett OWORD[NC] should typically be clear, though setting OWORD[NC] can improve 132210284Sjmallett performance in some circumstances, as the L2 cache will not be polluted by P/Q data. 133210284Sjmallett The Q OWORD[NC] must not be set when CWORD[Q_CMP] is set, and the P 134210284Sjmallett OWORD[NC] must not be set when CWORD[P_CMP] is set. */ 135210284Sjmallett uint64_t reserved_40_55 : 16; /**< Must be zero */ 136210284Sjmallett uint64_t addr : 40; /**< When CWORD[P_CMP,Q_CMP]=0, OWORD[PTR] indicates the starting address of 137210284Sjmallett the L2/DRAM buffer that will receive the P/Q data. In the non-compare mode, the 138210284Sjmallett output buffer receives all of the output buffer bytes. 139210284Sjmallett When CWORD[P_CMP,Q_CMP]=1, the corresponding P/Q pipe is in compare mode, 140210284Sjmallett and the only output of the pipe is the non-zero detect result. In this case, 141210284Sjmallett OWORD[PTR] indicates the 8-byte location of the non-zero detect result. */ 142210284Sjmallett } oword; 143210284Sjmallett struct 144210284Sjmallett { 145210284Sjmallett uint64_t reserved_57_63 : 7; /**< Must be zero */ 146210284Sjmallett uint64_t nc : 1; /**< When set, indicates that RAD should not allocate L2 cache space for this input buffer 147210284Sjmallett data on L2 cache misses. 148210284Sjmallett Setting IWORD[NC] may improve performance in some circumstances, as the L2 149210284Sjmallett cache may not be polluted with input buffer data. */ 150210284Sjmallett uint64_t reserved_50_55 : 6; /**< Must be zero */ 151210284Sjmallett uint64_t qen : 1; /**< Indicates that this input buffer data should participate in the Q pipe result. 152210284Sjmallett The Q pipe hardware multiplies each participating input byte by IWORD[QMULT] 153210284Sjmallett before accumulating them by exclusive-OR'ing. 154210284Sjmallett IWORD[QEN] must not be set when CWORD[QOUT] is not set. 155210284Sjmallett If CWORD[QOUT] is set, IWORD[QEN] must be set for at least one IWORD. */ 156210284Sjmallett uint64_t pen : 1; /**< Indicates that this input buffer data should participate in the P pipe result. 157210284Sjmallett The P pipe hardware accumulates each participating input byte by bit-wise 158210284Sjmallett exclusive-OR'ing it. 159210284Sjmallett IWORD[PEN] must not be set when CWORD[POUT] is not set. 160210284Sjmallett If CWORD[POUT] is set, IWORD[PEN] must be set for at least one IWORD. */ 161210284Sjmallett uint64_t qmult : 8; /**< The Q pipe multiplier for the input buffer. Section 26.1 above describes the GF(28) 162210284Sjmallett multiplication algorithm. 163210284Sjmallett IWORD[QMULT] must be zero when IWORD[QEN] is not set. 164210284Sjmallett IWORD[QMULT] must not be zero when IWORD[QEN] is set. 165210284Sjmallett When IWORD[QMULT] is 1, the multiplication simplifies to the identity function, 166210284Sjmallett and the Q pipe performs the same XOR function as the P pipe. */ 167210284Sjmallett uint64_t addr : 40; /**< The starting address of the input buffer in L2/DRAM. 168210284Sjmallett IWORD[PTR] must be naturally-aligned on an 8 byte boundary (i.e. <2:0> must be 169210284Sjmallett zero). */ 170210284Sjmallett } iword; 171210284Sjmallett} cvmx_raid_word_t; 172210284Sjmallett 173210284Sjmallett/** 174210284Sjmallett * Initialize the RAID block 175210284Sjmallett * 176210284Sjmallett * @param polynomial Coefficients for the RAID polynomial 177210284Sjmallett * 178210284Sjmallett * @return Zero on success, negative on failure 179210284Sjmallett */ 180210284Sjmallettint cvmx_raid_initialize(cvmx_rad_reg_polynomial_t polynomial); 181210284Sjmallett 182210284Sjmallett/** 183210284Sjmallett * Shutdown the RAID block. RAID must be idle when 184210284Sjmallett * this function is called. 185210284Sjmallett * 186210284Sjmallett * @return Zero on success, negative on failure 187210284Sjmallett */ 188210284Sjmallettint cvmx_raid_shutdown(void); 189210284Sjmallett 190210284Sjmallett/** 191210284Sjmallett * Submit a command to the RAID block 192210284Sjmallett * 193210284Sjmallett * @param num_words Number of command words to submit 194210284Sjmallett * @param words Command words 195210284Sjmallett * 196210284Sjmallett * @return Zero on success, negative on failure 197210284Sjmallett */ 198210284Sjmallettint cvmx_raid_submit(int num_words, cvmx_raid_word_t words[]); 199210284Sjmallett 200210284Sjmallett#ifdef __cplusplus 201210284Sjmallett} 202210284Sjmallett#endif 203210284Sjmallett 204210284Sjmallett#endif // __CVMX_CMD_QUEUE_H__ 205