1210284Sjmallett/***********************license start*************** 2232812Sjmallett * Copyright (c) 2003-2010 Cavium Inc. (support@cavium.com). All rights 3215990Sjmallett * reserved. 4210284Sjmallett * 5210284Sjmallett * 6215990Sjmallett * Redistribution and use in source and binary forms, with or without 7215990Sjmallett * modification, are permitted provided that the following conditions are 8215990Sjmallett * met: 9210284Sjmallett * 10215990Sjmallett * * Redistributions of source code must retain the above copyright 11215990Sjmallett * notice, this list of conditions and the following disclaimer. 12210284Sjmallett * 13215990Sjmallett * * Redistributions in binary form must reproduce the above 14215990Sjmallett * copyright notice, this list of conditions and the following 15215990Sjmallett * disclaimer in the documentation and/or other materials provided 16215990Sjmallett * with the distribution. 17215990Sjmallett 18232812Sjmallett * * Neither the name of Cavium Inc. nor the names of 19215990Sjmallett * its contributors may be used to endorse or promote products 20215990Sjmallett * derived from this software without specific prior written 21215990Sjmallett * permission. 22215990Sjmallett 23215990Sjmallett * This Software, including technical data, may be subject to U.S. export control 24215990Sjmallett * laws, including the U.S. Export Administration Act and its associated 25215990Sjmallett * regulations, and may be subject to export or import regulations in other 26215990Sjmallett * countries. 27215990Sjmallett 28215990Sjmallett * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS" 29232812Sjmallett * AND WITH ALL FAULTS AND CAVIUM INC. MAKES NO PROMISES, REPRESENTATIONS OR 30215990Sjmallett * WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO 31215990Sjmallett * THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR 32215990Sjmallett * DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM 33215990Sjmallett * SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE, 34215990Sjmallett * MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF 35215990Sjmallett * VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR 36215990Sjmallett * CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT OF USE OR 37215990Sjmallett * PERFORMANCE OF THE SOFTWARE LIES WITH YOU. 38210284Sjmallett ***********************license end**************************************/ 39210284Sjmallett 40210284Sjmallett 41210284Sjmallett 42210284Sjmallett 43210284Sjmallett 44210284Sjmallett 45215990Sjmallett 46210284Sjmallett/** 47210284Sjmallett * @file 48210284Sjmallett * 49210284Sjmallett * Interface to RAID block. This is not available on all chips. 50210284Sjmallett * 51232812Sjmallett * <hr>$Revision: 70030 $<hr> 52210284Sjmallett */ 53210284Sjmallett 54210284Sjmallett#ifndef __CVMX_RAID_H__ 55210284Sjmallett#define __CVMX_RAID_H__ 56210284Sjmallett 57232812Sjmallett#ifdef CVMX_BUILD_FOR_LINUX_KERNEL 58232812Sjmallett#include <asm/octeon/cvmx-rad-defs.h> 59232812Sjmallett#endif 60232812Sjmallett 61210284Sjmallett#ifdef __cplusplus 62210284Sjmallettextern "C" { 63210284Sjmallett#endif 64210284Sjmallett 65210284Sjmallett/** 66210284Sjmallett * This structure defines the type of command words the RAID block 67210284Sjmallett * will accept. 68210284Sjmallett */ 69210284Sjmalletttypedef union 70210284Sjmallett{ 71210284Sjmallett uint64_t u64; 72210284Sjmallett struct 73210284Sjmallett { 74210284Sjmallett uint64_t reserved_37_63 : 27; /**< Must be zero */ 75210284Sjmallett uint64_t q_cmp : 1; /**< Indicates whether the Q pipe is in normal mode (CWORD[Q_CMP]=0) or in non-zero 76210284Sjmallett byte detect mode (CWORD[Q_CMP]=1). 77210284Sjmallett In non-zero byte detect mode, the Q OWORD[PTR] result is the non-zero detect 78210284Sjmallett result, which indicates the position of the first non-zero byte in the pipe result bytes. 79210284Sjmallett CWORD[Q_CMP] must not be set when CWORD[QOUT]=0, and must not be set 80210284Sjmallett when CWORD[Q_XOR] is set. */ 81210284Sjmallett uint64_t p_cmp : 1; /**< Indicates whether the P pipe is in normal mode (CWORD[P_CMP]=0) or in non-zero 82210284Sjmallett byte detect mode (CWORD[P_CMP]=1). 83210284Sjmallett In non-zero byte detect mode, the P OWORD[PTR] result is the non-zero detect 84210284Sjmallett result, which indicates the position of the first non-zero byte in the pipe result bytes. 85210284Sjmallett CWORD[P_CMP] must not be set when CWORD[POUT]=0, and must not be set 86210284Sjmallett when CWORD[P_XOR] is set. */ 87210284Sjmallett uint64_t q_xor : 1; /**< Indicates whether the Q output buffer bytes are the normal Q pipe result or the 88210284Sjmallett normal Q pipe result exclusive-OR'ed with the P pipe result. 89210284Sjmallett When CWORD[Q_XOR]=0 (and CWORD[Q_CMP]=0), the Q output buffer bytes are 90210284Sjmallett the normal Q pipe result, which does not include the P pipe result in any way. 91210284Sjmallett When CWORD[Q_XOR]=1, the Q output buffer bytes are the normal Q pipe result 92210284Sjmallett exclusive-OR'ed with the P pipe result, as if the P pipe result were another Q IWORD 93210284Sjmallett for the Q pipe with QMULT=1. 94210284Sjmallett CWORD[Q_XOR] must not be set unless both CWORD[POUT,QOUT] are set, and 95210284Sjmallett must not be set when CWORD[Q_CMP] is set. */ 96210284Sjmallett uint64_t p_xor : 1; /**< Indicates whether the P output buffer bytes are the normal P pipe result or the 97210284Sjmallett normal P pipe result exclusive-OR'ed with the Q pipe result. 98210284Sjmallett When CWORD[P_XOR]=0 (and CWORD[P_CMP]=0), the P output buffer bytes are 99210284Sjmallett the normal P pipe result, which does not include the Q pipe result in any way. 100210284Sjmallett When CWORD[P_XOR]=1, the P output buffer bytes are the normal P pipe result 101210284Sjmallett exclusive-OR'ed with the Q pipe result, as if the Q pipe result were another P 102210284Sjmallett IWORD for the P pipe. 103210284Sjmallett CWORD[P_XOR] must not be set unless both CWORD[POUT,QOUT] are set, and 104210284Sjmallett must not be set when CWORD[P_CMP] is set. */ 105210284Sjmallett uint64_t wqe : 1; /**< Indicates whether RAD submits a work queue entry or writes an L2/DRAM byte to 106210284Sjmallett zero after completing the instruction. 107210284Sjmallett When CWORD[WQE] is set and RESP[PTR]!=0, RAD adds the work queue entry 108210284Sjmallett indicated by RESP[PTR] to the selected POW input queue after completing the 109210284Sjmallett instruction. 110210284Sjmallett When CWORD[WQE] is clear and RESP[PTR]!=0, RAD writes the L2/DRAM byte 111210284Sjmallett indicated by RESP[PTR] to zero after completing the instruction. */ 112210284Sjmallett uint64_t qout : 1; /**< Indicates whether the Q pipe is used by this instruction. 113210284Sjmallett If CWORD[QOUT] is set, IWORD[QEN] must be set for at least one IWORD. 114210284Sjmallett At least one of CWORD[QOUT,POUT] must be set. */ 115210284Sjmallett uint64_t pout : 1; /**< Indicates whether the P pipe is used by this instruction. 116210284Sjmallett If CWORD[POUT] is set, IWORD[PEN] must be set for at least one IWORD. 117210284Sjmallett At least one of CWORD[QOUT,POUT] must be set. */ 118210284Sjmallett uint64_t iword : 6; /**< Indicates the number of input buffers used. 119210284Sjmallett 1 <= CWORD[IWORD] <= 32. */ 120210284Sjmallett uint64_t size : 24; /**< Indicates the size in bytes of all input buffers. When CWORD[Q_CMP,P_CMP]=0, 121210284Sjmallett also indicates the size of the Q/P output buffers. 122210284Sjmallett CWORD[SIZE] must be a multiple of 8B (i.e. <2:0> must be zero). */ 123210284Sjmallett } cword; 124210284Sjmallett struct 125210284Sjmallett { 126210284Sjmallett uint64_t reserved_58_63 : 6; /**< Must be zero */ 127210284Sjmallett uint64_t fw : 1; /**< When set, indicates that RAD can modify any byte in any (128B) cache line touched 128210284Sjmallett by L2/DRAM addresses OWORD[PTR] through OWORD[PTR]+CWORD[SIZE]�1. 129210284Sjmallett Setting OWORD[FW] can improve hardware performance, as some DRAM loads can 130210284Sjmallett be avoided on L2 cache misses. The Q OWORD[FW] must not be set when 131210284Sjmallett CWORD[Q_CMP] is set, and the P OWORD[FW] must not be set when 132210284Sjmallett CWORD[P_CMP] is set. */ 133210284Sjmallett uint64_t nc : 1; /**< When set, indicates that RAD should not allocate L2 cache space for the P/Q data on 134210284Sjmallett L2 cache misses. 135210284Sjmallett OWORD[NC] should typically be clear, though setting OWORD[NC] can improve 136210284Sjmallett performance in some circumstances, as the L2 cache will not be polluted by P/Q data. 137210284Sjmallett The Q OWORD[NC] must not be set when CWORD[Q_CMP] is set, and the P 138210284Sjmallett OWORD[NC] must not be set when CWORD[P_CMP] is set. */ 139210284Sjmallett uint64_t reserved_40_55 : 16; /**< Must be zero */ 140210284Sjmallett uint64_t addr : 40; /**< When CWORD[P_CMP,Q_CMP]=0, OWORD[PTR] indicates the starting address of 141210284Sjmallett the L2/DRAM buffer that will receive the P/Q data. In the non-compare mode, the 142210284Sjmallett output buffer receives all of the output buffer bytes. 143210284Sjmallett When CWORD[P_CMP,Q_CMP]=1, the corresponding P/Q pipe is in compare mode, 144210284Sjmallett and the only output of the pipe is the non-zero detect result. In this case, 145210284Sjmallett OWORD[PTR] indicates the 8-byte location of the non-zero detect result. */ 146210284Sjmallett } oword; 147210284Sjmallett struct 148210284Sjmallett { 149210284Sjmallett uint64_t reserved_57_63 : 7; /**< Must be zero */ 150210284Sjmallett uint64_t nc : 1; /**< When set, indicates that RAD should not allocate L2 cache space for this input buffer 151210284Sjmallett data on L2 cache misses. 152210284Sjmallett Setting IWORD[NC] may improve performance in some circumstances, as the L2 153210284Sjmallett cache may not be polluted with input buffer data. */ 154210284Sjmallett uint64_t reserved_50_55 : 6; /**< Must be zero */ 155210284Sjmallett uint64_t qen : 1; /**< Indicates that this input buffer data should participate in the Q pipe result. 156210284Sjmallett The Q pipe hardware multiplies each participating input byte by IWORD[QMULT] 157210284Sjmallett before accumulating them by exclusive-OR'ing. 158210284Sjmallett IWORD[QEN] must not be set when CWORD[QOUT] is not set. 159210284Sjmallett If CWORD[QOUT] is set, IWORD[QEN] must be set for at least one IWORD. */ 160210284Sjmallett uint64_t pen : 1; /**< Indicates that this input buffer data should participate in the P pipe result. 161210284Sjmallett The P pipe hardware accumulates each participating input byte by bit-wise 162210284Sjmallett exclusive-OR'ing it. 163210284Sjmallett IWORD[PEN] must not be set when CWORD[POUT] is not set. 164210284Sjmallett If CWORD[POUT] is set, IWORD[PEN] must be set for at least one IWORD. */ 165210284Sjmallett uint64_t qmult : 8; /**< The Q pipe multiplier for the input buffer. Section 26.1 above describes the GF(28) 166210284Sjmallett multiplication algorithm. 167210284Sjmallett IWORD[QMULT] must be zero when IWORD[QEN] is not set. 168210284Sjmallett IWORD[QMULT] must not be zero when IWORD[QEN] is set. 169210284Sjmallett When IWORD[QMULT] is 1, the multiplication simplifies to the identity function, 170210284Sjmallett and the Q pipe performs the same XOR function as the P pipe. */ 171210284Sjmallett uint64_t addr : 40; /**< The starting address of the input buffer in L2/DRAM. 172210284Sjmallett IWORD[PTR] must be naturally-aligned on an 8 byte boundary (i.e. <2:0> must be 173210284Sjmallett zero). */ 174210284Sjmallett } iword; 175210284Sjmallett} cvmx_raid_word_t; 176210284Sjmallett 177210284Sjmallett/** 178210284Sjmallett * Initialize the RAID block 179210284Sjmallett * 180210284Sjmallett * @param polynomial Coefficients for the RAID polynomial 181210284Sjmallett * 182210284Sjmallett * @return Zero on success, negative on failure 183210284Sjmallett */ 184210284Sjmallettint cvmx_raid_initialize(cvmx_rad_reg_polynomial_t polynomial); 185210284Sjmallett 186210284Sjmallett/** 187210284Sjmallett * Shutdown the RAID block. RAID must be idle when 188210284Sjmallett * this function is called. 189210284Sjmallett * 190210284Sjmallett * @return Zero on success, negative on failure 191210284Sjmallett */ 192210284Sjmallettint cvmx_raid_shutdown(void); 193210284Sjmallett 194210284Sjmallett/** 195210284Sjmallett * Submit a command to the RAID block 196210284Sjmallett * 197210284Sjmallett * @param num_words Number of command words to submit 198210284Sjmallett * @param words Command words 199210284Sjmallett * 200210284Sjmallett * @return Zero on success, negative on failure 201210284Sjmallett */ 202210284Sjmallettint cvmx_raid_submit(int num_words, cvmx_raid_word_t words[]); 203210284Sjmallett 204210284Sjmallett#ifdef __cplusplus 205210284Sjmallett} 206210284Sjmallett#endif 207210284Sjmallett 208210284Sjmallett#endif // __CVMX_CMD_QUEUE_H__ 209