1215976Sjmallett/***********************license start*************** 2232812Sjmallett * Copyright (c) 2003-2012 Cavium Inc. (support@cavium.com). All rights 3215976Sjmallett * reserved. 4215976Sjmallett * 5215976Sjmallett * 6215976Sjmallett * Redistribution and use in source and binary forms, with or without 7215976Sjmallett * modification, are permitted provided that the following conditions are 8215976Sjmallett * met: 9215976Sjmallett * 10215976Sjmallett * * Redistributions of source code must retain the above copyright 11215976Sjmallett * notice, this list of conditions and the following disclaimer. 12215976Sjmallett * 13215976Sjmallett * * Redistributions in binary form must reproduce the above 14215976Sjmallett * copyright notice, this list of conditions and the following 15215976Sjmallett * disclaimer in the documentation and/or other materials provided 16215976Sjmallett * with the distribution. 17215976Sjmallett 18232812Sjmallett * * Neither the name of Cavium Inc. nor the names of 19215976Sjmallett * its contributors may be used to endorse or promote products 20215976Sjmallett * derived from this software without specific prior written 21215976Sjmallett * permission. 22215976Sjmallett 23215976Sjmallett * This Software, including technical data, may be subject to U.S. export control 24215976Sjmallett * laws, including the U.S. Export Administration Act and its associated 25215976Sjmallett * regulations, and may be subject to export or import regulations in other 26215976Sjmallett * countries. 27215976Sjmallett 28215976Sjmallett * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS" 29232812Sjmallett * AND WITH ALL FAULTS AND CAVIUM INC. MAKES NO PROMISES, REPRESENTATIONS OR 30215976Sjmallett * WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO 31215976Sjmallett * THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR 32215976Sjmallett * DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM 33215976Sjmallett * SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE, 34215976Sjmallett * MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF 35215976Sjmallett * VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR 36215976Sjmallett * CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT OF USE OR 37215976Sjmallett * PERFORMANCE OF THE SOFTWARE LIES WITH YOU. 38215976Sjmallett ***********************license end**************************************/ 39215976Sjmallett 40215976Sjmallett 41215976Sjmallett/** 42215976Sjmallett * cvmx-key-defs.h 43215976Sjmallett * 44215976Sjmallett * Configuration and status register (CSR) type definitions for 45215976Sjmallett * Octeon key. 46215976Sjmallett * 47215976Sjmallett * This file is auto generated. Do not edit. 48215976Sjmallett * 49215976Sjmallett * <hr>$Revision$<hr> 50215976Sjmallett * 51215976Sjmallett */ 52232812Sjmallett#ifndef __CVMX_KEY_DEFS_H__ 53232812Sjmallett#define __CVMX_KEY_DEFS_H__ 54215976Sjmallett 55215976Sjmallett#if CVMX_ENABLE_CSR_ADDRESS_CHECKING 56215976Sjmallett#define CVMX_KEY_BIST_REG CVMX_KEY_BIST_REG_FUNC() 57215976Sjmallettstatic inline uint64_t CVMX_KEY_BIST_REG_FUNC(void) 58215976Sjmallett{ 59232812Sjmallett if (!(OCTEON_IS_MODEL(OCTEON_CN38XX) || OCTEON_IS_MODEL(OCTEON_CN56XX) || OCTEON_IS_MODEL(OCTEON_CN58XX) || OCTEON_IS_MODEL(OCTEON_CN61XX) || OCTEON_IS_MODEL(OCTEON_CN63XX) || OCTEON_IS_MODEL(OCTEON_CN66XX) || OCTEON_IS_MODEL(OCTEON_CN68XX) || OCTEON_IS_MODEL(OCTEON_CNF71XX))) 60215976Sjmallett cvmx_warn("CVMX_KEY_BIST_REG not supported on this chip\n"); 61215976Sjmallett return CVMX_ADD_IO_SEG(0x0001180020000018ull); 62215976Sjmallett} 63215976Sjmallett#else 64215976Sjmallett#define CVMX_KEY_BIST_REG (CVMX_ADD_IO_SEG(0x0001180020000018ull)) 65215976Sjmallett#endif 66215976Sjmallett#if CVMX_ENABLE_CSR_ADDRESS_CHECKING 67215976Sjmallett#define CVMX_KEY_CTL_STATUS CVMX_KEY_CTL_STATUS_FUNC() 68215976Sjmallettstatic inline uint64_t CVMX_KEY_CTL_STATUS_FUNC(void) 69215976Sjmallett{ 70232812Sjmallett if (!(OCTEON_IS_MODEL(OCTEON_CN38XX) || OCTEON_IS_MODEL(OCTEON_CN56XX) || OCTEON_IS_MODEL(OCTEON_CN58XX) || OCTEON_IS_MODEL(OCTEON_CN61XX) || OCTEON_IS_MODEL(OCTEON_CN63XX) || OCTEON_IS_MODEL(OCTEON_CN66XX) || OCTEON_IS_MODEL(OCTEON_CN68XX) || OCTEON_IS_MODEL(OCTEON_CNF71XX))) 71215976Sjmallett cvmx_warn("CVMX_KEY_CTL_STATUS not supported on this chip\n"); 72215976Sjmallett return CVMX_ADD_IO_SEG(0x0001180020000010ull); 73215976Sjmallett} 74215976Sjmallett#else 75215976Sjmallett#define CVMX_KEY_CTL_STATUS (CVMX_ADD_IO_SEG(0x0001180020000010ull)) 76215976Sjmallett#endif 77215976Sjmallett#if CVMX_ENABLE_CSR_ADDRESS_CHECKING 78215976Sjmallett#define CVMX_KEY_INT_ENB CVMX_KEY_INT_ENB_FUNC() 79215976Sjmallettstatic inline uint64_t CVMX_KEY_INT_ENB_FUNC(void) 80215976Sjmallett{ 81232812Sjmallett if (!(OCTEON_IS_MODEL(OCTEON_CN38XX) || OCTEON_IS_MODEL(OCTEON_CN56XX) || OCTEON_IS_MODEL(OCTEON_CN58XX) || OCTEON_IS_MODEL(OCTEON_CN61XX) || OCTEON_IS_MODEL(OCTEON_CN63XX) || OCTEON_IS_MODEL(OCTEON_CN66XX) || OCTEON_IS_MODEL(OCTEON_CN68XX) || OCTEON_IS_MODEL(OCTEON_CNF71XX))) 82215976Sjmallett cvmx_warn("CVMX_KEY_INT_ENB not supported on this chip\n"); 83215976Sjmallett return CVMX_ADD_IO_SEG(0x0001180020000008ull); 84215976Sjmallett} 85215976Sjmallett#else 86215976Sjmallett#define CVMX_KEY_INT_ENB (CVMX_ADD_IO_SEG(0x0001180020000008ull)) 87215976Sjmallett#endif 88215976Sjmallett#if CVMX_ENABLE_CSR_ADDRESS_CHECKING 89215976Sjmallett#define CVMX_KEY_INT_SUM CVMX_KEY_INT_SUM_FUNC() 90215976Sjmallettstatic inline uint64_t CVMX_KEY_INT_SUM_FUNC(void) 91215976Sjmallett{ 92232812Sjmallett if (!(OCTEON_IS_MODEL(OCTEON_CN38XX) || OCTEON_IS_MODEL(OCTEON_CN56XX) || OCTEON_IS_MODEL(OCTEON_CN58XX) || OCTEON_IS_MODEL(OCTEON_CN61XX) || OCTEON_IS_MODEL(OCTEON_CN63XX) || OCTEON_IS_MODEL(OCTEON_CN66XX) || OCTEON_IS_MODEL(OCTEON_CN68XX) || OCTEON_IS_MODEL(OCTEON_CNF71XX))) 93215976Sjmallett cvmx_warn("CVMX_KEY_INT_SUM not supported on this chip\n"); 94215976Sjmallett return CVMX_ADD_IO_SEG(0x0001180020000000ull); 95215976Sjmallett} 96215976Sjmallett#else 97215976Sjmallett#define CVMX_KEY_INT_SUM (CVMX_ADD_IO_SEG(0x0001180020000000ull)) 98215976Sjmallett#endif 99215976Sjmallett 100215976Sjmallett/** 101215976Sjmallett * cvmx_key_bist_reg 102215976Sjmallett * 103215976Sjmallett * KEY_BIST_REG = KEY's BIST Status Register 104215976Sjmallett * 105215976Sjmallett * The KEY's BIST status for memories. 106215976Sjmallett */ 107232812Sjmallettunion cvmx_key_bist_reg { 108215976Sjmallett uint64_t u64; 109232812Sjmallett struct cvmx_key_bist_reg_s { 110232812Sjmallett#ifdef __BIG_ENDIAN_BITFIELD 111215976Sjmallett uint64_t reserved_3_63 : 61; 112215976Sjmallett uint64_t rrc : 1; /**< RRC bist status. */ 113215976Sjmallett uint64_t mem1 : 1; /**< MEM - 1 bist status. */ 114215976Sjmallett uint64_t mem0 : 1; /**< MEM - 0 bist status. */ 115215976Sjmallett#else 116215976Sjmallett uint64_t mem0 : 1; 117215976Sjmallett uint64_t mem1 : 1; 118215976Sjmallett uint64_t rrc : 1; 119215976Sjmallett uint64_t reserved_3_63 : 61; 120215976Sjmallett#endif 121215976Sjmallett } s; 122215976Sjmallett struct cvmx_key_bist_reg_s cn38xx; 123215976Sjmallett struct cvmx_key_bist_reg_s cn38xxp2; 124215976Sjmallett struct cvmx_key_bist_reg_s cn56xx; 125215976Sjmallett struct cvmx_key_bist_reg_s cn56xxp1; 126215976Sjmallett struct cvmx_key_bist_reg_s cn58xx; 127215976Sjmallett struct cvmx_key_bist_reg_s cn58xxp1; 128232812Sjmallett struct cvmx_key_bist_reg_s cn61xx; 129215976Sjmallett struct cvmx_key_bist_reg_s cn63xx; 130215976Sjmallett struct cvmx_key_bist_reg_s cn63xxp1; 131232812Sjmallett struct cvmx_key_bist_reg_s cn66xx; 132232812Sjmallett struct cvmx_key_bist_reg_s cn68xx; 133232812Sjmallett struct cvmx_key_bist_reg_s cn68xxp1; 134232812Sjmallett struct cvmx_key_bist_reg_s cnf71xx; 135215976Sjmallett}; 136215976Sjmalletttypedef union cvmx_key_bist_reg cvmx_key_bist_reg_t; 137215976Sjmallett 138215976Sjmallett/** 139215976Sjmallett * cvmx_key_ctl_status 140215976Sjmallett * 141215976Sjmallett * KEY_CTL_STATUS = KEY's Control/Status Register 142215976Sjmallett * 143215976Sjmallett * The KEY's interrupt enable register. 144215976Sjmallett */ 145232812Sjmallettunion cvmx_key_ctl_status { 146215976Sjmallett uint64_t u64; 147232812Sjmallett struct cvmx_key_ctl_status_s { 148232812Sjmallett#ifdef __BIG_ENDIAN_BITFIELD 149215976Sjmallett uint64_t reserved_14_63 : 50; 150215976Sjmallett uint64_t mem1_err : 7; /**< Causes a flip of the ECC bit associated 38:32 151215976Sjmallett respective to bit 13:7 of this field, for FPF 152215976Sjmallett FIFO 1. */ 153215976Sjmallett uint64_t mem0_err : 7; /**< Causes a flip of the ECC bit associated 38:32 154215976Sjmallett respective to bit 6:0 of this field, for FPF 155215976Sjmallett FIFO 0. */ 156215976Sjmallett#else 157215976Sjmallett uint64_t mem0_err : 7; 158215976Sjmallett uint64_t mem1_err : 7; 159215976Sjmallett uint64_t reserved_14_63 : 50; 160215976Sjmallett#endif 161215976Sjmallett } s; 162215976Sjmallett struct cvmx_key_ctl_status_s cn38xx; 163215976Sjmallett struct cvmx_key_ctl_status_s cn38xxp2; 164215976Sjmallett struct cvmx_key_ctl_status_s cn56xx; 165215976Sjmallett struct cvmx_key_ctl_status_s cn56xxp1; 166215976Sjmallett struct cvmx_key_ctl_status_s cn58xx; 167215976Sjmallett struct cvmx_key_ctl_status_s cn58xxp1; 168232812Sjmallett struct cvmx_key_ctl_status_s cn61xx; 169215976Sjmallett struct cvmx_key_ctl_status_s cn63xx; 170215976Sjmallett struct cvmx_key_ctl_status_s cn63xxp1; 171232812Sjmallett struct cvmx_key_ctl_status_s cn66xx; 172232812Sjmallett struct cvmx_key_ctl_status_s cn68xx; 173232812Sjmallett struct cvmx_key_ctl_status_s cn68xxp1; 174232812Sjmallett struct cvmx_key_ctl_status_s cnf71xx; 175215976Sjmallett}; 176215976Sjmalletttypedef union cvmx_key_ctl_status cvmx_key_ctl_status_t; 177215976Sjmallett 178215976Sjmallett/** 179215976Sjmallett * cvmx_key_int_enb 180215976Sjmallett * 181215976Sjmallett * KEY_INT_ENB = KEY's Interrupt Enable 182215976Sjmallett * 183215976Sjmallett * The KEY's interrupt enable register. 184215976Sjmallett */ 185232812Sjmallettunion cvmx_key_int_enb { 186215976Sjmallett uint64_t u64; 187232812Sjmallett struct cvmx_key_int_enb_s { 188232812Sjmallett#ifdef __BIG_ENDIAN_BITFIELD 189215976Sjmallett uint64_t reserved_4_63 : 60; 190215976Sjmallett uint64_t ked1_dbe : 1; /**< When set (1) and bit 3 of the KEY_INT_SUM 191215976Sjmallett register is asserted the KEY will assert an 192215976Sjmallett interrupt. */ 193215976Sjmallett uint64_t ked1_sbe : 1; /**< When set (1) and bit 2 of the KEY_INT_SUM 194215976Sjmallett register is asserted the KEY will assert an 195215976Sjmallett interrupt. */ 196215976Sjmallett uint64_t ked0_dbe : 1; /**< When set (1) and bit 1 of the KEY_INT_SUM 197215976Sjmallett register is asserted the KEY will assert an 198215976Sjmallett interrupt. */ 199215976Sjmallett uint64_t ked0_sbe : 1; /**< When set (1) and bit 0 of the KEY_INT_SUM 200215976Sjmallett register is asserted the KEY will assert an 201215976Sjmallett interrupt. */ 202215976Sjmallett#else 203215976Sjmallett uint64_t ked0_sbe : 1; 204215976Sjmallett uint64_t ked0_dbe : 1; 205215976Sjmallett uint64_t ked1_sbe : 1; 206215976Sjmallett uint64_t ked1_dbe : 1; 207215976Sjmallett uint64_t reserved_4_63 : 60; 208215976Sjmallett#endif 209215976Sjmallett } s; 210215976Sjmallett struct cvmx_key_int_enb_s cn38xx; 211215976Sjmallett struct cvmx_key_int_enb_s cn38xxp2; 212215976Sjmallett struct cvmx_key_int_enb_s cn56xx; 213215976Sjmallett struct cvmx_key_int_enb_s cn56xxp1; 214215976Sjmallett struct cvmx_key_int_enb_s cn58xx; 215215976Sjmallett struct cvmx_key_int_enb_s cn58xxp1; 216232812Sjmallett struct cvmx_key_int_enb_s cn61xx; 217215976Sjmallett struct cvmx_key_int_enb_s cn63xx; 218215976Sjmallett struct cvmx_key_int_enb_s cn63xxp1; 219232812Sjmallett struct cvmx_key_int_enb_s cn66xx; 220232812Sjmallett struct cvmx_key_int_enb_s cn68xx; 221232812Sjmallett struct cvmx_key_int_enb_s cn68xxp1; 222232812Sjmallett struct cvmx_key_int_enb_s cnf71xx; 223215976Sjmallett}; 224215976Sjmalletttypedef union cvmx_key_int_enb cvmx_key_int_enb_t; 225215976Sjmallett 226215976Sjmallett/** 227215976Sjmallett * cvmx_key_int_sum 228215976Sjmallett * 229215976Sjmallett * KEY_INT_SUM = KEY's Interrupt Summary Register 230215976Sjmallett * 231215976Sjmallett * Contains the diffrent interrupt summary bits of the KEY. 232215976Sjmallett */ 233232812Sjmallettunion cvmx_key_int_sum { 234215976Sjmallett uint64_t u64; 235232812Sjmallett struct cvmx_key_int_sum_s { 236232812Sjmallett#ifdef __BIG_ENDIAN_BITFIELD 237215976Sjmallett uint64_t reserved_4_63 : 60; 238215976Sjmallett uint64_t ked1_dbe : 1; 239215976Sjmallett uint64_t ked1_sbe : 1; 240215976Sjmallett uint64_t ked0_dbe : 1; 241215976Sjmallett uint64_t ked0_sbe : 1; 242215976Sjmallett#else 243215976Sjmallett uint64_t ked0_sbe : 1; 244215976Sjmallett uint64_t ked0_dbe : 1; 245215976Sjmallett uint64_t ked1_sbe : 1; 246215976Sjmallett uint64_t ked1_dbe : 1; 247215976Sjmallett uint64_t reserved_4_63 : 60; 248215976Sjmallett#endif 249215976Sjmallett } s; 250215976Sjmallett struct cvmx_key_int_sum_s cn38xx; 251215976Sjmallett struct cvmx_key_int_sum_s cn38xxp2; 252215976Sjmallett struct cvmx_key_int_sum_s cn56xx; 253215976Sjmallett struct cvmx_key_int_sum_s cn56xxp1; 254215976Sjmallett struct cvmx_key_int_sum_s cn58xx; 255215976Sjmallett struct cvmx_key_int_sum_s cn58xxp1; 256232812Sjmallett struct cvmx_key_int_sum_s cn61xx; 257215976Sjmallett struct cvmx_key_int_sum_s cn63xx; 258215976Sjmallett struct cvmx_key_int_sum_s cn63xxp1; 259232812Sjmallett struct cvmx_key_int_sum_s cn66xx; 260232812Sjmallett struct cvmx_key_int_sum_s cn68xx; 261232812Sjmallett struct cvmx_key_int_sum_s cn68xxp1; 262232812Sjmallett struct cvmx_key_int_sum_s cnf71xx; 263215976Sjmallett}; 264215976Sjmalletttypedef union cvmx_key_int_sum cvmx_key_int_sum_t; 265215976Sjmallett 266215976Sjmallett#endif 267