param.h revision 224207
1/*-
2 * Copyright (c) 2002 David E. O'Brien.  All rights reserved.
3 * Copyright (c) 1992, 1993
4 *	The Regents of the University of California.  All rights reserved.
5 *
6 * This code is derived from software contributed to Berkeley by
7 * the Systems Programming Group of the University of Utah Computer
8 * Science Department and Ralph Campbell.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 *    notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 *    notice, this list of conditions and the following disclaimer in the
17 *    documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 *    must display the following acknowledgement:
20 *	This product includes software developed by the University of
21 *	California, Berkeley and its contributors.
22 * 4. Neither the name of the University nor the names of its contributors
23 *    may be used to endorse or promote products derived from this software
24 *    without specific prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
27 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
28 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
29 * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
30 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
31 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
32 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
33 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
34 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
35 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
36 * SUCH DAMAGE.
37 *
38 *	@(#)param.h	8.1 (Berkeley) 6/10/93
39 * $FreeBSD: head/sys/amd64/include/param.h 224207 2011-07-19 00:37:24Z attilio $
40 */
41
42
43#ifndef _AMD64_INCLUDE_PARAM_H_
44#define	_AMD64_INCLUDE_PARAM_H_
45
46#include <machine/_align.h>
47
48/*
49 * Machine dependent constants for AMD64.
50 */
51
52
53#define __HAVE_ACPI
54#define __PCI_REROUTE_INTERRUPT
55
56#ifndef MACHINE
57#define	MACHINE		"amd64"
58#endif
59#ifndef MACHINE_ARCH
60#define	MACHINE_ARCH	"amd64"
61#endif
62#ifndef MACHINE_ARCH32
63#define	MACHINE_ARCH32	"i386"
64#endif
65
66#if defined(SMP) || defined(KLD_MODULE)
67#ifndef MAXCPU
68#define MAXCPU		32
69#endif
70#else
71#define MAXCPU		1
72#endif
73
74#define	ALIGNBYTES		_ALIGNBYTES
75#define	ALIGN(p)		_ALIGN(p)
76/*
77 * ALIGNED_POINTER is a boolean macro that checks whether an address
78 * is valid to fetch data elements of type t from on this architecture.
79 * This does not reflect the optimal alignment, just the possibility
80 * (within reasonable limits).
81 */
82#define	ALIGNED_POINTER(p, t)	1
83
84/*
85 * CACHE_LINE_SIZE is the compile-time maximum cache line size for an
86 * architecture.  It should be used with appropriate caution.
87 */
88#define	CACHE_LINE_SHIFT	7
89#define	CACHE_LINE_SIZE		(1 << CACHE_LINE_SHIFT)
90
91/* Size of the level 1 page table units */
92#define NPTEPG		(PAGE_SIZE/(sizeof (pt_entry_t)))
93#define	NPTEPGSHIFT	9		/* LOG2(NPTEPG) */
94#define PAGE_SHIFT	12		/* LOG2(PAGE_SIZE) */
95#define PAGE_SIZE	(1<<PAGE_SHIFT)	/* bytes/page */
96#define PAGE_MASK	(PAGE_SIZE-1)
97/* Size of the level 2 page directory units */
98#define	NPDEPG		(PAGE_SIZE/(sizeof (pd_entry_t)))
99#define	NPDEPGSHIFT	9		/* LOG2(NPDEPG) */
100#define	PDRSHIFT	21              /* LOG2(NBPDR) */
101#define	NBPDR		(1<<PDRSHIFT)   /* bytes/page dir */
102#define	PDRMASK		(NBPDR-1)
103/* Size of the level 3 page directory pointer table units */
104#define	NPDPEPG		(PAGE_SIZE/(sizeof (pdp_entry_t)))
105#define	NPDPEPGSHIFT	9		/* LOG2(NPDPEPG) */
106#define	PDPSHIFT	30		/* LOG2(NBPDP) */
107#define	NBPDP		(1<<PDPSHIFT)	/* bytes/page dir ptr table */
108#define	PDPMASK		(NBPDP-1)
109/* Size of the level 4 page-map level-4 table units */
110#define	NPML4EPG	(PAGE_SIZE/(sizeof (pml4_entry_t)))
111#define	NPML4EPGSHIFT	9		/* LOG2(NPML4EPG) */
112#define	PML4SHIFT	39		/* LOG2(NBPML4) */
113#define	NBPML4		(1UL<<PML4SHIFT)/* bytes/page map lev4 table */
114#define	PML4MASK	(NBPML4-1)
115
116#define	MAXPAGESIZES	3	/* maximum number of supported page sizes */
117
118#define IOPAGES	2		/* pages of i/o permission bitmap */
119
120#ifndef	KSTACK_PAGES
121#define	KSTACK_PAGES	4	/* pages of kstack (with pcb) */
122#endif
123#define	KSTACK_GUARD_PAGES 1	/* pages of kstack guard; 0 disables */
124
125/*
126 * Ceiling on amount of swblock kva space, can be changed via
127 * the kern.maxswzone /boot/loader.conf variable.
128 */
129#ifndef VM_SWZONE_SIZE_MAX
130#define	VM_SWZONE_SIZE_MAX	(32 * 1024 * 1024)
131#endif
132
133/*
134 * Mach derived conversion macros
135 */
136#define	round_page(x)	((((unsigned long)(x)) + PAGE_MASK) & ~(PAGE_MASK))
137#define	trunc_page(x)	((unsigned long)(x) & ~(PAGE_MASK))
138#define trunc_2mpage(x)	((unsigned long)(x) & ~PDRMASK)
139#define round_2mpage(x)	((((unsigned long)(x)) + PDRMASK) & ~PDRMASK)
140#define trunc_1gpage(x)	((unsigned long)(x) & ~PDPMASK)
141
142#define	atop(x)		((unsigned long)(x) >> PAGE_SHIFT)
143#define	ptoa(x)		((unsigned long)(x) << PAGE_SHIFT)
144
145#define	amd64_btop(x)	((unsigned long)(x) >> PAGE_SHIFT)
146#define	amd64_ptob(x)	((unsigned long)(x) << PAGE_SHIFT)
147
148#define	pgtok(x)	((unsigned long)(x) * (PAGE_SIZE / 1024))
149
150#endif /* !_AMD64_INCLUDE_PARAM_H_ */
151