NVPTX.h revision 249423
1//===-- NVPTX.h - Top-level interface for NVPTX representation --*- C++ -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file contains the entry points for global functions defined in 11// the LLVM NVPTX back-end. 12// 13//===----------------------------------------------------------------------===// 14 15#ifndef LLVM_TARGET_NVPTX_H 16#define LLVM_TARGET_NVPTX_H 17 18#include "MCTargetDesc/NVPTXBaseInfo.h" 19#include "llvm/IR/Module.h" 20#include "llvm/IR/Value.h" 21#include "llvm/Support/ErrorHandling.h" 22#include "llvm/Target/TargetMachine.h" 23#include <cassert> 24#include <iosfwd> 25 26namespace llvm { 27class NVPTXTargetMachine; 28class FunctionPass; 29class formatted_raw_ostream; 30 31namespace NVPTXCC { 32enum CondCodes { 33 EQ, 34 NE, 35 LT, 36 LE, 37 GT, 38 GE 39}; 40} 41 42inline static const char *NVPTXCondCodeToString(NVPTXCC::CondCodes CC) { 43 switch (CC) { 44 case NVPTXCC::NE: 45 return "ne"; 46 case NVPTXCC::EQ: 47 return "eq"; 48 case NVPTXCC::LT: 49 return "lt"; 50 case NVPTXCC::LE: 51 return "le"; 52 case NVPTXCC::GT: 53 return "gt"; 54 case NVPTXCC::GE: 55 return "ge"; 56 } 57 llvm_unreachable("Unknown condition code"); 58} 59 60FunctionPass * 61createNVPTXISelDag(NVPTXTargetMachine &TM, llvm::CodeGenOpt::Level OptLevel); 62FunctionPass *createLowerStructArgsPass(NVPTXTargetMachine &); 63FunctionPass *createNVPTXReMatPass(NVPTXTargetMachine &); 64FunctionPass *createNVPTXReMatBlockPass(NVPTXTargetMachine &); 65 66bool isImageOrSamplerVal(const Value *, const Module *); 67 68extern Target TheNVPTXTarget32; 69extern Target TheNVPTXTarget64; 70 71namespace NVPTX { 72enum DrvInterface { 73 NVCL, 74 CUDA, 75 TEST 76}; 77 78// A field inside TSFlags needs a shift and a mask. The usage is 79// always as follows : 80// ((TSFlags & fieldMask) >> fieldShift) 81// The enum keeps the mask, the shift, and all valid values of the 82// field in one place. 83enum VecInstType { 84 VecInstTypeShift = 0, 85 VecInstTypeMask = 0xF, 86 87 VecNOP = 0, 88 VecLoad = 1, 89 VecStore = 2, 90 VecBuild = 3, 91 VecShuffle = 4, 92 VecExtract = 5, 93 VecInsert = 6, 94 VecDest = 7, 95 VecOther = 15 96}; 97 98enum SimpleMove { 99 SimpleMoveMask = 0x10, 100 SimpleMoveShift = 4 101}; 102enum LoadStore { 103 isLoadMask = 0x20, 104 isLoadShift = 5, 105 isStoreMask = 0x40, 106 isStoreShift = 6 107}; 108 109namespace PTXLdStInstCode { 110enum AddressSpace { 111 GENERIC = 0, 112 GLOBAL = 1, 113 CONSTANT = 2, 114 SHARED = 3, 115 PARAM = 4, 116 LOCAL = 5 117}; 118enum FromType { 119 Unsigned = 0, 120 Signed, 121 Float 122}; 123enum VecType { 124 Scalar = 1, 125 V2 = 2, 126 V4 = 4 127}; 128} 129} 130} // end namespace llvm; 131 132// Defines symbolic names for NVPTX registers. This defines a mapping from 133// register name to register number. 134#define GET_REGINFO_ENUM 135#include "NVPTXGenRegisterInfo.inc" 136 137// Defines symbolic names for the NVPTX instructions. 138#define GET_INSTRINFO_ENUM 139#include "NVPTXGenInstrInfo.inc" 140 141#endif 142