1//===-- NVPTX.h - Top-level interface for NVPTX representation --*- C++ -*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file contains the entry points for global functions defined in
11// the LLVM NVPTX back-end.
12//
13//===----------------------------------------------------------------------===//
14
15#ifndef LLVM_TARGET_NVPTX_H
16#define LLVM_TARGET_NVPTX_H
17
18#include "MCTargetDesc/NVPTXBaseInfo.h"
19#include "llvm/ADT/StringMap.h"
20#include "llvm/IR/Module.h"
21#include "llvm/IR/Value.h"
22#include "llvm/Support/ErrorHandling.h"
23#include "llvm/Target/TargetMachine.h"
24#include <cassert>
25#include <iosfwd>
26
27namespace llvm {
28class NVPTXTargetMachine;
29class FunctionPass;
30class formatted_raw_ostream;
31
32namespace NVPTXCC {
33enum CondCodes {
34  EQ,
35  NE,
36  LT,
37  LE,
38  GT,
39  GE
40};
41}
42
43inline static const char *NVPTXCondCodeToString(NVPTXCC::CondCodes CC) {
44  switch (CC) {
45  case NVPTXCC::NE:
46    return "ne";
47  case NVPTXCC::EQ:
48    return "eq";
49  case NVPTXCC::LT:
50    return "lt";
51  case NVPTXCC::LE:
52    return "le";
53  case NVPTXCC::GT:
54    return "gt";
55  case NVPTXCC::GE:
56    return "ge";
57  }
58  llvm_unreachable("Unknown condition code");
59}
60
61FunctionPass *
62createNVPTXISelDag(NVPTXTargetMachine &TM, llvm::CodeGenOpt::Level OptLevel);
63FunctionPass *createLowerStructArgsPass(NVPTXTargetMachine &);
64FunctionPass *createNVPTXReMatPass(NVPTXTargetMachine &);
65FunctionPass *createNVPTXReMatBlockPass(NVPTXTargetMachine &);
66ModulePass *createGenericToNVVMPass();
67ModulePass *createNVVMReflectPass();
68ModulePass *createNVVMReflectPass(const StringMap<int>& Mapping);
69
70bool isImageOrSamplerVal(const Value *, const Module *);
71
72extern Target TheNVPTXTarget32;
73extern Target TheNVPTXTarget64;
74
75namespace NVPTX {
76enum DrvInterface {
77  NVCL,
78  CUDA,
79  TEST
80};
81
82// A field inside TSFlags needs a shift and a mask. The usage is
83// always as follows :
84// ((TSFlags & fieldMask) >> fieldShift)
85// The enum keeps the mask, the shift, and all valid values of the
86// field in one place.
87enum VecInstType {
88  VecInstTypeShift = 0,
89  VecInstTypeMask = 0xF,
90
91  VecNOP = 0,
92  VecLoad = 1,
93  VecStore = 2,
94  VecBuild = 3,
95  VecShuffle = 4,
96  VecExtract = 5,
97  VecInsert = 6,
98  VecDest = 7,
99  VecOther = 15
100};
101
102enum SimpleMove {
103  SimpleMoveMask = 0x10,
104  SimpleMoveShift = 4
105};
106enum LoadStore {
107  isLoadMask = 0x20,
108  isLoadShift = 5,
109  isStoreMask = 0x40,
110  isStoreShift = 6
111};
112
113namespace PTXLdStInstCode {
114enum AddressSpace {
115  GENERIC = 0,
116  GLOBAL = 1,
117  CONSTANT = 2,
118  SHARED = 3,
119  PARAM = 4,
120  LOCAL = 5
121};
122enum FromType {
123  Unsigned = 0,
124  Signed,
125  Float
126};
127enum VecType {
128  Scalar = 1,
129  V2 = 2,
130  V4 = 4
131};
132}
133}
134} // end namespace llvm;
135
136// Defines symbolic names for NVPTX registers.  This defines a mapping from
137// register name to register number.
138#define GET_REGINFO_ENUM
139#include "NVPTXGenRegisterInfo.inc"
140
141// Defines symbolic names for the NVPTX instructions.
142#define GET_INSTRINFO_ENUM
143#include "NVPTXGenInstrInfo.inc"
144
145#endif
146