1207618Srdivacky//===-- llvm/CodeGen/ISDOpcodes.h - CodeGen opcodes -------------*- C++ -*-===// 2207618Srdivacky// 3207618Srdivacky// The LLVM Compiler Infrastructure 4207618Srdivacky// 5207618Srdivacky// This file is distributed under the University of Illinois Open Source 6207618Srdivacky// License. See LICENSE.TXT for details. 7207618Srdivacky// 8207618Srdivacky//===----------------------------------------------------------------------===// 9207618Srdivacky// 10207618Srdivacky// This file declares codegen opcodes and related utilities. 11207618Srdivacky// 12207618Srdivacky//===----------------------------------------------------------------------===// 13207618Srdivacky 14207618Srdivacky#ifndef LLVM_CODEGEN_ISDOPCODES_H 15207618Srdivacky#define LLVM_CODEGEN_ISDOPCODES_H 16207618Srdivacky 17207618Srdivackynamespace llvm { 18207618Srdivacky 19207618Srdivacky/// ISD namespace - This namespace contains an enum which represents all of the 20207618Srdivacky/// SelectionDAG node types and value types. 21207618Srdivacky/// 22207618Srdivackynamespace ISD { 23207618Srdivacky 24207618Srdivacky //===--------------------------------------------------------------------===// 25207618Srdivacky /// ISD::NodeType enum - This enum defines the target-independent operators 26207618Srdivacky /// for a SelectionDAG. 27207618Srdivacky /// 28207618Srdivacky /// Targets may also define target-dependent operator codes for SDNodes. For 29207618Srdivacky /// example, on x86, these are the enum values in the X86ISD namespace. 30207618Srdivacky /// Targets should aim to use target-independent operators to model their 31207618Srdivacky /// instruction sets as much as possible, and only use target-dependent 32207618Srdivacky /// operators when they have special requirements. 33207618Srdivacky /// 34207618Srdivacky /// Finally, during and after selection proper, SNodes may use special 35207618Srdivacky /// operator codes that correspond directly with MachineInstr opcodes. These 36207618Srdivacky /// are used to represent selected instructions. See the isMachineOpcode() 37207618Srdivacky /// and getMachineOpcode() member functions of SDNode. 38207618Srdivacky /// 39207618Srdivacky enum NodeType { 40239462Sdim /// DELETED_NODE - This is an illegal value that is used to catch 41239462Sdim /// errors. This opcode is not a legal opcode for any node. 42207618Srdivacky DELETED_NODE, 43207618Srdivacky 44239462Sdim /// EntryToken - This is the marker used to indicate the start of a region. 45207618Srdivacky EntryToken, 46207618Srdivacky 47239462Sdim /// TokenFactor - This node takes multiple tokens as input and produces a 48239462Sdim /// single token result. This is used to represent the fact that the operand 49239462Sdim /// operators are independent of each other. 50207618Srdivacky TokenFactor, 51207618Srdivacky 52239462Sdim /// AssertSext, AssertZext - These nodes record if a register contains a 53239462Sdim /// value that has already been zero or sign extended from a narrower type. 54239462Sdim /// These nodes take two operands. The first is the node that has already 55239462Sdim /// been extended, and the second is a value type node indicating the width 56239462Sdim /// of the extension 57207618Srdivacky AssertSext, AssertZext, 58207618Srdivacky 59239462Sdim /// Various leaf nodes. 60234353Sdim BasicBlock, VALUETYPE, CONDCODE, Register, RegisterMask, 61207618Srdivacky Constant, ConstantFP, 62207618Srdivacky GlobalAddress, GlobalTLSAddress, FrameIndex, 63207618Srdivacky JumpTable, ConstantPool, ExternalSymbol, BlockAddress, 64207618Srdivacky 65239462Sdim /// The address of the GOT 66207618Srdivacky GLOBAL_OFFSET_TABLE, 67207618Srdivacky 68239462Sdim /// FRAMEADDR, RETURNADDR - These nodes represent llvm.frameaddress and 69239462Sdim /// llvm.returnaddress on the DAG. These nodes take one operand, the index 70239462Sdim /// of the frame or return address to return. An index of zero corresponds 71239462Sdim /// to the current function's frame or return address, an index of one to 72239462Sdim /// the parent's frame or return address, and so on. 73207618Srdivacky FRAMEADDR, RETURNADDR, 74207618Srdivacky 75239462Sdim /// FRAME_TO_ARGS_OFFSET - This node represents offset from frame pointer to 76239462Sdim /// first (possible) on-stack argument. This is needed for correct stack 77239462Sdim /// adjustment during unwind. 78207618Srdivacky FRAME_TO_ARGS_OFFSET, 79207618Srdivacky 80239462Sdim /// RESULT, OUTCHAIN = EXCEPTIONADDR(INCHAIN) - This node represents the 81239462Sdim /// address of the exception block on entry to an landing pad block. 82207618Srdivacky EXCEPTIONADDR, 83207618Srdivacky 84239462Sdim /// RESULT, OUTCHAIN = LSDAADDR(INCHAIN) - This node represents the 85239462Sdim /// address of the Language Specific Data Area for the enclosing function. 86207618Srdivacky LSDAADDR, 87207618Srdivacky 88239462Sdim /// RESULT, OUTCHAIN = EHSELECTION(INCHAIN, EXCEPTION) - This node 89239462Sdim /// represents the selection index of the exception thrown. 90207618Srdivacky EHSELECTION, 91207618Srdivacky 92239462Sdim /// OUTCHAIN = EH_RETURN(INCHAIN, OFFSET, HANDLER) - This node represents 93239462Sdim /// 'eh_return' gcc dwarf builtin, which is used to return from 94239462Sdim /// exception. The general meaning is: adjust stack by OFFSET and pass 95239462Sdim /// execution to HANDLER. Many platform-related details also :) 96207618Srdivacky EH_RETURN, 97207618Srdivacky 98239462Sdim /// RESULT, OUTCHAIN = EH_SJLJ_SETJMP(INCHAIN, buffer) 99239462Sdim /// This corresponds to the eh.sjlj.setjmp intrinsic. 100239462Sdim /// It takes an input chain and a pointer to the jump buffer as inputs 101239462Sdim /// and returns an outchain. 102208599Srdivacky EH_SJLJ_SETJMP, 103208599Srdivacky 104239462Sdim /// OUTCHAIN = EH_SJLJ_LONGJMP(INCHAIN, buffer) 105239462Sdim /// This corresponds to the eh.sjlj.longjmp intrinsic. 106239462Sdim /// It takes an input chain and a pointer to the jump buffer as inputs 107239462Sdim /// and returns an outchain. 108208599Srdivacky EH_SJLJ_LONGJMP, 109208599Srdivacky 110239462Sdim /// TargetConstant* - Like Constant*, but the DAG does not do any folding, 111239462Sdim /// simplification, or lowering of the constant. They are used for constants 112239462Sdim /// which are known to fit in the immediate fields of their users, or for 113239462Sdim /// carrying magic numbers which are not values which need to be 114239462Sdim /// materialized in registers. 115207618Srdivacky TargetConstant, 116207618Srdivacky TargetConstantFP, 117207618Srdivacky 118239462Sdim /// TargetGlobalAddress - Like GlobalAddress, but the DAG does no folding or 119239462Sdim /// anything else with this node, and this is valid in the target-specific 120239462Sdim /// dag, turning into a GlobalAddress operand. 121207618Srdivacky TargetGlobalAddress, 122207618Srdivacky TargetGlobalTLSAddress, 123207618Srdivacky TargetFrameIndex, 124207618Srdivacky TargetJumpTable, 125207618Srdivacky TargetConstantPool, 126207618Srdivacky TargetExternalSymbol, 127207618Srdivacky TargetBlockAddress, 128207618Srdivacky 129239462Sdim /// TargetIndex - Like a constant pool entry, but with completely 130239462Sdim /// target-dependent semantics. Holds target flags, a 32-bit index, and a 131239462Sdim /// 64-bit index. Targets can use this however they like. 132239462Sdim TargetIndex, 133239462Sdim 134207618Srdivacky /// RESULT = INTRINSIC_WO_CHAIN(INTRINSICID, arg1, arg2, ...) 135207618Srdivacky /// This node represents a target intrinsic function with no side effects. 136207618Srdivacky /// The first operand is the ID number of the intrinsic from the 137207618Srdivacky /// llvm::Intrinsic namespace. The operands to the intrinsic follow. The 138210299Sed /// node returns the result of the intrinsic. 139207618Srdivacky INTRINSIC_WO_CHAIN, 140207618Srdivacky 141207618Srdivacky /// RESULT,OUTCHAIN = INTRINSIC_W_CHAIN(INCHAIN, INTRINSICID, arg1, ...) 142207618Srdivacky /// This node represents a target intrinsic function with side effects that 143207618Srdivacky /// returns a result. The first operand is a chain pointer. The second is 144207618Srdivacky /// the ID number of the intrinsic from the llvm::Intrinsic namespace. The 145207618Srdivacky /// operands to the intrinsic follow. The node has two results, the result 146207618Srdivacky /// of the intrinsic and an output chain. 147207618Srdivacky INTRINSIC_W_CHAIN, 148207618Srdivacky 149207618Srdivacky /// OUTCHAIN = INTRINSIC_VOID(INCHAIN, INTRINSICID, arg1, arg2, ...) 150207618Srdivacky /// This node represents a target intrinsic function with side effects that 151207618Srdivacky /// does not return a result. The first operand is a chain pointer. The 152207618Srdivacky /// second is the ID number of the intrinsic from the llvm::Intrinsic 153207618Srdivacky /// namespace. The operands to the intrinsic follow. 154207618Srdivacky INTRINSIC_VOID, 155207618Srdivacky 156239462Sdim /// CopyToReg - This node has three operands: a chain, a register number to 157239462Sdim /// set to this value, and a value. 158207618Srdivacky CopyToReg, 159207618Srdivacky 160239462Sdim /// CopyFromReg - This node indicates that the input value is a virtual or 161239462Sdim /// physical register that is defined outside of the scope of this 162239462Sdim /// SelectionDAG. The register is available from the RegisterSDNode object. 163207618Srdivacky CopyFromReg, 164207618Srdivacky 165239462Sdim /// UNDEF - An undefined node. 166207618Srdivacky UNDEF, 167207618Srdivacky 168239462Sdim /// EXTRACT_ELEMENT - This is used to get the lower or upper (determined by 169239462Sdim /// a Constant, which is required to be operand #1) half of the integer or 170239462Sdim /// float value specified as operand #0. This is only for use before 171239462Sdim /// legalization, for values that will be broken into multiple registers. 172207618Srdivacky EXTRACT_ELEMENT, 173207618Srdivacky 174239462Sdim /// BUILD_PAIR - This is the opposite of EXTRACT_ELEMENT in some ways. 175239462Sdim /// Given two values of the same integer value type, this produces a value 176239462Sdim /// twice as big. Like EXTRACT_ELEMENT, this can only be used before 177239462Sdim /// legalization. 178207618Srdivacky BUILD_PAIR, 179207618Srdivacky 180239462Sdim /// MERGE_VALUES - This node takes multiple discrete operands and returns 181239462Sdim /// them all as its individual results. This nodes has exactly the same 182239462Sdim /// number of inputs and outputs. This node is useful for some pieces of the 183239462Sdim /// code generator that want to think about a single node with multiple 184239462Sdim /// results, not multiple nodes. 185207618Srdivacky MERGE_VALUES, 186207618Srdivacky 187239462Sdim /// Simple integer binary arithmetic operators. 188207618Srdivacky ADD, SUB, MUL, SDIV, UDIV, SREM, UREM, 189207618Srdivacky 190239462Sdim /// SMUL_LOHI/UMUL_LOHI - Multiply two integers of type iN, producing 191239462Sdim /// a signed/unsigned value of type i[2*N], and return the full value as 192239462Sdim /// two results, each of type iN. 193207618Srdivacky SMUL_LOHI, UMUL_LOHI, 194207618Srdivacky 195239462Sdim /// SDIVREM/UDIVREM - Divide two integers and produce both a quotient and 196239462Sdim /// remainder result. 197207618Srdivacky SDIVREM, UDIVREM, 198207618Srdivacky 199239462Sdim /// CARRY_FALSE - This node is used when folding other nodes, 200239462Sdim /// like ADDC/SUBC, which indicate the carry result is always false. 201207618Srdivacky CARRY_FALSE, 202207618Srdivacky 203239462Sdim /// Carry-setting nodes for multiple precision addition and subtraction. 204239462Sdim /// These nodes take two operands of the same value type, and produce two 205239462Sdim /// results. The first result is the normal add or sub result, the second 206239462Sdim /// result is the carry flag result. 207207618Srdivacky ADDC, SUBC, 208207618Srdivacky 209239462Sdim /// Carry-using nodes for multiple precision addition and subtraction. These 210239462Sdim /// nodes take three operands: The first two are the normal lhs and rhs to 211239462Sdim /// the add or sub, and the third is the input carry flag. These nodes 212239462Sdim /// produce two results; the normal result of the add or sub, and the output 213239462Sdim /// carry flag. These nodes both read and write a carry flag to allow them 214239462Sdim /// to them to be chained together for add and sub of arbitrarily large 215239462Sdim /// values. 216207618Srdivacky ADDE, SUBE, 217207618Srdivacky 218239462Sdim /// RESULT, BOOL = [SU]ADDO(LHS, RHS) - Overflow-aware nodes for addition. 219239462Sdim /// These nodes take two operands: the normal LHS and RHS to the add. They 220239462Sdim /// produce two results: the normal result of the add, and a boolean that 221239462Sdim /// indicates if an overflow occurred (*not* a flag, because it may be store 222239462Sdim /// to memory, etc.). If the type of the boolean is not i1 then the high 223239462Sdim /// bits conform to getBooleanContents. 224239462Sdim /// These nodes are generated from llvm.[su]add.with.overflow intrinsics. 225207618Srdivacky SADDO, UADDO, 226207618Srdivacky 227239462Sdim /// Same for subtraction. 228207618Srdivacky SSUBO, USUBO, 229207618Srdivacky 230239462Sdim /// Same for multiplication. 231207618Srdivacky SMULO, UMULO, 232207618Srdivacky 233239462Sdim /// Simple binary floating point operators. 234224145Sdim FADD, FSUB, FMUL, FMA, FDIV, FREM, 235207618Srdivacky 236239462Sdim /// FCOPYSIGN(X, Y) - Return the value of X with the sign of Y. NOTE: This 237239462Sdim /// DAG node does not require that X and Y have the same type, just that the 238239462Sdim /// are both floating point. X and the result must have the same type. 239239462Sdim /// FCOPYSIGN(f32, f64) is allowed. 240207618Srdivacky FCOPYSIGN, 241207618Srdivacky 242239462Sdim /// INT = FGETSIGN(FP) - Return the sign bit of the specified floating point 243239462Sdim /// value as an integer 0/1 value. 244207618Srdivacky FGETSIGN, 245207618Srdivacky 246207618Srdivacky /// BUILD_VECTOR(ELT0, ELT1, ELT2, ELT3,...) - Return a vector with the 247207618Srdivacky /// specified, possibly variable, elements. The number of elements is 248207618Srdivacky /// required to be a power of two. The types of the operands must all be 249207618Srdivacky /// the same and must match the vector element type, except that integer 250207618Srdivacky /// types are allowed to be larger than the element type, in which case 251207618Srdivacky /// the operands are implicitly truncated. 252207618Srdivacky BUILD_VECTOR, 253207618Srdivacky 254207618Srdivacky /// INSERT_VECTOR_ELT(VECTOR, VAL, IDX) - Returns VECTOR with the element 255207618Srdivacky /// at IDX replaced with VAL. If the type of VAL is larger than the vector 256207618Srdivacky /// element type then VAL is truncated before replacement. 257207618Srdivacky INSERT_VECTOR_ELT, 258207618Srdivacky 259207618Srdivacky /// EXTRACT_VECTOR_ELT(VECTOR, IDX) - Returns a single element from VECTOR 260207618Srdivacky /// identified by the (potentially variable) element number IDX. If the 261207618Srdivacky /// return type is an integer type larger than the element type of the 262207618Srdivacky /// vector, the result is extended to the width of the return type. 263207618Srdivacky EXTRACT_VECTOR_ELT, 264207618Srdivacky 265207618Srdivacky /// CONCAT_VECTORS(VECTOR0, VECTOR1, ...) - Given a number of values of 266207618Srdivacky /// vector type with the same length and element type, this produces a 267207618Srdivacky /// concatenated vector result value, with length equal to the sum of the 268207618Srdivacky /// lengths of the input vectors. 269207618Srdivacky CONCAT_VECTORS, 270207618Srdivacky 271218893Sdim /// INSERT_SUBVECTOR(VECTOR1, VECTOR2, IDX) - Returns a vector 272218893Sdim /// with VECTOR2 inserted into VECTOR1 at the (potentially 273218893Sdim /// variable) element number IDX, which must be a multiple of the 274218893Sdim /// VECTOR2 vector length. The elements of VECTOR1 starting at 275218893Sdim /// IDX are overwritten with VECTOR2. Elements IDX through 276218893Sdim /// vector_length(VECTOR2) must be valid VECTOR1 indices. 277218893Sdim INSERT_SUBVECTOR, 278218893Sdim 279207618Srdivacky /// EXTRACT_SUBVECTOR(VECTOR, IDX) - Returns a subvector from VECTOR (an 280218893Sdim /// vector value) starting with the element number IDX, which must be a 281218893Sdim /// constant multiple of the result vector length. 282207618Srdivacky EXTRACT_SUBVECTOR, 283207618Srdivacky 284218893Sdim /// VECTOR_SHUFFLE(VEC1, VEC2) - Returns a vector, of the same type as 285207618Srdivacky /// VEC1/VEC2. A VECTOR_SHUFFLE node also contains an array of constant int 286207618Srdivacky /// values that indicate which value (or undef) each result element will 287218893Sdim /// get. These constant ints are accessible through the 288218893Sdim /// ShuffleVectorSDNode class. This is quite similar to the Altivec 289207618Srdivacky /// 'vperm' instruction, except that the indices must be constants and are 290207618Srdivacky /// in terms of the element size of VEC1/VEC2, not in terms of bytes. 291207618Srdivacky VECTOR_SHUFFLE, 292207618Srdivacky 293207618Srdivacky /// SCALAR_TO_VECTOR(VAL) - This represents the operation of loading a 294207618Srdivacky /// scalar value into element 0 of the resultant vector type. The top 295207618Srdivacky /// elements 1 to N-1 of the N-element vector are undefined. The type 296207618Srdivacky /// of the operand must match the vector element type, except when they 297207618Srdivacky /// are integer types. In this case the operand is allowed to be wider 298207618Srdivacky /// than the vector element type, and is implicitly truncated to it. 299207618Srdivacky SCALAR_TO_VECTOR, 300207618Srdivacky 301239462Sdim /// MULHU/MULHS - Multiply high - Multiply two integers of type iN, 302239462Sdim /// producing an unsigned/signed value of type i[2*N], then return the top 303239462Sdim /// part. 304207618Srdivacky MULHU, MULHS, 305207618Srdivacky 306218893Sdim /// Bitwise operators - logical and, logical or, logical xor. 307218893Sdim AND, OR, XOR, 308239462Sdim 309218893Sdim /// Shift and rotation operations. After legalization, the type of the 310218893Sdim /// shift amount is known to be TLI.getShiftAmountTy(). Before legalization 311218893Sdim /// the shift amount can be any type, but care must be taken to ensure it is 312218893Sdim /// large enough. TLI.getShiftAmountTy() is i8 on some targets, but before 313218893Sdim /// legalization, types like i1024 can occur and i8 doesn't have enough bits 314249423Sdim /// to represent the shift amount. 315249423Sdim /// When the 1st operand is a vector, the shift amount must be in the same 316249423Sdim /// type. (TLI.getShiftAmountTy() will return the same type when the input 317249423Sdim /// type is a vector.) 318218893Sdim SHL, SRA, SRL, ROTL, ROTR, 319207618Srdivacky 320218893Sdim /// Byte Swap and Counting operators. 321218893Sdim BSWAP, CTTZ, CTLZ, CTPOP, 322207618Srdivacky 323234353Sdim /// Bit counting operators with an undefined result for zero inputs. 324234353Sdim CTTZ_ZERO_UNDEF, CTLZ_ZERO_UNDEF, 325234353Sdim 326239462Sdim /// Select(COND, TRUEVAL, FALSEVAL). If the type of the boolean COND is not 327239462Sdim /// i1 then the high bits must conform to getBooleanContents. 328207618Srdivacky SELECT, 329207618Srdivacky 330239462Sdim /// Select with a vector condition (op #0) and two vector operands (ops #1 331239462Sdim /// and #2), returning a vector result. All vectors have the same length. 332239462Sdim /// Much like the scalar select and setcc, each bit in the condition selects 333239462Sdim /// whether the corresponding result element is taken from op #1 or op #2. 334239462Sdim /// At first, the VSELECT condition is of vXi1 type. Later, targets may 335239462Sdim /// change the condition type in order to match the VSELECT node using a 336239462Sdim /// pattern. The condition follows the BooleanContent format of the target. 337226633Sdim VSELECT, 338226633Sdim 339239462Sdim /// Select with condition operator - This selects between a true value and 340239462Sdim /// a false value (ops #2 and #3) based on the boolean result of comparing 341239462Sdim /// the lhs and rhs (ops #0 and #1) of a conditional expression with the 342239462Sdim /// condition code in op #4, a CondCodeSDNode. 343207618Srdivacky SELECT_CC, 344207618Srdivacky 345239462Sdim /// SetCC operator - This evaluates to a true value iff the condition is 346239462Sdim /// true. If the result value type is not i1 then the high bits conform 347239462Sdim /// to getBooleanContents. The operands to this are the left and right 348239462Sdim /// operands to compare (ops #0, and #1) and the condition code to compare 349239462Sdim /// them with (op #2) as a CondCodeSDNode. If the operands are vector types 350239462Sdim /// then the result type must also be a vector type. 351207618Srdivacky SETCC, 352207618Srdivacky 353239462Sdim /// SHL_PARTS/SRA_PARTS/SRL_PARTS - These operators are used for expanded 354239462Sdim /// integer shift operations, just like ADD/SUB_PARTS. The operation 355239462Sdim /// ordering is: 356239462Sdim /// [Lo,Hi] = op [LoLHS,HiLHS], Amt 357207618Srdivacky SHL_PARTS, SRA_PARTS, SRL_PARTS, 358207618Srdivacky 359239462Sdim /// Conversion operators. These are all single input single output 360239462Sdim /// operations. For all of these, the result type must be strictly 361239462Sdim /// wider or narrower (depending on the operation) than the source 362239462Sdim /// type. 363207618Srdivacky 364239462Sdim /// SIGN_EXTEND - Used for integer types, replicating the sign bit 365239462Sdim /// into new bits. 366207618Srdivacky SIGN_EXTEND, 367207618Srdivacky 368239462Sdim /// ZERO_EXTEND - Used for integer types, zeroing the new bits. 369207618Srdivacky ZERO_EXTEND, 370207618Srdivacky 371239462Sdim /// ANY_EXTEND - Used for integer types. The high bits are undefined. 372207618Srdivacky ANY_EXTEND, 373207618Srdivacky 374239462Sdim /// TRUNCATE - Completely drop the high bits. 375207618Srdivacky TRUNCATE, 376207618Srdivacky 377239462Sdim /// [SU]INT_TO_FP - These operators convert integers (whose interpreted sign 378239462Sdim /// depends on the first letter) to floating point. 379207618Srdivacky SINT_TO_FP, 380207618Srdivacky UINT_TO_FP, 381207618Srdivacky 382239462Sdim /// SIGN_EXTEND_INREG - This operator atomically performs a SHL/SRA pair to 383239462Sdim /// sign extend a small value in a large integer register (e.g. sign 384239462Sdim /// extending the low 8 bits of a 32-bit register to fill the top 24 bits 385239462Sdim /// with the 7th bit). The size of the smaller type is indicated by the 1th 386239462Sdim /// operand, a ValueType node. 387207618Srdivacky SIGN_EXTEND_INREG, 388207618Srdivacky 389207618Srdivacky /// FP_TO_[US]INT - Convert a floating point value to a signed or unsigned 390207618Srdivacky /// integer. 391207618Srdivacky FP_TO_SINT, 392207618Srdivacky FP_TO_UINT, 393207618Srdivacky 394207618Srdivacky /// X = FP_ROUND(Y, TRUNC) - Rounding 'Y' from a larger floating point type 395207618Srdivacky /// down to the precision of the destination VT. TRUNC is a flag, which is 396207618Srdivacky /// always an integer that is zero or one. If TRUNC is 0, this is a 397207618Srdivacky /// normal rounding, if it is 1, this FP_ROUND is known to not change the 398207618Srdivacky /// value of Y. 399207618Srdivacky /// 400207618Srdivacky /// The TRUNC = 1 case is used in cases where we know that the value will 401207618Srdivacky /// not be modified by the node, because Y is not using any of the extra 402207618Srdivacky /// precision of source type. This allows certain transformations like 403207618Srdivacky /// FP_EXTEND(FP_ROUND(X,1)) -> X which are not safe for 404207618Srdivacky /// FP_EXTEND(FP_ROUND(X,0)) because the extra bits aren't removed. 405207618Srdivacky FP_ROUND, 406207618Srdivacky 407239462Sdim /// FLT_ROUNDS_ - Returns current rounding mode: 408239462Sdim /// -1 Undefined 409239462Sdim /// 0 Round to 0 410239462Sdim /// 1 Round to nearest 411239462Sdim /// 2 Round to +inf 412239462Sdim /// 3 Round to -inf 413207618Srdivacky FLT_ROUNDS_, 414207618Srdivacky 415207618Srdivacky /// X = FP_ROUND_INREG(Y, VT) - This operator takes an FP register, and 416207618Srdivacky /// rounds it to a floating point value. It then promotes it and returns it 417207618Srdivacky /// in a register of the same size. This operation effectively just 418207618Srdivacky /// discards excess precision. The type to round down to is specified by 419207618Srdivacky /// the VT operand, a VTSDNode. 420207618Srdivacky FP_ROUND_INREG, 421207618Srdivacky 422207618Srdivacky /// X = FP_EXTEND(Y) - Extend a smaller FP type into a larger FP type. 423207618Srdivacky FP_EXTEND, 424207618Srdivacky 425239462Sdim /// BITCAST - This operator converts between integer, vector and FP 426239462Sdim /// values, as if the value was stored to memory with one type and loaded 427239462Sdim /// from the same address with the other type (or equivalently for vector 428239462Sdim /// format conversions, etc). The source and result are required to have 429239462Sdim /// the same bit size (e.g. f32 <-> i32). This can also be used for 430239462Sdim /// int-to-int or fp-to-fp conversions, but that is a noop, deleted by 431239462Sdim /// getNode(). 432218893Sdim BITCAST, 433207618Srdivacky 434239462Sdim /// CONVERT_RNDSAT - This operator is used to support various conversions 435239462Sdim /// between various types (float, signed, unsigned and vectors of those 436239462Sdim /// types) with rounding and saturation. NOTE: Avoid using this operator as 437239462Sdim /// most target don't support it and the operator might be removed in the 438239462Sdim /// future. It takes the following arguments: 439239462Sdim /// 0) value 440239462Sdim /// 1) dest type (type to convert to) 441239462Sdim /// 2) src type (type to convert from) 442239462Sdim /// 3) rounding imm 443239462Sdim /// 4) saturation imm 444239462Sdim /// 5) ISD::CvtCode indicating the type of conversion to do 445207618Srdivacky CONVERT_RNDSAT, 446207618Srdivacky 447239462Sdim /// FP16_TO_FP32, FP32_TO_FP16 - These operators are used to perform 448239462Sdim /// promotions and truncation for half-precision (16 bit) floating 449239462Sdim /// numbers. We need special nodes since FP16 is a storage-only type with 450239462Sdim /// special semantics of operations. 451207618Srdivacky FP16_TO_FP32, FP32_TO_FP16, 452207618Srdivacky 453239462Sdim /// FNEG, FABS, FSQRT, FSIN, FCOS, FPOWI, FPOW, 454239462Sdim /// FLOG, FLOG2, FLOG10, FEXP, FEXP2, 455239462Sdim /// FCEIL, FTRUNC, FRINT, FNEARBYINT, FFLOOR - Perform various unary 456239462Sdim /// floating point operations. These are inspired by libm. 457207618Srdivacky FNEG, FABS, FSQRT, FSIN, FCOS, FPOWI, FPOW, 458207618Srdivacky FLOG, FLOG2, FLOG10, FEXP, FEXP2, 459207618Srdivacky FCEIL, FTRUNC, FRINT, FNEARBYINT, FFLOOR, 460249423Sdim 461249423Sdim /// FSINCOS - Compute both fsin and fcos as a single operation. 462249423Sdim FSINCOS, 463207618Srdivacky 464239462Sdim /// LOAD and STORE have token chains as their first operand, then the same 465239462Sdim /// operands as an LLVM load/store instruction, then an offset node that 466239462Sdim /// is added / subtracted from the base pointer to form the address (for 467239462Sdim /// indexed memory ops). 468207618Srdivacky LOAD, STORE, 469207618Srdivacky 470239462Sdim /// DYNAMIC_STACKALLOC - Allocate some number of bytes on the stack aligned 471239462Sdim /// to a specified boundary. This node always has two return values: a new 472239462Sdim /// stack pointer value and a chain. The first operand is the token chain, 473239462Sdim /// the second is the number of bytes to allocate, and the third is the 474239462Sdim /// alignment boundary. The size is guaranteed to be a multiple of the 475239462Sdim /// stack alignment, and the alignment is guaranteed to be bigger than the 476239462Sdim /// stack alignment (if required) or 0 to get standard stack alignment. 477207618Srdivacky DYNAMIC_STACKALLOC, 478207618Srdivacky 479239462Sdim /// Control flow instructions. These all have token chains. 480207618Srdivacky 481239462Sdim /// BR - Unconditional branch. The first operand is the chain 482239462Sdim /// operand, the second is the MBB to branch to. 483207618Srdivacky BR, 484207618Srdivacky 485239462Sdim /// BRIND - Indirect branch. The first operand is the chain, the second 486239462Sdim /// is the value to branch to, which must be of the same type as the 487239462Sdim /// target's pointer type. 488207618Srdivacky BRIND, 489207618Srdivacky 490239462Sdim /// BR_JT - Jumptable branch. The first operand is the chain, the second 491239462Sdim /// is the jumptable index, the last one is the jumptable entry index. 492207618Srdivacky BR_JT, 493207618Srdivacky 494239462Sdim /// BRCOND - Conditional branch. The first operand is the chain, the 495239462Sdim /// second is the condition, the third is the block to branch to if the 496239462Sdim /// condition is true. If the type of the condition is not i1, then the 497239462Sdim /// high bits must conform to getBooleanContents. 498207618Srdivacky BRCOND, 499207618Srdivacky 500239462Sdim /// BR_CC - Conditional branch. The behavior is like that of SELECT_CC, in 501239462Sdim /// that the condition is represented as condition code, and two nodes to 502239462Sdim /// compare, rather than as a combined SetCC node. The operands in order 503239462Sdim /// are chain, cc, lhs, rhs, block to branch to if condition is true. 504207618Srdivacky BR_CC, 505207618Srdivacky 506239462Sdim /// INLINEASM - Represents an inline asm block. This node always has two 507239462Sdim /// return values: a chain and a flag result. The inputs are as follows: 508239462Sdim /// Operand #0 : Input chain. 509239462Sdim /// Operand #1 : a ExternalSymbolSDNode with a pointer to the asm string. 510239462Sdim /// Operand #2 : a MDNodeSDNode with the !srcloc metadata. 511239462Sdim /// Operand #3 : HasSideEffect, IsAlignStack bits. 512239462Sdim /// After this, it is followed by a list of operands with this format: 513239462Sdim /// ConstantSDNode: Flags that encode whether it is a mem or not, the 514239462Sdim /// of operands that follow, etc. See InlineAsm.h. 515239462Sdim /// ... however many operands ... 516239462Sdim /// Operand #last: Optional, an incoming flag. 517239462Sdim /// 518239462Sdim /// The variable width operands are required to represent target addressing 519239462Sdim /// modes as a single "operand", even though they may have multiple 520239462Sdim /// SDOperands. 521207618Srdivacky INLINEASM, 522207618Srdivacky 523239462Sdim /// EH_LABEL - Represents a label in mid basic block used to track 524239462Sdim /// locations needed for debug and exception handling tables. These nodes 525239462Sdim /// take a chain as input and return a chain. 526207618Srdivacky EH_LABEL, 527207618Srdivacky 528239462Sdim /// STACKSAVE - STACKSAVE has one operand, an input chain. It produces a 529239462Sdim /// value, the same type as the pointer type for the system, and an output 530239462Sdim /// chain. 531207618Srdivacky STACKSAVE, 532207618Srdivacky 533239462Sdim /// STACKRESTORE has two operands, an input chain and a pointer to restore 534239462Sdim /// to it returns an output chain. 535207618Srdivacky STACKRESTORE, 536207618Srdivacky 537239462Sdim /// CALLSEQ_START/CALLSEQ_END - These operators mark the beginning and end 538239462Sdim /// of a call sequence, and carry arbitrary information that target might 539239462Sdim /// want to know. The first operand is a chain, the rest are specified by 540239462Sdim /// the target and not touched by the DAG optimizers. 541239462Sdim /// CALLSEQ_START..CALLSEQ_END pairs may not be nested. 542207618Srdivacky CALLSEQ_START, // Beginning of a call sequence 543207618Srdivacky CALLSEQ_END, // End of a call sequence 544207618Srdivacky 545239462Sdim /// VAARG - VAARG has four operands: an input chain, a pointer, a SRCVALUE, 546239462Sdim /// and the alignment. It returns a pair of values: the vaarg value and a 547239462Sdim /// new chain. 548207618Srdivacky VAARG, 549207618Srdivacky 550239462Sdim /// VACOPY - VACOPY has 5 operands: an input chain, a destination pointer, 551239462Sdim /// a source pointer, a SRCVALUE for the destination, and a SRCVALUE for the 552239462Sdim /// source. 553207618Srdivacky VACOPY, 554207618Srdivacky 555239462Sdim /// VAEND, VASTART - VAEND and VASTART have three operands: an input chain, 556239462Sdim /// pointer, and a SRCVALUE. 557207618Srdivacky VAEND, VASTART, 558207618Srdivacky 559239462Sdim /// SRCVALUE - This is a node type that holds a Value* that is used to 560239462Sdim /// make reference to a value in the LLVM IR. 561207618Srdivacky SRCVALUE, 562218893Sdim 563239462Sdim /// MDNODE_SDNODE - This is a node that holdes an MDNode*, which is used to 564239462Sdim /// reference metadata in the IR. 565207618Srdivacky MDNODE_SDNODE, 566207618Srdivacky 567239462Sdim /// PCMARKER - This corresponds to the pcmarker intrinsic. 568207618Srdivacky PCMARKER, 569207618Srdivacky 570239462Sdim /// READCYCLECOUNTER - This corresponds to the readcyclecounter intrinsic. 571239462Sdim /// The only operand is a chain and a value and a chain are produced. The 572239462Sdim /// value is the contents of the architecture specific cycle counter like 573239462Sdim /// register (or other high accuracy low latency clock source) 574207618Srdivacky READCYCLECOUNTER, 575207618Srdivacky 576239462Sdim /// HANDLENODE node - Used as a handle for various purposes. 577207618Srdivacky HANDLENODE, 578207618Srdivacky 579239462Sdim /// INIT_TRAMPOLINE - This corresponds to the init_trampoline intrinsic. It 580239462Sdim /// takes as input a token chain, the pointer to the trampoline, the pointer 581239462Sdim /// to the nested function, the pointer to pass for the 'nest' parameter, a 582239462Sdim /// SRCVALUE for the trampoline and another for the nested function 583239462Sdim /// (allowing targets to access the original Function*). 584239462Sdim /// It produces a token chain as output. 585226633Sdim INIT_TRAMPOLINE, 586207618Srdivacky 587239462Sdim /// ADJUST_TRAMPOLINE - This corresponds to the adjust_trampoline intrinsic. 588239462Sdim /// It takes a pointer to the trampoline and produces a (possibly) new 589239462Sdim /// pointer to the same trampoline with platform-specific adjustments 590239462Sdim /// applied. The pointer it returns points to an executable block of code. 591226633Sdim ADJUST_TRAMPOLINE, 592226633Sdim 593239462Sdim /// TRAP - Trapping instruction 594207618Srdivacky TRAP, 595207618Srdivacky 596239462Sdim /// DEBUGTRAP - Trap intended to get the attention of a debugger. 597239462Sdim DEBUGTRAP, 598239462Sdim 599239462Sdim /// PREFETCH - This corresponds to a prefetch intrinsic. The first operand 600239462Sdim /// is the chain. The other operands are the address to prefetch, 601239462Sdim /// read / write specifier, locality specifier and instruction / data cache 602239462Sdim /// specifier. 603207618Srdivacky PREFETCH, 604207618Srdivacky 605239462Sdim /// OUTCHAIN = ATOMIC_FENCE(INCHAIN, ordering, scope) 606239462Sdim /// This corresponds to the fence instruction. It takes an input chain, and 607239462Sdim /// two integer constants: an AtomicOrdering and a SynchronizationScope. 608226633Sdim ATOMIC_FENCE, 609226633Sdim 610239462Sdim /// Val, OUTCHAIN = ATOMIC_LOAD(INCHAIN, ptr) 611239462Sdim /// This corresponds to "load atomic" instruction. 612226633Sdim ATOMIC_LOAD, 613226633Sdim 614239462Sdim /// OUTCHAIN = ATOMIC_LOAD(INCHAIN, ptr, val) 615239462Sdim /// This corresponds to "store atomic" instruction. 616226633Sdim ATOMIC_STORE, 617226633Sdim 618239462Sdim /// Val, OUTCHAIN = ATOMIC_CMP_SWAP(INCHAIN, ptr, cmp, swap) 619239462Sdim /// This corresponds to the cmpxchg instruction. 620207618Srdivacky ATOMIC_CMP_SWAP, 621207618Srdivacky 622239462Sdim /// Val, OUTCHAIN = ATOMIC_SWAP(INCHAIN, ptr, amt) 623239462Sdim /// Val, OUTCHAIN = ATOMIC_LOAD_[OpName](INCHAIN, ptr, amt) 624239462Sdim /// These correspond to the atomicrmw instruction. 625207618Srdivacky ATOMIC_SWAP, 626207618Srdivacky ATOMIC_LOAD_ADD, 627207618Srdivacky ATOMIC_LOAD_SUB, 628207618Srdivacky ATOMIC_LOAD_AND, 629207618Srdivacky ATOMIC_LOAD_OR, 630207618Srdivacky ATOMIC_LOAD_XOR, 631207618Srdivacky ATOMIC_LOAD_NAND, 632207618Srdivacky ATOMIC_LOAD_MIN, 633207618Srdivacky ATOMIC_LOAD_MAX, 634207618Srdivacky ATOMIC_LOAD_UMIN, 635207618Srdivacky ATOMIC_LOAD_UMAX, 636207618Srdivacky 637243830Sdim /// This corresponds to the llvm.lifetime.* intrinsics. The first operand 638243830Sdim /// is the chain and the second operand is the alloca pointer. 639243830Sdim LIFETIME_START, LIFETIME_END, 640243830Sdim 641207618Srdivacky /// BUILTIN_OP_END - This must be the last enum value in this list. 642207618Srdivacky /// The target-specific pre-isel opcode values start here. 643207618Srdivacky BUILTIN_OP_END 644207618Srdivacky }; 645207618Srdivacky 646207618Srdivacky /// FIRST_TARGET_MEMORY_OPCODE - Target-specific pre-isel operations 647207618Srdivacky /// which do not reference a specific memory location should be less than 648207618Srdivacky /// this value. Those that do must not be less than this value, and can 649207618Srdivacky /// be used with SelectionDAG::getMemIntrinsicNode. 650212904Sdim static const int FIRST_TARGET_MEMORY_OPCODE = BUILTIN_OP_END+150; 651207618Srdivacky 652207618Srdivacky //===--------------------------------------------------------------------===// 653207618Srdivacky /// MemIndexedMode enum - This enum defines the load / store indexed 654207618Srdivacky /// addressing modes. 655207618Srdivacky /// 656207618Srdivacky /// UNINDEXED "Normal" load / store. The effective address is already 657207618Srdivacky /// computed and is available in the base pointer. The offset 658207618Srdivacky /// operand is always undefined. In addition to producing a 659207618Srdivacky /// chain, an unindexed load produces one value (result of the 660207618Srdivacky /// load); an unindexed store does not produce a value. 661207618Srdivacky /// 662207618Srdivacky /// PRE_INC Similar to the unindexed mode where the effective address is 663207618Srdivacky /// PRE_DEC the value of the base pointer add / subtract the offset. 664207618Srdivacky /// It considers the computation as being folded into the load / 665207618Srdivacky /// store operation (i.e. the load / store does the address 666207618Srdivacky /// computation as well as performing the memory transaction). 667207618Srdivacky /// The base operand is always undefined. In addition to 668207618Srdivacky /// producing a chain, pre-indexed load produces two values 669207618Srdivacky /// (result of the load and the result of the address 670207618Srdivacky /// computation); a pre-indexed store produces one value (result 671207618Srdivacky /// of the address computation). 672207618Srdivacky /// 673207618Srdivacky /// POST_INC The effective address is the value of the base pointer. The 674207618Srdivacky /// POST_DEC value of the offset operand is then added to / subtracted 675207618Srdivacky /// from the base after memory transaction. In addition to 676207618Srdivacky /// producing a chain, post-indexed load produces two values 677207618Srdivacky /// (the result of the load and the result of the base +/- offset 678207618Srdivacky /// computation); a post-indexed store produces one value (the 679207618Srdivacky /// the result of the base +/- offset computation). 680207618Srdivacky enum MemIndexedMode { 681207618Srdivacky UNINDEXED = 0, 682207618Srdivacky PRE_INC, 683207618Srdivacky PRE_DEC, 684207618Srdivacky POST_INC, 685207618Srdivacky POST_DEC, 686207618Srdivacky LAST_INDEXED_MODE 687207618Srdivacky }; 688207618Srdivacky 689207618Srdivacky //===--------------------------------------------------------------------===// 690207618Srdivacky /// LoadExtType enum - This enum defines the three variants of LOADEXT 691207618Srdivacky /// (load with extension). 692207618Srdivacky /// 693207618Srdivacky /// SEXTLOAD loads the integer operand and sign extends it to a larger 694207618Srdivacky /// integer result type. 695207618Srdivacky /// ZEXTLOAD loads the integer operand and zero extends it to a larger 696207618Srdivacky /// integer result type. 697212904Sdim /// EXTLOAD is used for two things: floating point extending loads and 698212904Sdim /// integer extending loads [the top bits are undefined]. 699207618Srdivacky enum LoadExtType { 700207618Srdivacky NON_EXTLOAD = 0, 701207618Srdivacky EXTLOAD, 702207618Srdivacky SEXTLOAD, 703207618Srdivacky ZEXTLOAD, 704207618Srdivacky LAST_LOADEXT_TYPE 705207618Srdivacky }; 706207618Srdivacky 707207618Srdivacky //===--------------------------------------------------------------------===// 708207618Srdivacky /// ISD::CondCode enum - These are ordered carefully to make the bitfields 709207618Srdivacky /// below work out, when considering SETFALSE (something that never exists 710207618Srdivacky /// dynamically) as 0. "U" -> Unsigned (for integer operands) or Unordered 711207618Srdivacky /// (for floating point), "L" -> Less than, "G" -> Greater than, "E" -> Equal 712207618Srdivacky /// to. If the "N" column is 1, the result of the comparison is undefined if 713207618Srdivacky /// the input is a NAN. 714207618Srdivacky /// 715207618Srdivacky /// All of these (except for the 'always folded ops') should be handled for 716207618Srdivacky /// floating point. For integer, only the SETEQ,SETNE,SETLT,SETLE,SETGT, 717207618Srdivacky /// SETGE,SETULT,SETULE,SETUGT, and SETUGE opcodes are used. 718207618Srdivacky /// 719207618Srdivacky /// Note that these are laid out in a specific order to allow bit-twiddling 720207618Srdivacky /// to transform conditions. 721207618Srdivacky enum CondCode { 722207618Srdivacky // Opcode N U L G E Intuitive operation 723207618Srdivacky SETFALSE, // 0 0 0 0 Always false (always folded) 724207618Srdivacky SETOEQ, // 0 0 0 1 True if ordered and equal 725207618Srdivacky SETOGT, // 0 0 1 0 True if ordered and greater than 726207618Srdivacky SETOGE, // 0 0 1 1 True if ordered and greater than or equal 727207618Srdivacky SETOLT, // 0 1 0 0 True if ordered and less than 728207618Srdivacky SETOLE, // 0 1 0 1 True if ordered and less than or equal 729207618Srdivacky SETONE, // 0 1 1 0 True if ordered and operands are unequal 730207618Srdivacky SETO, // 0 1 1 1 True if ordered (no nans) 731207618Srdivacky SETUO, // 1 0 0 0 True if unordered: isnan(X) | isnan(Y) 732207618Srdivacky SETUEQ, // 1 0 0 1 True if unordered or equal 733207618Srdivacky SETUGT, // 1 0 1 0 True if unordered or greater than 734207618Srdivacky SETUGE, // 1 0 1 1 True if unordered, greater than, or equal 735207618Srdivacky SETULT, // 1 1 0 0 True if unordered or less than 736207618Srdivacky SETULE, // 1 1 0 1 True if unordered, less than, or equal 737207618Srdivacky SETUNE, // 1 1 1 0 True if unordered or not equal 738207618Srdivacky SETTRUE, // 1 1 1 1 Always true (always folded) 739207618Srdivacky // Don't care operations: undefined if the input is a nan. 740207618Srdivacky SETFALSE2, // 1 X 0 0 0 Always false (always folded) 741207618Srdivacky SETEQ, // 1 X 0 0 1 True if equal 742207618Srdivacky SETGT, // 1 X 0 1 0 True if greater than 743207618Srdivacky SETGE, // 1 X 0 1 1 True if greater than or equal 744207618Srdivacky SETLT, // 1 X 1 0 0 True if less than 745207618Srdivacky SETLE, // 1 X 1 0 1 True if less than or equal 746207618Srdivacky SETNE, // 1 X 1 1 0 True if not equal 747207618Srdivacky SETTRUE2, // 1 X 1 1 1 Always true (always folded) 748207618Srdivacky 749207618Srdivacky SETCC_INVALID // Marker value. 750207618Srdivacky }; 751207618Srdivacky 752207618Srdivacky /// isSignedIntSetCC - Return true if this is a setcc instruction that 753207618Srdivacky /// performs a signed comparison when used with integer operands. 754207618Srdivacky inline bool isSignedIntSetCC(CondCode Code) { 755207618Srdivacky return Code == SETGT || Code == SETGE || Code == SETLT || Code == SETLE; 756207618Srdivacky } 757207618Srdivacky 758207618Srdivacky /// isUnsignedIntSetCC - Return true if this is a setcc instruction that 759207618Srdivacky /// performs an unsigned comparison when used with integer operands. 760207618Srdivacky inline bool isUnsignedIntSetCC(CondCode Code) { 761207618Srdivacky return Code == SETUGT || Code == SETUGE || Code == SETULT || Code == SETULE; 762207618Srdivacky } 763207618Srdivacky 764207618Srdivacky /// isTrueWhenEqual - Return true if the specified condition returns true if 765207618Srdivacky /// the two operands to the condition are equal. Note that if one of the two 766207618Srdivacky /// operands is a NaN, this value is meaningless. 767207618Srdivacky inline bool isTrueWhenEqual(CondCode Cond) { 768207618Srdivacky return ((int)Cond & 1) != 0; 769207618Srdivacky } 770207618Srdivacky 771207618Srdivacky /// getUnorderedFlavor - This function returns 0 if the condition is always 772207618Srdivacky /// false if an operand is a NaN, 1 if the condition is always true if the 773207618Srdivacky /// operand is a NaN, and 2 if the condition is undefined if the operand is a 774207618Srdivacky /// NaN. 775207618Srdivacky inline unsigned getUnorderedFlavor(CondCode Cond) { 776207618Srdivacky return ((int)Cond >> 3) & 3; 777207618Srdivacky } 778207618Srdivacky 779207618Srdivacky /// getSetCCInverse - Return the operation corresponding to !(X op Y), where 780207618Srdivacky /// 'op' is a valid SetCC operation. 781207618Srdivacky CondCode getSetCCInverse(CondCode Operation, bool isInteger); 782207618Srdivacky 783207618Srdivacky /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X) 784207618Srdivacky /// when given the operation for (X op Y). 785207618Srdivacky CondCode getSetCCSwappedOperands(CondCode Operation); 786207618Srdivacky 787207618Srdivacky /// getSetCCOrOperation - Return the result of a logical OR between different 788207618Srdivacky /// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This 789207618Srdivacky /// function returns SETCC_INVALID if it is not possible to represent the 790207618Srdivacky /// resultant comparison. 791207618Srdivacky CondCode getSetCCOrOperation(CondCode Op1, CondCode Op2, bool isInteger); 792207618Srdivacky 793207618Srdivacky /// getSetCCAndOperation - Return the result of a logical AND between 794207618Srdivacky /// different comparisons of identical values: ((X op1 Y) & (X op2 Y)). This 795207618Srdivacky /// function returns SETCC_INVALID if it is not possible to represent the 796207618Srdivacky /// resultant comparison. 797207618Srdivacky CondCode getSetCCAndOperation(CondCode Op1, CondCode Op2, bool isInteger); 798207618Srdivacky 799207618Srdivacky //===--------------------------------------------------------------------===// 800207618Srdivacky /// CvtCode enum - This enum defines the various converts CONVERT_RNDSAT 801207618Srdivacky /// supports. 802207618Srdivacky enum CvtCode { 803239462Sdim CVT_FF, /// Float from Float 804239462Sdim CVT_FS, /// Float from Signed 805239462Sdim CVT_FU, /// Float from Unsigned 806239462Sdim CVT_SF, /// Signed from Float 807239462Sdim CVT_UF, /// Unsigned from Float 808239462Sdim CVT_SS, /// Signed from Signed 809239462Sdim CVT_SU, /// Signed from Unsigned 810239462Sdim CVT_US, /// Unsigned from Signed 811239462Sdim CVT_UU, /// Unsigned from Unsigned 812239462Sdim CVT_INVALID /// Marker - Invalid opcode 813207618Srdivacky }; 814207618Srdivacky 815207618Srdivacky} // end llvm::ISD namespace 816207618Srdivacky 817207618Srdivacky} // end llvm namespace 818207618Srdivacky 819207618Srdivacky#endif 820