reg-stack.c revision 90075
1/* Register to Stack convert for GNU compiler. 2 Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 3 1999, 2000, 2001, 2002 Free Software Foundation, Inc. 4 5 This file is part of GCC. 6 7 GCC is free software; you can redistribute it and/or modify it 8 under the terms of the GNU General Public License as published by 9 the Free Software Foundation; either version 2, or (at your option) 10 any later version. 11 12 GCC is distributed in the hope that it will be useful, but WITHOUT 13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 15 License for more details. 16 17 You should have received a copy of the GNU General Public License 18 along with GCC; see the file COPYING. If not, write to the Free 19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA 20 02111-1307, USA. */ 21 22/* This pass converts stack-like registers from the "flat register 23 file" model that gcc uses, to a stack convention that the 387 uses. 24 25 * The form of the input: 26 27 On input, the function consists of insn that have had their 28 registers fully allocated to a set of "virtual" registers. Note that 29 the word "virtual" is used differently here than elsewhere in gcc: for 30 each virtual stack reg, there is a hard reg, but the mapping between 31 them is not known until this pass is run. On output, hard register 32 numbers have been substituted, and various pop and exchange insns have 33 been emitted. The hard register numbers and the virtual register 34 numbers completely overlap - before this pass, all stack register 35 numbers are virtual, and afterward they are all hard. 36 37 The virtual registers can be manipulated normally by gcc, and their 38 semantics are the same as for normal registers. After the hard 39 register numbers are substituted, the semantics of an insn containing 40 stack-like regs are not the same as for an insn with normal regs: for 41 instance, it is not safe to delete an insn that appears to be a no-op 42 move. In general, no insn containing hard regs should be changed 43 after this pass is done. 44 45 * The form of the output: 46 47 After this pass, hard register numbers represent the distance from 48 the current top of stack to the desired register. A reference to 49 FIRST_STACK_REG references the top of stack, FIRST_STACK_REG + 1, 50 represents the register just below that, and so forth. Also, REG_DEAD 51 notes indicate whether or not a stack register should be popped. 52 53 A "swap" insn looks like a parallel of two patterns, where each 54 pattern is a SET: one sets A to B, the other B to A. 55 56 A "push" or "load" insn is a SET whose SET_DEST is FIRST_STACK_REG 57 and whose SET_DEST is REG or MEM. Any other SET_DEST, such as PLUS, 58 will replace the existing stack top, not push a new value. 59 60 A store insn is a SET whose SET_DEST is FIRST_STACK_REG, and whose 61 SET_SRC is REG or MEM. 62 63 The case where the SET_SRC and SET_DEST are both FIRST_STACK_REG 64 appears ambiguous. As a special case, the presence of a REG_DEAD note 65 for FIRST_STACK_REG differentiates between a load insn and a pop. 66 67 If a REG_DEAD is present, the insn represents a "pop" that discards 68 the top of the register stack. If there is no REG_DEAD note, then the 69 insn represents a "dup" or a push of the current top of stack onto the 70 stack. 71 72 * Methodology: 73 74 Existing REG_DEAD and REG_UNUSED notes for stack registers are 75 deleted and recreated from scratch. REG_DEAD is never created for a 76 SET_DEST, only REG_UNUSED. 77 78 * asm_operands: 79 80 There are several rules on the usage of stack-like regs in 81 asm_operands insns. These rules apply only to the operands that are 82 stack-like regs: 83 84 1. Given a set of input regs that die in an asm_operands, it is 85 necessary to know which are implicitly popped by the asm, and 86 which must be explicitly popped by gcc. 87 88 An input reg that is implicitly popped by the asm must be 89 explicitly clobbered, unless it is constrained to match an 90 output operand. 91 92 2. For any input reg that is implicitly popped by an asm, it is 93 necessary to know how to adjust the stack to compensate for the pop. 94 If any non-popped input is closer to the top of the reg-stack than 95 the implicitly popped reg, it would not be possible to know what the 96 stack looked like - it's not clear how the rest of the stack "slides 97 up". 98 99 All implicitly popped input regs must be closer to the top of 100 the reg-stack than any input that is not implicitly popped. 101 102 3. It is possible that if an input dies in an insn, reload might 103 use the input reg for an output reload. Consider this example: 104 105 asm ("foo" : "=t" (a) : "f" (b)); 106 107 This asm says that input B is not popped by the asm, and that 108 the asm pushes a result onto the reg-stack, ie, the stack is one 109 deeper after the asm than it was before. But, it is possible that 110 reload will think that it can use the same reg for both the input and 111 the output, if input B dies in this insn. 112 113 If any input operand uses the "f" constraint, all output reg 114 constraints must use the "&" earlyclobber. 115 116 The asm above would be written as 117 118 asm ("foo" : "=&t" (a) : "f" (b)); 119 120 4. Some operands need to be in particular places on the stack. All 121 output operands fall in this category - there is no other way to 122 know which regs the outputs appear in unless the user indicates 123 this in the constraints. 124 125 Output operands must specifically indicate which reg an output 126 appears in after an asm. "=f" is not allowed: the operand 127 constraints must select a class with a single reg. 128 129 5. Output operands may not be "inserted" between existing stack regs. 130 Since no 387 opcode uses a read/write operand, all output operands 131 are dead before the asm_operands, and are pushed by the asm_operands. 132 It makes no sense to push anywhere but the top of the reg-stack. 133 134 Output operands must start at the top of the reg-stack: output 135 operands may not "skip" a reg. 136 137 6. Some asm statements may need extra stack space for internal 138 calculations. This can be guaranteed by clobbering stack registers 139 unrelated to the inputs and outputs. 140 141 Here are a couple of reasonable asms to want to write. This asm 142 takes one input, which is internally popped, and produces two outputs. 143 144 asm ("fsincos" : "=t" (cos), "=u" (sin) : "0" (inp)); 145 146 This asm takes two inputs, which are popped by the fyl2xp1 opcode, 147 and replaces them with one output. The user must code the "st(1)" 148 clobber for reg-stack.c to know that fyl2xp1 pops both inputs. 149 150 asm ("fyl2xp1" : "=t" (result) : "0" (x), "u" (y) : "st(1)"); 151 152*/ 153 154#include "config.h" 155#include "system.h" 156#include "tree.h" 157#include "rtl.h" 158#include "tm_p.h" 159#include "function.h" 160#include "insn-config.h" 161#include "regs.h" 162#include "hard-reg-set.h" 163#include "flags.h" 164#include "toplev.h" 165#include "recog.h" 166#include "output.h" 167#include "basic-block.h" 168#include "varray.h" 169#include "reload.h" 170 171#ifdef STACK_REGS 172 173#define REG_STACK_SIZE (LAST_STACK_REG - FIRST_STACK_REG + 1) 174 175/* This is the basic stack record. TOP is an index into REG[] such 176 that REG[TOP] is the top of stack. If TOP is -1 the stack is empty. 177 178 If TOP is -2, REG[] is not yet initialized. Stack initialization 179 consists of placing each live reg in array `reg' and setting `top' 180 appropriately. 181 182 REG_SET indicates which registers are live. */ 183 184typedef struct stack_def 185{ 186 int top; /* index to top stack element */ 187 HARD_REG_SET reg_set; /* set of live registers */ 188 unsigned char reg[REG_STACK_SIZE];/* register - stack mapping */ 189} *stack; 190 191/* This is used to carry information about basic blocks. It is 192 attached to the AUX field of the standard CFG block. */ 193 194typedef struct block_info_def 195{ 196 struct stack_def stack_in; /* Input stack configuration. */ 197 struct stack_def stack_out; /* Output stack configuration. */ 198 HARD_REG_SET out_reg_set; /* Stack regs live on output. */ 199 int done; /* True if block already converted. */ 200 int predecessors; /* Number of predecessors that needs 201 to be visited. */ 202} *block_info; 203 204#define BLOCK_INFO(B) ((block_info) (B)->aux) 205 206/* Passed to change_stack to indicate where to emit insns. */ 207enum emit_where 208{ 209 EMIT_AFTER, 210 EMIT_BEFORE 211}; 212 213/* We use this array to cache info about insns, because otherwise we 214 spend too much time in stack_regs_mentioned_p. 215 216 Indexed by insn UIDs. A value of zero is uninitialized, one indicates 217 the insn uses stack registers, two indicates the insn does not use 218 stack registers. */ 219static varray_type stack_regs_mentioned_data; 220 221/* The block we're currently working on. */ 222static basic_block current_block; 223 224/* This is the register file for all register after conversion */ 225static rtx 226 FP_mode_reg[LAST_STACK_REG+1-FIRST_STACK_REG][(int) MAX_MACHINE_MODE]; 227 228#define FP_MODE_REG(regno,mode) \ 229 (FP_mode_reg[(regno)-FIRST_STACK_REG][(int) (mode)]) 230 231/* Used to initialize uninitialized registers. */ 232static rtx nan; 233 234/* Forward declarations */ 235 236static int stack_regs_mentioned_p PARAMS ((rtx pat)); 237static void straighten_stack PARAMS ((rtx, stack)); 238static void pop_stack PARAMS ((stack, int)); 239static rtx *get_true_reg PARAMS ((rtx *)); 240 241static int check_asm_stack_operands PARAMS ((rtx)); 242static int get_asm_operand_n_inputs PARAMS ((rtx)); 243static rtx stack_result PARAMS ((tree)); 244static void replace_reg PARAMS ((rtx *, int)); 245static void remove_regno_note PARAMS ((rtx, enum reg_note, 246 unsigned int)); 247static int get_hard_regnum PARAMS ((stack, rtx)); 248static rtx emit_pop_insn PARAMS ((rtx, stack, rtx, 249 enum emit_where)); 250static void emit_swap_insn PARAMS ((rtx, stack, rtx)); 251static void move_for_stack_reg PARAMS ((rtx, stack, rtx)); 252static int swap_rtx_condition_1 PARAMS ((rtx)); 253static int swap_rtx_condition PARAMS ((rtx)); 254static void compare_for_stack_reg PARAMS ((rtx, stack, rtx)); 255static void subst_stack_regs_pat PARAMS ((rtx, stack, rtx)); 256static void subst_asm_stack_regs PARAMS ((rtx, stack)); 257static void subst_stack_regs PARAMS ((rtx, stack)); 258static void change_stack PARAMS ((rtx, stack, stack, 259 enum emit_where)); 260static int convert_regs_entry PARAMS ((void)); 261static void convert_regs_exit PARAMS ((void)); 262static int convert_regs_1 PARAMS ((FILE *, basic_block)); 263static int convert_regs_2 PARAMS ((FILE *, basic_block)); 264static int convert_regs PARAMS ((FILE *)); 265static void print_stack PARAMS ((FILE *, stack)); 266static rtx next_flags_user PARAMS ((rtx)); 267static void record_label_references PARAMS ((rtx, rtx)); 268static bool compensate_edge PARAMS ((edge, FILE *)); 269 270/* Return non-zero if any stack register is mentioned somewhere within PAT. */ 271 272static int 273stack_regs_mentioned_p (pat) 274 rtx pat; 275{ 276 const char *fmt; 277 int i; 278 279 if (STACK_REG_P (pat)) 280 return 1; 281 282 fmt = GET_RTX_FORMAT (GET_CODE (pat)); 283 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--) 284 { 285 if (fmt[i] == 'E') 286 { 287 int j; 288 289 for (j = XVECLEN (pat, i) - 1; j >= 0; j--) 290 if (stack_regs_mentioned_p (XVECEXP (pat, i, j))) 291 return 1; 292 } 293 else if (fmt[i] == 'e' && stack_regs_mentioned_p (XEXP (pat, i))) 294 return 1; 295 } 296 297 return 0; 298} 299 300/* Return nonzero if INSN mentions stacked registers, else return zero. */ 301 302int 303stack_regs_mentioned (insn) 304 rtx insn; 305{ 306 unsigned int uid, max; 307 int test; 308 309 if (! INSN_P (insn) || !stack_regs_mentioned_data) 310 return 0; 311 312 uid = INSN_UID (insn); 313 max = VARRAY_SIZE (stack_regs_mentioned_data); 314 if (uid >= max) 315 { 316 /* Allocate some extra size to avoid too many reallocs, but 317 do not grow too quickly. */ 318 max = uid + uid / 20; 319 VARRAY_GROW (stack_regs_mentioned_data, max); 320 } 321 322 test = VARRAY_CHAR (stack_regs_mentioned_data, uid); 323 if (test == 0) 324 { 325 /* This insn has yet to be examined. Do so now. */ 326 test = stack_regs_mentioned_p (PATTERN (insn)) ? 1 : 2; 327 VARRAY_CHAR (stack_regs_mentioned_data, uid) = test; 328 } 329 330 return test == 1; 331} 332 333static rtx ix86_flags_rtx; 334 335static rtx 336next_flags_user (insn) 337 rtx insn; 338{ 339 /* Search forward looking for the first use of this value. 340 Stop at block boundaries. */ 341 342 while (insn != current_block->end) 343 { 344 insn = NEXT_INSN (insn); 345 346 if (INSN_P (insn) && reg_mentioned_p (ix86_flags_rtx, PATTERN (insn))) 347 return insn; 348 349 if (GET_CODE (insn) == CALL_INSN) 350 return NULL_RTX; 351 } 352 return NULL_RTX; 353} 354 355/* Reorganise the stack into ascending numbers, 356 after this insn. */ 357 358static void 359straighten_stack (insn, regstack) 360 rtx insn; 361 stack regstack; 362{ 363 struct stack_def temp_stack; 364 int top; 365 366 /* If there is only a single register on the stack, then the stack is 367 already in increasing order and no reorganization is needed. 368 369 Similarly if the stack is empty. */ 370 if (regstack->top <= 0) 371 return; 372 373 COPY_HARD_REG_SET (temp_stack.reg_set, regstack->reg_set); 374 375 for (top = temp_stack.top = regstack->top; top >= 0; top--) 376 temp_stack.reg[top] = FIRST_STACK_REG + temp_stack.top - top; 377 378 change_stack (insn, regstack, &temp_stack, EMIT_AFTER); 379} 380 381/* Pop a register from the stack */ 382 383static void 384pop_stack (regstack, regno) 385 stack regstack; 386 int regno; 387{ 388 int top = regstack->top; 389 390 CLEAR_HARD_REG_BIT (regstack->reg_set, regno); 391 regstack->top--; 392 /* If regno was not at the top of stack then adjust stack */ 393 if (regstack->reg [top] != regno) 394 { 395 int i; 396 for (i = regstack->top; i >= 0; i--) 397 if (regstack->reg [i] == regno) 398 { 399 int j; 400 for (j = i; j < top; j++) 401 regstack->reg [j] = regstack->reg [j + 1]; 402 break; 403 } 404 } 405} 406 407/* Convert register usage from "flat" register file usage to a "stack 408 register file. FIRST is the first insn in the function, FILE is the 409 dump file, if used. 410 411 Construct a CFG and run life analysis. Then convert each insn one 412 by one. Run a last cleanup_cfg pass, if optimizing, to eliminate 413 code duplication created when the converter inserts pop insns on 414 the edges. */ 415 416void 417reg_to_stack (first, file) 418 rtx first; 419 FILE *file; 420{ 421 int i; 422 int max_uid; 423 424 /* Clean up previous run. */ 425 if (stack_regs_mentioned_data) 426 { 427 VARRAY_FREE (stack_regs_mentioned_data); 428 stack_regs_mentioned_data = 0; 429 } 430 431 if (!optimize) 432 split_all_insns (0); 433 434 /* See if there is something to do. Flow analysis is quite 435 expensive so we might save some compilation time. */ 436 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++) 437 if (regs_ever_live[i]) 438 break; 439 if (i > LAST_STACK_REG) 440 return; 441 442 /* Ok, floating point instructions exist. If not optimizing, 443 build the CFG and run life analysis. */ 444 if (!optimize) 445 { 446 find_basic_blocks (first, max_reg_num (), file); 447 count_or_remove_death_notes (NULL, 1); 448 life_analysis (first, file, PROP_DEATH_NOTES); 449 } 450 mark_dfs_back_edges (); 451 452 /* Set up block info for each basic block. */ 453 alloc_aux_for_blocks (sizeof (struct block_info_def)); 454 for (i = n_basic_blocks - 1; i >= 0; --i) 455 { 456 edge e; 457 basic_block bb = BASIC_BLOCK (i); 458 for (e = bb->pred; e; e=e->pred_next) 459 if (!(e->flags & EDGE_DFS_BACK) 460 && e->src != ENTRY_BLOCK_PTR) 461 BLOCK_INFO (bb)->predecessors++; 462 } 463 464 /* Create the replacement registers up front. */ 465 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++) 466 { 467 enum machine_mode mode; 468 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); 469 mode != VOIDmode; 470 mode = GET_MODE_WIDER_MODE (mode)) 471 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i); 472 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT); 473 mode != VOIDmode; 474 mode = GET_MODE_WIDER_MODE (mode)) 475 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i); 476 } 477 478 ix86_flags_rtx = gen_rtx_REG (CCmode, FLAGS_REG); 479 480 /* A QNaN for initializing uninitialized variables. 481 482 ??? We can't load from constant memory in PIC mode, because 483 we're insertting these instructions before the prologue and 484 the PIC register hasn't been set up. In that case, fall back 485 on zero, which we can get from `ldz'. */ 486 487 if (flag_pic) 488 nan = CONST0_RTX (SFmode); 489 else 490 { 491 nan = gen_lowpart (SFmode, GEN_INT (0x7fc00000)); 492 nan = force_const_mem (SFmode, nan); 493 } 494 495 /* Allocate a cache for stack_regs_mentioned. */ 496 max_uid = get_max_uid (); 497 VARRAY_CHAR_INIT (stack_regs_mentioned_data, max_uid + 1, 498 "stack_regs_mentioned cache"); 499 500 convert_regs (file); 501 502 free_aux_for_blocks (); 503} 504 505/* Check PAT, which is in INSN, for LABEL_REFs. Add INSN to the 506 label's chain of references, and note which insn contains each 507 reference. */ 508 509static void 510record_label_references (insn, pat) 511 rtx insn, pat; 512{ 513 enum rtx_code code = GET_CODE (pat); 514 int i; 515 const char *fmt; 516 517 if (code == LABEL_REF) 518 { 519 rtx label = XEXP (pat, 0); 520 rtx ref; 521 522 if (GET_CODE (label) != CODE_LABEL) 523 abort (); 524 525 /* If this is an undefined label, LABEL_REFS (label) contains 526 garbage. */ 527 if (INSN_UID (label) == 0) 528 return; 529 530 /* Don't make a duplicate in the code_label's chain. */ 531 532 for (ref = LABEL_REFS (label); 533 ref && ref != label; 534 ref = LABEL_NEXTREF (ref)) 535 if (CONTAINING_INSN (ref) == insn) 536 return; 537 538 CONTAINING_INSN (pat) = insn; 539 LABEL_NEXTREF (pat) = LABEL_REFS (label); 540 LABEL_REFS (label) = pat; 541 542 return; 543 } 544 545 fmt = GET_RTX_FORMAT (code); 546 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 547 { 548 if (fmt[i] == 'e') 549 record_label_references (insn, XEXP (pat, i)); 550 if (fmt[i] == 'E') 551 { 552 int j; 553 for (j = 0; j < XVECLEN (pat, i); j++) 554 record_label_references (insn, XVECEXP (pat, i, j)); 555 } 556 } 557} 558 559/* Return a pointer to the REG expression within PAT. If PAT is not a 560 REG, possible enclosed by a conversion rtx, return the inner part of 561 PAT that stopped the search. */ 562 563static rtx * 564get_true_reg (pat) 565 rtx *pat; 566{ 567 for (;;) 568 switch (GET_CODE (*pat)) 569 { 570 case SUBREG: 571 /* Eliminate FP subregister accesses in favour of the 572 actual FP register in use. */ 573 { 574 rtx subreg; 575 if (FP_REG_P (subreg = SUBREG_REG (*pat))) 576 { 577 int regno_off = subreg_regno_offset (REGNO (subreg), 578 GET_MODE (subreg), 579 SUBREG_BYTE (*pat), 580 GET_MODE (*pat)); 581 *pat = FP_MODE_REG (REGNO (subreg) + regno_off, 582 GET_MODE (subreg)); 583 default: 584 return pat; 585 } 586 } 587 case FLOAT: 588 case FIX: 589 case FLOAT_EXTEND: 590 pat = & XEXP (*pat, 0); 591 } 592} 593 594/* There are many rules that an asm statement for stack-like regs must 595 follow. Those rules are explained at the top of this file: the rule 596 numbers below refer to that explanation. */ 597 598static int 599check_asm_stack_operands (insn) 600 rtx insn; 601{ 602 int i; 603 int n_clobbers; 604 int malformed_asm = 0; 605 rtx body = PATTERN (insn); 606 607 char reg_used_as_output[FIRST_PSEUDO_REGISTER]; 608 char implicitly_dies[FIRST_PSEUDO_REGISTER]; 609 int alt; 610 611 rtx *clobber_reg = 0; 612 int n_inputs, n_outputs; 613 614 /* Find out what the constraints require. If no constraint 615 alternative matches, this asm is malformed. */ 616 extract_insn (insn); 617 constrain_operands (1); 618 alt = which_alternative; 619 620 preprocess_constraints (); 621 622 n_inputs = get_asm_operand_n_inputs (body); 623 n_outputs = recog_data.n_operands - n_inputs; 624 625 if (alt < 0) 626 { 627 malformed_asm = 1; 628 /* Avoid further trouble with this insn. */ 629 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx); 630 return 0; 631 } 632 633 /* Strip SUBREGs here to make the following code simpler. */ 634 for (i = 0; i < recog_data.n_operands; i++) 635 if (GET_CODE (recog_data.operand[i]) == SUBREG 636 && GET_CODE (SUBREG_REG (recog_data.operand[i])) == REG) 637 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]); 638 639 /* Set up CLOBBER_REG. */ 640 641 n_clobbers = 0; 642 643 if (GET_CODE (body) == PARALLEL) 644 { 645 clobber_reg = (rtx *) alloca (XVECLEN (body, 0) * sizeof (rtx)); 646 647 for (i = 0; i < XVECLEN (body, 0); i++) 648 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER) 649 { 650 rtx clobber = XVECEXP (body, 0, i); 651 rtx reg = XEXP (clobber, 0); 652 653 if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG) 654 reg = SUBREG_REG (reg); 655 656 if (STACK_REG_P (reg)) 657 { 658 clobber_reg[n_clobbers] = reg; 659 n_clobbers++; 660 } 661 } 662 } 663 664 /* Enforce rule #4: Output operands must specifically indicate which 665 reg an output appears in after an asm. "=f" is not allowed: the 666 operand constraints must select a class with a single reg. 667 668 Also enforce rule #5: Output operands must start at the top of 669 the reg-stack: output operands may not "skip" a reg. */ 670 671 memset (reg_used_as_output, 0, sizeof (reg_used_as_output)); 672 for (i = 0; i < n_outputs; i++) 673 if (STACK_REG_P (recog_data.operand[i])) 674 { 675 if (reg_class_size[(int) recog_op_alt[i][alt].class] != 1) 676 { 677 error_for_asm (insn, "output constraint %d must specify a single register", i); 678 malformed_asm = 1; 679 } 680 else 681 { 682 int j; 683 684 for (j = 0; j < n_clobbers; j++) 685 if (REGNO (recog_data.operand[i]) == REGNO (clobber_reg[j])) 686 { 687 error_for_asm (insn, "output constraint %d cannot be specified together with \"%s\" clobber", 688 i, reg_names [REGNO (clobber_reg[j])]); 689 malformed_asm = 1; 690 break; 691 } 692 if (j == n_clobbers) 693 reg_used_as_output[REGNO (recog_data.operand[i])] = 1; 694 } 695 } 696 697 698 /* Search for first non-popped reg. */ 699 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++) 700 if (! reg_used_as_output[i]) 701 break; 702 703 /* If there are any other popped regs, that's an error. */ 704 for (; i < LAST_STACK_REG + 1; i++) 705 if (reg_used_as_output[i]) 706 break; 707 708 if (i != LAST_STACK_REG + 1) 709 { 710 error_for_asm (insn, "output regs must be grouped at top of stack"); 711 malformed_asm = 1; 712 } 713 714 /* Enforce rule #2: All implicitly popped input regs must be closer 715 to the top of the reg-stack than any input that is not implicitly 716 popped. */ 717 718 memset (implicitly_dies, 0, sizeof (implicitly_dies)); 719 for (i = n_outputs; i < n_outputs + n_inputs; i++) 720 if (STACK_REG_P (recog_data.operand[i])) 721 { 722 /* An input reg is implicitly popped if it is tied to an 723 output, or if there is a CLOBBER for it. */ 724 int j; 725 726 for (j = 0; j < n_clobbers; j++) 727 if (operands_match_p (clobber_reg[j], recog_data.operand[i])) 728 break; 729 730 if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0) 731 implicitly_dies[REGNO (recog_data.operand[i])] = 1; 732 } 733 734 /* Search for first non-popped reg. */ 735 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++) 736 if (! implicitly_dies[i]) 737 break; 738 739 /* If there are any other popped regs, that's an error. */ 740 for (; i < LAST_STACK_REG + 1; i++) 741 if (implicitly_dies[i]) 742 break; 743 744 if (i != LAST_STACK_REG + 1) 745 { 746 error_for_asm (insn, 747 "implicitly popped regs must be grouped at top of stack"); 748 malformed_asm = 1; 749 } 750 751 /* Enfore rule #3: If any input operand uses the "f" constraint, all 752 output constraints must use the "&" earlyclobber. 753 754 ??? Detect this more deterministically by having constrain_asm_operands 755 record any earlyclobber. */ 756 757 for (i = n_outputs; i < n_outputs + n_inputs; i++) 758 if (recog_op_alt[i][alt].matches == -1) 759 { 760 int j; 761 762 for (j = 0; j < n_outputs; j++) 763 if (operands_match_p (recog_data.operand[j], recog_data.operand[i])) 764 { 765 error_for_asm (insn, 766 "output operand %d must use `&' constraint", j); 767 malformed_asm = 1; 768 } 769 } 770 771 if (malformed_asm) 772 { 773 /* Avoid further trouble with this insn. */ 774 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx); 775 return 0; 776 } 777 778 return 1; 779} 780 781/* Calculate the number of inputs and outputs in BODY, an 782 asm_operands. N_OPERANDS is the total number of operands, and 783 N_INPUTS and N_OUTPUTS are pointers to ints into which the results are 784 placed. */ 785 786static int 787get_asm_operand_n_inputs (body) 788 rtx body; 789{ 790 if (GET_CODE (body) == SET && GET_CODE (SET_SRC (body)) == ASM_OPERANDS) 791 return ASM_OPERANDS_INPUT_LENGTH (SET_SRC (body)); 792 793 else if (GET_CODE (body) == ASM_OPERANDS) 794 return ASM_OPERANDS_INPUT_LENGTH (body); 795 796 else if (GET_CODE (body) == PARALLEL 797 && GET_CODE (XVECEXP (body, 0, 0)) == SET) 798 return ASM_OPERANDS_INPUT_LENGTH (SET_SRC (XVECEXP (body, 0, 0))); 799 800 else if (GET_CODE (body) == PARALLEL 801 && GET_CODE (XVECEXP (body, 0, 0)) == ASM_OPERANDS) 802 return ASM_OPERANDS_INPUT_LENGTH (XVECEXP (body, 0, 0)); 803 804 abort (); 805} 806 807/* If current function returns its result in an fp stack register, 808 return the REG. Otherwise, return 0. */ 809 810static rtx 811stack_result (decl) 812 tree decl; 813{ 814 rtx result; 815 816 /* If the value is supposed to be returned in memory, then clearly 817 it is not returned in a stack register. */ 818 if (aggregate_value_p (DECL_RESULT (decl))) 819 return 0; 820 821 result = DECL_RTL_IF_SET (DECL_RESULT (decl)); 822 if (result != 0) 823 { 824#ifdef FUNCTION_OUTGOING_VALUE 825 result 826 = FUNCTION_OUTGOING_VALUE (TREE_TYPE (DECL_RESULT (decl)), decl); 827#else 828 result = FUNCTION_VALUE (TREE_TYPE (DECL_RESULT (decl)), decl); 829#endif 830 } 831 832 return result != 0 && STACK_REG_P (result) ? result : 0; 833} 834 835 836/* 837 * This section deals with stack register substitution, and forms the second 838 * pass over the RTL. 839 */ 840 841/* Replace REG, which is a pointer to a stack reg RTX, with an RTX for 842 the desired hard REGNO. */ 843 844static void 845replace_reg (reg, regno) 846 rtx *reg; 847 int regno; 848{ 849 if (regno < FIRST_STACK_REG || regno > LAST_STACK_REG 850 || ! STACK_REG_P (*reg)) 851 abort (); 852 853 switch (GET_MODE_CLASS (GET_MODE (*reg))) 854 { 855 default: abort (); 856 case MODE_FLOAT: 857 case MODE_COMPLEX_FLOAT:; 858 } 859 860 *reg = FP_MODE_REG (regno, GET_MODE (*reg)); 861} 862 863/* Remove a note of type NOTE, which must be found, for register 864 number REGNO from INSN. Remove only one such note. */ 865 866static void 867remove_regno_note (insn, note, regno) 868 rtx insn; 869 enum reg_note note; 870 unsigned int regno; 871{ 872 rtx *note_link, this; 873 874 note_link = ®_NOTES (insn); 875 for (this = *note_link; this; this = XEXP (this, 1)) 876 if (REG_NOTE_KIND (this) == note 877 && REG_P (XEXP (this, 0)) && REGNO (XEXP (this, 0)) == regno) 878 { 879 *note_link = XEXP (this, 1); 880 return; 881 } 882 else 883 note_link = &XEXP (this, 1); 884 885 abort (); 886} 887 888/* Find the hard register number of virtual register REG in REGSTACK. 889 The hard register number is relative to the top of the stack. -1 is 890 returned if the register is not found. */ 891 892static int 893get_hard_regnum (regstack, reg) 894 stack regstack; 895 rtx reg; 896{ 897 int i; 898 899 if (! STACK_REG_P (reg)) 900 abort (); 901 902 for (i = regstack->top; i >= 0; i--) 903 if (regstack->reg[i] == REGNO (reg)) 904 break; 905 906 return i >= 0 ? (FIRST_STACK_REG + regstack->top - i) : -1; 907} 908 909/* Emit an insn to pop virtual register REG before or after INSN. 910 REGSTACK is the stack state after INSN and is updated to reflect this 911 pop. WHEN is either emit_insn_before or emit_insn_after. A pop insn 912 is represented as a SET whose destination is the register to be popped 913 and source is the top of stack. A death note for the top of stack 914 cases the movdf pattern to pop. */ 915 916static rtx 917emit_pop_insn (insn, regstack, reg, where) 918 rtx insn; 919 stack regstack; 920 rtx reg; 921 enum emit_where where; 922{ 923 rtx pop_insn, pop_rtx; 924 int hard_regno; 925 926 /* For complex types take care to pop both halves. These may survive in 927 CLOBBER and USE expressions. */ 928 if (COMPLEX_MODE_P (GET_MODE (reg))) 929 { 930 rtx reg1 = FP_MODE_REG (REGNO (reg), DFmode); 931 rtx reg2 = FP_MODE_REG (REGNO (reg) + 1, DFmode); 932 933 pop_insn = NULL_RTX; 934 if (get_hard_regnum (regstack, reg1) >= 0) 935 pop_insn = emit_pop_insn (insn, regstack, reg1, where); 936 if (get_hard_regnum (regstack, reg2) >= 0) 937 pop_insn = emit_pop_insn (insn, regstack, reg2, where); 938 if (!pop_insn) 939 abort (); 940 return pop_insn; 941 } 942 943 hard_regno = get_hard_regnum (regstack, reg); 944 945 if (hard_regno < FIRST_STACK_REG) 946 abort (); 947 948 pop_rtx = gen_rtx_SET (VOIDmode, FP_MODE_REG (hard_regno, DFmode), 949 FP_MODE_REG (FIRST_STACK_REG, DFmode)); 950 951 if (where == EMIT_AFTER) 952 pop_insn = emit_insn_after (pop_rtx, insn); 953 else 954 pop_insn = emit_insn_before (pop_rtx, insn); 955 956 REG_NOTES (pop_insn) 957 = gen_rtx_EXPR_LIST (REG_DEAD, FP_MODE_REG (FIRST_STACK_REG, DFmode), 958 REG_NOTES (pop_insn)); 959 960 regstack->reg[regstack->top - (hard_regno - FIRST_STACK_REG)] 961 = regstack->reg[regstack->top]; 962 regstack->top -= 1; 963 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (reg)); 964 965 return pop_insn; 966} 967 968/* Emit an insn before or after INSN to swap virtual register REG with 969 the top of stack. REGSTACK is the stack state before the swap, and 970 is updated to reflect the swap. A swap insn is represented as a 971 PARALLEL of two patterns: each pattern moves one reg to the other. 972 973 If REG is already at the top of the stack, no insn is emitted. */ 974 975static void 976emit_swap_insn (insn, regstack, reg) 977 rtx insn; 978 stack regstack; 979 rtx reg; 980{ 981 int hard_regno; 982 rtx swap_rtx; 983 int tmp, other_reg; /* swap regno temps */ 984 rtx i1; /* the stack-reg insn prior to INSN */ 985 rtx i1set = NULL_RTX; /* the SET rtx within I1 */ 986 987 hard_regno = get_hard_regnum (regstack, reg); 988 989 if (hard_regno < FIRST_STACK_REG) 990 abort (); 991 if (hard_regno == FIRST_STACK_REG) 992 return; 993 994 other_reg = regstack->top - (hard_regno - FIRST_STACK_REG); 995 996 tmp = regstack->reg[other_reg]; 997 regstack->reg[other_reg] = regstack->reg[regstack->top]; 998 regstack->reg[regstack->top] = tmp; 999 1000 /* Find the previous insn involving stack regs, but don't pass a 1001 block boundary. */ 1002 i1 = NULL; 1003 if (current_block && insn != current_block->head) 1004 { 1005 rtx tmp = PREV_INSN (insn); 1006 rtx limit = PREV_INSN (current_block->head); 1007 while (tmp != limit) 1008 { 1009 if (GET_CODE (tmp) == CODE_LABEL 1010 || GET_CODE (tmp) == CALL_INSN 1011 || NOTE_INSN_BASIC_BLOCK_P (tmp) 1012 || (GET_CODE (tmp) == INSN 1013 && stack_regs_mentioned (tmp))) 1014 { 1015 i1 = tmp; 1016 break; 1017 } 1018 tmp = PREV_INSN (tmp); 1019 } 1020 } 1021 1022 if (i1 != NULL_RTX 1023 && (i1set = single_set (i1)) != NULL_RTX) 1024 { 1025 rtx i1src = *get_true_reg (&SET_SRC (i1set)); 1026 rtx i1dest = *get_true_reg (&SET_DEST (i1set)); 1027 1028 /* If the previous register stack push was from the reg we are to 1029 swap with, omit the swap. */ 1030 1031 if (GET_CODE (i1dest) == REG && REGNO (i1dest) == FIRST_STACK_REG 1032 && GET_CODE (i1src) == REG 1033 && REGNO (i1src) == (unsigned) hard_regno - 1 1034 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX) 1035 return; 1036 1037 /* If the previous insn wrote to the reg we are to swap with, 1038 omit the swap. */ 1039 1040 if (GET_CODE (i1dest) == REG && REGNO (i1dest) == (unsigned) hard_regno 1041 && GET_CODE (i1src) == REG && REGNO (i1src) == FIRST_STACK_REG 1042 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX) 1043 return; 1044 } 1045 1046 swap_rtx = gen_swapxf (FP_MODE_REG (hard_regno, XFmode), 1047 FP_MODE_REG (FIRST_STACK_REG, XFmode)); 1048 1049 if (i1) 1050 emit_insn_after (swap_rtx, i1); 1051 else if (current_block) 1052 emit_insn_before (swap_rtx, current_block->head); 1053 else 1054 emit_insn_before (swap_rtx, insn); 1055} 1056 1057/* Handle a move to or from a stack register in PAT, which is in INSN. 1058 REGSTACK is the current stack. */ 1059 1060static void 1061move_for_stack_reg (insn, regstack, pat) 1062 rtx insn; 1063 stack regstack; 1064 rtx pat; 1065{ 1066 rtx *psrc = get_true_reg (&SET_SRC (pat)); 1067 rtx *pdest = get_true_reg (&SET_DEST (pat)); 1068 rtx src, dest; 1069 rtx note; 1070 1071 src = *psrc; dest = *pdest; 1072 1073 if (STACK_REG_P (src) && STACK_REG_P (dest)) 1074 { 1075 /* Write from one stack reg to another. If SRC dies here, then 1076 just change the register mapping and delete the insn. */ 1077 1078 note = find_regno_note (insn, REG_DEAD, REGNO (src)); 1079 if (note) 1080 { 1081 int i; 1082 1083 /* If this is a no-op move, there must not be a REG_DEAD note. */ 1084 if (REGNO (src) == REGNO (dest)) 1085 abort (); 1086 1087 for (i = regstack->top; i >= 0; i--) 1088 if (regstack->reg[i] == REGNO (src)) 1089 break; 1090 1091 /* The source must be live, and the dest must be dead. */ 1092 if (i < 0 || get_hard_regnum (regstack, dest) >= FIRST_STACK_REG) 1093 abort (); 1094 1095 /* It is possible that the dest is unused after this insn. 1096 If so, just pop the src. */ 1097 1098 if (find_regno_note (insn, REG_UNUSED, REGNO (dest))) 1099 { 1100 emit_pop_insn (insn, regstack, src, EMIT_AFTER); 1101 1102 delete_insn (insn); 1103 return; 1104 } 1105 1106 regstack->reg[i] = REGNO (dest); 1107 1108 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest)); 1109 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src)); 1110 1111 delete_insn (insn); 1112 1113 return; 1114 } 1115 1116 /* The source reg does not die. */ 1117 1118 /* If this appears to be a no-op move, delete it, or else it 1119 will confuse the machine description output patterns. But if 1120 it is REG_UNUSED, we must pop the reg now, as per-insn processing 1121 for REG_UNUSED will not work for deleted insns. */ 1122 1123 if (REGNO (src) == REGNO (dest)) 1124 { 1125 if (find_regno_note (insn, REG_UNUSED, REGNO (dest))) 1126 emit_pop_insn (insn, regstack, dest, EMIT_AFTER); 1127 1128 delete_insn (insn); 1129 return; 1130 } 1131 1132 /* The destination ought to be dead */ 1133 if (get_hard_regnum (regstack, dest) >= FIRST_STACK_REG) 1134 abort (); 1135 1136 replace_reg (psrc, get_hard_regnum (regstack, src)); 1137 1138 regstack->reg[++regstack->top] = REGNO (dest); 1139 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest)); 1140 replace_reg (pdest, FIRST_STACK_REG); 1141 } 1142 else if (STACK_REG_P (src)) 1143 { 1144 /* Save from a stack reg to MEM, or possibly integer reg. Since 1145 only top of stack may be saved, emit an exchange first if 1146 needs be. */ 1147 1148 emit_swap_insn (insn, regstack, src); 1149 1150 note = find_regno_note (insn, REG_DEAD, REGNO (src)); 1151 if (note) 1152 { 1153 replace_reg (&XEXP (note, 0), FIRST_STACK_REG); 1154 regstack->top--; 1155 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src)); 1156 } 1157 else if ((GET_MODE (src) == XFmode || GET_MODE (src) == TFmode) 1158 && regstack->top < REG_STACK_SIZE - 1) 1159 { 1160 /* A 387 cannot write an XFmode value to a MEM without 1161 clobbering the source reg. The output code can handle 1162 this by reading back the value from the MEM. 1163 But it is more efficient to use a temp register if one is 1164 available. Push the source value here if the register 1165 stack is not full, and then write the value to memory via 1166 a pop. */ 1167 rtx push_rtx, push_insn; 1168 rtx top_stack_reg = FP_MODE_REG (FIRST_STACK_REG, GET_MODE (src)); 1169 1170 if (GET_MODE (src) == TFmode) 1171 push_rtx = gen_movtf (top_stack_reg, top_stack_reg); 1172 else 1173 push_rtx = gen_movxf (top_stack_reg, top_stack_reg); 1174 push_insn = emit_insn_before (push_rtx, insn); 1175 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_DEAD, top_stack_reg, 1176 REG_NOTES (insn)); 1177 } 1178 1179 replace_reg (psrc, FIRST_STACK_REG); 1180 } 1181 else if (STACK_REG_P (dest)) 1182 { 1183 /* Load from MEM, or possibly integer REG or constant, into the 1184 stack regs. The actual target is always the top of the 1185 stack. The stack mapping is changed to reflect that DEST is 1186 now at top of stack. */ 1187 1188 /* The destination ought to be dead */ 1189 if (get_hard_regnum (regstack, dest) >= FIRST_STACK_REG) 1190 abort (); 1191 1192 if (regstack->top >= REG_STACK_SIZE) 1193 abort (); 1194 1195 regstack->reg[++regstack->top] = REGNO (dest); 1196 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest)); 1197 replace_reg (pdest, FIRST_STACK_REG); 1198 } 1199 else 1200 abort (); 1201} 1202 1203/* Swap the condition on a branch, if there is one. Return true if we 1204 found a condition to swap. False if the condition was not used as 1205 such. */ 1206 1207static int 1208swap_rtx_condition_1 (pat) 1209 rtx pat; 1210{ 1211 const char *fmt; 1212 int i, r = 0; 1213 1214 if (GET_RTX_CLASS (GET_CODE (pat)) == '<') 1215 { 1216 PUT_CODE (pat, swap_condition (GET_CODE (pat))); 1217 r = 1; 1218 } 1219 else 1220 { 1221 fmt = GET_RTX_FORMAT (GET_CODE (pat)); 1222 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--) 1223 { 1224 if (fmt[i] == 'E') 1225 { 1226 int j; 1227 1228 for (j = XVECLEN (pat, i) - 1; j >= 0; j--) 1229 r |= swap_rtx_condition_1 (XVECEXP (pat, i, j)); 1230 } 1231 else if (fmt[i] == 'e') 1232 r |= swap_rtx_condition_1 (XEXP (pat, i)); 1233 } 1234 } 1235 1236 return r; 1237} 1238 1239static int 1240swap_rtx_condition (insn) 1241 rtx insn; 1242{ 1243 rtx pat = PATTERN (insn); 1244 1245 /* We're looking for a single set to cc0 or an HImode temporary. */ 1246 1247 if (GET_CODE (pat) == SET 1248 && GET_CODE (SET_DEST (pat)) == REG 1249 && REGNO (SET_DEST (pat)) == FLAGS_REG) 1250 { 1251 insn = next_flags_user (insn); 1252 if (insn == NULL_RTX) 1253 return 0; 1254 pat = PATTERN (insn); 1255 } 1256 1257 /* See if this is, or ends in, a fnstsw, aka unspec 9. If so, we're 1258 not doing anything with the cc value right now. We may be able to 1259 search for one though. */ 1260 1261 if (GET_CODE (pat) == SET 1262 && GET_CODE (SET_SRC (pat)) == UNSPEC 1263 && XINT (SET_SRC (pat), 1) == 9) 1264 { 1265 rtx dest = SET_DEST (pat); 1266 1267 /* Search forward looking for the first use of this value. 1268 Stop at block boundaries. */ 1269 while (insn != current_block->end) 1270 { 1271 insn = NEXT_INSN (insn); 1272 if (INSN_P (insn) && reg_mentioned_p (dest, insn)) 1273 break; 1274 if (GET_CODE (insn) == CALL_INSN) 1275 return 0; 1276 } 1277 1278 /* So we've found the insn using this value. If it is anything 1279 other than sahf, aka unspec 10, or the value does not die 1280 (meaning we'd have to search further), then we must give up. */ 1281 pat = PATTERN (insn); 1282 if (GET_CODE (pat) != SET 1283 || GET_CODE (SET_SRC (pat)) != UNSPEC 1284 || XINT (SET_SRC (pat), 1) != 10 1285 || ! dead_or_set_p (insn, dest)) 1286 return 0; 1287 1288 /* Now we are prepared to handle this as a normal cc0 setter. */ 1289 insn = next_flags_user (insn); 1290 if (insn == NULL_RTX) 1291 return 0; 1292 pat = PATTERN (insn); 1293 } 1294 1295 if (swap_rtx_condition_1 (pat)) 1296 { 1297 int fail = 0; 1298 INSN_CODE (insn) = -1; 1299 if (recog_memoized (insn) == -1) 1300 fail = 1; 1301 /* In case the flags don't die here, recurse to try fix 1302 following user too. */ 1303 else if (! dead_or_set_p (insn, ix86_flags_rtx)) 1304 { 1305 insn = next_flags_user (insn); 1306 if (!insn || !swap_rtx_condition (insn)) 1307 fail = 1; 1308 } 1309 if (fail) 1310 { 1311 swap_rtx_condition_1 (pat); 1312 return 0; 1313 } 1314 return 1; 1315 } 1316 return 0; 1317} 1318 1319/* Handle a comparison. Special care needs to be taken to avoid 1320 causing comparisons that a 387 cannot do correctly, such as EQ. 1321 1322 Also, a pop insn may need to be emitted. The 387 does have an 1323 `fcompp' insn that can pop two regs, but it is sometimes too expensive 1324 to do this - a `fcomp' followed by a `fstpl %st(0)' may be easier to 1325 set up. */ 1326 1327static void 1328compare_for_stack_reg (insn, regstack, pat_src) 1329 rtx insn; 1330 stack regstack; 1331 rtx pat_src; 1332{ 1333 rtx *src1, *src2; 1334 rtx src1_note, src2_note; 1335 rtx flags_user; 1336 1337 src1 = get_true_reg (&XEXP (pat_src, 0)); 1338 src2 = get_true_reg (&XEXP (pat_src, 1)); 1339 flags_user = next_flags_user (insn); 1340 1341 /* ??? If fxch turns out to be cheaper than fstp, give priority to 1342 registers that die in this insn - move those to stack top first. */ 1343 if ((! STACK_REG_P (*src1) 1344 || (STACK_REG_P (*src2) 1345 && get_hard_regnum (regstack, *src2) == FIRST_STACK_REG)) 1346 && swap_rtx_condition (insn)) 1347 { 1348 rtx temp; 1349 temp = XEXP (pat_src, 0); 1350 XEXP (pat_src, 0) = XEXP (pat_src, 1); 1351 XEXP (pat_src, 1) = temp; 1352 1353 src1 = get_true_reg (&XEXP (pat_src, 0)); 1354 src2 = get_true_reg (&XEXP (pat_src, 1)); 1355 1356 INSN_CODE (insn) = -1; 1357 } 1358 1359 /* We will fix any death note later. */ 1360 1361 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1362 1363 if (STACK_REG_P (*src2)) 1364 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); 1365 else 1366 src2_note = NULL_RTX; 1367 1368 emit_swap_insn (insn, regstack, *src1); 1369 1370 replace_reg (src1, FIRST_STACK_REG); 1371 1372 if (STACK_REG_P (*src2)) 1373 replace_reg (src2, get_hard_regnum (regstack, *src2)); 1374 1375 if (src1_note) 1376 { 1377 pop_stack (regstack, REGNO (XEXP (src1_note, 0))); 1378 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); 1379 } 1380 1381 /* If the second operand dies, handle that. But if the operands are 1382 the same stack register, don't bother, because only one death is 1383 needed, and it was just handled. */ 1384 1385 if (src2_note 1386 && ! (STACK_REG_P (*src1) && STACK_REG_P (*src2) 1387 && REGNO (*src1) == REGNO (*src2))) 1388 { 1389 /* As a special case, two regs may die in this insn if src2 is 1390 next to top of stack and the top of stack also dies. Since 1391 we have already popped src1, "next to top of stack" is really 1392 at top (FIRST_STACK_REG) now. */ 1393 1394 if (get_hard_regnum (regstack, XEXP (src2_note, 0)) == FIRST_STACK_REG 1395 && src1_note) 1396 { 1397 pop_stack (regstack, REGNO (XEXP (src2_note, 0))); 1398 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1); 1399 } 1400 else 1401 { 1402 /* The 386 can only represent death of the first operand in 1403 the case handled above. In all other cases, emit a separate 1404 pop and remove the death note from here. */ 1405 1406 /* link_cc0_insns (insn); */ 1407 1408 remove_regno_note (insn, REG_DEAD, REGNO (XEXP (src2_note, 0))); 1409 1410 emit_pop_insn (insn, regstack, XEXP (src2_note, 0), 1411 EMIT_AFTER); 1412 } 1413 } 1414} 1415 1416/* Substitute new registers in PAT, which is part of INSN. REGSTACK 1417 is the current register layout. */ 1418 1419static void 1420subst_stack_regs_pat (insn, regstack, pat) 1421 rtx insn; 1422 stack regstack; 1423 rtx pat; 1424{ 1425 rtx *dest, *src; 1426 1427 switch (GET_CODE (pat)) 1428 { 1429 case USE: 1430 /* Deaths in USE insns can happen in non optimizing compilation. 1431 Handle them by popping the dying register. */ 1432 src = get_true_reg (&XEXP (pat, 0)); 1433 if (STACK_REG_P (*src) 1434 && find_regno_note (insn, REG_DEAD, REGNO (*src))) 1435 { 1436 emit_pop_insn (insn, regstack, *src, EMIT_AFTER); 1437 return; 1438 } 1439 /* ??? Uninitialized USE should not happen. */ 1440 else if (get_hard_regnum (regstack, *src) == -1) 1441 abort (); 1442 break; 1443 1444 case CLOBBER: 1445 { 1446 rtx note; 1447 1448 dest = get_true_reg (&XEXP (pat, 0)); 1449 if (STACK_REG_P (*dest)) 1450 { 1451 note = find_reg_note (insn, REG_DEAD, *dest); 1452 1453 if (pat != PATTERN (insn)) 1454 { 1455 /* The fix_truncdi_1 pattern wants to be able to allocate 1456 it's own scratch register. It does this by clobbering 1457 an fp reg so that it is assured of an empty reg-stack 1458 register. If the register is live, kill it now. 1459 Remove the DEAD/UNUSED note so we don't try to kill it 1460 later too. */ 1461 1462 if (note) 1463 emit_pop_insn (insn, regstack, *dest, EMIT_BEFORE); 1464 else 1465 { 1466 note = find_reg_note (insn, REG_UNUSED, *dest); 1467 if (!note) 1468 abort (); 1469 } 1470 remove_note (insn, note); 1471 replace_reg (dest, LAST_STACK_REG); 1472 } 1473 else 1474 { 1475 /* A top-level clobber with no REG_DEAD, and no hard-regnum 1476 indicates an uninitialized value. Because reload removed 1477 all other clobbers, this must be due to a function 1478 returning without a value. Load up a NaN. */ 1479 1480 if (! note 1481 && get_hard_regnum (regstack, *dest) == -1) 1482 { 1483 pat = gen_rtx_SET (VOIDmode, 1484 FP_MODE_REG (REGNO (*dest), SFmode), 1485 nan); 1486 PATTERN (insn) = pat; 1487 move_for_stack_reg (insn, regstack, pat); 1488 } 1489 if (! note && COMPLEX_MODE_P (GET_MODE (*dest)) 1490 && get_hard_regnum (regstack, FP_MODE_REG (REGNO (*dest), DFmode)) == -1) 1491 { 1492 pat = gen_rtx_SET (VOIDmode, 1493 FP_MODE_REG (REGNO (*dest) + 1, SFmode), 1494 nan); 1495 PATTERN (insn) = pat; 1496 move_for_stack_reg (insn, regstack, pat); 1497 } 1498 } 1499 } 1500 break; 1501 } 1502 1503 case SET: 1504 { 1505 rtx *src1 = (rtx *) 0, *src2; 1506 rtx src1_note, src2_note; 1507 rtx pat_src; 1508 1509 dest = get_true_reg (&SET_DEST (pat)); 1510 src = get_true_reg (&SET_SRC (pat)); 1511 pat_src = SET_SRC (pat); 1512 1513 /* See if this is a `movM' pattern, and handle elsewhere if so. */ 1514 if (STACK_REG_P (*src) 1515 || (STACK_REG_P (*dest) 1516 && (GET_CODE (*src) == REG || GET_CODE (*src) == MEM 1517 || GET_CODE (*src) == CONST_DOUBLE))) 1518 { 1519 move_for_stack_reg (insn, regstack, pat); 1520 break; 1521 } 1522 1523 switch (GET_CODE (pat_src)) 1524 { 1525 case COMPARE: 1526 compare_for_stack_reg (insn, regstack, pat_src); 1527 break; 1528 1529 case CALL: 1530 { 1531 int count; 1532 for (count = HARD_REGNO_NREGS (REGNO (*dest), GET_MODE (*dest)); 1533 --count >= 0;) 1534 { 1535 regstack->reg[++regstack->top] = REGNO (*dest) + count; 1536 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest) + count); 1537 } 1538 } 1539 replace_reg (dest, FIRST_STACK_REG); 1540 break; 1541 1542 case REG: 1543 /* This is a `tstM2' case. */ 1544 if (*dest != cc0_rtx) 1545 abort (); 1546 src1 = src; 1547 1548 /* Fall through. */ 1549 1550 case FLOAT_TRUNCATE: 1551 case SQRT: 1552 case ABS: 1553 case NEG: 1554 /* These insns only operate on the top of the stack. DEST might 1555 be cc0_rtx if we're processing a tstM pattern. Also, it's 1556 possible that the tstM case results in a REG_DEAD note on the 1557 source. */ 1558 1559 if (src1 == 0) 1560 src1 = get_true_reg (&XEXP (pat_src, 0)); 1561 1562 emit_swap_insn (insn, regstack, *src1); 1563 1564 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1565 1566 if (STACK_REG_P (*dest)) 1567 replace_reg (dest, FIRST_STACK_REG); 1568 1569 if (src1_note) 1570 { 1571 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); 1572 regstack->top--; 1573 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1)); 1574 } 1575 1576 replace_reg (src1, FIRST_STACK_REG); 1577 break; 1578 1579 case MINUS: 1580 case DIV: 1581 /* On i386, reversed forms of subM3 and divM3 exist for 1582 MODE_FLOAT, so the same code that works for addM3 and mulM3 1583 can be used. */ 1584 case MULT: 1585 case PLUS: 1586 /* These insns can accept the top of stack as a destination 1587 from a stack reg or mem, or can use the top of stack as a 1588 source and some other stack register (possibly top of stack) 1589 as a destination. */ 1590 1591 src1 = get_true_reg (&XEXP (pat_src, 0)); 1592 src2 = get_true_reg (&XEXP (pat_src, 1)); 1593 1594 /* We will fix any death note later. */ 1595 1596 if (STACK_REG_P (*src1)) 1597 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1598 else 1599 src1_note = NULL_RTX; 1600 if (STACK_REG_P (*src2)) 1601 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); 1602 else 1603 src2_note = NULL_RTX; 1604 1605 /* If either operand is not a stack register, then the dest 1606 must be top of stack. */ 1607 1608 if (! STACK_REG_P (*src1) || ! STACK_REG_P (*src2)) 1609 emit_swap_insn (insn, regstack, *dest); 1610 else 1611 { 1612 /* Both operands are REG. If neither operand is already 1613 at the top of stack, choose to make the one that is the dest 1614 the new top of stack. */ 1615 1616 int src1_hard_regnum, src2_hard_regnum; 1617 1618 src1_hard_regnum = get_hard_regnum (regstack, *src1); 1619 src2_hard_regnum = get_hard_regnum (regstack, *src2); 1620 if (src1_hard_regnum == -1 || src2_hard_regnum == -1) 1621 abort (); 1622 1623 if (src1_hard_regnum != FIRST_STACK_REG 1624 && src2_hard_regnum != FIRST_STACK_REG) 1625 emit_swap_insn (insn, regstack, *dest); 1626 } 1627 1628 if (STACK_REG_P (*src1)) 1629 replace_reg (src1, get_hard_regnum (regstack, *src1)); 1630 if (STACK_REG_P (*src2)) 1631 replace_reg (src2, get_hard_regnum (regstack, *src2)); 1632 1633 if (src1_note) 1634 { 1635 rtx src1_reg = XEXP (src1_note, 0); 1636 1637 /* If the register that dies is at the top of stack, then 1638 the destination is somewhere else - merely substitute it. 1639 But if the reg that dies is not at top of stack, then 1640 move the top of stack to the dead reg, as though we had 1641 done the insn and then a store-with-pop. */ 1642 1643 if (REGNO (src1_reg) == regstack->reg[regstack->top]) 1644 { 1645 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1646 replace_reg (dest, get_hard_regnum (regstack, *dest)); 1647 } 1648 else 1649 { 1650 int regno = get_hard_regnum (regstack, src1_reg); 1651 1652 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1653 replace_reg (dest, regno); 1654 1655 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)] 1656 = regstack->reg[regstack->top]; 1657 } 1658 1659 CLEAR_HARD_REG_BIT (regstack->reg_set, 1660 REGNO (XEXP (src1_note, 0))); 1661 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); 1662 regstack->top--; 1663 } 1664 else if (src2_note) 1665 { 1666 rtx src2_reg = XEXP (src2_note, 0); 1667 if (REGNO (src2_reg) == regstack->reg[regstack->top]) 1668 { 1669 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1670 replace_reg (dest, get_hard_regnum (regstack, *dest)); 1671 } 1672 else 1673 { 1674 int regno = get_hard_regnum (regstack, src2_reg); 1675 1676 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1677 replace_reg (dest, regno); 1678 1679 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)] 1680 = regstack->reg[regstack->top]; 1681 } 1682 1683 CLEAR_HARD_REG_BIT (regstack->reg_set, 1684 REGNO (XEXP (src2_note, 0))); 1685 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG); 1686 regstack->top--; 1687 } 1688 else 1689 { 1690 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1691 replace_reg (dest, get_hard_regnum (regstack, *dest)); 1692 } 1693 1694 /* Keep operand 1 maching with destination. */ 1695 if (GET_RTX_CLASS (GET_CODE (pat_src)) == 'c' 1696 && REG_P (*src1) && REG_P (*src2) 1697 && REGNO (*src1) != REGNO (*dest)) 1698 { 1699 int tmp = REGNO (*src1); 1700 replace_reg (src1, REGNO (*src2)); 1701 replace_reg (src2, tmp); 1702 } 1703 break; 1704 1705 case UNSPEC: 1706 switch (XINT (pat_src, 1)) 1707 { 1708 case 1: /* sin */ 1709 case 2: /* cos */ 1710 /* These insns only operate on the top of the stack. */ 1711 1712 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); 1713 1714 emit_swap_insn (insn, regstack, *src1); 1715 1716 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1717 1718 if (STACK_REG_P (*dest)) 1719 replace_reg (dest, FIRST_STACK_REG); 1720 1721 if (src1_note) 1722 { 1723 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); 1724 regstack->top--; 1725 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1)); 1726 } 1727 1728 replace_reg (src1, FIRST_STACK_REG); 1729 break; 1730 1731 case 10: 1732 /* (unspec [(unspec [(compare ..)] 9)] 10) 1733 Unspec 9 is fnstsw; unspec 10 is sahf. The combination 1734 matches the PPRO fcomi instruction. */ 1735 1736 pat_src = XVECEXP (pat_src, 0, 0); 1737 if (GET_CODE (pat_src) != UNSPEC 1738 || XINT (pat_src, 1) != 9) 1739 abort (); 1740 /* FALLTHRU */ 1741 1742 case 9: 1743 /* (unspec [(compare ..)] 9) */ 1744 /* Combined fcomp+fnstsw generated for doing well with 1745 CSE. When optimizing this would have been broken 1746 up before now. */ 1747 1748 pat_src = XVECEXP (pat_src, 0, 0); 1749 if (GET_CODE (pat_src) != COMPARE) 1750 abort (); 1751 1752 compare_for_stack_reg (insn, regstack, pat_src); 1753 break; 1754 1755 default: 1756 abort (); 1757 } 1758 break; 1759 1760 case IF_THEN_ELSE: 1761 /* This insn requires the top of stack to be the destination. */ 1762 1763 src1 = get_true_reg (&XEXP (pat_src, 1)); 1764 src2 = get_true_reg (&XEXP (pat_src, 2)); 1765 1766 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1767 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); 1768 1769 /* If the comparison operator is an FP comparison operator, 1770 it is handled correctly by compare_for_stack_reg () who 1771 will move the destination to the top of stack. But if the 1772 comparison operator is not an FP comparison operator, we 1773 have to handle it here. */ 1774 if (get_hard_regnum (regstack, *dest) >= FIRST_STACK_REG 1775 && REGNO (*dest) != regstack->reg[regstack->top]) 1776 { 1777 /* In case one of operands is the top of stack and the operands 1778 dies, it is safe to make it the destination operand by reversing 1779 the direction of cmove and avoid fxch. */ 1780 if ((REGNO (*src1) == regstack->reg[regstack->top] 1781 && src1_note) 1782 || (REGNO (*src2) == regstack->reg[regstack->top] 1783 && src2_note)) 1784 { 1785 int idx1 = (get_hard_regnum (regstack, *src1) 1786 - FIRST_STACK_REG); 1787 int idx2 = (get_hard_regnum (regstack, *src2) 1788 - FIRST_STACK_REG); 1789 1790 /* Make reg-stack believe that the operands are already 1791 swapped on the stack */ 1792 regstack->reg[regstack->top - idx1] = REGNO (*src2); 1793 regstack->reg[regstack->top - idx2] = REGNO (*src1); 1794 1795 /* Reverse condition to compensate the operand swap. 1796 i386 do have comparison always reversible. */ 1797 PUT_CODE (XEXP (pat_src, 0), 1798 reversed_comparison_code (XEXP (pat_src, 0), insn)); 1799 } 1800 else 1801 emit_swap_insn (insn, regstack, *dest); 1802 } 1803 1804 { 1805 rtx src_note [3]; 1806 int i; 1807 1808 src_note[0] = 0; 1809 src_note[1] = src1_note; 1810 src_note[2] = src2_note; 1811 1812 if (STACK_REG_P (*src1)) 1813 replace_reg (src1, get_hard_regnum (regstack, *src1)); 1814 if (STACK_REG_P (*src2)) 1815 replace_reg (src2, get_hard_regnum (regstack, *src2)); 1816 1817 for (i = 1; i <= 2; i++) 1818 if (src_note [i]) 1819 { 1820 int regno = REGNO (XEXP (src_note[i], 0)); 1821 1822 /* If the register that dies is not at the top of 1823 stack, then move the top of stack to the dead reg */ 1824 if (regno != regstack->reg[regstack->top]) 1825 { 1826 remove_regno_note (insn, REG_DEAD, regno); 1827 emit_pop_insn (insn, regstack, XEXP (src_note[i], 0), 1828 EMIT_AFTER); 1829 } 1830 else 1831 /* Top of stack never dies, as it is the 1832 destination. */ 1833 abort (); 1834 } 1835 } 1836 1837 /* Make dest the top of stack. Add dest to regstack if 1838 not present. */ 1839 if (get_hard_regnum (regstack, *dest) < FIRST_STACK_REG) 1840 regstack->reg[++regstack->top] = REGNO (*dest); 1841 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1842 replace_reg (dest, FIRST_STACK_REG); 1843 break; 1844 1845 default: 1846 abort (); 1847 } 1848 break; 1849 } 1850 1851 default: 1852 break; 1853 } 1854} 1855 1856/* Substitute hard regnums for any stack regs in INSN, which has 1857 N_INPUTS inputs and N_OUTPUTS outputs. REGSTACK is the stack info 1858 before the insn, and is updated with changes made here. 1859 1860 There are several requirements and assumptions about the use of 1861 stack-like regs in asm statements. These rules are enforced by 1862 record_asm_stack_regs; see comments there for details. Any 1863 asm_operands left in the RTL at this point may be assume to meet the 1864 requirements, since record_asm_stack_regs removes any problem asm. */ 1865 1866static void 1867subst_asm_stack_regs (insn, regstack) 1868 rtx insn; 1869 stack regstack; 1870{ 1871 rtx body = PATTERN (insn); 1872 int alt; 1873 1874 rtx *note_reg; /* Array of note contents */ 1875 rtx **note_loc; /* Address of REG field of each note */ 1876 enum reg_note *note_kind; /* The type of each note */ 1877 1878 rtx *clobber_reg = 0; 1879 rtx **clobber_loc = 0; 1880 1881 struct stack_def temp_stack; 1882 int n_notes; 1883 int n_clobbers; 1884 rtx note; 1885 int i; 1886 int n_inputs, n_outputs; 1887 1888 if (! check_asm_stack_operands (insn)) 1889 return; 1890 1891 /* Find out what the constraints required. If no constraint 1892 alternative matches, that is a compiler bug: we should have caught 1893 such an insn in check_asm_stack_operands. */ 1894 extract_insn (insn); 1895 constrain_operands (1); 1896 alt = which_alternative; 1897 1898 preprocess_constraints (); 1899 1900 n_inputs = get_asm_operand_n_inputs (body); 1901 n_outputs = recog_data.n_operands - n_inputs; 1902 1903 if (alt < 0) 1904 abort (); 1905 1906 /* Strip SUBREGs here to make the following code simpler. */ 1907 for (i = 0; i < recog_data.n_operands; i++) 1908 if (GET_CODE (recog_data.operand[i]) == SUBREG 1909 && GET_CODE (SUBREG_REG (recog_data.operand[i])) == REG) 1910 { 1911 recog_data.operand_loc[i] = & SUBREG_REG (recog_data.operand[i]); 1912 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]); 1913 } 1914 1915 /* Set up NOTE_REG, NOTE_LOC and NOTE_KIND. */ 1916 1917 for (i = 0, note = REG_NOTES (insn); note; note = XEXP (note, 1)) 1918 i++; 1919 1920 note_reg = (rtx *) alloca (i * sizeof (rtx)); 1921 note_loc = (rtx **) alloca (i * sizeof (rtx *)); 1922 note_kind = (enum reg_note *) alloca (i * sizeof (enum reg_note)); 1923 1924 n_notes = 0; 1925 for (note = REG_NOTES (insn); note; note = XEXP (note, 1)) 1926 { 1927 rtx reg = XEXP (note, 0); 1928 rtx *loc = & XEXP (note, 0); 1929 1930 if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG) 1931 { 1932 loc = & SUBREG_REG (reg); 1933 reg = SUBREG_REG (reg); 1934 } 1935 1936 if (STACK_REG_P (reg) 1937 && (REG_NOTE_KIND (note) == REG_DEAD 1938 || REG_NOTE_KIND (note) == REG_UNUSED)) 1939 { 1940 note_reg[n_notes] = reg; 1941 note_loc[n_notes] = loc; 1942 note_kind[n_notes] = REG_NOTE_KIND (note); 1943 n_notes++; 1944 } 1945 } 1946 1947 /* Set up CLOBBER_REG and CLOBBER_LOC. */ 1948 1949 n_clobbers = 0; 1950 1951 if (GET_CODE (body) == PARALLEL) 1952 { 1953 clobber_reg = (rtx *) alloca (XVECLEN (body, 0) * sizeof (rtx)); 1954 clobber_loc = (rtx **) alloca (XVECLEN (body, 0) * sizeof (rtx *)); 1955 1956 for (i = 0; i < XVECLEN (body, 0); i++) 1957 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER) 1958 { 1959 rtx clobber = XVECEXP (body, 0, i); 1960 rtx reg = XEXP (clobber, 0); 1961 rtx *loc = & XEXP (clobber, 0); 1962 1963 if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG) 1964 { 1965 loc = & SUBREG_REG (reg); 1966 reg = SUBREG_REG (reg); 1967 } 1968 1969 if (STACK_REG_P (reg)) 1970 { 1971 clobber_reg[n_clobbers] = reg; 1972 clobber_loc[n_clobbers] = loc; 1973 n_clobbers++; 1974 } 1975 } 1976 } 1977 1978 temp_stack = *regstack; 1979 1980 /* Put the input regs into the desired place in TEMP_STACK. */ 1981 1982 for (i = n_outputs; i < n_outputs + n_inputs; i++) 1983 if (STACK_REG_P (recog_data.operand[i]) 1984 && reg_class_subset_p (recog_op_alt[i][alt].class, 1985 FLOAT_REGS) 1986 && recog_op_alt[i][alt].class != FLOAT_REGS) 1987 { 1988 /* If an operand needs to be in a particular reg in 1989 FLOAT_REGS, the constraint was either 't' or 'u'. Since 1990 these constraints are for single register classes, and 1991 reload guaranteed that operand[i] is already in that class, 1992 we can just use REGNO (recog_data.operand[i]) to know which 1993 actual reg this operand needs to be in. */ 1994 1995 int regno = get_hard_regnum (&temp_stack, recog_data.operand[i]); 1996 1997 if (regno < 0) 1998 abort (); 1999 2000 if ((unsigned int) regno != REGNO (recog_data.operand[i])) 2001 { 2002 /* recog_data.operand[i] is not in the right place. Find 2003 it and swap it with whatever is already in I's place. 2004 K is where recog_data.operand[i] is now. J is where it 2005 should be. */ 2006 int j, k, temp; 2007 2008 k = temp_stack.top - (regno - FIRST_STACK_REG); 2009 j = (temp_stack.top 2010 - (REGNO (recog_data.operand[i]) - FIRST_STACK_REG)); 2011 2012 temp = temp_stack.reg[k]; 2013 temp_stack.reg[k] = temp_stack.reg[j]; 2014 temp_stack.reg[j] = temp; 2015 } 2016 } 2017 2018 /* Emit insns before INSN to make sure the reg-stack is in the right 2019 order. */ 2020 2021 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE); 2022 2023 /* Make the needed input register substitutions. Do death notes and 2024 clobbers too, because these are for inputs, not outputs. */ 2025 2026 for (i = n_outputs; i < n_outputs + n_inputs; i++) 2027 if (STACK_REG_P (recog_data.operand[i])) 2028 { 2029 int regnum = get_hard_regnum (regstack, recog_data.operand[i]); 2030 2031 if (regnum < 0) 2032 abort (); 2033 2034 replace_reg (recog_data.operand_loc[i], regnum); 2035 } 2036 2037 for (i = 0; i < n_notes; i++) 2038 if (note_kind[i] == REG_DEAD) 2039 { 2040 int regnum = get_hard_regnum (regstack, note_reg[i]); 2041 2042 if (regnum < 0) 2043 abort (); 2044 2045 replace_reg (note_loc[i], regnum); 2046 } 2047 2048 for (i = 0; i < n_clobbers; i++) 2049 { 2050 /* It's OK for a CLOBBER to reference a reg that is not live. 2051 Don't try to replace it in that case. */ 2052 int regnum = get_hard_regnum (regstack, clobber_reg[i]); 2053 2054 if (regnum >= 0) 2055 { 2056 /* Sigh - clobbers always have QImode. But replace_reg knows 2057 that these regs can't be MODE_INT and will abort. Just put 2058 the right reg there without calling replace_reg. */ 2059 2060 *clobber_loc[i] = FP_MODE_REG (regnum, DFmode); 2061 } 2062 } 2063 2064 /* Now remove from REGSTACK any inputs that the asm implicitly popped. */ 2065 2066 for (i = n_outputs; i < n_outputs + n_inputs; i++) 2067 if (STACK_REG_P (recog_data.operand[i])) 2068 { 2069 /* An input reg is implicitly popped if it is tied to an 2070 output, or if there is a CLOBBER for it. */ 2071 int j; 2072 2073 for (j = 0; j < n_clobbers; j++) 2074 if (operands_match_p (clobber_reg[j], recog_data.operand[i])) 2075 break; 2076 2077 if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0) 2078 { 2079 /* recog_data.operand[i] might not be at the top of stack. 2080 But that's OK, because all we need to do is pop the 2081 right number of regs off of the top of the reg-stack. 2082 record_asm_stack_regs guaranteed that all implicitly 2083 popped regs were grouped at the top of the reg-stack. */ 2084 2085 CLEAR_HARD_REG_BIT (regstack->reg_set, 2086 regstack->reg[regstack->top]); 2087 regstack->top--; 2088 } 2089 } 2090 2091 /* Now add to REGSTACK any outputs that the asm implicitly pushed. 2092 Note that there isn't any need to substitute register numbers. 2093 ??? Explain why this is true. */ 2094 2095 for (i = LAST_STACK_REG; i >= FIRST_STACK_REG; i--) 2096 { 2097 /* See if there is an output for this hard reg. */ 2098 int j; 2099 2100 for (j = 0; j < n_outputs; j++) 2101 if (STACK_REG_P (recog_data.operand[j]) 2102 && REGNO (recog_data.operand[j]) == (unsigned) i) 2103 { 2104 regstack->reg[++regstack->top] = i; 2105 SET_HARD_REG_BIT (regstack->reg_set, i); 2106 break; 2107 } 2108 } 2109 2110 /* Now emit a pop insn for any REG_UNUSED output, or any REG_DEAD 2111 input that the asm didn't implicitly pop. If the asm didn't 2112 implicitly pop an input reg, that reg will still be live. 2113 2114 Note that we can't use find_regno_note here: the register numbers 2115 in the death notes have already been substituted. */ 2116 2117 for (i = 0; i < n_outputs; i++) 2118 if (STACK_REG_P (recog_data.operand[i])) 2119 { 2120 int j; 2121 2122 for (j = 0; j < n_notes; j++) 2123 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j]) 2124 && note_kind[j] == REG_UNUSED) 2125 { 2126 insn = emit_pop_insn (insn, regstack, recog_data.operand[i], 2127 EMIT_AFTER); 2128 break; 2129 } 2130 } 2131 2132 for (i = n_outputs; i < n_outputs + n_inputs; i++) 2133 if (STACK_REG_P (recog_data.operand[i])) 2134 { 2135 int j; 2136 2137 for (j = 0; j < n_notes; j++) 2138 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j]) 2139 && note_kind[j] == REG_DEAD 2140 && TEST_HARD_REG_BIT (regstack->reg_set, 2141 REGNO (recog_data.operand[i]))) 2142 { 2143 insn = emit_pop_insn (insn, regstack, recog_data.operand[i], 2144 EMIT_AFTER); 2145 break; 2146 } 2147 } 2148} 2149 2150/* Substitute stack hard reg numbers for stack virtual registers in 2151 INSN. Non-stack register numbers are not changed. REGSTACK is the 2152 current stack content. Insns may be emitted as needed to arrange the 2153 stack for the 387 based on the contents of the insn. */ 2154 2155static void 2156subst_stack_regs (insn, regstack) 2157 rtx insn; 2158 stack regstack; 2159{ 2160 rtx *note_link, note; 2161 int i; 2162 2163 if (GET_CODE (insn) == CALL_INSN) 2164 { 2165 int top = regstack->top; 2166 2167 /* If there are any floating point parameters to be passed in 2168 registers for this call, make sure they are in the right 2169 order. */ 2170 2171 if (top >= 0) 2172 { 2173 straighten_stack (PREV_INSN (insn), regstack); 2174 2175 /* Now mark the arguments as dead after the call. */ 2176 2177 while (regstack->top >= 0) 2178 { 2179 CLEAR_HARD_REG_BIT (regstack->reg_set, FIRST_STACK_REG + regstack->top); 2180 regstack->top--; 2181 } 2182 } 2183 } 2184 2185 /* Do the actual substitution if any stack regs are mentioned. 2186 Since we only record whether entire insn mentions stack regs, and 2187 subst_stack_regs_pat only works for patterns that contain stack regs, 2188 we must check each pattern in a parallel here. A call_value_pop could 2189 fail otherwise. */ 2190 2191 if (stack_regs_mentioned (insn)) 2192 { 2193 int n_operands = asm_noperands (PATTERN (insn)); 2194 if (n_operands >= 0) 2195 { 2196 /* This insn is an `asm' with operands. Decode the operands, 2197 decide how many are inputs, and do register substitution. 2198 Any REG_UNUSED notes will be handled by subst_asm_stack_regs. */ 2199 2200 subst_asm_stack_regs (insn, regstack); 2201 return; 2202 } 2203 2204 if (GET_CODE (PATTERN (insn)) == PARALLEL) 2205 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++) 2206 { 2207 if (stack_regs_mentioned_p (XVECEXP (PATTERN (insn), 0, i))) 2208 subst_stack_regs_pat (insn, regstack, 2209 XVECEXP (PATTERN (insn), 0, i)); 2210 } 2211 else 2212 subst_stack_regs_pat (insn, regstack, PATTERN (insn)); 2213 } 2214 2215 /* subst_stack_regs_pat may have deleted a no-op insn. If so, any 2216 REG_UNUSED will already have been dealt with, so just return. */ 2217 2218 if (GET_CODE (insn) == NOTE || INSN_DELETED_P (insn)) 2219 return; 2220 2221 /* If there is a REG_UNUSED note on a stack register on this insn, 2222 the indicated reg must be popped. The REG_UNUSED note is removed, 2223 since the form of the newly emitted pop insn references the reg, 2224 making it no longer `unset'. */ 2225 2226 note_link = ®_NOTES (insn); 2227 for (note = *note_link; note; note = XEXP (note, 1)) 2228 if (REG_NOTE_KIND (note) == REG_UNUSED && STACK_REG_P (XEXP (note, 0))) 2229 { 2230 *note_link = XEXP (note, 1); 2231 insn = emit_pop_insn (insn, regstack, XEXP (note, 0), EMIT_AFTER); 2232 } 2233 else 2234 note_link = &XEXP (note, 1); 2235} 2236 2237/* Change the organization of the stack so that it fits a new basic 2238 block. Some registers might have to be popped, but there can never be 2239 a register live in the new block that is not now live. 2240 2241 Insert any needed insns before or after INSN, as indicated by 2242 WHERE. OLD is the original stack layout, and NEW is the desired 2243 form. OLD is updated to reflect the code emitted, ie, it will be 2244 the same as NEW upon return. 2245 2246 This function will not preserve block_end[]. But that information 2247 is no longer needed once this has executed. */ 2248 2249static void 2250change_stack (insn, old, new, where) 2251 rtx insn; 2252 stack old; 2253 stack new; 2254 enum emit_where where; 2255{ 2256 int reg; 2257 int update_end = 0; 2258 2259 /* We will be inserting new insns "backwards". If we are to insert 2260 after INSN, find the next insn, and insert before it. */ 2261 2262 if (where == EMIT_AFTER) 2263 { 2264 if (current_block && current_block->end == insn) 2265 update_end = 1; 2266 insn = NEXT_INSN (insn); 2267 } 2268 2269 /* Pop any registers that are not needed in the new block. */ 2270 2271 for (reg = old->top; reg >= 0; reg--) 2272 if (! TEST_HARD_REG_BIT (new->reg_set, old->reg[reg])) 2273 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[reg], DFmode), 2274 EMIT_BEFORE); 2275 2276 if (new->top == -2) 2277 { 2278 /* If the new block has never been processed, then it can inherit 2279 the old stack order. */ 2280 2281 new->top = old->top; 2282 memcpy (new->reg, old->reg, sizeof (new->reg)); 2283 } 2284 else 2285 { 2286 /* This block has been entered before, and we must match the 2287 previously selected stack order. */ 2288 2289 /* By now, the only difference should be the order of the stack, 2290 not their depth or liveliness. */ 2291 2292 GO_IF_HARD_REG_EQUAL (old->reg_set, new->reg_set, win); 2293 abort (); 2294 win: 2295 if (old->top != new->top) 2296 abort (); 2297 2298 /* If the stack is not empty (new->top != -1), loop here emitting 2299 swaps until the stack is correct. 2300 2301 The worst case number of swaps emitted is N + 2, where N is the 2302 depth of the stack. In some cases, the reg at the top of 2303 stack may be correct, but swapped anyway in order to fix 2304 other regs. But since we never swap any other reg away from 2305 its correct slot, this algorithm will converge. */ 2306 2307 if (new->top != -1) 2308 do 2309 { 2310 /* Swap the reg at top of stack into the position it is 2311 supposed to be in, until the correct top of stack appears. */ 2312 2313 while (old->reg[old->top] != new->reg[new->top]) 2314 { 2315 for (reg = new->top; reg >= 0; reg--) 2316 if (new->reg[reg] == old->reg[old->top]) 2317 break; 2318 2319 if (reg == -1) 2320 abort (); 2321 2322 emit_swap_insn (insn, old, 2323 FP_MODE_REG (old->reg[reg], DFmode)); 2324 } 2325 2326 /* See if any regs remain incorrect. If so, bring an 2327 incorrect reg to the top of stack, and let the while loop 2328 above fix it. */ 2329 2330 for (reg = new->top; reg >= 0; reg--) 2331 if (new->reg[reg] != old->reg[reg]) 2332 { 2333 emit_swap_insn (insn, old, 2334 FP_MODE_REG (old->reg[reg], DFmode)); 2335 break; 2336 } 2337 } while (reg >= 0); 2338 2339 /* At this point there must be no differences. */ 2340 2341 for (reg = old->top; reg >= 0; reg--) 2342 if (old->reg[reg] != new->reg[reg]) 2343 abort (); 2344 } 2345 2346 if (update_end) 2347 current_block->end = PREV_INSN (insn); 2348} 2349 2350/* Print stack configuration. */ 2351 2352static void 2353print_stack (file, s) 2354 FILE *file; 2355 stack s; 2356{ 2357 if (! file) 2358 return; 2359 2360 if (s->top == -2) 2361 fprintf (file, "uninitialized\n"); 2362 else if (s->top == -1) 2363 fprintf (file, "empty\n"); 2364 else 2365 { 2366 int i; 2367 fputs ("[ ", file); 2368 for (i = 0; i <= s->top; ++i) 2369 fprintf (file, "%d ", s->reg[i]); 2370 fputs ("]\n", file); 2371 } 2372} 2373 2374/* This function was doing life analysis. We now let the regular live 2375 code do it's job, so we only need to check some extra invariants 2376 that reg-stack expects. Primary among these being that all registers 2377 are initialized before use. 2378 2379 The function returns true when code was emitted to CFG edges and 2380 commit_edge_insertions needs to be called. */ 2381 2382static int 2383convert_regs_entry () 2384{ 2385 int inserted = 0, i; 2386 edge e; 2387 2388 for (i = n_basic_blocks - 1; i >= 0; --i) 2389 { 2390 basic_block block = BASIC_BLOCK (i); 2391 block_info bi = BLOCK_INFO (block); 2392 int reg; 2393 2394 /* Set current register status at last instruction `uninitialized'. */ 2395 bi->stack_in.top = -2; 2396 2397 /* Copy live_at_end and live_at_start into temporaries. */ 2398 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; reg++) 2399 { 2400 if (REGNO_REG_SET_P (block->global_live_at_end, reg)) 2401 SET_HARD_REG_BIT (bi->out_reg_set, reg); 2402 if (REGNO_REG_SET_P (block->global_live_at_start, reg)) 2403 SET_HARD_REG_BIT (bi->stack_in.reg_set, reg); 2404 } 2405 } 2406 2407 /* Load something into each stack register live at function entry. 2408 Such live registers can be caused by uninitialized variables or 2409 functions not returning values on all paths. In order to keep 2410 the push/pop code happy, and to not scrog the register stack, we 2411 must put something in these registers. Use a QNaN. 2412 2413 Note that we are insertting converted code here. This code is 2414 never seen by the convert_regs pass. */ 2415 2416 for (e = ENTRY_BLOCK_PTR->succ; e ; e = e->succ_next) 2417 { 2418 basic_block block = e->dest; 2419 block_info bi = BLOCK_INFO (block); 2420 int reg, top = -1; 2421 2422 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg) 2423 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg)) 2424 { 2425 rtx init; 2426 2427 bi->stack_in.reg[++top] = reg; 2428 2429 init = gen_rtx_SET (VOIDmode, 2430 FP_MODE_REG (FIRST_STACK_REG, SFmode), 2431 nan); 2432 insert_insn_on_edge (init, e); 2433 inserted = 1; 2434 } 2435 2436 bi->stack_in.top = top; 2437 } 2438 2439 return inserted; 2440} 2441 2442/* Construct the desired stack for function exit. This will either 2443 be `empty', or the function return value at top-of-stack. */ 2444 2445static void 2446convert_regs_exit () 2447{ 2448 int value_reg_low, value_reg_high; 2449 stack output_stack; 2450 rtx retvalue; 2451 2452 retvalue = stack_result (current_function_decl); 2453 value_reg_low = value_reg_high = -1; 2454 if (retvalue) 2455 { 2456 value_reg_low = REGNO (retvalue); 2457 value_reg_high = value_reg_low 2458 + HARD_REGNO_NREGS (value_reg_low, GET_MODE (retvalue)) - 1; 2459 } 2460 2461 output_stack = &BLOCK_INFO (EXIT_BLOCK_PTR)->stack_in; 2462 if (value_reg_low == -1) 2463 output_stack->top = -1; 2464 else 2465 { 2466 int reg; 2467 2468 output_stack->top = value_reg_high - value_reg_low; 2469 for (reg = value_reg_low; reg <= value_reg_high; ++reg) 2470 { 2471 output_stack->reg[reg - value_reg_low] = reg; 2472 SET_HARD_REG_BIT (output_stack->reg_set, reg); 2473 } 2474 } 2475} 2476 2477/* Adjust the stack of this block on exit to match the stack of the 2478 target block, or copy stack info into the stack of the successor 2479 of the successor hasn't been processed yet. */ 2480static bool 2481compensate_edge (e, file) 2482 edge e; 2483 FILE *file; 2484{ 2485 basic_block block = e->src, target = e->dest; 2486 block_info bi = BLOCK_INFO (block); 2487 struct stack_def regstack, tmpstack; 2488 stack target_stack = &BLOCK_INFO (target)->stack_in; 2489 int reg; 2490 2491 current_block = block; 2492 regstack = bi->stack_out; 2493 if (file) 2494 fprintf (file, "Edge %d->%d: ", block->index, target->index); 2495 2496 if (target_stack->top == -2) 2497 { 2498 /* The target block hasn't had a stack order selected. 2499 We need merely ensure that no pops are needed. */ 2500 for (reg = regstack.top; reg >= 0; --reg) 2501 if (!TEST_HARD_REG_BIT (target_stack->reg_set, regstack.reg[reg])) 2502 break; 2503 2504 if (reg == -1) 2505 { 2506 if (file) 2507 fprintf (file, "new block; copying stack position\n"); 2508 2509 /* change_stack kills values in regstack. */ 2510 tmpstack = regstack; 2511 2512 change_stack (block->end, &tmpstack, target_stack, EMIT_AFTER); 2513 return false; 2514 } 2515 2516 if (file) 2517 fprintf (file, "new block; pops needed\n"); 2518 } 2519 else 2520 { 2521 if (target_stack->top == regstack.top) 2522 { 2523 for (reg = target_stack->top; reg >= 0; --reg) 2524 if (target_stack->reg[reg] != regstack.reg[reg]) 2525 break; 2526 2527 if (reg == -1) 2528 { 2529 if (file) 2530 fprintf (file, "no changes needed\n"); 2531 return false; 2532 } 2533 } 2534 2535 if (file) 2536 { 2537 fprintf (file, "correcting stack to "); 2538 print_stack (file, target_stack); 2539 } 2540 } 2541 2542 /* Care for non-call EH edges specially. The normal return path have 2543 values in registers. These will be popped en masse by the unwind 2544 library. */ 2545 if ((e->flags & (EDGE_EH | EDGE_ABNORMAL_CALL)) == EDGE_EH) 2546 target_stack->top = -1; 2547 2548 /* Other calls may appear to have values live in st(0), but the 2549 abnormal return path will not have actually loaded the values. */ 2550 else if (e->flags & EDGE_ABNORMAL_CALL) 2551 { 2552 /* Assert that the lifetimes are as we expect -- one value 2553 live at st(0) on the end of the source block, and no 2554 values live at the beginning of the destination block. */ 2555 HARD_REG_SET tmp; 2556 2557 CLEAR_HARD_REG_SET (tmp); 2558 GO_IF_HARD_REG_EQUAL (target_stack->reg_set, tmp, eh1); 2559 abort (); 2560 eh1: 2561 2562 SET_HARD_REG_BIT (tmp, FIRST_STACK_REG); 2563 GO_IF_HARD_REG_EQUAL (regstack.reg_set, tmp, eh2); 2564 abort (); 2565 eh2: 2566 2567 target_stack->top = -1; 2568 } 2569 2570 /* It is better to output directly to the end of the block 2571 instead of to the edge, because emit_swap can do minimal 2572 insn scheduling. We can do this when there is only one 2573 edge out, and it is not abnormal. */ 2574 else if (block->succ->succ_next == NULL && !(e->flags & EDGE_ABNORMAL)) 2575 { 2576 /* change_stack kills values in regstack. */ 2577 tmpstack = regstack; 2578 2579 change_stack (block->end, &tmpstack, target_stack, 2580 (GET_CODE (block->end) == JUMP_INSN 2581 ? EMIT_BEFORE : EMIT_AFTER)); 2582 } 2583 else 2584 { 2585 rtx seq, after; 2586 2587 /* We don't support abnormal edges. Global takes care to 2588 avoid any live register across them, so we should never 2589 have to insert instructions on such edges. */ 2590 if (e->flags & EDGE_ABNORMAL) 2591 abort (); 2592 2593 current_block = NULL; 2594 start_sequence (); 2595 2596 /* ??? change_stack needs some point to emit insns after. 2597 Also needed to keep gen_sequence from returning a 2598 pattern as opposed to a sequence, which would lose 2599 REG_DEAD notes. */ 2600 after = emit_note (NULL, NOTE_INSN_DELETED); 2601 2602 tmpstack = regstack; 2603 change_stack (after, &tmpstack, target_stack, EMIT_BEFORE); 2604 2605 seq = gen_sequence (); 2606 end_sequence (); 2607 2608 insert_insn_on_edge (seq, e); 2609 return true; 2610 } 2611 return false; 2612} 2613 2614/* Convert stack register references in one block. */ 2615 2616static int 2617convert_regs_1 (file, block) 2618 FILE *file; 2619 basic_block block; 2620{ 2621 struct stack_def regstack; 2622 block_info bi = BLOCK_INFO (block); 2623 int inserted, reg; 2624 rtx insn, next; 2625 edge e, beste = NULL; 2626 2627 inserted = 0; 2628 2629 /* Find the edge we will copy stack from. It should be the most frequent 2630 one as it will get cheapest after compensation code is generated, 2631 if multiple such exists, take one with largest count, prefer critical 2632 one (as splitting critical edges is more expensive), or one with lowest 2633 index, to avoid random changes with different orders of the edges. */ 2634 for (e = block->pred; e ; e = e->pred_next) 2635 { 2636 if (e->flags & EDGE_DFS_BACK) 2637 ; 2638 else if (! beste) 2639 beste = e; 2640 else if (EDGE_FREQUENCY (beste) < EDGE_FREQUENCY (e)) 2641 beste = e; 2642 else if (EDGE_FREQUENCY (beste) > EDGE_FREQUENCY (e)) 2643 ; 2644 else if (beste->count < e->count) 2645 beste = e; 2646 else if (beste->count > e->count) 2647 ; 2648 else if ((EDGE_CRITICAL_P (e) != 0) 2649 != (EDGE_CRITICAL_P (beste) != 0)) 2650 { 2651 if (EDGE_CRITICAL_P (e)) 2652 beste = e; 2653 } 2654 else if (e->src->index < beste->src->index) 2655 beste = e; 2656 } 2657 2658 /* Entry block does have stack already initialized. */ 2659 if (bi->stack_in.top == -2) 2660 inserted |= compensate_edge (beste, file); 2661 else 2662 beste = NULL; 2663 2664 current_block = block; 2665 2666 if (file) 2667 { 2668 fprintf (file, "\nBasic block %d\nInput stack: ", block->index); 2669 print_stack (file, &bi->stack_in); 2670 } 2671 2672 /* Process all insns in this block. Keep track of NEXT so that we 2673 don't process insns emitted while substituting in INSN. */ 2674 next = block->head; 2675 regstack = bi->stack_in; 2676 do 2677 { 2678 insn = next; 2679 next = NEXT_INSN (insn); 2680 2681 /* Ensure we have not missed a block boundary. */ 2682 if (next == NULL) 2683 abort (); 2684 if (insn == block->end) 2685 next = NULL; 2686 2687 /* Don't bother processing unless there is a stack reg 2688 mentioned or if it's a CALL_INSN. */ 2689 if (stack_regs_mentioned (insn) 2690 || GET_CODE (insn) == CALL_INSN) 2691 { 2692 if (file) 2693 { 2694 fprintf (file, " insn %d input stack: ", 2695 INSN_UID (insn)); 2696 print_stack (file, ®stack); 2697 } 2698 subst_stack_regs (insn, ®stack); 2699 } 2700 } 2701 while (next); 2702 2703 if (file) 2704 { 2705 fprintf (file, "Expected live registers ["); 2706 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg) 2707 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg)) 2708 fprintf (file, " %d", reg); 2709 fprintf (file, " ]\nOutput stack: "); 2710 print_stack (file, ®stack); 2711 } 2712 2713 insn = block->end; 2714 if (GET_CODE (insn) == JUMP_INSN) 2715 insn = PREV_INSN (insn); 2716 2717 /* If the function is declared to return a value, but it returns one 2718 in only some cases, some registers might come live here. Emit 2719 necessary moves for them. */ 2720 2721 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg) 2722 { 2723 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg) 2724 && ! TEST_HARD_REG_BIT (regstack.reg_set, reg)) 2725 { 2726 rtx set; 2727 2728 if (file) 2729 { 2730 fprintf (file, "Emitting insn initializing reg %d\n", 2731 reg); 2732 } 2733 2734 set = gen_rtx_SET (VOIDmode, FP_MODE_REG (reg, SFmode), 2735 nan); 2736 insn = emit_insn_after (set, insn); 2737 subst_stack_regs (insn, ®stack); 2738 } 2739 } 2740 2741 /* Something failed if the stack lives don't match. */ 2742 GO_IF_HARD_REG_EQUAL (regstack.reg_set, bi->out_reg_set, win); 2743 abort (); 2744 win: 2745 bi->stack_out = regstack; 2746 2747 /* Compensate the back edges, as those wasn't visited yet. */ 2748 for (e = block->succ; e ; e = e->succ_next) 2749 { 2750 if (e->flags & EDGE_DFS_BACK 2751 || (e->dest == EXIT_BLOCK_PTR)) 2752 { 2753 if (!BLOCK_INFO (e->dest)->done 2754 && e->dest != block) 2755 abort (); 2756 inserted |= compensate_edge (e, file); 2757 } 2758 } 2759 for (e = block->pred; e ; e = e->pred_next) 2760 { 2761 if (e != beste && !(e->flags & EDGE_DFS_BACK) 2762 && e->src != ENTRY_BLOCK_PTR) 2763 { 2764 if (!BLOCK_INFO (e->src)->done) 2765 abort (); 2766 inserted |= compensate_edge (e, file); 2767 } 2768 } 2769 2770 return inserted; 2771} 2772 2773/* Convert registers in all blocks reachable from BLOCK. */ 2774 2775static int 2776convert_regs_2 (file, block) 2777 FILE *file; 2778 basic_block block; 2779{ 2780 basic_block *stack, *sp; 2781 int inserted; 2782 2783 stack = (basic_block *) xmalloc (sizeof (*stack) * n_basic_blocks); 2784 sp = stack; 2785 2786 *sp++ = block; 2787 2788 inserted = 0; 2789 do 2790 { 2791 edge e; 2792 2793 block = *--sp; 2794 inserted |= convert_regs_1 (file, block); 2795 BLOCK_INFO (block)->done = 1; 2796 2797 for (e = block->succ; e ; e = e->succ_next) 2798 if (! (e->flags & EDGE_DFS_BACK)) 2799 { 2800 BLOCK_INFO (e->dest)->predecessors--; 2801 if (!BLOCK_INFO (e->dest)->predecessors) 2802 *sp++ = e->dest; 2803 } 2804 } 2805 while (sp != stack); 2806 2807 return inserted; 2808} 2809 2810/* Traverse all basic blocks in a function, converting the register 2811 references in each insn from the "flat" register file that gcc uses, 2812 to the stack-like registers the 387 uses. */ 2813 2814static int 2815convert_regs (file) 2816 FILE *file; 2817{ 2818 int inserted, i; 2819 edge e; 2820 2821 /* Initialize uninitialized registers on function entry. */ 2822 inserted = convert_regs_entry (); 2823 2824 /* Construct the desired stack for function exit. */ 2825 convert_regs_exit (); 2826 BLOCK_INFO (EXIT_BLOCK_PTR)->done = 1; 2827 2828 /* ??? Future: process inner loops first, and give them arbitrary 2829 initial stacks which emit_swap_insn can modify. This ought to 2830 prevent double fxch that aften appears at the head of a loop. */ 2831 2832 /* Process all blocks reachable from all entry points. */ 2833 for (e = ENTRY_BLOCK_PTR->succ; e ; e = e->succ_next) 2834 inserted |= convert_regs_2 (file, e->dest); 2835 2836 /* ??? Process all unreachable blocks. Though there's no excuse 2837 for keeping these even when not optimizing. */ 2838 for (i = 0; i < n_basic_blocks; ++i) 2839 { 2840 basic_block b = BASIC_BLOCK (i); 2841 block_info bi = BLOCK_INFO (b); 2842 2843 if (! bi->done) 2844 { 2845 int reg; 2846 2847 /* Create an arbitrary input stack. */ 2848 bi->stack_in.top = -1; 2849 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg) 2850 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg)) 2851 bi->stack_in.reg[++bi->stack_in.top] = reg; 2852 2853 inserted |= convert_regs_2 (file, b); 2854 } 2855 } 2856 2857 if (inserted) 2858 commit_edge_insertions (); 2859 2860 if (file) 2861 fputc ('\n', file); 2862 2863 return inserted; 2864} 2865#endif /* STACK_REGS */ 2866