reg-stack.c revision 52284
1/* Register to Stack convert for GNU compiler.
2   Copyright (C) 1992, 93-98, 1999 Free Software Foundation, Inc.
3
4This file is part of GNU CC.
5
6GNU CC is free software; you can redistribute it and/or modify
7it under the terms of the GNU General Public License as published by
8the Free Software Foundation; either version 2, or (at your option)
9any later version.
10
11GNU CC is distributed in the hope that it will be useful,
12but WITHOUT ANY WARRANTY; without even the implied warranty of
13MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14GNU General Public License for more details.
15
16You should have received a copy of the GNU General Public License
17along with GNU CC; see the file COPYING.  If not, write to
18the Free Software Foundation, 59 Temple Place - Suite 330,
19Boston, MA 02111-1307, USA.  */
20
21/* This pass converts stack-like registers from the "flat register
22   file" model that gcc uses, to a stack convention that the 387 uses.
23
24   * The form of the input:
25
26   On input, the function consists of insn that have had their
27   registers fully allocated to a set of "virtual" registers.  Note that
28   the word "virtual" is used differently here than elsewhere in gcc: for
29   each virtual stack reg, there is a hard reg, but the mapping between
30   them is not known until this pass is run.  On output, hard register
31   numbers have been substituted, and various pop and exchange insns have
32   been emitted.  The hard register numbers and the virtual register
33   numbers completely overlap - before this pass, all stack register
34   numbers are virtual, and afterward they are all hard.
35
36   The virtual registers can be manipulated normally by gcc, and their
37   semantics are the same as for normal registers.  After the hard
38   register numbers are substituted, the semantics of an insn containing
39   stack-like regs are not the same as for an insn with normal regs: for
40   instance, it is not safe to delete an insn that appears to be a no-op
41   move.  In general, no insn containing hard regs should be changed
42   after this pass is done.
43
44   * The form of the output:
45
46   After this pass, hard register numbers represent the distance from
47   the current top of stack to the desired register.  A reference to
48   FIRST_STACK_REG references the top of stack, FIRST_STACK_REG + 1,
49   represents the register just below that, and so forth.  Also, REG_DEAD
50   notes indicate whether or not a stack register should be popped.
51
52   A "swap" insn looks like a parallel of two patterns, where each
53   pattern is a SET: one sets A to B, the other B to A.
54
55   A "push" or "load" insn is a SET whose SET_DEST is FIRST_STACK_REG
56   and whose SET_DEST is REG or MEM.  Any other SET_DEST, such as PLUS,
57   will replace the existing stack top, not push a new value.
58
59   A store insn is a SET whose SET_DEST is FIRST_STACK_REG, and whose
60   SET_SRC is REG or MEM.
61
62   The case where the SET_SRC and SET_DEST are both FIRST_STACK_REG
63   appears ambiguous.  As a special case, the presence of a REG_DEAD note
64   for FIRST_STACK_REG differentiates between a load insn and a pop.
65
66   If a REG_DEAD is present, the insn represents a "pop" that discards
67   the top of the register stack.  If there is no REG_DEAD note, then the
68   insn represents a "dup" or a push of the current top of stack onto the
69   stack.
70
71   * Methodology:
72
73   Existing REG_DEAD and REG_UNUSED notes for stack registers are
74   deleted and recreated from scratch.  REG_DEAD is never created for a
75   SET_DEST, only REG_UNUSED.
76
77   * asm_operands:
78
79   There are several rules on the usage of stack-like regs in
80   asm_operands insns.  These rules apply only to the operands that are
81   stack-like regs:
82
83   1. Given a set of input regs that die in an asm_operands, it is
84      necessary to know which are implicitly popped by the asm, and
85      which must be explicitly popped by gcc.
86
87	An input reg that is implicitly popped by the asm must be
88	explicitly clobbered, unless it is constrained to match an
89	output operand.
90
91   2. For any input reg that is implicitly popped by an asm, it is
92      necessary to know how to adjust the stack to compensate for the pop.
93      If any non-popped input is closer to the top of the reg-stack than
94      the implicitly popped reg, it would not be possible to know what the
95      stack looked like - it's not clear how the rest of the stack "slides
96      up".
97
98	All implicitly popped input regs must be closer to the top of
99	the reg-stack than any input that is not implicitly popped.
100
101   3. It is possible that if an input dies in an insn, reload might
102      use the input reg for an output reload.  Consider this example:
103
104		asm ("foo" : "=t" (a) : "f" (b));
105
106      This asm says that input B is not popped by the asm, and that
107      the asm pushes a result onto the reg-stack, ie, the stack is one
108      deeper after the asm than it was before.  But, it is possible that
109      reload will think that it can use the same reg for both the input and
110      the output, if input B dies in this insn.
111
112	If any input operand uses the "f" constraint, all output reg
113	constraints must use the "&" earlyclobber.
114
115      The asm above would be written as
116
117		asm ("foo" : "=&t" (a) : "f" (b));
118
119   4. Some operands need to be in particular places on the stack.  All
120      output operands fall in this category - there is no other way to
121      know which regs the outputs appear in unless the user indicates
122      this in the constraints.
123
124	Output operands must specifically indicate which reg an output
125	appears in after an asm.  "=f" is not allowed: the operand
126	constraints must select a class with a single reg.
127
128   5. Output operands may not be "inserted" between existing stack regs.
129      Since no 387 opcode uses a read/write operand, all output operands
130      are dead before the asm_operands, and are pushed by the asm_operands.
131      It makes no sense to push anywhere but the top of the reg-stack.
132
133	Output operands must start at the top of the reg-stack: output
134	operands may not "skip" a reg.
135
136   6. Some asm statements may need extra stack space for internal
137      calculations.  This can be guaranteed by clobbering stack registers
138      unrelated to the inputs and outputs.
139
140   Here are a couple of reasonable asms to want to write.  This asm
141   takes one input, which is internally popped, and produces two outputs.
142
143	asm ("fsincos" : "=t" (cos), "=u" (sin) : "0" (inp));
144
145   This asm takes two inputs, which are popped by the fyl2xp1 opcode,
146   and replaces them with one output.  The user must code the "st(1)"
147   clobber for reg-stack.c to know that fyl2xp1 pops both inputs.
148
149	asm ("fyl2xp1" : "=t" (result) : "0" (x), "u" (y) : "st(1)");
150
151   */
152
153#include "config.h"
154#include "system.h"
155#include "tree.h"
156#include "rtl.h"
157#include "insn-config.h"
158#include "regs.h"
159#include "hard-reg-set.h"
160#include "flags.h"
161#include "insn-flags.h"
162#include "recog.h"
163#include "toplev.h"
164#include "varray.h"
165
166#ifdef STACK_REGS
167
168#define REG_STACK_SIZE (LAST_STACK_REG - FIRST_STACK_REG + 1)
169
170/* This is the basic stack record.  TOP is an index into REG[] such
171   that REG[TOP] is the top of stack.  If TOP is -1 the stack is empty.
172
173   If TOP is -2, REG[] is not yet initialized.  Stack initialization
174   consists of placing each live reg in array `reg' and setting `top'
175   appropriately.
176
177   REG_SET indicates which registers are live.  */
178
179typedef struct stack_def
180{
181  int top;			/* index to top stack element */
182  HARD_REG_SET reg_set;		/* set of live registers */
183  char reg[REG_STACK_SIZE];	/* register - stack mapping */
184} *stack;
185
186/* highest instruction uid */
187static int max_uid = 0;
188
189/* Number of basic blocks in the current function.  */
190static int blocks;
191
192/* Element N is first insn in basic block N.
193   This info lasts until we finish compiling the function.  */
194static rtx *block_begin;
195
196/* Element N is last insn in basic block N.
197   This info lasts until we finish compiling the function.  */
198static rtx *block_end;
199
200/* Element N is nonzero if control can drop into basic block N */
201static char *block_drops_in;
202
203/* Element N says all about the stack at entry block N */
204static stack block_stack_in;
205
206/* Element N says all about the stack life at the end of block N */
207static HARD_REG_SET *block_out_reg_set;
208
209/* This is where the BLOCK_NUM values are really stored.  This is set
210   up by find_blocks and used there and in life_analysis.  It can be used
211   later, but only to look up an insn that is the head or tail of some
212   block.  life_analysis and the stack register conversion process can
213   add insns within a block.  */
214static int *block_number;
215
216/* We use this array to cache info about insns, because otherwise we
217   spend too much time in stack_regs_mentioned_p.
218
219   Indexed by insn UIDs.  A value of zero is uninitialized, one indicates
220   the insn uses stack registers, two indicates the insn does not use
221   stack registers.  */
222static varray_type stack_regs_mentioned_data;
223
224/* This is the register file for all register after conversion */
225static rtx
226  FP_mode_reg[LAST_STACK_REG+1-FIRST_STACK_REG][(int) MAX_MACHINE_MODE];
227
228#define FP_MODE_REG(regno,mode)	\
229  (FP_mode_reg[(regno)-FIRST_STACK_REG][(int)(mode)])
230
231/* Get the basic block number of an insn.  See note at block_number
232   definition are validity of this information.  */
233
234static int BLOCK_NUM PROTO((rtx));
235
236#ifdef __GNUC__
237__inline__
238#endif
239static int
240BLOCK_NUM(insn)
241     rtx insn;
242{
243  int tmp = INSN_UID (insn);
244  if (tmp > max_uid)
245    abort ();
246  tmp = block_number[tmp];
247  if (tmp < 0)
248    abort ();
249  return tmp;
250}
251
252extern rtx forced_labels;
253
254/* Forward declarations */
255
256static void mark_regs_pat		PROTO((rtx, HARD_REG_SET *));
257static void straighten_stack		PROTO((rtx, stack));
258static void pop_stack			PROTO((stack, int));
259static void record_label_references	PROTO((rtx, rtx));
260static rtx *get_true_reg		PROTO((rtx *));
261
262static void record_asm_reg_life		PROTO((rtx, stack));
263static void record_reg_life_pat		PROTO((rtx, HARD_REG_SET *,
264					       HARD_REG_SET *, int));
265static int get_asm_operand_n_inputs	PROTO((rtx));
266static void record_reg_life		PROTO((rtx, int, stack));
267static void find_blocks			PROTO((rtx));
268static rtx stack_result			PROTO((tree));
269static void stack_reg_life_analysis	PROTO((rtx, HARD_REG_SET *));
270static void replace_reg			PROTO((rtx *, int));
271static void remove_regno_note		PROTO((rtx, enum reg_note, int));
272static int get_hard_regnum		PROTO((stack, rtx));
273static void delete_insn_for_stacker	PROTO((rtx));
274static rtx emit_pop_insn		PROTO((rtx, stack, rtx, rtx (*) ()));
275static void emit_swap_insn		PROTO((rtx, stack, rtx));
276static void move_for_stack_reg		PROTO((rtx, stack, rtx));
277static void swap_rtx_condition		PROTO((rtx));
278static void compare_for_stack_reg	PROTO((rtx, stack, rtx));
279static void subst_stack_regs_pat	PROTO((rtx, stack, rtx));
280static void subst_asm_stack_regs	PROTO((rtx, stack));
281static void subst_stack_regs		PROTO((rtx, stack));
282static void change_stack		PROTO((rtx, stack, stack, rtx (*) ()));
283
284static void goto_block_pat		PROTO((rtx, stack, rtx));
285static void convert_regs		PROTO((void));
286static void print_blocks		PROTO((FILE *, rtx, rtx));
287static void dump_stack_info		PROTO((FILE *));
288static int check_stack_regs_mentioned	PROTO((rtx insn));
289
290/* Initialize stack_regs_mentioned_data for INSN (growing the virtual array
291   if needed.  Return nonzero if INSN mentions stacked registers.  */
292
293static int
294check_stack_regs_mentioned (insn)
295     rtx insn;
296{
297  unsigned int uid = INSN_UID (insn);
298  if (uid >= VARRAY_SIZE (stack_regs_mentioned_data))
299    /* Allocate some extra size to avoid too many reallocs, but
300       do not grow exponentially.  */
301    VARRAY_GROW (stack_regs_mentioned_data, uid + uid / 20);
302  if (stack_regs_mentioned_p (PATTERN (insn)))
303    {
304      VARRAY_CHAR (stack_regs_mentioned_data, uid) = 1;
305      return 1;
306    }
307  else
308    VARRAY_CHAR (stack_regs_mentioned_data, uid) = 2;
309  return 0;
310}
311
312/* Return nonzero if INSN mentions stacked registers, else return
313   zero.  */
314
315int
316stack_regs_mentioned (insn)
317     rtx insn;
318{
319  unsigned int uid;
320  if (GET_RTX_CLASS (GET_CODE (insn)) != 'i')
321    return 0;
322  uid = INSN_UID (insn);
323  if (uid >= VARRAY_SIZE (stack_regs_mentioned_data)
324      || ! VARRAY_CHAR (stack_regs_mentioned_data, uid))
325    return (check_stack_regs_mentioned (insn));
326  return VARRAY_CHAR (stack_regs_mentioned_data, uid) == 1;
327}
328
329
330/* Mark all registers needed for this pattern.  */
331
332static void
333mark_regs_pat (pat, set)
334     rtx pat;
335     HARD_REG_SET *set;
336{
337  enum machine_mode mode;
338  register int regno;
339  register int count;
340
341  if (GET_CODE (pat) == SUBREG)
342   {
343     mode = GET_MODE (pat);
344     regno = SUBREG_WORD (pat);
345     regno += REGNO (SUBREG_REG (pat));
346   }
347  else
348     regno = REGNO (pat), mode = GET_MODE (pat);
349
350  for (count = HARD_REGNO_NREGS (regno, mode);
351       count; count--, regno++)
352     SET_HARD_REG_BIT (*set, regno);
353}
354
355/* Reorganise the stack into ascending numbers,
356   after this insn.  */
357
358static void
359straighten_stack (insn, regstack)
360     rtx insn;
361     stack regstack;
362{
363  struct stack_def temp_stack;
364  int top;
365
366  /* If there is only a single register on the stack, then the stack is
367     already in increasing order and no reorganization is needed.
368
369     Similarly if the stack is empty.  */
370  if (regstack->top <= 0)
371    return;
372
373  temp_stack.reg_set = regstack->reg_set;
374
375  for (top = temp_stack.top = regstack->top; top >= 0; top--)
376     temp_stack.reg[top] = FIRST_STACK_REG + temp_stack.top - top;
377
378  change_stack (insn, regstack, &temp_stack, emit_insn_after);
379}
380
381/* Pop a register from the stack */
382
383static void
384pop_stack (regstack, regno)
385     stack regstack;
386     int   regno;
387{
388  int top = regstack->top;
389
390  CLEAR_HARD_REG_BIT (regstack->reg_set, regno);
391  regstack->top--;
392  /* If regno was not at the top of stack then adjust stack */
393  if (regstack->reg [top] != regno)
394    {
395      int i;
396      for (i = regstack->top; i >= 0; i--)
397	if (regstack->reg [i] == regno)
398	  {
399	    int j;
400	    for (j = i; j < top; j++)
401	      regstack->reg [j] = regstack->reg [j + 1];
402	    break;
403	  }
404    }
405}
406
407/* Return non-zero if any stack register is mentioned somewhere within PAT.  */
408
409int
410stack_regs_mentioned_p (pat)
411     rtx pat;
412{
413  register char *fmt;
414  register int i;
415
416  if (STACK_REG_P (pat))
417    return 1;
418
419  fmt = GET_RTX_FORMAT (GET_CODE (pat));
420  for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
421    {
422      if (fmt[i] == 'E')
423	{
424	  register int j;
425
426	  for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
427	    if (stack_regs_mentioned_p (XVECEXP (pat, i, j)))
428	      return 1;
429	}
430      else if (fmt[i] == 'e' && stack_regs_mentioned_p (XEXP (pat, i)))
431	return 1;
432    }
433
434  return 0;
435}
436
437/* Convert register usage from "flat" register file usage to a "stack
438   register file.  FIRST is the first insn in the function, FILE is the
439   dump file, if used.
440
441   First compute the beginning and end of each basic block.  Do a
442   register life analysis on the stack registers, recording the result
443   for the head and tail of each basic block.  The convert each insn one
444   by one.  Run a last jump_optimize() pass, if optimizing, to eliminate
445   any cross-jumping created when the converter inserts pop insns.*/
446
447void
448reg_to_stack (first, file)
449     rtx first;
450     FILE *file;
451{
452  register rtx insn;
453  register int i;
454  int stack_reg_seen = 0;
455  enum machine_mode mode;
456  HARD_REG_SET stackentry;
457
458  max_uid = get_max_uid ();
459  VARRAY_CHAR_INIT (stack_regs_mentioned_data, max_uid + 1,
460		    "stack_regs_mentioned cache");
461
462  CLEAR_HARD_REG_SET (stackentry);
463
464   {
465     static int initialised;
466     if (!initialised)
467      {
468#if 0
469	initialised = 1;	/* This array can not have been previously
470				   initialised, because the rtx's are
471				   thrown away between compilations of
472				   functions.  */
473#endif
474        for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
475         {
476           for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
477               mode = GET_MODE_WIDER_MODE (mode))
478              FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i);
479           for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT); mode != VOIDmode;
480               mode = GET_MODE_WIDER_MODE (mode))
481              FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i);
482         }
483      }
484   }
485
486  /* Count the basic blocks.  Also find maximum insn uid.  */
487  {
488    register RTX_CODE prev_code = BARRIER;
489    register RTX_CODE code;
490    register int before_function_beg = 1;
491
492    max_uid = 0;
493    blocks = 0;
494    for (insn = first; insn; insn = NEXT_INSN (insn))
495      {
496	/* Note that this loop must select the same block boundaries
497	   as code in find_blocks.  Also note that this code is not the
498	   same as that used in flow.c.  */
499
500	if (INSN_UID (insn) > max_uid)
501	  max_uid = INSN_UID (insn);
502
503	code = GET_CODE (insn);
504
505	if (code == CODE_LABEL
506	    || (prev_code != INSN
507		&& prev_code != CALL_INSN
508		&& prev_code != CODE_LABEL
509		&& GET_RTX_CLASS (code) == 'i'))
510	  blocks++;
511
512	if (code == NOTE && NOTE_LINE_NUMBER (insn) == NOTE_INSN_FUNCTION_BEG)
513	   before_function_beg = 0;
514
515	/* Remember whether or not this insn mentions an FP regs.
516	   Check JUMP_INSNs too, in case someone creates a funny PARALLEL.  */
517
518	if (GET_RTX_CLASS (code) == 'i'
519	    && stack_regs_mentioned_p (PATTERN (insn)))
520	  {
521	    stack_reg_seen = 1;
522	    VARRAY_CHAR (stack_regs_mentioned_data, INSN_UID (insn)) = 1;
523
524	    /* Note any register passing parameters.  */
525
526	    if (before_function_beg && code == INSN
527	        && GET_CODE (PATTERN (insn)) == USE)
528              record_reg_life_pat (PATTERN (insn), (HARD_REG_SET *) 0,
529				   &stackentry, 1);
530	  }
531	else
532	  VARRAY_CHAR (stack_regs_mentioned_data, INSN_UID (insn)) = 2;
533
534	if (code == CODE_LABEL)
535	  LABEL_REFS (insn) = insn; /* delete old chain */
536
537	if (code != NOTE)
538	  prev_code = code;
539      }
540  }
541
542  /* If no stack register reference exists in this insn, there isn't
543     anything to convert.  */
544
545  if (! stack_reg_seen)
546    {
547      VARRAY_FREE (stack_regs_mentioned_data);
548      return;
549    }
550
551  /* If there are stack registers, there must be at least one block.  */
552
553  if (! blocks)
554    abort ();
555
556  /* Allocate some tables that last till end of compiling this function
557     and some needed only in find_blocks and life_analysis.  */
558
559  block_begin = (rtx *) alloca (blocks * sizeof (rtx));
560  block_end = (rtx *) alloca (blocks * sizeof (rtx));
561  block_drops_in = (char *) alloca (blocks);
562
563  block_stack_in = (stack) alloca (blocks * sizeof (struct stack_def));
564  block_out_reg_set = (HARD_REG_SET *) alloca (blocks * sizeof (HARD_REG_SET));
565  bzero ((char *) block_stack_in, blocks * sizeof (struct stack_def));
566  bzero ((char *) block_out_reg_set, blocks * sizeof (HARD_REG_SET));
567
568  block_number = (int *) alloca ((max_uid + 1) * sizeof (int));
569  memset (block_number, -1, (max_uid + 1) * sizeof (int));
570
571  find_blocks (first);
572  stack_reg_life_analysis (first, &stackentry);
573
574  /* Dump the life analysis debug information before jump
575     optimization, as that will destroy the LABEL_REFS we keep the
576     information in.  */
577
578  if (file)
579    dump_stack_info (file);
580
581  convert_regs ();
582
583  if (optimize)
584    jump_optimize (first, 2, 0, 0);
585
586  VARRAY_FREE (stack_regs_mentioned_data);
587}
588
589/* Check PAT, which is in INSN, for LABEL_REFs.  Add INSN to the
590   label's chain of references, and note which insn contains each
591   reference.  */
592
593static void
594record_label_references (insn, pat)
595     rtx insn, pat;
596{
597  register enum rtx_code code = GET_CODE (pat);
598  register int i;
599  register char *fmt;
600
601  if (code == LABEL_REF)
602    {
603      register rtx label = XEXP (pat, 0);
604      register rtx ref;
605
606      if (GET_CODE (label) != CODE_LABEL)
607	abort ();
608
609      /* If this is an undefined label, LABEL_REFS (label) contains
610         garbage.  */
611      if (INSN_UID (label) == 0)
612	return;
613
614      /* Don't make a duplicate in the code_label's chain.  */
615
616      for (ref = LABEL_REFS (label);
617	   ref && ref != label;
618	   ref = LABEL_NEXTREF (ref))
619	if (CONTAINING_INSN (ref) == insn)
620	  return;
621
622      CONTAINING_INSN (pat) = insn;
623      LABEL_NEXTREF (pat) = LABEL_REFS (label);
624      LABEL_REFS (label) = pat;
625
626      return;
627    }
628
629  fmt = GET_RTX_FORMAT (code);
630  for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
631    {
632      if (fmt[i] == 'e')
633	record_label_references (insn, XEXP (pat, i));
634      if (fmt[i] == 'E')
635	{
636	  register int j;
637	  for (j = 0; j < XVECLEN (pat, i); j++)
638	    record_label_references (insn, XVECEXP (pat, i, j));
639	}
640    }
641}
642
643/* Return a pointer to the REG expression within PAT.  If PAT is not a
644   REG, possible enclosed by a conversion rtx, return the inner part of
645   PAT that stopped the search.  */
646
647static rtx *
648get_true_reg (pat)
649     rtx *pat;
650{
651  for (;;)
652     switch (GET_CODE (*pat))
653      {
654	case SUBREG:
655		/* eliminate FP subregister accesses in favour of the
656		   actual FP register in use.  */
657	 {
658	   rtx subreg;
659	   if (FP_REG_P (subreg = SUBREG_REG (*pat)))
660	    {
661	      *pat = FP_MODE_REG (REGNO (subreg) + SUBREG_WORD (*pat),
662				  GET_MODE (subreg));
663	default:
664	      return pat;
665	    }
666	 }
667	case FLOAT:
668	case FIX:
669	case FLOAT_EXTEND:
670	   pat = & XEXP (*pat, 0);
671      }
672}
673
674/* Record the life info of each stack reg in INSN, updating REGSTACK.
675   N_INPUTS is the number of inputs; N_OUTPUTS the outputs.
676   OPERANDS is an array of all operands for the insn, and is assumed to
677   contain all output operands, then all inputs operands.
678
679   There are many rules that an asm statement for stack-like regs must
680   follow.  Those rules are explained at the top of this file: the rule
681   numbers below refer to that explanation.  */
682
683static void
684record_asm_reg_life (insn, regstack)
685     rtx insn;
686     stack regstack;
687{
688  int i;
689  int n_clobbers;
690  int malformed_asm = 0;
691  rtx body = PATTERN (insn);
692
693  int reg_used_as_output[FIRST_PSEUDO_REGISTER];
694  int implicitly_dies[FIRST_PSEUDO_REGISTER];
695  int alt;
696
697  rtx *clobber_reg;
698  int n_inputs, n_outputs;
699
700  /* Find out what the constraints require.  If no constraint
701     alternative matches, this asm is malformed.  */
702  extract_insn (insn);
703  constrain_operands (1);
704  alt = which_alternative;
705
706  preprocess_constraints ();
707
708  n_inputs = get_asm_operand_n_inputs (body);
709  n_outputs = recog_n_operands - n_inputs;
710
711  if (alt < 0)
712    {
713      malformed_asm = 1;
714      /* Avoid further trouble with this insn.  */
715      PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
716      VARRAY_CHAR (stack_regs_mentioned_data, INSN_UID (insn)) = 2;
717      return;
718    }
719
720  /* Strip SUBREGs here to make the following code simpler.  */
721  for (i = 0; i < recog_n_operands; i++)
722    if (GET_CODE (recog_operand[i]) == SUBREG
723	&& GET_CODE (SUBREG_REG (recog_operand[i])) == REG)
724      recog_operand[i] = SUBREG_REG (recog_operand[i]);
725
726  /* Set up CLOBBER_REG.  */
727
728  n_clobbers = 0;
729
730  if (GET_CODE (body) == PARALLEL)
731    {
732      clobber_reg = (rtx *) alloca (XVECLEN (body, 0) * sizeof (rtx));
733
734      for (i = 0; i < XVECLEN (body, 0); i++)
735	if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
736	  {
737	    rtx clobber = XVECEXP (body, 0, i);
738	    rtx reg = XEXP (clobber, 0);
739
740	    if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG)
741	      reg = SUBREG_REG (reg);
742
743	    if (STACK_REG_P (reg))
744	      {
745		clobber_reg[n_clobbers] = reg;
746		n_clobbers++;
747	      }
748	  }
749    }
750
751  /* Enforce rule #4: Output operands must specifically indicate which
752     reg an output appears in after an asm.  "=f" is not allowed: the
753     operand constraints must select a class with a single reg.
754
755     Also enforce rule #5: Output operands must start at the top of
756     the reg-stack: output operands may not "skip" a reg.  */
757
758  bzero ((char *) reg_used_as_output, sizeof (reg_used_as_output));
759  for (i = 0; i < n_outputs; i++)
760    if (STACK_REG_P (recog_operand[i]))
761      {
762	if (reg_class_size[(int) recog_op_alt[i][alt].class] != 1)
763	  {
764	    error_for_asm (insn, "Output constraint %d must specify a single register", i);
765	    malformed_asm = 1;
766	  }
767        else
768	  reg_used_as_output[REGNO (recog_operand[i])] = 1;
769      }
770
771
772  /* Search for first non-popped reg.  */
773  for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
774    if (! reg_used_as_output[i])
775      break;
776
777  /* If there are any other popped regs, that's an error.  */
778  for (; i < LAST_STACK_REG + 1; i++)
779    if (reg_used_as_output[i])
780      break;
781
782  if (i != LAST_STACK_REG + 1)
783    {
784      error_for_asm (insn, "Output regs must be grouped at top of stack");
785      malformed_asm = 1;
786    }
787
788  /* Enforce rule #2: All implicitly popped input regs must be closer
789     to the top of the reg-stack than any input that is not implicitly
790     popped.  */
791
792  bzero ((char *) implicitly_dies, sizeof (implicitly_dies));
793  for (i = n_outputs; i < n_outputs + n_inputs; i++)
794    if (STACK_REG_P (recog_operand[i]))
795      {
796	/* An input reg is implicitly popped if it is tied to an
797	   output, or if there is a CLOBBER for it.  */
798	int j;
799
800	for (j = 0; j < n_clobbers; j++)
801	  if (operands_match_p (clobber_reg[j], recog_operand[i]))
802	    break;
803
804	if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0)
805	  implicitly_dies[REGNO (recog_operand[i])] = 1;
806      }
807
808  /* Search for first non-popped reg.  */
809  for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
810    if (! implicitly_dies[i])
811      break;
812
813  /* If there are any other popped regs, that's an error.  */
814  for (; i < LAST_STACK_REG + 1; i++)
815    if (implicitly_dies[i])
816      break;
817
818  if (i != LAST_STACK_REG + 1)
819    {
820      error_for_asm (insn,
821		     "Implicitly popped regs must be grouped at top of stack");
822      malformed_asm = 1;
823    }
824
825  /* Enfore rule #3: If any input operand uses the "f" constraint, all
826     output constraints must use the "&" earlyclobber.
827
828     ???  Detect this more deterministically by having constraint_asm_operands
829     record any earlyclobber.  */
830
831  for (i = n_outputs; i < n_outputs + n_inputs; i++)
832    if (recog_op_alt[i][alt].matches == -1)
833      {
834	int j;
835
836	for (j = 0; j < n_outputs; j++)
837	  if (operands_match_p (recog_operand[j], recog_operand[i]))
838	    {
839	      error_for_asm (insn,
840			     "Output operand %d must use `&' constraint", j);
841	      malformed_asm = 1;
842	    }
843      }
844
845  if (malformed_asm)
846    {
847      /* Avoid further trouble with this insn.  */
848      PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
849      VARRAY_CHAR (stack_regs_mentioned_data, INSN_UID (insn)) = 2;
850      return;
851    }
852
853  /* Process all outputs */
854  for (i = 0; i < n_outputs; i++)
855    {
856      rtx op = recog_operand[i];
857
858      if (! STACK_REG_P (op))
859	{
860	  if (stack_regs_mentioned_p (op))
861	    abort ();
862	  else
863	    continue;
864	}
865
866      /* Each destination is dead before this insn.  If the
867	 destination is not used after this insn, record this with
868	 REG_UNUSED.  */
869
870      if (! TEST_HARD_REG_BIT (regstack->reg_set, REGNO (op)))
871	REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_UNUSED, op,
872					      REG_NOTES (insn));
873
874      CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (op));
875    }
876
877  /* Process all inputs */
878  for (i = n_outputs; i < n_outputs + n_inputs; i++)
879    {
880      rtx op = recog_operand[i];
881      if (! STACK_REG_P (op))
882	{
883	  if (stack_regs_mentioned_p (op))
884	    abort ();
885	  else
886	    continue;
887	}
888
889      /* If an input is dead after the insn, record a death note.
890	 But don't record a death note if there is already a death note,
891	 or if the input is also an output.  */
892
893      if (! TEST_HARD_REG_BIT (regstack->reg_set, REGNO (op))
894	  && recog_op_alt[i][alt].matches == -1
895	  && find_regno_note (insn, REG_DEAD, REGNO (op)) == NULL_RTX)
896	REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_DEAD, op, REG_NOTES (insn));
897
898      SET_HARD_REG_BIT (regstack->reg_set, REGNO (op));
899    }
900}
901
902/* Scan PAT, which is part of INSN, and record registers appearing in
903   a SET_DEST in DEST, and other registers in SRC.
904
905   This function does not know about SET_DESTs that are both input and
906   output (such as ZERO_EXTRACT) - this cannot happen on a 387.  */
907
908static void
909record_reg_life_pat (pat, src, dest, douse)
910     rtx pat;
911     HARD_REG_SET *src, *dest;
912     int douse;
913{
914  register char *fmt;
915  register int i;
916
917  if (STACK_REG_P (pat)
918      || (GET_CODE (pat) == SUBREG && STACK_REG_P (SUBREG_REG (pat))))
919    {
920      if (src)
921	 mark_regs_pat (pat, src);
922
923      if (dest)
924	 mark_regs_pat (pat, dest);
925
926      return;
927    }
928
929  if (GET_CODE (pat) == SET)
930    {
931      record_reg_life_pat (XEXP (pat, 0), NULL_PTR, dest, 0);
932      record_reg_life_pat (XEXP (pat, 1), src, NULL_PTR, 0);
933      return;
934    }
935
936  /* We don't need to consider either of these cases.  */
937  if ((GET_CODE (pat) == USE && !douse) || GET_CODE (pat) == CLOBBER)
938    return;
939
940  fmt = GET_RTX_FORMAT (GET_CODE (pat));
941  for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
942    {
943      if (fmt[i] == 'E')
944	{
945	  register int j;
946
947	  for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
948	    record_reg_life_pat (XVECEXP (pat, i, j), src, dest, 0);
949	}
950      else if (fmt[i] == 'e')
951	record_reg_life_pat (XEXP (pat, i), src, dest, 0);
952    }
953}
954
955/* Calculate the number of inputs and outputs in BODY, an
956   asm_operands.  N_OPERANDS is the total number of operands, and
957   N_INPUTS and N_OUTPUTS are pointers to ints into which the results are
958   placed.  */
959
960static int
961get_asm_operand_n_inputs (body)
962     rtx body;
963{
964  if (GET_CODE (body) == SET && GET_CODE (SET_SRC (body)) == ASM_OPERANDS)
965    return ASM_OPERANDS_INPUT_LENGTH (SET_SRC (body));
966
967  else if (GET_CODE (body) == ASM_OPERANDS)
968    return ASM_OPERANDS_INPUT_LENGTH (body);
969
970  else if (GET_CODE (body) == PARALLEL
971	   && GET_CODE (XVECEXP (body, 0, 0)) == SET)
972    return ASM_OPERANDS_INPUT_LENGTH (SET_SRC (XVECEXP (body, 0, 0)));
973
974  else if (GET_CODE (body) == PARALLEL
975	   && GET_CODE (XVECEXP (body, 0, 0)) == ASM_OPERANDS)
976    return ASM_OPERANDS_INPUT_LENGTH (XVECEXP (body, 0, 0));
977
978  abort ();
979}
980
981/* Scan INSN, which is in BLOCK, and record the life & death of stack
982   registers in REGSTACK.  This function is called to process insns from
983   the last insn in a block to the first.  The actual scanning is done in
984   record_reg_life_pat.
985
986   If a register is live after a CALL_INSN, but is not a value return
987   register for that CALL_INSN, then code is emitted to initialize that
988   register.  The block_end[] data is kept accurate.
989
990   Existing death and unset notes for stack registers are deleted
991   before processing the insn.  */
992
993static void
994record_reg_life (insn, block, regstack)
995     rtx insn;
996     int block;
997     stack regstack;
998{
999  rtx note, *note_link;
1000  int n_operands;
1001
1002  if ((GET_CODE (insn) != INSN && GET_CODE (insn) != CALL_INSN)
1003      || INSN_DELETED_P (insn))
1004    return;
1005
1006  /* Strip death notes for stack regs from this insn */
1007
1008  note_link = &REG_NOTES(insn);
1009  for (note = *note_link; note; note = XEXP (note, 1))
1010    if (STACK_REG_P (XEXP (note, 0))
1011	&& (REG_NOTE_KIND (note) == REG_DEAD
1012	    || REG_NOTE_KIND (note) == REG_UNUSED))
1013      *note_link = XEXP (note, 1);
1014    else
1015      note_link = &XEXP (note, 1);
1016
1017  /* Process all patterns in the insn.  */
1018
1019  n_operands = asm_noperands (PATTERN (insn));
1020  if (n_operands >= 0)
1021    {
1022      record_asm_reg_life (insn, regstack);
1023      return;
1024    }
1025
1026    {
1027      HARD_REG_SET src, dest;
1028      int regno;
1029
1030      CLEAR_HARD_REG_SET (src);
1031      CLEAR_HARD_REG_SET (dest);
1032
1033      if (GET_CODE (insn) == CALL_INSN)
1034	 for (note = CALL_INSN_FUNCTION_USAGE (insn);
1035	      note;
1036	      note = XEXP (note, 1))
1037	   if (GET_CODE (XEXP (note, 0)) == USE)
1038	     record_reg_life_pat (SET_DEST (XEXP (note, 0)), &src, NULL_PTR, 0);
1039
1040      record_reg_life_pat (PATTERN (insn), &src, &dest, 0);
1041      for (regno = FIRST_STACK_REG; regno <= LAST_STACK_REG; regno++)
1042	if (! TEST_HARD_REG_BIT (regstack->reg_set, regno))
1043	  {
1044	    if (TEST_HARD_REG_BIT (src, regno)
1045		&& ! TEST_HARD_REG_BIT (dest, regno))
1046	      REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_DEAD,
1047						    FP_MODE_REG (regno, DFmode),
1048						    REG_NOTES (insn));
1049	    else if (TEST_HARD_REG_BIT (dest, regno))
1050	      REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_UNUSED,
1051						    FP_MODE_REG (regno, DFmode),
1052						    REG_NOTES (insn));
1053	  }
1054
1055      if (GET_CODE (insn) == CALL_INSN)
1056        {
1057	  int reg;
1058
1059          /* There might be a reg that is live after a function call.
1060             Initialize it to zero so that the program does not crash.  See
1061	     comment towards the end of stack_reg_life_analysis().  */
1062
1063          for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; reg++)
1064	    if (! TEST_HARD_REG_BIT (dest, reg)
1065	        && TEST_HARD_REG_BIT (regstack->reg_set, reg))
1066	      {
1067	        rtx init, pat;
1068
1069	        /* The insn will use virtual register numbers, and so
1070	           convert_regs is expected to process these.  But BLOCK_NUM
1071	           cannot be used on these insns, because they do not appear in
1072	           block_number[].  */
1073
1074	        pat = gen_rtx_SET (VOIDmode, FP_MODE_REG (reg, DFmode),
1075				   CONST0_RTX (DFmode));
1076	        init = emit_insn_after (pat, insn);
1077
1078	        CLEAR_HARD_REG_BIT (regstack->reg_set, reg);
1079
1080	        /* If the CALL_INSN was the end of a block, move the
1081	           block_end to point to the new insn.  */
1082
1083	        if (block_end[block] == insn)
1084	          block_end[block] = init;
1085	      }
1086
1087	  /* Some regs do not survive a CALL */
1088          AND_COMPL_HARD_REG_SET (regstack->reg_set, call_used_reg_set);
1089	}
1090
1091      AND_COMPL_HARD_REG_SET (regstack->reg_set, dest);
1092      IOR_HARD_REG_SET (regstack->reg_set, src);
1093    }
1094}
1095
1096/* Find all basic blocks of the function, which starts with FIRST.
1097   For each JUMP_INSN, build the chain of LABEL_REFS on each CODE_LABEL.  */
1098
1099static void
1100find_blocks (first)
1101     rtx first;
1102{
1103  register rtx insn;
1104  register int block;
1105  register RTX_CODE prev_code = BARRIER;
1106  register RTX_CODE code;
1107  rtx label_value_list = 0;
1108
1109  /* Record where all the blocks start and end.
1110     Record which basic blocks control can drop in to.  */
1111
1112  block = -1;
1113  for (insn = first; insn; insn = NEXT_INSN (insn))
1114    {
1115      /* Note that this loop must select the same block boundaries
1116	 as code in reg_to_stack, but that these are not the same
1117	 as those selected in flow.c.  */
1118
1119      code = GET_CODE (insn);
1120
1121      if (code == CODE_LABEL
1122	  || (prev_code != INSN
1123	      && prev_code != CALL_INSN
1124	      && prev_code != CODE_LABEL
1125	      && GET_RTX_CLASS (code) == 'i'))
1126	{
1127	  block_begin[++block] = insn;
1128	  block_end[block] = insn;
1129	  block_drops_in[block] = prev_code != BARRIER;
1130	}
1131      else if (GET_RTX_CLASS (code) == 'i')
1132	block_end[block] = insn;
1133
1134      if (GET_RTX_CLASS (code) == 'i')
1135	{
1136	  rtx note;
1137
1138	  /* Make a list of all labels referred to other than by jumps.  */
1139	  for (note = REG_NOTES (insn); note; note = XEXP (note, 1))
1140	    if (REG_NOTE_KIND (note) == REG_LABEL)
1141	      label_value_list = gen_rtx_EXPR_LIST (VOIDmode, XEXP (note, 0),
1142						    label_value_list);
1143	}
1144
1145      block_number[INSN_UID (insn)] = block;
1146
1147      if (code != NOTE)
1148	prev_code = code;
1149    }
1150
1151  if (block + 1 != blocks)
1152    abort ();
1153
1154  /* generate all label references to the corresponding jump insn */
1155  for (block = 0; block < blocks; block++)
1156    {
1157      insn = block_end[block];
1158
1159      if (GET_CODE (insn) == JUMP_INSN)
1160	{
1161	  rtx pat = PATTERN (insn);
1162	  rtx x;
1163
1164	  if (computed_jump_p (insn))
1165	    {
1166	      for (x = label_value_list; x; x = XEXP (x, 1))
1167		record_label_references (insn,
1168					 gen_rtx_LABEL_REF (VOIDmode,
1169							    XEXP (x, 0)));
1170
1171	      for (x = forced_labels; x; x = XEXP (x, 1))
1172		record_label_references (insn,
1173					 gen_rtx_LABEL_REF (VOIDmode,
1174							    XEXP (x, 0)));
1175	    }
1176
1177	  record_label_references (insn, pat);
1178	}
1179    }
1180}
1181
1182/* If current function returns its result in an fp stack register,
1183   return the REG.  Otherwise, return 0.  */
1184
1185static rtx
1186stack_result (decl)
1187     tree decl;
1188{
1189  rtx result = DECL_RTL (DECL_RESULT (decl));
1190
1191  if (result != 0
1192      && ! (GET_CODE (result) == REG
1193	    && REGNO (result) < FIRST_PSEUDO_REGISTER))
1194    {
1195#ifdef FUNCTION_OUTGOING_VALUE
1196      result
1197        = FUNCTION_OUTGOING_VALUE (TREE_TYPE (DECL_RESULT (decl)), decl);
1198#else
1199      result = FUNCTION_VALUE (TREE_TYPE (DECL_RESULT (decl)), decl);
1200#endif
1201    }
1202
1203  return result != 0 && STACK_REG_P (result) ? result : 0;
1204}
1205
1206/* Determine the which registers are live at the start of each basic
1207   block of the function whose first insn is FIRST.
1208
1209   First, if the function returns a real_type, mark the function
1210   return type as live at each return point, as the RTL may not give any
1211   hint that the register is live.
1212
1213   Then, start with the last block and work back to the first block.
1214   Similarly, work backwards within each block, insn by insn, recording
1215   which regs are dead and which are used (and therefore live) in the
1216   hard reg set of block_stack_in[].
1217
1218   After processing each basic block, if there is a label at the start
1219   of the block, propagate the live registers to all jumps to this block.
1220
1221   As a special case, if there are regs live in this block, that are
1222   not live in a block containing a jump to this label, and the block
1223   containing the jump has already been processed, we must propagate this
1224   block's entry register life back to the block containing the jump, and
1225   restart life analysis from there.
1226
1227   In the worst case, this function may traverse the insns
1228   REG_STACK_SIZE times.  This is necessary, since a jump towards the end
1229   of the insns may not know that a reg is live at a target that is early
1230   in the insns.  So we back up and start over with the new reg live.
1231
1232   If there are registers that are live at the start of the function,
1233   insns are emitted to initialize these registers.  Something similar is
1234   done after CALL_INSNs in record_reg_life.  */
1235
1236static void
1237stack_reg_life_analysis (first, stackentry)
1238     rtx first;
1239     HARD_REG_SET *stackentry;
1240{
1241  int reg, block;
1242  struct stack_def regstack;
1243
1244   {
1245     rtx retvalue;
1246
1247     if ((retvalue = stack_result (current_function_decl)))
1248      {
1249        /* Find all RETURN insns and mark them.  */
1250
1251        for (block = blocks - 1; --block >= 0;)
1252	   if (GET_CODE (block_end[block]) == JUMP_INSN
1253	       && returnjump_p (block_end[block]))
1254	      mark_regs_pat (retvalue, block_out_reg_set+block);
1255
1256        /* Mark off the end of last block if we "fall off" the end of the
1257	   function into the epilogue.  */
1258
1259        if (GET_CODE (block_end[blocks-1]) != JUMP_INSN
1260	    || returnjump_p (block_end[blocks-1]))
1261	  mark_regs_pat (retvalue, block_out_reg_set+blocks-1);
1262      }
1263   }
1264
1265  /* now scan all blocks backward for stack register use */
1266
1267  block = blocks - 1;
1268  while (block >= 0)
1269    {
1270      register rtx insn, prev;
1271
1272      /* current register status at last instruction */
1273
1274      COPY_HARD_REG_SET (regstack.reg_set, block_out_reg_set[block]);
1275
1276      prev = block_end[block];
1277      do
1278	{
1279	  insn = prev;
1280	  prev = PREV_INSN (insn);
1281
1282	  /* If the insn is a CALL_INSN, we need to ensure that
1283	     everything dies.  But otherwise don't process unless there
1284	     are some stack regs present.  */
1285
1286	  if (stack_regs_mentioned (insn) || GET_CODE (insn) == CALL_INSN)
1287	    record_reg_life (insn, block, &regstack);
1288
1289	} while (insn != block_begin[block]);
1290
1291      /* Set the state at the start of the block.  Mark that no
1292	 register mapping information known yet.  */
1293
1294      COPY_HARD_REG_SET (block_stack_in[block].reg_set, regstack.reg_set);
1295      block_stack_in[block].top = -2;
1296
1297      /* If there is a label, propagate our register life to all jumps
1298	 to this label.  */
1299
1300      if (GET_CODE (insn) == CODE_LABEL)
1301	{
1302	  register rtx label;
1303	  int must_restart = 0;
1304
1305	  for (label = LABEL_REFS (insn); label != insn;
1306	       label = LABEL_NEXTREF (label))
1307	    {
1308	      int jump_block = BLOCK_NUM (CONTAINING_INSN (label));
1309
1310	      if (jump_block < block)
1311		IOR_HARD_REG_SET (block_out_reg_set[jump_block],
1312				  block_stack_in[block].reg_set);
1313	      else
1314		{
1315		  /* The block containing the jump has already been
1316		     processed.  If there are registers that were not known
1317		     to be live then, but are live now, we must back up
1318		     and restart life analysis from that point with the new
1319		     life information.  */
1320
1321		  GO_IF_HARD_REG_SUBSET (block_stack_in[block].reg_set,
1322					 block_out_reg_set[jump_block],
1323					 win);
1324
1325		  IOR_HARD_REG_SET (block_out_reg_set[jump_block],
1326				    block_stack_in[block].reg_set);
1327
1328		  block = jump_block;
1329		  must_restart = 1;
1330		  break;
1331
1332		win:
1333		  ;
1334		}
1335	    }
1336	  if (must_restart)
1337	    continue;
1338	}
1339
1340      if (block_drops_in[block])
1341	IOR_HARD_REG_SET (block_out_reg_set[block-1],
1342			  block_stack_in[block].reg_set);
1343
1344      block -= 1;
1345    }
1346
1347    /* If any reg is live at the start of the first block of a
1348       function, then we must guarantee that the reg holds some value by
1349       generating our own "load" of that register.  Otherwise a 387 would
1350       fault trying to access an empty register.  */
1351
1352  /* Load zero into each live register.  The fact that a register
1353     appears live at the function start necessarily implies an error
1354     in the user program: it means that (unless the offending code is *never*
1355     executed) this program is using uninitialised floating point
1356     variables.  In order to keep broken code like this happy, we initialise
1357     those variables with zero.
1358
1359     Note that we are inserting virtual register references here:
1360     these insns must be processed by convert_regs later.  Also, these
1361     insns will not be in block_number, so BLOCK_NUM() will fail for them.  */
1362
1363  for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; reg--)
1364    if (TEST_HARD_REG_BIT (block_stack_in[0].reg_set, reg)
1365        && ! TEST_HARD_REG_BIT (*stackentry, reg))
1366      {
1367	rtx init_rtx;
1368
1369	init_rtx = gen_rtx_SET (VOIDmode, FP_MODE_REG(reg, DFmode),
1370				CONST0_RTX (DFmode));
1371	block_begin[0] = emit_insn_after (init_rtx, first);
1372
1373	CLEAR_HARD_REG_BIT (block_stack_in[0].reg_set, reg);
1374      }
1375}
1376
1377/*****************************************************************************
1378   This section deals with stack register substitution, and forms the second
1379   pass over the RTL.
1380 *****************************************************************************/
1381
1382/* Replace REG, which is a pointer to a stack reg RTX, with an RTX for
1383   the desired hard REGNO.  */
1384
1385static void
1386replace_reg (reg, regno)
1387     rtx *reg;
1388     int regno;
1389{
1390  if (regno < FIRST_STACK_REG || regno > LAST_STACK_REG
1391      || ! STACK_REG_P (*reg))
1392    abort ();
1393
1394  switch (GET_MODE_CLASS (GET_MODE (*reg)))
1395   {
1396     default: abort ();
1397     case MODE_FLOAT:
1398     case MODE_COMPLEX_FLOAT:;
1399   }
1400
1401  *reg = FP_MODE_REG (regno, GET_MODE (*reg));
1402}
1403
1404/* Remove a note of type NOTE, which must be found, for register
1405   number REGNO from INSN.  Remove only one such note.  */
1406
1407static void
1408remove_regno_note (insn, note, regno)
1409     rtx insn;
1410     enum reg_note note;
1411     int regno;
1412{
1413  register rtx *note_link, this;
1414
1415  note_link = &REG_NOTES(insn);
1416  for (this = *note_link; this; this = XEXP (this, 1))
1417    if (REG_NOTE_KIND (this) == note
1418	&& REG_P (XEXP (this, 0)) && REGNO (XEXP (this, 0)) == regno)
1419      {
1420	*note_link = XEXP (this, 1);
1421	return;
1422      }
1423    else
1424      note_link = &XEXP (this, 1);
1425
1426  abort ();
1427}
1428
1429/* Find the hard register number of virtual register REG in REGSTACK.
1430   The hard register number is relative to the top of the stack.  -1 is
1431   returned if the register is not found.  */
1432
1433static int
1434get_hard_regnum (regstack, reg)
1435     stack regstack;
1436     rtx reg;
1437{
1438  int i;
1439
1440  if (! STACK_REG_P (reg))
1441    abort ();
1442
1443  for (i = regstack->top; i >= 0; i--)
1444    if (regstack->reg[i] == REGNO (reg))
1445      break;
1446
1447  return i >= 0 ? (FIRST_STACK_REG + regstack->top - i) : -1;
1448}
1449
1450/* Delete INSN from the RTL.  Mark the insn, but don't remove it from
1451   the chain of insns.  Doing so could confuse block_begin and block_end
1452   if this were the only insn in the block.  */
1453
1454static void
1455delete_insn_for_stacker (insn)
1456     rtx insn;
1457{
1458  int i;
1459
1460  /* Ensure that the side effects were clobbers when deleting a PARALLEL.  */
1461  if (GET_CODE (PATTERN (insn)) == PARALLEL)
1462    for (i = 1; i < XVECLEN (PATTERN (insn), 0); i++)
1463      if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) != CLOBBER)
1464	abort ();
1465
1466  PUT_CODE (insn, NOTE);
1467  NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
1468  NOTE_SOURCE_FILE (insn) = 0;
1469}
1470
1471/* Emit an insn to pop virtual register REG before or after INSN.
1472   REGSTACK is the stack state after INSN and is updated to reflect this
1473   pop.  WHEN is either emit_insn_before, emit_insn_after or NULL.
1474   in case WHEN is NULL we don't really emit the insn, just modify stack
1475   information.  Caller is expected to emit insn himself.
1476
1477   A pop insn is represented as a SET whose destination is the register to
1478   be popped and source is the top of stack.  A death note for the top of stack
1479   cases the movdf pattern to pop.  */
1480
1481static rtx
1482emit_pop_insn (insn, regstack, reg, when)
1483     rtx insn;
1484     stack regstack;
1485     rtx reg;
1486     rtx (*when)();
1487{
1488  rtx pop_insn, pop_rtx;
1489  int hard_regno;
1490
1491  hard_regno = get_hard_regnum (regstack, reg);
1492
1493  if (hard_regno < FIRST_STACK_REG)
1494    abort ();
1495
1496  if (when)
1497   {
1498     pop_rtx = gen_rtx_SET (VOIDmode, FP_MODE_REG (hard_regno, DFmode),
1499			    FP_MODE_REG (FIRST_STACK_REG, DFmode));
1500
1501     pop_insn = (*when) (pop_rtx, insn);
1502
1503     REG_NOTES (pop_insn) = gen_rtx_EXPR_LIST (REG_DEAD,
1504					       FP_MODE_REG (FIRST_STACK_REG,
1505							    DFmode),
1506					       REG_NOTES (pop_insn));
1507   }
1508
1509  regstack->reg[regstack->top - (hard_regno - FIRST_STACK_REG)]
1510    = regstack->reg[regstack->top];
1511  regstack->top -= 1;
1512  CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (reg));
1513
1514  return pop_insn;
1515}
1516
1517/* Emit an insn before or after INSN to swap virtual register REG with the
1518   top of stack.  WHEN should be `emit_insn_before' or `emit_insn_before'
1519   REGSTACK is the stack state before the swap, and is updated to reflect
1520   the swap.  A swap insn is represented as a PARALLEL of two patterns:
1521   each pattern moves one reg to the other.
1522
1523   If REG is already at the top of the stack, no insn is emitted.  */
1524
1525static void
1526emit_swap_insn (insn, regstack, reg)
1527     rtx insn;
1528     stack regstack;
1529     rtx reg;
1530{
1531  int hard_regno;
1532  rtx gen_swapdf();
1533  rtx swap_rtx, swap_insn;
1534  int tmp, other_reg;		/* swap regno temps */
1535  rtx i1;			/* the stack-reg insn prior to INSN */
1536  rtx i1set = NULL_RTX;		/* the SET rtx within I1 */
1537
1538  hard_regno = get_hard_regnum (regstack, reg);
1539
1540  if (hard_regno < FIRST_STACK_REG)
1541    abort ();
1542  if (hard_regno == FIRST_STACK_REG)
1543    return;
1544
1545  other_reg = regstack->top - (hard_regno - FIRST_STACK_REG);
1546
1547  tmp = regstack->reg[other_reg];
1548  regstack->reg[other_reg] = regstack->reg[regstack->top];
1549  regstack->reg[regstack->top] = tmp;
1550
1551  /* Find the previous insn involving stack regs, but don't go past
1552     any labels, calls or jumps.  */
1553  i1 = prev_nonnote_insn (insn);
1554  while (i1 && GET_CODE (i1) == INSN && !stack_regs_mentioned (i1))
1555    i1 = prev_nonnote_insn (i1);
1556
1557  if (i1)
1558    i1set = single_set (i1);
1559
1560  if (i1set)
1561    {
1562      rtx i1src = *get_true_reg (&SET_SRC (i1set));
1563      rtx i1dest = *get_true_reg (&SET_DEST (i1set));
1564
1565      /* If the previous register stack push was from the reg we are to
1566	 swap with, omit the swap.  */
1567
1568      if (GET_CODE (i1dest) == REG && REGNO (i1dest) == FIRST_STACK_REG
1569	  && GET_CODE (i1src) == REG && REGNO (i1src) == hard_regno - 1
1570	  && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX)
1571	return;
1572
1573      /* If the previous insn wrote to the reg we are to swap with,
1574	 omit the swap.  */
1575
1576      if (GET_CODE (i1dest) == REG && REGNO (i1dest) == hard_regno
1577	  && GET_CODE (i1src) == REG && REGNO (i1src) == FIRST_STACK_REG
1578	  && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX)
1579	return;
1580    }
1581
1582  if (GET_RTX_CLASS (GET_CODE (i1)) == 'i' && sets_cc0_p (PATTERN (i1)))
1583    {
1584      i1 = next_nonnote_insn (i1);
1585      if (i1 == insn)
1586	abort ();
1587    }
1588
1589  swap_rtx = gen_swapdf (FP_MODE_REG (hard_regno, DFmode),
1590			 FP_MODE_REG (FIRST_STACK_REG, DFmode));
1591  swap_insn = emit_insn_after (swap_rtx, i1);
1592}
1593
1594/* Handle a move to or from a stack register in PAT, which is in INSN.
1595   REGSTACK is the current stack.  */
1596
1597static void
1598move_for_stack_reg (insn, regstack, pat)
1599     rtx insn;
1600     stack regstack;
1601     rtx pat;
1602{
1603  rtx *psrc =  get_true_reg (&SET_SRC (pat));
1604  rtx *pdest = get_true_reg (&SET_DEST (pat));
1605  rtx src, dest;
1606  rtx note;
1607
1608  src = *psrc; dest = *pdest;
1609
1610  if (STACK_REG_P (src) && STACK_REG_P (dest))
1611    {
1612      /* Write from one stack reg to another.  If SRC dies here, then
1613	 just change the register mapping and delete the insn.  */
1614
1615      note = find_regno_note (insn, REG_DEAD, REGNO (src));
1616      if (note)
1617	{
1618	  int i;
1619
1620	  /* If this is a no-op move, there must not be a REG_DEAD note.  */
1621	  if (REGNO (src) == REGNO (dest))
1622	    abort ();
1623
1624	  for (i = regstack->top; i >= 0; i--)
1625	    if (regstack->reg[i] == REGNO (src))
1626	      break;
1627
1628	  /* The source must be live, and the dest must be dead.  */
1629	  if (i < 0 || get_hard_regnum (regstack, dest) >= FIRST_STACK_REG)
1630	    abort ();
1631
1632	  /* It is possible that the dest is unused after this insn.
1633	     If so, just pop the src.  */
1634
1635	  if (find_regno_note (insn, REG_UNUSED, REGNO (dest)))
1636	    {
1637	      emit_pop_insn (insn, regstack, src, emit_insn_after);
1638
1639	      delete_insn_for_stacker (insn);
1640	      return;
1641	    }
1642
1643	  regstack->reg[i] = REGNO (dest);
1644
1645	  SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1646	  CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src));
1647
1648	  delete_insn_for_stacker (insn);
1649
1650	  return;
1651	}
1652
1653      /* The source reg does not die.  */
1654
1655      /* If this appears to be a no-op move, delete it, or else it
1656	 will confuse the machine description output patterns. But if
1657	 it is REG_UNUSED, we must pop the reg now, as per-insn processing
1658	 for REG_UNUSED will not work for deleted insns.  */
1659
1660      if (REGNO (src) == REGNO (dest))
1661	{
1662	  if (find_regno_note (insn, REG_UNUSED, REGNO (dest)))
1663	    emit_pop_insn (insn, regstack, dest, emit_insn_after);
1664
1665	  delete_insn_for_stacker (insn);
1666	  return;
1667	}
1668
1669      /* The destination ought to be dead */
1670      if (get_hard_regnum (regstack, dest) >= FIRST_STACK_REG)
1671	abort ();
1672
1673      replace_reg (psrc, get_hard_regnum (regstack, src));
1674
1675      regstack->reg[++regstack->top] = REGNO (dest);
1676      SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1677      replace_reg (pdest, FIRST_STACK_REG);
1678    }
1679  else if (STACK_REG_P (src))
1680    {
1681      /* Save from a stack reg to MEM, or possibly integer reg.  Since
1682	 only top of stack may be saved, emit an exchange first if
1683	 needs be.  */
1684
1685      emit_swap_insn (insn, regstack, src);
1686
1687      note = find_regno_note (insn, REG_DEAD, REGNO (src));
1688      if (note)
1689	{
1690	  replace_reg (&XEXP (note, 0), FIRST_STACK_REG);
1691	  regstack->top--;
1692	  CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src));
1693	}
1694      else if (GET_MODE (src) == XFmode && regstack->top < REG_STACK_SIZE - 1)
1695	{
1696	  /* A 387 cannot write an XFmode value to a MEM without
1697	     clobbering the source reg.  The output code can handle
1698	     this by reading back the value from the MEM.
1699	     But it is more efficient to use a temp register if one is
1700	     available.  Push the source value here if the register
1701	     stack is not full, and then write the value to memory via
1702	     a pop.  */
1703	  rtx push_rtx, push_insn;
1704	  rtx top_stack_reg = FP_MODE_REG (FIRST_STACK_REG, XFmode);
1705
1706	  push_rtx = gen_movxf (top_stack_reg, top_stack_reg);
1707	  push_insn = emit_insn_before (push_rtx, insn);
1708	  REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_DEAD, top_stack_reg,
1709						REG_NOTES (insn));
1710	}
1711
1712      replace_reg (psrc, FIRST_STACK_REG);
1713    }
1714  else if (STACK_REG_P (dest))
1715    {
1716      /* Load from MEM, or possibly integer REG or constant, into the
1717	 stack regs.  The actual target is always the top of the
1718	 stack. The stack mapping is changed to reflect that DEST is
1719	 now at top of stack.  */
1720
1721      /* The destination ought to be dead */
1722      if (get_hard_regnum (regstack, dest) >= FIRST_STACK_REG)
1723	abort ();
1724
1725      if (regstack->top >= REG_STACK_SIZE)
1726	abort ();
1727
1728      regstack->reg[++regstack->top] = REGNO (dest);
1729      SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1730      replace_reg (pdest, FIRST_STACK_REG);
1731    }
1732  else
1733    abort ();
1734}
1735
1736static void
1737swap_rtx_condition (pat)
1738     rtx pat;
1739{
1740  register char *fmt;
1741  register int i;
1742
1743  if (GET_RTX_CLASS (GET_CODE (pat)) == '<')
1744    {
1745      PUT_CODE (pat, swap_condition (GET_CODE (pat)));
1746      return;
1747    }
1748
1749  fmt = GET_RTX_FORMAT (GET_CODE (pat));
1750  for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
1751    {
1752      if (fmt[i] == 'E')
1753	{
1754	  register int j;
1755
1756	  for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
1757	    swap_rtx_condition (XVECEXP (pat, i, j));
1758	}
1759      else if (fmt[i] == 'e')
1760	swap_rtx_condition (XEXP (pat, i));
1761    }
1762}
1763
1764/* Handle a comparison.  Special care needs to be taken to avoid
1765   causing comparisons that a 387 cannot do correctly, such as EQ.
1766
1767   Also, a fstp instruction may need to be emitted.  The 387 does have an
1768   `fcompp' insn that can pop two regs, but it is sometimes too expensive
1769   to do this - a `fcomp' followed by a `fstpl %st(0)' may be easier to
1770   set up.
1771
1772   We can not handle this by emiting fpop instruction after compare, because
1773   it appears between cc0 setter and user.  So we emit only
1774   REG_DEAD note and handle it as a special case in machine description.
1775
1776   This code used trick with delay_slot filling to emit pop insn after
1777   comparsion but it didn't worked because it caused confusion with cc_status
1778   in final pass. */
1779
1780static void
1781compare_for_stack_reg (insn, regstack, pat)
1782     rtx insn;
1783     stack regstack;
1784     rtx pat;
1785{
1786  rtx *src1, *src2;
1787  rtx src1_note, src2_note;
1788  rtx cc0_user;
1789  int have_cmove;
1790  int hard_regno;
1791
1792  src1 = get_true_reg (&XEXP (SET_SRC (pat), 0));
1793  src2 = get_true_reg (&XEXP (SET_SRC (pat), 1));
1794  cc0_user = next_cc0_user (insn);
1795
1796  /* If the insn that uses cc0 is an FP-conditional move, then the destination
1797     must be the top of stack */
1798  if (GET_CODE (PATTERN (cc0_user)) == SET
1799      && SET_DEST (PATTERN (cc0_user)) != pc_rtx
1800      && GET_CODE (SET_SRC (PATTERN (cc0_user))) == IF_THEN_ELSE
1801      && (GET_MODE_CLASS (GET_MODE (SET_DEST (PATTERN (cc0_user))))
1802	  == MODE_FLOAT))
1803    {
1804      rtx *dest;
1805
1806      dest = get_true_reg (&SET_DEST (PATTERN (cc0_user)));
1807
1808      have_cmove = 1;
1809      if (get_hard_regnum (regstack, *dest) >= FIRST_STACK_REG
1810	  && REGNO (*dest) != regstack->reg[regstack->top])
1811	{
1812	  emit_swap_insn (insn, regstack, *dest);
1813	}
1814    }
1815  else
1816    have_cmove = 0;
1817
1818  /* ??? If fxch turns out to be cheaper than fstp, give priority to
1819     registers that die in this insn - move those to stack top first.  */
1820  if (! STACK_REG_P (*src1)
1821      || (STACK_REG_P (*src2)
1822	  && get_hard_regnum (regstack, *src2) == FIRST_STACK_REG))
1823    {
1824      rtx temp, next;
1825
1826      temp = XEXP (SET_SRC (pat), 0);
1827      XEXP (SET_SRC (pat), 0) = XEXP (SET_SRC (pat), 1);
1828      XEXP (SET_SRC (pat), 1) = temp;
1829
1830      src1 = get_true_reg (&XEXP (SET_SRC (pat), 0));
1831      src2 = get_true_reg (&XEXP (SET_SRC (pat), 1));
1832
1833      next = next_cc0_user (insn);
1834      if (next == NULL_RTX)
1835	abort ();
1836
1837      swap_rtx_condition (PATTERN (next));
1838      INSN_CODE (next) = -1;
1839      INSN_CODE (insn) = -1;
1840    }
1841
1842  /* We will fix any death note later.  */
1843
1844  src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1845
1846  if (STACK_REG_P (*src2))
1847    src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1848  else
1849    src2_note = NULL_RTX;
1850
1851  if (! have_cmove)
1852     emit_swap_insn (insn, regstack, *src1);
1853
1854  replace_reg (src1, FIRST_STACK_REG);
1855
1856  if (STACK_REG_P (*src2))
1857    {
1858      hard_regno = get_hard_regnum (regstack, *src2);
1859      replace_reg (src2, hard_regno);
1860    }
1861
1862  if (src1_note)
1863    {
1864      pop_stack (regstack, REGNO (XEXP (src1_note, 0)));
1865      replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1866    }
1867
1868  /* If the second operand dies, handle that.  But if the operands are
1869     the same stack register, don't bother, because only one death is
1870     needed, and it was just handled.  */
1871
1872  if (src2_note
1873      && ! (STACK_REG_P (*src1) && STACK_REG_P (*src2)
1874	    && REGNO (*src1) == REGNO (*src2)))
1875    {
1876      /* As a special case, two regs may die in this insn if src2 is
1877	 next to top of stack and the top of stack also dies.  Since
1878	 we have already popped src1, "next to top of stack" is really
1879	 at top (FIRST_STACK_REG) now.  */
1880
1881      if (get_hard_regnum (regstack, XEXP (src2_note, 0)) == FIRST_STACK_REG
1882	  && src1_note)
1883	{
1884	  pop_stack (regstack, REGNO (XEXP (src2_note, 0)));
1885	  replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1);
1886	}
1887      else
1888	{
1889	  /* Pop of second operand is handled using special REG_DEAD note
1890	     because we can't emit pop insn after cc0 setter.  */
1891
1892	  emit_pop_insn (insn, regstack, XEXP (src2_note, 0), NULL);
1893	  replace_reg (&XEXP (src2_note, 0), hard_regno);
1894	}
1895    }
1896}
1897
1898/* Substitute new registers in PAT, which is part of INSN.  REGSTACK
1899   is the current register layout.  */
1900
1901static void
1902subst_stack_regs_pat (insn, regstack, pat)
1903     rtx insn;
1904     stack regstack;
1905     rtx pat;
1906{
1907  rtx *dest, *src;
1908  rtx *src1 = (rtx *) NULL_PTR, *src2;
1909  rtx src1_note, src2_note;
1910
1911  if (GET_CODE (pat) != SET)
1912    return;
1913
1914  dest = get_true_reg (&SET_DEST (pat));
1915  src  = get_true_reg (&SET_SRC (pat));
1916
1917  /* See if this is a `movM' pattern, and handle elsewhere if so.  */
1918
1919  if (*dest != cc0_rtx
1920      && (STACK_REG_P (*src)
1921	  || (STACK_REG_P (*dest)
1922	      && (GET_CODE (*src) == REG || GET_CODE (*src) == MEM
1923		  || GET_CODE (*src) == CONST_DOUBLE))))
1924    move_for_stack_reg (insn, regstack, pat);
1925  else
1926    switch (GET_CODE (SET_SRC (pat)))
1927      {
1928      case COMPARE:
1929	compare_for_stack_reg (insn, regstack, pat);
1930	break;
1931
1932      case CALL:
1933	 {
1934	   int count;
1935	   for (count = HARD_REGNO_NREGS (REGNO (*dest), GET_MODE (*dest));
1936              --count >= 0;)
1937	    {
1938	      regstack->reg[++regstack->top] = REGNO (*dest) + count;
1939	      SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest) + count);
1940	    }
1941	 }
1942	replace_reg (dest, FIRST_STACK_REG);
1943	break;
1944
1945      case REG:
1946	/* This is a `tstM2' case.  */
1947	if (*dest != cc0_rtx)
1948	  abort ();
1949
1950	src1 = src;
1951
1952	/* Fall through.  */
1953
1954      case FLOAT_TRUNCATE:
1955      case SQRT:
1956      case ABS:
1957      case NEG:
1958	/* These insns only operate on the top of the stack. DEST might
1959	   be cc0_rtx if we're processing a tstM pattern. Also, it's
1960	   possible that the tstM case results in a REG_DEAD note on the
1961	   source.  */
1962
1963	if (src1 == 0)
1964	  src1 = get_true_reg (&XEXP (SET_SRC (pat), 0));
1965
1966	emit_swap_insn (insn, regstack, *src1);
1967
1968	src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1969
1970	if (STACK_REG_P (*dest))
1971	  replace_reg (dest, FIRST_STACK_REG);
1972
1973	if (src1_note)
1974	  {
1975	    replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1976	    regstack->top--;
1977	    CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1));
1978	  }
1979
1980	replace_reg (src1, FIRST_STACK_REG);
1981
1982	break;
1983
1984      case MINUS:
1985      case DIV:
1986	/* On i386, reversed forms of subM3 and divM3 exist for
1987	   MODE_FLOAT, so the same code that works for addM3 and mulM3
1988	   can be used.  */
1989      case MULT:
1990      case PLUS:
1991	/* These insns can accept the top of stack as a destination
1992	   from a stack reg or mem, or can use the top of stack as a
1993	   source and some other stack register (possibly top of stack)
1994	   as a destination.  */
1995
1996	src1 = get_true_reg (&XEXP (SET_SRC (pat), 0));
1997	src2 = get_true_reg (&XEXP (SET_SRC (pat), 1));
1998
1999	/* We will fix any death note later.  */
2000
2001	if (STACK_REG_P (*src1))
2002	  src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
2003	else
2004	  src1_note = NULL_RTX;
2005	if (STACK_REG_P (*src2))
2006	  src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
2007	else
2008	  src2_note = NULL_RTX;
2009
2010	/* If either operand is not a stack register, then the dest
2011	   must be top of stack.  */
2012
2013	if (! STACK_REG_P (*src1) || ! STACK_REG_P (*src2))
2014	  emit_swap_insn (insn, regstack, *dest);
2015	else
2016	  {
2017	    /* Both operands are REG.  If neither operand is already
2018	       at the top of stack, choose to make the one that is the dest
2019	       the new top of stack.  */
2020
2021	    int src1_hard_regnum, src2_hard_regnum;
2022
2023	    src1_hard_regnum = get_hard_regnum (regstack, *src1);
2024	    src2_hard_regnum = get_hard_regnum (regstack, *src2);
2025	    if (src1_hard_regnum == -1 || src2_hard_regnum == -1)
2026	      abort ();
2027
2028	    if (src1_hard_regnum != FIRST_STACK_REG
2029		&& src2_hard_regnum != FIRST_STACK_REG)
2030	      emit_swap_insn (insn, regstack, *dest);
2031	  }
2032
2033	if (STACK_REG_P (*src1))
2034	  replace_reg (src1, get_hard_regnum (regstack, *src1));
2035	if (STACK_REG_P (*src2))
2036	  replace_reg (src2, get_hard_regnum (regstack, *src2));
2037
2038	if (src1_note)
2039	  {
2040	    /* If the register that dies is at the top of stack, then
2041	       the destination is somewhere else - merely substitute it.
2042	       But if the reg that dies is not at top of stack, then
2043	       move the top of stack to the dead reg, as though we had
2044	       done the insn and then a store-with-pop.  */
2045
2046	    if (REGNO (XEXP (src1_note, 0)) == regstack->reg[regstack->top])
2047	      {
2048		SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
2049		replace_reg (dest, get_hard_regnum (regstack, *dest));
2050	      }
2051	    else
2052	      {
2053		int regno = get_hard_regnum (regstack, XEXP (src1_note, 0));
2054
2055		SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
2056		replace_reg (dest, regno);
2057
2058		regstack->reg[regstack->top - (regno - FIRST_STACK_REG)]
2059		  = regstack->reg[regstack->top];
2060	      }
2061
2062	    CLEAR_HARD_REG_BIT (regstack->reg_set,
2063				REGNO (XEXP (src1_note, 0)));
2064	    replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
2065	    regstack->top--;
2066	  }
2067	else if (src2_note)
2068	  {
2069	    if (REGNO (XEXP (src2_note, 0)) == regstack->reg[regstack->top])
2070	      {
2071		SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
2072		replace_reg (dest, get_hard_regnum (regstack, *dest));
2073	      }
2074	    else
2075	      {
2076		int regno = get_hard_regnum (regstack, XEXP (src2_note, 0));
2077
2078		SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
2079		replace_reg (dest, regno);
2080
2081		regstack->reg[regstack->top - (regno - FIRST_STACK_REG)]
2082		  = regstack->reg[regstack->top];
2083	      }
2084
2085	    CLEAR_HARD_REG_BIT (regstack->reg_set,
2086				REGNO (XEXP (src2_note, 0)));
2087	    replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG);
2088	    regstack->top--;
2089	  }
2090	else
2091	  {
2092	    SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
2093	    replace_reg (dest, get_hard_regnum (regstack, *dest));
2094	  }
2095
2096	break;
2097
2098      case UNSPEC:
2099	switch (XINT (SET_SRC (pat), 1))
2100	  {
2101	  case 1: /* sin */
2102	  case 2: /* cos */
2103	    /* These insns only operate on the top of the stack.  */
2104
2105	    src1 = get_true_reg (&XVECEXP (SET_SRC (pat), 0, 0));
2106
2107	    emit_swap_insn (insn, regstack, *src1);
2108
2109	    src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
2110
2111	    if (STACK_REG_P (*dest))
2112	      replace_reg (dest, FIRST_STACK_REG);
2113
2114	    if (src1_note)
2115	      {
2116		replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
2117		regstack->top--;
2118		CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1));
2119	      }
2120
2121	    replace_reg (src1, FIRST_STACK_REG);
2122
2123	    break;
2124
2125	  default:
2126	    abort ();
2127	  }
2128	break;
2129
2130      case IF_THEN_ELSE:
2131	/* dest has to be on stack. */
2132	if (get_hard_regnum (regstack, *dest) < FIRST_STACK_REG)
2133	  abort ();
2134
2135	/* This insn requires the top of stack to be the destination. */
2136
2137	/* If the comparison operator is an FP comparison operator,
2138	   it is handled correctly by compare_for_stack_reg () who
2139	   will move the destination to the top of stack. But if the
2140	   comparison operator is not an FP comparison operator, we
2141	   have to handle it here. */
2142	if (get_hard_regnum (regstack, *dest) >= FIRST_STACK_REG
2143	    && REGNO (*dest) != regstack->reg[regstack->top])
2144	  emit_swap_insn (insn, regstack, *dest);
2145
2146	src1 = get_true_reg (&XEXP (SET_SRC (pat), 1));
2147	src2 = get_true_reg (&XEXP (SET_SRC (pat), 2));
2148
2149	src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
2150	src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
2151
2152	{
2153	  rtx src_note [3];
2154	  int i;
2155
2156	  src_note[0] = 0;
2157	  src_note[1] = src1_note;
2158	  src_note[2] = src2_note;
2159
2160	  if (STACK_REG_P (*src1))
2161	    replace_reg (src1, get_hard_regnum (regstack, *src1));
2162	  if (STACK_REG_P (*src2))
2163	    replace_reg (src2, get_hard_regnum (regstack, *src2));
2164
2165	  for (i = 1; i <= 2; i++)
2166	    if (src_note [i])
2167	      {
2168		/* If the register that dies is not at the top of stack, then
2169		   move the top of stack to the dead reg */
2170		if (REGNO (XEXP (src_note[i], 0))
2171		    != regstack->reg[regstack->top])
2172		  {
2173		    remove_regno_note (insn, REG_DEAD,
2174				       REGNO (XEXP (src_note [i], 0)));
2175		    emit_pop_insn (insn, regstack, XEXP (src_note[i], 0),
2176				   emit_insn_after);
2177		  }
2178		else
2179		  {
2180		    CLEAR_HARD_REG_BIT (regstack->reg_set,
2181					REGNO (XEXP (src_note[i], 0)));
2182		    replace_reg (&XEXP (src_note[i], 0), FIRST_STACK_REG);
2183		    regstack->top--;
2184		  }
2185	      }
2186	}
2187
2188	/* Make dest the top of stack. */
2189	SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
2190	replace_reg (dest, FIRST_STACK_REG);
2191
2192	break;
2193
2194      default:
2195	abort ();
2196      }
2197}
2198
2199/* Substitute hard regnums for any stack regs in INSN, which has
2200   N_INPUTS inputs and N_OUTPUTS outputs.  REGSTACK is the stack info
2201   before the insn, and is updated with changes made here.
2202
2203   There are several requirements and assumptions about the use of
2204   stack-like regs in asm statements.  These rules are enforced by
2205   record_asm_stack_regs; see comments there for details.  Any
2206   asm_operands left in the RTL at this point may be assume to meet the
2207   requirements, since record_asm_stack_regs removes any problem asm.  */
2208
2209static void
2210subst_asm_stack_regs (insn, regstack)
2211     rtx insn;
2212     stack regstack;
2213{
2214  rtx body = PATTERN (insn);
2215  int alt;
2216
2217  rtx *note_reg;		/* Array of note contents */
2218  rtx **note_loc;		/* Address of REG field of each note */
2219  enum reg_note *note_kind;	/* The type of each note */
2220
2221  rtx *clobber_reg;
2222  rtx **clobber_loc;
2223
2224  struct stack_def temp_stack;
2225  int n_notes;
2226  int n_clobbers;
2227  rtx note;
2228  int i;
2229  int n_inputs, n_outputs;
2230
2231  /* Find out what the constraints required.  If no constraint
2232     alternative matches, that is a compiler bug: we should have caught
2233     such an insn during the life analysis pass (and reload should have
2234     caught it regardless).  */
2235  extract_insn (insn);
2236  constrain_operands (1);
2237  alt = which_alternative;
2238
2239  preprocess_constraints ();
2240
2241  n_inputs = get_asm_operand_n_inputs (body);
2242  n_outputs = recog_n_operands - n_inputs;
2243
2244  if (alt < 0)
2245    abort ();
2246
2247  /* Strip SUBREGs here to make the following code simpler.  */
2248  for (i = 0; i < recog_n_operands; i++)
2249    if (GET_CODE (recog_operand[i]) == SUBREG
2250	&& GET_CODE (SUBREG_REG (recog_operand[i])) == REG)
2251      {
2252	recog_operand_loc[i] = & SUBREG_REG (recog_operand[i]);
2253	recog_operand[i] = SUBREG_REG (recog_operand[i]);
2254      }
2255
2256  /* Set up NOTE_REG, NOTE_LOC and NOTE_KIND.  */
2257
2258  for (i = 0, note = REG_NOTES (insn); note; note = XEXP (note, 1))
2259    i++;
2260
2261  note_reg = (rtx *) alloca (i * sizeof (rtx));
2262  note_loc = (rtx **) alloca (i * sizeof (rtx *));
2263  note_kind = (enum reg_note *) alloca (i * sizeof (enum reg_note));
2264
2265  n_notes = 0;
2266  for (note = REG_NOTES (insn); note; note = XEXP (note, 1))
2267    {
2268      rtx reg = XEXP (note, 0);
2269      rtx *loc = & XEXP (note, 0);
2270
2271      if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG)
2272	{
2273	  loc = & SUBREG_REG (reg);
2274	  reg = SUBREG_REG (reg);
2275	}
2276
2277      if (STACK_REG_P (reg)
2278	  && (REG_NOTE_KIND (note) == REG_DEAD
2279	      || REG_NOTE_KIND (note) == REG_UNUSED))
2280	{
2281	  note_reg[n_notes] = reg;
2282	  note_loc[n_notes] = loc;
2283	  note_kind[n_notes] = REG_NOTE_KIND (note);
2284	  n_notes++;
2285	}
2286    }
2287
2288  /* Set up CLOBBER_REG and CLOBBER_LOC.  */
2289
2290  n_clobbers = 0;
2291
2292  if (GET_CODE (body) == PARALLEL)
2293    {
2294      clobber_reg = (rtx *) alloca (XVECLEN (body, 0) * sizeof (rtx));
2295      clobber_loc = (rtx **) alloca (XVECLEN (body, 0) * sizeof (rtx *));
2296
2297      for (i = 0; i < XVECLEN (body, 0); i++)
2298	if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
2299	  {
2300	    rtx clobber = XVECEXP (body, 0, i);
2301	    rtx reg = XEXP (clobber, 0);
2302	    rtx *loc = & XEXP (clobber, 0);
2303
2304	    if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG)
2305	      {
2306		loc = & SUBREG_REG (reg);
2307		reg = SUBREG_REG (reg);
2308	      }
2309
2310	    if (STACK_REG_P (reg))
2311	      {
2312		clobber_reg[n_clobbers] = reg;
2313		clobber_loc[n_clobbers] = loc;
2314		n_clobbers++;
2315	      }
2316	  }
2317    }
2318
2319  bcopy ((char *) regstack, (char *) &temp_stack, sizeof (temp_stack));
2320
2321  /* Put the input regs into the desired place in TEMP_STACK.  */
2322
2323  for (i = n_outputs; i < n_outputs + n_inputs; i++)
2324    if (STACK_REG_P (recog_operand[i])
2325	&& reg_class_subset_p (recog_op_alt[i][alt].class,
2326			       FLOAT_REGS)
2327	&& recog_op_alt[i][alt].class != FLOAT_REGS)
2328      {
2329	/* If an operand needs to be in a particular reg in
2330	   FLOAT_REGS, the constraint was either 't' or 'u'.  Since
2331	   these constraints are for single register classes, and reload
2332	   guaranteed that operand[i] is already in that class, we can
2333	   just use REGNO (recog_operand[i]) to know which actual reg this
2334	   operand needs to be in.  */
2335
2336	int regno = get_hard_regnum (&temp_stack, recog_operand[i]);
2337
2338	if (regno < 0)
2339	  abort ();
2340
2341	if (regno != REGNO (recog_operand[i]))
2342	  {
2343	    /* recog_operand[i] is not in the right place.  Find it
2344	       and swap it with whatever is already in I's place.
2345	       K is where recog_operand[i] is now.  J is where it should
2346	       be.  */
2347	    int j, k, temp;
2348
2349	    k = temp_stack.top - (regno - FIRST_STACK_REG);
2350	    j = (temp_stack.top
2351		 - (REGNO (recog_operand[i]) - FIRST_STACK_REG));
2352
2353	    temp = temp_stack.reg[k];
2354	    temp_stack.reg[k] = temp_stack.reg[j];
2355	    temp_stack.reg[j] = temp;
2356	  }
2357      }
2358
2359  /* emit insns before INSN to make sure the reg-stack is in the right
2360     order.  */
2361
2362  change_stack (insn, regstack, &temp_stack, emit_insn_before);
2363
2364  /* Make the needed input register substitutions.  Do death notes and
2365     clobbers too, because these are for inputs, not outputs.  */
2366
2367  for (i = n_outputs; i < n_outputs + n_inputs; i++)
2368    if (STACK_REG_P (recog_operand[i]))
2369      {
2370	int regnum = get_hard_regnum (regstack, recog_operand[i]);
2371
2372	if (regnum < 0)
2373	  abort ();
2374
2375	replace_reg (recog_operand_loc[i], regnum);
2376      }
2377
2378  for (i = 0; i < n_notes; i++)
2379    if (note_kind[i] == REG_DEAD)
2380      {
2381	int regnum = get_hard_regnum (regstack, note_reg[i]);
2382
2383	if (regnum < 0)
2384	  abort ();
2385
2386	replace_reg (note_loc[i], regnum);
2387      }
2388
2389  for (i = 0; i < n_clobbers; i++)
2390    {
2391      /* It's OK for a CLOBBER to reference a reg that is not live.
2392         Don't try to replace it in that case.  */
2393      int regnum = get_hard_regnum (regstack, clobber_reg[i]);
2394
2395      if (regnum >= 0)
2396	{
2397	  /* Sigh - clobbers always have QImode.  But replace_reg knows
2398	     that these regs can't be MODE_INT and will abort.  Just put
2399	     the right reg there without calling replace_reg.  */
2400
2401	  *clobber_loc[i] = FP_MODE_REG (regnum, DFmode);
2402	}
2403    }
2404
2405  /* Now remove from REGSTACK any inputs that the asm implicitly popped.  */
2406
2407  for (i = n_outputs; i < n_outputs + n_inputs; i++)
2408    if (STACK_REG_P (recog_operand[i]))
2409      {
2410	/* An input reg is implicitly popped if it is tied to an
2411	   output, or if there is a CLOBBER for it.  */
2412	int j;
2413
2414	for (j = 0; j < n_clobbers; j++)
2415	  if (operands_match_p (clobber_reg[j], recog_operand[i]))
2416	    break;
2417
2418	if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0)
2419	  {
2420	    /* recog_operand[i] might not be at the top of stack.  But that's
2421	       OK, because all we need to do is pop the right number of regs
2422	       off of the top of the reg-stack.  record_asm_stack_regs
2423	       guaranteed that all implicitly popped regs were grouped
2424	       at the top of the reg-stack.  */
2425
2426	    CLEAR_HARD_REG_BIT (regstack->reg_set,
2427				regstack->reg[regstack->top]);
2428	    regstack->top--;
2429	  }
2430      }
2431
2432  /* Now add to REGSTACK any outputs that the asm implicitly pushed.
2433     Note that there isn't any need to substitute register numbers.
2434     ???  Explain why this is true.  */
2435
2436  for (i = LAST_STACK_REG; i >= FIRST_STACK_REG; i--)
2437    {
2438      /* See if there is an output for this hard reg.  */
2439      int j;
2440
2441      for (j = 0; j < n_outputs; j++)
2442	if (STACK_REG_P (recog_operand[j]) && REGNO (recog_operand[j]) == i)
2443	  {
2444	    regstack->reg[++regstack->top] = i;
2445	    SET_HARD_REG_BIT (regstack->reg_set, i);
2446	    break;
2447	  }
2448    }
2449
2450  /* Now emit a pop insn for any REG_UNUSED output, or any REG_DEAD
2451     input that the asm didn't implicitly pop.  If the asm didn't
2452     implicitly pop an input reg, that reg will still be live.
2453
2454     Note that we can't use find_regno_note here: the register numbers
2455     in the death notes have already been substituted.  */
2456
2457  for (i = 0; i < n_outputs; i++)
2458    if (STACK_REG_P (recog_operand[i]))
2459      {
2460	int j;
2461
2462	for (j = 0; j < n_notes; j++)
2463	  if (REGNO (recog_operand[i]) == REGNO (note_reg[j])
2464	      && note_kind[j] == REG_UNUSED)
2465	    {
2466	      insn = emit_pop_insn (insn, regstack, recog_operand[i],
2467				    emit_insn_after);
2468	      break;
2469	    }
2470      }
2471
2472  for (i = n_outputs; i < n_outputs + n_inputs; i++)
2473    if (STACK_REG_P (recog_operand[i]))
2474      {
2475	int j;
2476
2477	for (j = 0; j < n_notes; j++)
2478	  if (REGNO (recog_operand[i]) == REGNO (note_reg[j])
2479	      && note_kind[j] == REG_DEAD
2480	      && TEST_HARD_REG_BIT (regstack->reg_set,
2481				    REGNO (recog_operand[i])))
2482	    {
2483	      insn = emit_pop_insn (insn, regstack, recog_operand[i],
2484				    emit_insn_after);
2485	      break;
2486	    }
2487      }
2488}
2489
2490/* Substitute stack hard reg numbers for stack virtual registers in
2491   INSN.  Non-stack register numbers are not changed.  REGSTACK is the
2492   current stack content.  Insns may be emitted as needed to arrange the
2493   stack for the 387 based on the contents of the insn.  */
2494
2495static void
2496subst_stack_regs (insn, regstack)
2497     rtx insn;
2498     stack regstack;
2499{
2500  register rtx *note_link, note;
2501  register int i;
2502
2503  if (GET_CODE (insn) == CALL_INSN)
2504   {
2505     int top = regstack->top;
2506
2507     /* If there are any floating point parameters to be passed in
2508	registers for this call, make sure they are in the right
2509	order.  */
2510
2511     if (top >= 0)
2512      {
2513	straighten_stack (PREV_INSN (insn), regstack);
2514
2515	/* Now mark the arguments as dead after the call.  */
2516
2517        while (regstack->top >= 0)
2518         {
2519           CLEAR_HARD_REG_BIT (regstack->reg_set, FIRST_STACK_REG + regstack->top);
2520	   regstack->top--;
2521         }
2522      }
2523   }
2524
2525  /* Do the actual substitution if any stack regs are mentioned.
2526     Since we only record whether entire insn mentions stack regs, and
2527     subst_stack_regs_pat only works for patterns that contain stack regs,
2528     we must check each pattern in a parallel here.  A call_value_pop could
2529     fail otherwise.  */
2530
2531  if (stack_regs_mentioned (insn))
2532    {
2533      int n_operands = asm_noperands (PATTERN (insn));
2534      if (n_operands >= 0)
2535	{
2536	  /* This insn is an `asm' with operands.  Decode the operands,
2537	     decide how many are inputs, and do register substitution.
2538	     Any REG_UNUSED notes will be handled by subst_asm_stack_regs.  */
2539
2540	  subst_asm_stack_regs (insn, regstack);
2541	  return;
2542	}
2543
2544      if (GET_CODE (PATTERN (insn)) == PARALLEL)
2545	for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
2546	  {
2547	    if (stack_regs_mentioned_p (XVECEXP (PATTERN (insn), 0, i)))
2548	      {
2549		subst_stack_regs_pat (insn, regstack,
2550				      XVECEXP (PATTERN (insn), 0, i));
2551
2552		/* subst_stack_regs_pat may have deleted a no-op insn.  */
2553		if (GET_CODE (insn) == NOTE)
2554		  break;
2555	      }
2556	  }
2557      else
2558	subst_stack_regs_pat (insn, regstack, PATTERN (insn));
2559    }
2560
2561  /* subst_stack_regs_pat may have deleted a no-op insn.  If so, any
2562     REG_UNUSED will already have been dealt with, so just return.  */
2563
2564  if (GET_CODE (insn) == NOTE)
2565    return;
2566
2567  /* If there is a REG_UNUSED note on a stack register on this insn,
2568     the indicated reg must be popped.  The REG_UNUSED note is removed,
2569     since the form of the newly emitted pop insn references the reg,
2570     making it no longer `unset'.  */
2571
2572  note_link = &REG_NOTES(insn);
2573  for (note = *note_link; note; note = XEXP (note, 1))
2574    if (REG_NOTE_KIND (note) == REG_UNUSED && STACK_REG_P (XEXP (note, 0)))
2575      {
2576	*note_link = XEXP (note, 1);
2577	insn = emit_pop_insn (insn, regstack, XEXP (note, 0), emit_insn_after);
2578      }
2579    else
2580      note_link = &XEXP (note, 1);
2581}
2582
2583/* Change the organization of the stack so that it fits a new basic
2584   block.  Some registers might have to be popped, but there can never be
2585   a register live in the new block that is not now live.
2586
2587   Insert any needed insns before or after INSN.  WHEN is emit_insn_before
2588   or emit_insn_after. OLD is the original stack layout, and NEW is
2589   the desired form.  OLD is updated to reflect the code emitted, ie, it
2590   will be the same as NEW upon return.
2591
2592   This function will not preserve block_end[].  But that information
2593   is no longer needed once this has executed.  */
2594
2595static void
2596change_stack (insn, old, new, when)
2597     rtx insn;
2598     stack old;
2599     stack new;
2600     rtx (*when)();
2601{
2602  int reg;
2603
2604  /* We will be inserting new insns "backwards", by calling emit_insn_before.
2605     If we are to insert after INSN, find the next insn, and insert before
2606     it.  */
2607
2608  if (when == emit_insn_after)
2609    insn = NEXT_INSN (insn);
2610
2611  /* Pop any registers that are not needed in the new block.  */
2612
2613  for (reg = old->top; reg >= 0; reg--)
2614    if (! TEST_HARD_REG_BIT (new->reg_set, old->reg[reg]))
2615      emit_pop_insn (insn, old, FP_MODE_REG (old->reg[reg], DFmode),
2616		     emit_insn_before);
2617
2618  if (new->top == -2)
2619    {
2620      /* If the new block has never been processed, then it can inherit
2621	 the old stack order.  */
2622
2623      new->top = old->top;
2624      bcopy (old->reg, new->reg, sizeof (new->reg));
2625    }
2626  else
2627    {
2628      /* This block has been entered before, and we must match the
2629	 previously selected stack order.  */
2630
2631      /* By now, the only difference should be the order of the stack,
2632	 not their depth or liveliness.  */
2633
2634      GO_IF_HARD_REG_EQUAL (old->reg_set, new->reg_set, win);
2635
2636      abort ();
2637
2638    win:
2639
2640      if (old->top != new->top)
2641	abort ();
2642
2643      /* If the stack is not empty (new->top != -1), loop here emitting
2644	 swaps until the stack is correct.
2645
2646	 The worst case number of swaps emitted is N + 2, where N is the
2647	 depth of the stack.  In some cases, the reg at the top of
2648	 stack may be correct, but swapped anyway in order to fix
2649	 other regs.  But since we never swap any other reg away from
2650	 its correct slot, this algorithm will converge.  */
2651
2652      if (new->top != -1)
2653	do
2654	  {
2655	    /* Swap the reg at top of stack into the position it is
2656	       supposed to be in, until the correct top of stack appears.  */
2657
2658	    while (old->reg[old->top] != new->reg[new->top])
2659	      {
2660		for (reg = new->top; reg >= 0; reg--)
2661		  if (new->reg[reg] == old->reg[old->top])
2662		    break;
2663
2664		if (reg == -1)
2665		  abort ();
2666
2667		emit_swap_insn (insn, old,
2668				FP_MODE_REG (old->reg[reg], DFmode));
2669	      }
2670
2671	    /* See if any regs remain incorrect.  If so, bring an
2672	     incorrect reg to the top of stack, and let the while loop
2673	     above fix it.  */
2674
2675	    for (reg = new->top; reg >= 0; reg--)
2676	      if (new->reg[reg] != old->reg[reg])
2677		{
2678		  emit_swap_insn (insn, old,
2679				  FP_MODE_REG (old->reg[reg], DFmode));
2680		  break;
2681		}
2682	  } while (reg >= 0);
2683
2684      /* At this point there must be no differences.  */
2685
2686      for (reg = old->top; reg >= 0; reg--)
2687	if (old->reg[reg] != new->reg[reg])
2688	  abort ();
2689    }
2690}
2691
2692/* Check PAT, which points to RTL in INSN, for a LABEL_REF.  If it is
2693   found, ensure that a jump from INSN to the code_label to which the
2694   label_ref points ends up with the same stack as that at the
2695   code_label.  Do this by inserting insns just before the code_label to
2696   pop and rotate the stack until it is in the correct order.  REGSTACK
2697   is the order of the register stack in INSN.
2698
2699   Any code that is emitted here must not be later processed as part
2700   of any block, as it will already contain hard register numbers.  */
2701
2702static void
2703goto_block_pat (insn, regstack, pat)
2704     rtx insn;
2705     stack regstack;
2706     rtx pat;
2707{
2708  rtx label;
2709  rtx new_jump, new_label, new_barrier;
2710  rtx *ref;
2711  stack label_stack;
2712  struct stack_def temp_stack;
2713  int reg;
2714
2715  switch (GET_CODE (pat))
2716   {
2717     case RETURN:
2718	straighten_stack (PREV_INSN (insn), regstack);
2719	return;
2720     default:
2721     {
2722      int i, j;
2723      char *fmt = GET_RTX_FORMAT (GET_CODE (pat));
2724
2725      for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
2726	{
2727	  if (fmt[i] == 'e')
2728	    goto_block_pat (insn, regstack, XEXP (pat, i));
2729	  if (fmt[i] == 'E')
2730	    for (j = 0; j < XVECLEN (pat, i); j++)
2731	      goto_block_pat (insn, regstack, XVECEXP (pat, i, j));
2732	}
2733      return;
2734     }
2735     case LABEL_REF:;
2736   }
2737
2738  label = XEXP (pat, 0);
2739  if (GET_CODE (label) != CODE_LABEL)
2740    abort ();
2741
2742  /* First, see if in fact anything needs to be done to the stack at all.  */
2743  if (INSN_UID (label) <= 0)
2744    return;
2745
2746  label_stack = &block_stack_in[BLOCK_NUM (label)];
2747
2748  if (label_stack->top == -2)
2749    {
2750      /* If the target block hasn't had a stack order selected, then
2751	 we need merely ensure that no pops are needed.  */
2752
2753      for (reg = regstack->top; reg >= 0; reg--)
2754	if (! TEST_HARD_REG_BIT (label_stack->reg_set, regstack->reg[reg]))
2755	  break;
2756
2757      if (reg == -1)
2758	{
2759	  /* change_stack will not emit any code in this case.  */
2760
2761	  change_stack (label, regstack, label_stack, emit_insn_after);
2762	  return;
2763	}
2764    }
2765  else if (label_stack->top == regstack->top)
2766    {
2767      for (reg = label_stack->top; reg >= 0; reg--)
2768	if (label_stack->reg[reg] != regstack->reg[reg])
2769	  break;
2770
2771      if (reg == -1)
2772	return;
2773    }
2774
2775  /* At least one insn will need to be inserted before label.  Insert
2776     a jump around the code we are about to emit.  Emit a label for the new
2777     code, and point the original insn at this new label. We can't use
2778     redirect_jump here, because we're using fld[4] of the code labels as
2779     LABEL_REF chains, no NUSES counters.  */
2780
2781  new_jump = emit_jump_insn_before (gen_jump (label), label);
2782  record_label_references (new_jump, PATTERN (new_jump));
2783  JUMP_LABEL (new_jump) = label;
2784
2785  new_barrier = emit_barrier_after (new_jump);
2786
2787  new_label = gen_label_rtx ();
2788  emit_label_after (new_label, new_barrier);
2789  LABEL_REFS (new_label) = new_label;
2790
2791  /* The old label_ref will no longer point to the code_label if now uses,
2792     so strip the label_ref from the code_label's chain of references.  */
2793
2794  for (ref = &LABEL_REFS (label); *ref != label; ref = &LABEL_NEXTREF (*ref))
2795    if (*ref == pat)
2796      break;
2797
2798  if (*ref == label)
2799    abort ();
2800
2801  *ref = LABEL_NEXTREF (*ref);
2802
2803  XEXP (pat, 0) = new_label;
2804  record_label_references (insn, PATTERN (insn));
2805
2806  if (JUMP_LABEL (insn) == label)
2807    JUMP_LABEL (insn) = new_label;
2808
2809  /* Now emit the needed code.  */
2810
2811  temp_stack = *regstack;
2812
2813  change_stack (new_label, &temp_stack, label_stack, emit_insn_after);
2814}
2815
2816/* Traverse all basic blocks in a function, converting the register
2817   references in each insn from the "flat" register file that gcc uses, to
2818   the stack-like registers the 387 uses.  */
2819
2820static void
2821convert_regs ()
2822{
2823  register int block, reg;
2824  register rtx insn, next;
2825  struct stack_def regstack;
2826
2827  for (block = 0; block < blocks; block++)
2828    {
2829      if (block_stack_in[block].top == -2)
2830	{
2831	  /* This block has not been previously encountered.  Choose a
2832	     default mapping for any stack regs live on entry */
2833
2834	  block_stack_in[block].top = -1;
2835
2836	  for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; reg--)
2837	    if (TEST_HARD_REG_BIT (block_stack_in[block].reg_set, reg))
2838	      block_stack_in[block].reg[++block_stack_in[block].top] = reg;
2839	}
2840
2841      /* Process all insns in this block.  Keep track of `next' here,
2842	 so that we don't process any insns emitted while making
2843	 substitutions in INSN.  */
2844
2845      next = block_begin[block];
2846      regstack = block_stack_in[block];
2847      do
2848	{
2849	  insn = next;
2850	  next = NEXT_INSN (insn);
2851
2852	  /* Don't bother processing unless there is a stack reg
2853	     mentioned or if it's a CALL_INSN (register passing of
2854	     floating point values).  */
2855
2856	  if (stack_regs_mentioned (insn) || GET_CODE (insn) == CALL_INSN)
2857	    subst_stack_regs (insn, &regstack);
2858
2859	} while (insn != block_end[block]);
2860
2861      /* For all further actions, INSN needs to be the last insn in
2862         this basic block.  If subst_stack_regs inserted additional
2863         instructions after INSN, it is no longer the last one at
2864         this point.  */
2865      next = PREV_INSN (next);
2866
2867      /* If subst_stack_regs inserted something after a JUMP_INSN, that
2868         is almost certainly a bug.  */
2869      if (GET_CODE (insn) == JUMP_INSN && insn != next)
2870	abort ();
2871      insn = next;
2872
2873      /* Something failed if the stack life doesn't match.  */
2874
2875      GO_IF_HARD_REG_EQUAL (regstack.reg_set, block_out_reg_set[block], win);
2876
2877      abort ();
2878
2879    win:
2880
2881      /* Adjust the stack of this block on exit to match the stack of
2882	 the target block, or copy stack information into stack of
2883	 jump target if the target block's stack order hasn't been set
2884	 yet.  */
2885
2886      if (GET_CODE (insn) == JUMP_INSN)
2887	goto_block_pat (insn, &regstack, PATTERN (insn));
2888
2889      /* Likewise handle the case where we fall into the next block.  */
2890
2891      if ((block < blocks - 1) && block_drops_in[block+1])
2892	change_stack (insn, &regstack, &block_stack_in[block+1],
2893		      emit_insn_after);
2894    }
2895
2896  /* If the last basic block is the end of a loop, and that loop has
2897     regs live at its start, then the last basic block will have regs live
2898     at its end that need to be popped before the function returns.  */
2899
2900   {
2901     int value_reg_low, value_reg_high;
2902     value_reg_low = value_reg_high = -1;
2903      {
2904        rtx retvalue;
2905        if ((retvalue = stack_result (current_function_decl)))
2906	 {
2907	   value_reg_low = REGNO (retvalue);
2908	   value_reg_high = value_reg_low +
2909	    HARD_REGNO_NREGS (value_reg_low, GET_MODE (retvalue)) - 1;
2910	 }
2911
2912      }
2913     for (reg = regstack.top; reg >= 0; reg--)
2914        if (regstack.reg[reg] < value_reg_low
2915	    || regstack.reg[reg] > value_reg_high)
2916           insn = emit_pop_insn (insn, &regstack,
2917			    FP_MODE_REG (regstack.reg[reg], DFmode),
2918			    emit_insn_after);
2919   }
2920  straighten_stack (insn, &regstack);
2921}
2922
2923/* Check expression PAT, which is in INSN, for label references.  if
2924   one is found, print the block number of destination to FILE.  */
2925
2926static void
2927print_blocks (file, insn, pat)
2928     FILE *file;
2929     rtx insn, pat;
2930{
2931  register RTX_CODE code = GET_CODE (pat);
2932  register int i;
2933  register char *fmt;
2934
2935  if (code == LABEL_REF)
2936    {
2937      register rtx label = XEXP (pat, 0);
2938
2939      if (GET_CODE (label) != CODE_LABEL)
2940	abort ();
2941
2942      fprintf (file, " %d", BLOCK_NUM (label));
2943
2944      return;
2945    }
2946
2947  fmt = GET_RTX_FORMAT (code);
2948  for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2949    {
2950      if (fmt[i] == 'e')
2951	print_blocks (file, insn, XEXP (pat, i));
2952      if (fmt[i] == 'E')
2953	{
2954	  register int j;
2955	  for (j = 0; j < XVECLEN (pat, i); j++)
2956	    print_blocks (file, insn, XVECEXP (pat, i, j));
2957	}
2958    }
2959}
2960
2961/* Write information about stack registers and stack blocks into FILE.
2962   This is part of making a debugging dump.  */
2963
2964static void
2965dump_stack_info (file)
2966     FILE *file;
2967{
2968  register int block;
2969
2970  fprintf (file, "\n%d stack blocks.\n", blocks);
2971  for (block = 0; block < blocks; block++)
2972    {
2973      register rtx head, jump, end;
2974      register int regno;
2975
2976      fprintf (file, "\nStack block %d: first insn %d, last %d.\n",
2977	       block, INSN_UID (block_begin[block]),
2978	       INSN_UID (block_end[block]));
2979
2980      head = block_begin[block];
2981
2982      fprintf (file, "Reached from blocks: ");
2983      if (GET_CODE (head) == CODE_LABEL)
2984	for (jump = LABEL_REFS (head);
2985	     jump != head;
2986	     jump = LABEL_NEXTREF (jump))
2987	  {
2988	    register int from_block = BLOCK_NUM (CONTAINING_INSN (jump));
2989	    fprintf (file, " %d", from_block);
2990	  }
2991      if (block_drops_in[block])
2992	fprintf (file, " previous");
2993
2994      fprintf (file, "\nlive stack registers on block entry: ");
2995      for (regno = FIRST_STACK_REG; regno <= LAST_STACK_REG; regno++)
2996	{
2997	  if (TEST_HARD_REG_BIT (block_stack_in[block].reg_set, regno))
2998	    fprintf (file, "%d ", regno);
2999	}
3000
3001      fprintf (file, "\nlive stack registers on block exit: ");
3002      for (regno = FIRST_STACK_REG; regno <= LAST_STACK_REG; regno++)
3003	{
3004	  if (TEST_HARD_REG_BIT (block_out_reg_set[block], regno))
3005	    fprintf (file, "%d ", regno);
3006	}
3007
3008      end = block_end[block];
3009
3010      fprintf (file, "\nJumps to blocks: ");
3011      if (GET_CODE (end) == JUMP_INSN)
3012	print_blocks (file, end, PATTERN (end));
3013
3014      if (block + 1 < blocks && block_drops_in[block+1])
3015	fprintf (file, " next");
3016      else if (block + 1 == blocks
3017	       || (GET_CODE (end) == JUMP_INSN
3018		   && GET_CODE (PATTERN (end)) == RETURN))
3019	fprintf (file, " return");
3020
3021      fprintf (file, "\n");
3022    }
3023}
3024#endif /* STACK_REGS */
3025