reg-stack.c revision 161651
1/* Register to Stack convert for GNU compiler. 2 Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 3 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc. 4 5 This file is part of GCC. 6 7 GCC is free software; you can redistribute it and/or modify it 8 under the terms of the GNU General Public License as published by 9 the Free Software Foundation; either version 2, or (at your option) 10 any later version. 11 12 GCC is distributed in the hope that it will be useful, but WITHOUT 13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 15 License for more details. 16 17 You should have received a copy of the GNU General Public License 18 along with GCC; see the file COPYING. If not, write to the Free 19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA 20 02111-1307, USA. */ 21 22/* This pass converts stack-like registers from the "flat register 23 file" model that gcc uses, to a stack convention that the 387 uses. 24 25 * The form of the input: 26 27 On input, the function consists of insn that have had their 28 registers fully allocated to a set of "virtual" registers. Note that 29 the word "virtual" is used differently here than elsewhere in gcc: for 30 each virtual stack reg, there is a hard reg, but the mapping between 31 them is not known until this pass is run. On output, hard register 32 numbers have been substituted, and various pop and exchange insns have 33 been emitted. The hard register numbers and the virtual register 34 numbers completely overlap - before this pass, all stack register 35 numbers are virtual, and afterward they are all hard. 36 37 The virtual registers can be manipulated normally by gcc, and their 38 semantics are the same as for normal registers. After the hard 39 register numbers are substituted, the semantics of an insn containing 40 stack-like regs are not the same as for an insn with normal regs: for 41 instance, it is not safe to delete an insn that appears to be a no-op 42 move. In general, no insn containing hard regs should be changed 43 after this pass is done. 44 45 * The form of the output: 46 47 After this pass, hard register numbers represent the distance from 48 the current top of stack to the desired register. A reference to 49 FIRST_STACK_REG references the top of stack, FIRST_STACK_REG + 1, 50 represents the register just below that, and so forth. Also, REG_DEAD 51 notes indicate whether or not a stack register should be popped. 52 53 A "swap" insn looks like a parallel of two patterns, where each 54 pattern is a SET: one sets A to B, the other B to A. 55 56 A "push" or "load" insn is a SET whose SET_DEST is FIRST_STACK_REG 57 and whose SET_DEST is REG or MEM. Any other SET_DEST, such as PLUS, 58 will replace the existing stack top, not push a new value. 59 60 A store insn is a SET whose SET_DEST is FIRST_STACK_REG, and whose 61 SET_SRC is REG or MEM. 62 63 The case where the SET_SRC and SET_DEST are both FIRST_STACK_REG 64 appears ambiguous. As a special case, the presence of a REG_DEAD note 65 for FIRST_STACK_REG differentiates between a load insn and a pop. 66 67 If a REG_DEAD is present, the insn represents a "pop" that discards 68 the top of the register stack. If there is no REG_DEAD note, then the 69 insn represents a "dup" or a push of the current top of stack onto the 70 stack. 71 72 * Methodology: 73 74 Existing REG_DEAD and REG_UNUSED notes for stack registers are 75 deleted and recreated from scratch. REG_DEAD is never created for a 76 SET_DEST, only REG_UNUSED. 77 78 * asm_operands: 79 80 There are several rules on the usage of stack-like regs in 81 asm_operands insns. These rules apply only to the operands that are 82 stack-like regs: 83 84 1. Given a set of input regs that die in an asm_operands, it is 85 necessary to know which are implicitly popped by the asm, and 86 which must be explicitly popped by gcc. 87 88 An input reg that is implicitly popped by the asm must be 89 explicitly clobbered, unless it is constrained to match an 90 output operand. 91 92 2. For any input reg that is implicitly popped by an asm, it is 93 necessary to know how to adjust the stack to compensate for the pop. 94 If any non-popped input is closer to the top of the reg-stack than 95 the implicitly popped reg, it would not be possible to know what the 96 stack looked like - it's not clear how the rest of the stack "slides 97 up". 98 99 All implicitly popped input regs must be closer to the top of 100 the reg-stack than any input that is not implicitly popped. 101 102 3. It is possible that if an input dies in an insn, reload might 103 use the input reg for an output reload. Consider this example: 104 105 asm ("foo" : "=t" (a) : "f" (b)); 106 107 This asm says that input B is not popped by the asm, and that 108 the asm pushes a result onto the reg-stack, ie, the stack is one 109 deeper after the asm than it was before. But, it is possible that 110 reload will think that it can use the same reg for both the input and 111 the output, if input B dies in this insn. 112 113 If any input operand uses the "f" constraint, all output reg 114 constraints must use the "&" earlyclobber. 115 116 The asm above would be written as 117 118 asm ("foo" : "=&t" (a) : "f" (b)); 119 120 4. Some operands need to be in particular places on the stack. All 121 output operands fall in this category - there is no other way to 122 know which regs the outputs appear in unless the user indicates 123 this in the constraints. 124 125 Output operands must specifically indicate which reg an output 126 appears in after an asm. "=f" is not allowed: the operand 127 constraints must select a class with a single reg. 128 129 5. Output operands may not be "inserted" between existing stack regs. 130 Since no 387 opcode uses a read/write operand, all output operands 131 are dead before the asm_operands, and are pushed by the asm_operands. 132 It makes no sense to push anywhere but the top of the reg-stack. 133 134 Output operands must start at the top of the reg-stack: output 135 operands may not "skip" a reg. 136 137 6. Some asm statements may need extra stack space for internal 138 calculations. This can be guaranteed by clobbering stack registers 139 unrelated to the inputs and outputs. 140 141 Here are a couple of reasonable asms to want to write. This asm 142 takes one input, which is internally popped, and produces two outputs. 143 144 asm ("fsincos" : "=t" (cos), "=u" (sin) : "0" (inp)); 145 146 This asm takes two inputs, which are popped by the fyl2xp1 opcode, 147 and replaces them with one output. The user must code the "st(1)" 148 clobber for reg-stack.c to know that fyl2xp1 pops both inputs. 149 150 asm ("fyl2xp1" : "=t" (result) : "0" (x), "u" (y) : "st(1)"); 151 152*/ 153 154#include "config.h" 155#include "system.h" 156#include "coretypes.h" 157#include "tm.h" 158#include "tree.h" 159#include "rtl.h" 160#include "tm_p.h" 161#include "function.h" 162#include "insn-config.h" 163#include "regs.h" 164#include "hard-reg-set.h" 165#include "flags.h" 166#include "toplev.h" 167#include "recog.h" 168#include "output.h" 169#include "basic-block.h" 170#include "varray.h" 171#include "reload.h" 172#include "ggc.h" 173 174/* We use this array to cache info about insns, because otherwise we 175 spend too much time in stack_regs_mentioned_p. 176 177 Indexed by insn UIDs. A value of zero is uninitialized, one indicates 178 the insn uses stack registers, two indicates the insn does not use 179 stack registers. */ 180static GTY(()) varray_type stack_regs_mentioned_data; 181 182#ifdef STACK_REGS 183 184#define REG_STACK_SIZE (LAST_STACK_REG - FIRST_STACK_REG + 1) 185 186/* This is the basic stack record. TOP is an index into REG[] such 187 that REG[TOP] is the top of stack. If TOP is -1 the stack is empty. 188 189 If TOP is -2, REG[] is not yet initialized. Stack initialization 190 consists of placing each live reg in array `reg' and setting `top' 191 appropriately. 192 193 REG_SET indicates which registers are live. */ 194 195typedef struct stack_def 196{ 197 int top; /* index to top stack element */ 198 HARD_REG_SET reg_set; /* set of live registers */ 199 unsigned char reg[REG_STACK_SIZE];/* register - stack mapping */ 200} *stack; 201 202/* This is used to carry information about basic blocks. It is 203 attached to the AUX field of the standard CFG block. */ 204 205typedef struct block_info_def 206{ 207 struct stack_def stack_in; /* Input stack configuration. */ 208 struct stack_def stack_out; /* Output stack configuration. */ 209 HARD_REG_SET out_reg_set; /* Stack regs live on output. */ 210 int done; /* True if block already converted. */ 211 int predecessors; /* Number of predecessors that needs 212 to be visited. */ 213} *block_info; 214 215#define BLOCK_INFO(B) ((block_info) (B)->aux) 216 217/* Passed to change_stack to indicate where to emit insns. */ 218enum emit_where 219{ 220 EMIT_AFTER, 221 EMIT_BEFORE 222}; 223 224/* The block we're currently working on. */ 225static basic_block current_block; 226 227/* This is the register file for all register after conversion. */ 228static rtx 229 FP_mode_reg[LAST_STACK_REG+1-FIRST_STACK_REG][(int) MAX_MACHINE_MODE]; 230 231#define FP_MODE_REG(regno,mode) \ 232 (FP_mode_reg[(regno)-FIRST_STACK_REG][(int) (mode)]) 233 234/* Used to initialize uninitialized registers. */ 235static rtx nan; 236 237/* Forward declarations */ 238 239static int stack_regs_mentioned_p (rtx pat); 240static void straighten_stack (rtx, stack); 241static void pop_stack (stack, int); 242static rtx *get_true_reg (rtx *); 243 244static int check_asm_stack_operands (rtx); 245static int get_asm_operand_n_inputs (rtx); 246static rtx stack_result (tree); 247static void replace_reg (rtx *, int); 248static void remove_regno_note (rtx, enum reg_note, unsigned int); 249static int get_hard_regnum (stack, rtx); 250static rtx emit_pop_insn (rtx, stack, rtx, enum emit_where); 251static void emit_swap_insn (rtx, stack, rtx); 252static bool move_for_stack_reg (rtx, stack, rtx); 253static int swap_rtx_condition_1 (rtx); 254static int swap_rtx_condition (rtx); 255static void compare_for_stack_reg (rtx, stack, rtx); 256static bool subst_stack_regs_pat (rtx, stack, rtx); 257static void subst_asm_stack_regs (rtx, stack); 258static bool subst_stack_regs (rtx, stack); 259static void change_stack (rtx, stack, stack, enum emit_where); 260static int convert_regs_entry (void); 261static void convert_regs_exit (void); 262static int convert_regs_1 (FILE *, basic_block); 263static int convert_regs_2 (FILE *, basic_block); 264static int convert_regs (FILE *); 265static void print_stack (FILE *, stack); 266static rtx next_flags_user (rtx); 267static void record_label_references (rtx, rtx); 268static bool compensate_edge (edge, FILE *); 269 270/* Return nonzero if any stack register is mentioned somewhere within PAT. */ 271 272static int 273stack_regs_mentioned_p (rtx pat) 274{ 275 const char *fmt; 276 int i; 277 278 if (STACK_REG_P (pat)) 279 return 1; 280 281 fmt = GET_RTX_FORMAT (GET_CODE (pat)); 282 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--) 283 { 284 if (fmt[i] == 'E') 285 { 286 int j; 287 288 for (j = XVECLEN (pat, i) - 1; j >= 0; j--) 289 if (stack_regs_mentioned_p (XVECEXP (pat, i, j))) 290 return 1; 291 } 292 else if (fmt[i] == 'e' && stack_regs_mentioned_p (XEXP (pat, i))) 293 return 1; 294 } 295 296 return 0; 297} 298 299/* Return nonzero if INSN mentions stacked registers, else return zero. */ 300 301int 302stack_regs_mentioned (rtx insn) 303{ 304 unsigned int uid, max; 305 int test; 306 307 if (! INSN_P (insn) || !stack_regs_mentioned_data) 308 return 0; 309 310 uid = INSN_UID (insn); 311 max = VARRAY_SIZE (stack_regs_mentioned_data); 312 if (uid >= max) 313 { 314 /* Allocate some extra size to avoid too many reallocs, but 315 do not grow too quickly. */ 316 max = uid + uid / 20; 317 VARRAY_GROW (stack_regs_mentioned_data, max); 318 } 319 320 test = VARRAY_CHAR (stack_regs_mentioned_data, uid); 321 if (test == 0) 322 { 323 /* This insn has yet to be examined. Do so now. */ 324 test = stack_regs_mentioned_p (PATTERN (insn)) ? 1 : 2; 325 VARRAY_CHAR (stack_regs_mentioned_data, uid) = test; 326 } 327 328 return test == 1; 329} 330 331static rtx ix86_flags_rtx; 332 333static rtx 334next_flags_user (rtx insn) 335{ 336 /* Search forward looking for the first use of this value. 337 Stop at block boundaries. */ 338 339 while (insn != BB_END (current_block)) 340 { 341 insn = NEXT_INSN (insn); 342 343 if (INSN_P (insn) && reg_mentioned_p (ix86_flags_rtx, PATTERN (insn))) 344 return insn; 345 346 if (GET_CODE (insn) == CALL_INSN) 347 return NULL_RTX; 348 } 349 return NULL_RTX; 350} 351 352/* Reorganize the stack into ascending numbers, 353 after this insn. */ 354 355static void 356straighten_stack (rtx insn, stack regstack) 357{ 358 struct stack_def temp_stack; 359 int top; 360 361 /* If there is only a single register on the stack, then the stack is 362 already in increasing order and no reorganization is needed. 363 364 Similarly if the stack is empty. */ 365 if (regstack->top <= 0) 366 return; 367 368 COPY_HARD_REG_SET (temp_stack.reg_set, regstack->reg_set); 369 370 for (top = temp_stack.top = regstack->top; top >= 0; top--) 371 temp_stack.reg[top] = FIRST_STACK_REG + temp_stack.top - top; 372 373 change_stack (insn, regstack, &temp_stack, EMIT_AFTER); 374} 375 376/* Pop a register from the stack. */ 377 378static void 379pop_stack (stack regstack, int regno) 380{ 381 int top = regstack->top; 382 383 CLEAR_HARD_REG_BIT (regstack->reg_set, regno); 384 regstack->top--; 385 /* If regno was not at the top of stack then adjust stack. */ 386 if (regstack->reg [top] != regno) 387 { 388 int i; 389 for (i = regstack->top; i >= 0; i--) 390 if (regstack->reg [i] == regno) 391 { 392 int j; 393 for (j = i; j < top; j++) 394 regstack->reg [j] = regstack->reg [j + 1]; 395 break; 396 } 397 } 398} 399 400/* Convert register usage from "flat" register file usage to a "stack 401 register file. FIRST is the first insn in the function, FILE is the 402 dump file, if used. 403 404 Construct a CFG and run life analysis. Then convert each insn one 405 by one. Run a last cleanup_cfg pass, if optimizing, to eliminate 406 code duplication created when the converter inserts pop insns on 407 the edges. */ 408 409bool 410reg_to_stack (rtx first, FILE *file) 411{ 412 basic_block bb; 413 int i; 414 int max_uid; 415 416 /* Clean up previous run. */ 417 stack_regs_mentioned_data = 0; 418 419 /* See if there is something to do. Flow analysis is quite 420 expensive so we might save some compilation time. */ 421 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++) 422 if (regs_ever_live[i]) 423 break; 424 if (i > LAST_STACK_REG) 425 return false; 426 427 /* Ok, floating point instructions exist. If not optimizing, 428 build the CFG and run life analysis. 429 Also need to rebuild life when superblock scheduling is done 430 as it don't update liveness yet. */ 431 if (!optimize 432 || ((flag_sched2_use_superblocks || flag_sched2_use_traces) 433 && flag_schedule_insns_after_reload)) 434 { 435 count_or_remove_death_notes (NULL, 1); 436 life_analysis (first, file, PROP_DEATH_NOTES); 437 } 438 mark_dfs_back_edges (); 439 440 /* Set up block info for each basic block. */ 441 alloc_aux_for_blocks (sizeof (struct block_info_def)); 442 FOR_EACH_BB_REVERSE (bb) 443 { 444 edge e; 445 for (e = bb->pred; e; e = e->pred_next) 446 if (!(e->flags & EDGE_DFS_BACK) 447 && e->src != ENTRY_BLOCK_PTR) 448 BLOCK_INFO (bb)->predecessors++; 449 } 450 451 /* Create the replacement registers up front. */ 452 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++) 453 { 454 enum machine_mode mode; 455 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); 456 mode != VOIDmode; 457 mode = GET_MODE_WIDER_MODE (mode)) 458 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i); 459 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT); 460 mode != VOIDmode; 461 mode = GET_MODE_WIDER_MODE (mode)) 462 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i); 463 } 464 465 ix86_flags_rtx = gen_rtx_REG (CCmode, FLAGS_REG); 466 467 /* A QNaN for initializing uninitialized variables. 468 469 ??? We can't load from constant memory in PIC mode, because 470 we're inserting these instructions before the prologue and 471 the PIC register hasn't been set up. In that case, fall back 472 on zero, which we can get from `ldz'. */ 473 474 if (flag_pic) 475 nan = CONST0_RTX (SFmode); 476 else 477 { 478 nan = gen_lowpart (SFmode, GEN_INT (0x7fc00000)); 479 nan = force_const_mem (SFmode, nan); 480 } 481 482 /* Allocate a cache for stack_regs_mentioned. */ 483 max_uid = get_max_uid (); 484 VARRAY_CHAR_INIT (stack_regs_mentioned_data, max_uid + 1, 485 "stack_regs_mentioned cache"); 486 487 convert_regs (file); 488 489 free_aux_for_blocks (); 490 return true; 491} 492 493/* Check PAT, which is in INSN, for LABEL_REFs. Add INSN to the 494 label's chain of references, and note which insn contains each 495 reference. */ 496 497static void 498record_label_references (rtx insn, rtx pat) 499{ 500 enum rtx_code code = GET_CODE (pat); 501 int i; 502 const char *fmt; 503 504 if (code == LABEL_REF) 505 { 506 rtx label = XEXP (pat, 0); 507 rtx ref; 508 509 if (GET_CODE (label) != CODE_LABEL) 510 abort (); 511 512 /* If this is an undefined label, LABEL_REFS (label) contains 513 garbage. */ 514 if (INSN_UID (label) == 0) 515 return; 516 517 /* Don't make a duplicate in the code_label's chain. */ 518 519 for (ref = LABEL_REFS (label); 520 ref && ref != label; 521 ref = LABEL_NEXTREF (ref)) 522 if (CONTAINING_INSN (ref) == insn) 523 return; 524 525 CONTAINING_INSN (pat) = insn; 526 LABEL_NEXTREF (pat) = LABEL_REFS (label); 527 LABEL_REFS (label) = pat; 528 529 return; 530 } 531 532 fmt = GET_RTX_FORMAT (code); 533 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 534 { 535 if (fmt[i] == 'e') 536 record_label_references (insn, XEXP (pat, i)); 537 if (fmt[i] == 'E') 538 { 539 int j; 540 for (j = 0; j < XVECLEN (pat, i); j++) 541 record_label_references (insn, XVECEXP (pat, i, j)); 542 } 543 } 544} 545 546/* Return a pointer to the REG expression within PAT. If PAT is not a 547 REG, possible enclosed by a conversion rtx, return the inner part of 548 PAT that stopped the search. */ 549 550static rtx * 551get_true_reg (rtx *pat) 552{ 553 for (;;) 554 switch (GET_CODE (*pat)) 555 { 556 case SUBREG: 557 /* Eliminate FP subregister accesses in favor of the 558 actual FP register in use. */ 559 { 560 rtx subreg; 561 if (FP_REG_P (subreg = SUBREG_REG (*pat))) 562 { 563 int regno_off = subreg_regno_offset (REGNO (subreg), 564 GET_MODE (subreg), 565 SUBREG_BYTE (*pat), 566 GET_MODE (*pat)); 567 *pat = FP_MODE_REG (REGNO (subreg) + regno_off, 568 GET_MODE (subreg)); 569 default: 570 return pat; 571 } 572 } 573 case FLOAT: 574 case FIX: 575 case FLOAT_EXTEND: 576 pat = & XEXP (*pat, 0); 577 } 578} 579 580/* Set if we find any malformed asms in a block. */ 581static bool any_malformed_asm; 582 583/* There are many rules that an asm statement for stack-like regs must 584 follow. Those rules are explained at the top of this file: the rule 585 numbers below refer to that explanation. */ 586 587static int 588check_asm_stack_operands (rtx insn) 589{ 590 int i; 591 int n_clobbers; 592 int malformed_asm = 0; 593 rtx body = PATTERN (insn); 594 595 char reg_used_as_output[FIRST_PSEUDO_REGISTER]; 596 char implicitly_dies[FIRST_PSEUDO_REGISTER]; 597 int alt; 598 599 rtx *clobber_reg = 0; 600 int n_inputs, n_outputs; 601 602 /* Find out what the constraints require. If no constraint 603 alternative matches, this asm is malformed. */ 604 extract_insn (insn); 605 constrain_operands (1); 606 alt = which_alternative; 607 608 preprocess_constraints (); 609 610 n_inputs = get_asm_operand_n_inputs (body); 611 n_outputs = recog_data.n_operands - n_inputs; 612 613 if (alt < 0) 614 { 615 malformed_asm = 1; 616 /* Avoid further trouble with this insn. */ 617 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx); 618 return 0; 619 } 620 621 /* Strip SUBREGs here to make the following code simpler. */ 622 for (i = 0; i < recog_data.n_operands; i++) 623 if (GET_CODE (recog_data.operand[i]) == SUBREG 624 && GET_CODE (SUBREG_REG (recog_data.operand[i])) == REG) 625 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]); 626 627 /* Set up CLOBBER_REG. */ 628 629 n_clobbers = 0; 630 631 if (GET_CODE (body) == PARALLEL) 632 { 633 clobber_reg = alloca (XVECLEN (body, 0) * sizeof (rtx)); 634 635 for (i = 0; i < XVECLEN (body, 0); i++) 636 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER) 637 { 638 rtx clobber = XVECEXP (body, 0, i); 639 rtx reg = XEXP (clobber, 0); 640 641 if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG) 642 reg = SUBREG_REG (reg); 643 644 if (STACK_REG_P (reg)) 645 { 646 clobber_reg[n_clobbers] = reg; 647 n_clobbers++; 648 } 649 } 650 } 651 652 /* Enforce rule #4: Output operands must specifically indicate which 653 reg an output appears in after an asm. "=f" is not allowed: the 654 operand constraints must select a class with a single reg. 655 656 Also enforce rule #5: Output operands must start at the top of 657 the reg-stack: output operands may not "skip" a reg. */ 658 659 memset (reg_used_as_output, 0, sizeof (reg_used_as_output)); 660 for (i = 0; i < n_outputs; i++) 661 if (STACK_REG_P (recog_data.operand[i])) 662 { 663 if (reg_class_size[(int) recog_op_alt[i][alt].class] != 1) 664 { 665 error_for_asm (insn, "output constraint %d must specify a single register", i); 666 malformed_asm = 1; 667 } 668 else 669 { 670 int j; 671 672 for (j = 0; j < n_clobbers; j++) 673 if (REGNO (recog_data.operand[i]) == REGNO (clobber_reg[j])) 674 { 675 error_for_asm (insn, "output constraint %d cannot be specified together with \"%s\" clobber", 676 i, reg_names [REGNO (clobber_reg[j])]); 677 malformed_asm = 1; 678 break; 679 } 680 if (j == n_clobbers) 681 reg_used_as_output[REGNO (recog_data.operand[i])] = 1; 682 } 683 } 684 685 686 /* Search for first non-popped reg. */ 687 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++) 688 if (! reg_used_as_output[i]) 689 break; 690 691 /* If there are any other popped regs, that's an error. */ 692 for (; i < LAST_STACK_REG + 1; i++) 693 if (reg_used_as_output[i]) 694 break; 695 696 if (i != LAST_STACK_REG + 1) 697 { 698 error_for_asm (insn, "output regs must be grouped at top of stack"); 699 malformed_asm = 1; 700 } 701 702 /* Enforce rule #2: All implicitly popped input regs must be closer 703 to the top of the reg-stack than any input that is not implicitly 704 popped. */ 705 706 memset (implicitly_dies, 0, sizeof (implicitly_dies)); 707 for (i = n_outputs; i < n_outputs + n_inputs; i++) 708 if (STACK_REG_P (recog_data.operand[i])) 709 { 710 /* An input reg is implicitly popped if it is tied to an 711 output, or if there is a CLOBBER for it. */ 712 int j; 713 714 for (j = 0; j < n_clobbers; j++) 715 if (operands_match_p (clobber_reg[j], recog_data.operand[i])) 716 break; 717 718 if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0) 719 implicitly_dies[REGNO (recog_data.operand[i])] = 1; 720 } 721 722 /* Search for first non-popped reg. */ 723 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++) 724 if (! implicitly_dies[i]) 725 break; 726 727 /* If there are any other popped regs, that's an error. */ 728 for (; i < LAST_STACK_REG + 1; i++) 729 if (implicitly_dies[i]) 730 break; 731 732 if (i != LAST_STACK_REG + 1) 733 { 734 error_for_asm (insn, 735 "implicitly popped regs must be grouped at top of stack"); 736 malformed_asm = 1; 737 } 738 739 /* Enforce rule #3: If any input operand uses the "f" constraint, all 740 output constraints must use the "&" earlyclobber. 741 742 ??? Detect this more deterministically by having constrain_asm_operands 743 record any earlyclobber. */ 744 745 for (i = n_outputs; i < n_outputs + n_inputs; i++) 746 if (recog_op_alt[i][alt].matches == -1) 747 { 748 int j; 749 750 for (j = 0; j < n_outputs; j++) 751 if (operands_match_p (recog_data.operand[j], recog_data.operand[i])) 752 { 753 error_for_asm (insn, 754 "output operand %d must use `&' constraint", j); 755 malformed_asm = 1; 756 } 757 } 758 759 if (malformed_asm) 760 { 761 /* Avoid further trouble with this insn. */ 762 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx); 763 any_malformed_asm = true; 764 return 0; 765 } 766 767 return 1; 768} 769 770/* Calculate the number of inputs and outputs in BODY, an 771 asm_operands. N_OPERANDS is the total number of operands, and 772 N_INPUTS and N_OUTPUTS are pointers to ints into which the results are 773 placed. */ 774 775static int 776get_asm_operand_n_inputs (rtx body) 777{ 778 if (GET_CODE (body) == SET && GET_CODE (SET_SRC (body)) == ASM_OPERANDS) 779 return ASM_OPERANDS_INPUT_LENGTH (SET_SRC (body)); 780 781 else if (GET_CODE (body) == ASM_OPERANDS) 782 return ASM_OPERANDS_INPUT_LENGTH (body); 783 784 else if (GET_CODE (body) == PARALLEL 785 && GET_CODE (XVECEXP (body, 0, 0)) == SET) 786 return ASM_OPERANDS_INPUT_LENGTH (SET_SRC (XVECEXP (body, 0, 0))); 787 788 else if (GET_CODE (body) == PARALLEL 789 && GET_CODE (XVECEXP (body, 0, 0)) == ASM_OPERANDS) 790 return ASM_OPERANDS_INPUT_LENGTH (XVECEXP (body, 0, 0)); 791 792 abort (); 793} 794 795/* If current function returns its result in an fp stack register, 796 return the REG. Otherwise, return 0. */ 797 798static rtx 799stack_result (tree decl) 800{ 801 rtx result; 802 803 /* If the value is supposed to be returned in memory, then clearly 804 it is not returned in a stack register. */ 805 if (aggregate_value_p (DECL_RESULT (decl), decl)) 806 return 0; 807 808 result = DECL_RTL_IF_SET (DECL_RESULT (decl)); 809 if (result != 0) 810 { 811#ifdef FUNCTION_OUTGOING_VALUE 812 result 813 = FUNCTION_OUTGOING_VALUE (TREE_TYPE (DECL_RESULT (decl)), decl); 814#else 815 result = FUNCTION_VALUE (TREE_TYPE (DECL_RESULT (decl)), decl); 816#endif 817 } 818 819 return result != 0 && STACK_REG_P (result) ? result : 0; 820} 821 822 823/* 824 * This section deals with stack register substitution, and forms the second 825 * pass over the RTL. 826 */ 827 828/* Replace REG, which is a pointer to a stack reg RTX, with an RTX for 829 the desired hard REGNO. */ 830 831static void 832replace_reg (rtx *reg, int regno) 833{ 834 if (regno < FIRST_STACK_REG || regno > LAST_STACK_REG 835 || ! STACK_REG_P (*reg)) 836 abort (); 837 838 switch (GET_MODE_CLASS (GET_MODE (*reg))) 839 { 840 default: abort (); 841 case MODE_FLOAT: 842 case MODE_COMPLEX_FLOAT:; 843 } 844 845 *reg = FP_MODE_REG (regno, GET_MODE (*reg)); 846} 847 848/* Remove a note of type NOTE, which must be found, for register 849 number REGNO from INSN. Remove only one such note. */ 850 851static void 852remove_regno_note (rtx insn, enum reg_note note, unsigned int regno) 853{ 854 rtx *note_link, this; 855 856 note_link = ®_NOTES (insn); 857 for (this = *note_link; this; this = XEXP (this, 1)) 858 if (REG_NOTE_KIND (this) == note 859 && REG_P (XEXP (this, 0)) && REGNO (XEXP (this, 0)) == regno) 860 { 861 *note_link = XEXP (this, 1); 862 return; 863 } 864 else 865 note_link = &XEXP (this, 1); 866 867 abort (); 868} 869 870/* Find the hard register number of virtual register REG in REGSTACK. 871 The hard register number is relative to the top of the stack. -1 is 872 returned if the register is not found. */ 873 874static int 875get_hard_regnum (stack regstack, rtx reg) 876{ 877 int i; 878 879 if (! STACK_REG_P (reg)) 880 abort (); 881 882 for (i = regstack->top; i >= 0; i--) 883 if (regstack->reg[i] == REGNO (reg)) 884 break; 885 886 return i >= 0 ? (FIRST_STACK_REG + regstack->top - i) : -1; 887} 888 889/* Emit an insn to pop virtual register REG before or after INSN. 890 REGSTACK is the stack state after INSN and is updated to reflect this 891 pop. WHEN is either emit_insn_before or emit_insn_after. A pop insn 892 is represented as a SET whose destination is the register to be popped 893 and source is the top of stack. A death note for the top of stack 894 cases the movdf pattern to pop. */ 895 896static rtx 897emit_pop_insn (rtx insn, stack regstack, rtx reg, enum emit_where where) 898{ 899 rtx pop_insn, pop_rtx; 900 int hard_regno; 901 902 /* For complex types take care to pop both halves. These may survive in 903 CLOBBER and USE expressions. */ 904 if (COMPLEX_MODE_P (GET_MODE (reg))) 905 { 906 rtx reg1 = FP_MODE_REG (REGNO (reg), DFmode); 907 rtx reg2 = FP_MODE_REG (REGNO (reg) + 1, DFmode); 908 909 pop_insn = NULL_RTX; 910 if (get_hard_regnum (regstack, reg1) >= 0) 911 pop_insn = emit_pop_insn (insn, regstack, reg1, where); 912 if (get_hard_regnum (regstack, reg2) >= 0) 913 pop_insn = emit_pop_insn (insn, regstack, reg2, where); 914 if (!pop_insn) 915 abort (); 916 return pop_insn; 917 } 918 919 hard_regno = get_hard_regnum (regstack, reg); 920 921 if (hard_regno < FIRST_STACK_REG) 922 abort (); 923 924 pop_rtx = gen_rtx_SET (VOIDmode, FP_MODE_REG (hard_regno, DFmode), 925 FP_MODE_REG (FIRST_STACK_REG, DFmode)); 926 927 if (where == EMIT_AFTER) 928 pop_insn = emit_insn_after (pop_rtx, insn); 929 else 930 pop_insn = emit_insn_before (pop_rtx, insn); 931 932 REG_NOTES (pop_insn) 933 = gen_rtx_EXPR_LIST (REG_DEAD, FP_MODE_REG (FIRST_STACK_REG, DFmode), 934 REG_NOTES (pop_insn)); 935 936 regstack->reg[regstack->top - (hard_regno - FIRST_STACK_REG)] 937 = regstack->reg[regstack->top]; 938 regstack->top -= 1; 939 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (reg)); 940 941 return pop_insn; 942} 943 944/* Emit an insn before or after INSN to swap virtual register REG with 945 the top of stack. REGSTACK is the stack state before the swap, and 946 is updated to reflect the swap. A swap insn is represented as a 947 PARALLEL of two patterns: each pattern moves one reg to the other. 948 949 If REG is already at the top of the stack, no insn is emitted. */ 950 951static void 952emit_swap_insn (rtx insn, stack regstack, rtx reg) 953{ 954 int hard_regno; 955 rtx swap_rtx; 956 int tmp, other_reg; /* swap regno temps */ 957 rtx i1; /* the stack-reg insn prior to INSN */ 958 rtx i1set = NULL_RTX; /* the SET rtx within I1 */ 959 960 hard_regno = get_hard_regnum (regstack, reg); 961 962 if (hard_regno < FIRST_STACK_REG) 963 abort (); 964 if (hard_regno == FIRST_STACK_REG) 965 return; 966 967 other_reg = regstack->top - (hard_regno - FIRST_STACK_REG); 968 969 tmp = regstack->reg[other_reg]; 970 regstack->reg[other_reg] = regstack->reg[regstack->top]; 971 regstack->reg[regstack->top] = tmp; 972 973 /* Find the previous insn involving stack regs, but don't pass a 974 block boundary. */ 975 i1 = NULL; 976 if (current_block && insn != BB_HEAD (current_block)) 977 { 978 rtx tmp = PREV_INSN (insn); 979 rtx limit = PREV_INSN (BB_HEAD (current_block)); 980 while (tmp != limit) 981 { 982 if (GET_CODE (tmp) == CODE_LABEL 983 || GET_CODE (tmp) == CALL_INSN 984 || NOTE_INSN_BASIC_BLOCK_P (tmp) 985 || (GET_CODE (tmp) == INSN 986 && stack_regs_mentioned (tmp))) 987 { 988 i1 = tmp; 989 break; 990 } 991 tmp = PREV_INSN (tmp); 992 } 993 } 994 995 if (i1 != NULL_RTX 996 && (i1set = single_set (i1)) != NULL_RTX) 997 { 998 rtx i1src = *get_true_reg (&SET_SRC (i1set)); 999 rtx i1dest = *get_true_reg (&SET_DEST (i1set)); 1000 1001 /* If the previous register stack push was from the reg we are to 1002 swap with, omit the swap. */ 1003 1004 if (GET_CODE (i1dest) == REG && REGNO (i1dest) == FIRST_STACK_REG 1005 && GET_CODE (i1src) == REG 1006 && REGNO (i1src) == (unsigned) hard_regno - 1 1007 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX) 1008 return; 1009 1010 /* If the previous insn wrote to the reg we are to swap with, 1011 omit the swap. */ 1012 1013 if (GET_CODE (i1dest) == REG && REGNO (i1dest) == (unsigned) hard_regno 1014 && GET_CODE (i1src) == REG && REGNO (i1src) == FIRST_STACK_REG 1015 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX) 1016 return; 1017 } 1018 1019 swap_rtx = gen_swapxf (FP_MODE_REG (hard_regno, XFmode), 1020 FP_MODE_REG (FIRST_STACK_REG, XFmode)); 1021 1022 if (i1) 1023 emit_insn_after (swap_rtx, i1); 1024 else if (current_block) 1025 emit_insn_before (swap_rtx, BB_HEAD (current_block)); 1026 else 1027 emit_insn_before (swap_rtx, insn); 1028} 1029 1030/* Handle a move to or from a stack register in PAT, which is in INSN. 1031 REGSTACK is the current stack. Return whether a control flow insn 1032 was deleted in the process. */ 1033 1034static bool 1035move_for_stack_reg (rtx insn, stack regstack, rtx pat) 1036{ 1037 rtx *psrc = get_true_reg (&SET_SRC (pat)); 1038 rtx *pdest = get_true_reg (&SET_DEST (pat)); 1039 rtx src, dest; 1040 rtx note; 1041 bool control_flow_insn_deleted = false; 1042 1043 src = *psrc; dest = *pdest; 1044 1045 if (STACK_REG_P (src) && STACK_REG_P (dest)) 1046 { 1047 /* Write from one stack reg to another. If SRC dies here, then 1048 just change the register mapping and delete the insn. */ 1049 1050 note = find_regno_note (insn, REG_DEAD, REGNO (src)); 1051 if (note) 1052 { 1053 int i; 1054 1055 /* If this is a no-op move, there must not be a REG_DEAD note. */ 1056 if (REGNO (src) == REGNO (dest)) 1057 abort (); 1058 1059 for (i = regstack->top; i >= 0; i--) 1060 if (regstack->reg[i] == REGNO (src)) 1061 break; 1062 1063 /* The destination must be dead, or life analysis is borked. */ 1064 if (get_hard_regnum (regstack, dest) >= FIRST_STACK_REG) 1065 abort (); 1066 1067 /* If the source is not live, this is yet another case of 1068 uninitialized variables. Load up a NaN instead. */ 1069 if (i < 0) 1070 { 1071 PATTERN (insn) = pat 1072 = gen_rtx_SET (VOIDmode, 1073 FP_MODE_REG (REGNO (dest), SFmode), nan); 1074 INSN_CODE (insn) = -1; 1075 return move_for_stack_reg (insn, regstack, pat); 1076 } 1077 1078 /* It is possible that the dest is unused after this insn. 1079 If so, just pop the src. */ 1080 1081 if (find_regno_note (insn, REG_UNUSED, REGNO (dest))) 1082 emit_pop_insn (insn, regstack, src, EMIT_AFTER); 1083 else 1084 { 1085 regstack->reg[i] = REGNO (dest); 1086 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest)); 1087 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src)); 1088 } 1089 1090 control_flow_insn_deleted |= control_flow_insn_p (insn); 1091 delete_insn (insn); 1092 return control_flow_insn_deleted; 1093 } 1094 1095 /* The source reg does not die. */ 1096 1097 /* If this appears to be a no-op move, delete it, or else it 1098 will confuse the machine description output patterns. But if 1099 it is REG_UNUSED, we must pop the reg now, as per-insn processing 1100 for REG_UNUSED will not work for deleted insns. */ 1101 1102 if (REGNO (src) == REGNO (dest)) 1103 { 1104 if (find_regno_note (insn, REG_UNUSED, REGNO (dest))) 1105 emit_pop_insn (insn, regstack, dest, EMIT_AFTER); 1106 1107 control_flow_insn_deleted |= control_flow_insn_p (insn); 1108 delete_insn (insn); 1109 return control_flow_insn_deleted; 1110 } 1111 1112 /* The destination ought to be dead. */ 1113 if (get_hard_regnum (regstack, dest) >= FIRST_STACK_REG) 1114 abort (); 1115 1116 replace_reg (psrc, get_hard_regnum (regstack, src)); 1117 1118 regstack->reg[++regstack->top] = REGNO (dest); 1119 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest)); 1120 replace_reg (pdest, FIRST_STACK_REG); 1121 } 1122 else if (STACK_REG_P (src)) 1123 { 1124 /* Save from a stack reg to MEM, or possibly integer reg. Since 1125 only top of stack may be saved, emit an exchange first if 1126 needs be. */ 1127 1128 emit_swap_insn (insn, regstack, src); 1129 1130 note = find_regno_note (insn, REG_DEAD, REGNO (src)); 1131 if (note) 1132 { 1133 replace_reg (&XEXP (note, 0), FIRST_STACK_REG); 1134 regstack->top--; 1135 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src)); 1136 } 1137 else if ((GET_MODE (src) == XFmode) 1138 && regstack->top < REG_STACK_SIZE - 1) 1139 { 1140 /* A 387 cannot write an XFmode value to a MEM without 1141 clobbering the source reg. The output code can handle 1142 this by reading back the value from the MEM. 1143 But it is more efficient to use a temp register if one is 1144 available. Push the source value here if the register 1145 stack is not full, and then write the value to memory via 1146 a pop. */ 1147 rtx push_rtx, push_insn; 1148 rtx top_stack_reg = FP_MODE_REG (FIRST_STACK_REG, GET_MODE (src)); 1149 1150 push_rtx = gen_movxf (top_stack_reg, top_stack_reg); 1151 push_insn = emit_insn_before (push_rtx, insn); 1152 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_DEAD, top_stack_reg, 1153 REG_NOTES (insn)); 1154 } 1155 1156 replace_reg (psrc, FIRST_STACK_REG); 1157 } 1158 else if (STACK_REG_P (dest)) 1159 { 1160 /* Load from MEM, or possibly integer REG or constant, into the 1161 stack regs. The actual target is always the top of the 1162 stack. The stack mapping is changed to reflect that DEST is 1163 now at top of stack. */ 1164 1165 /* The destination ought to be dead. */ 1166 if (get_hard_regnum (regstack, dest) >= FIRST_STACK_REG) 1167 abort (); 1168 1169 if (regstack->top >= REG_STACK_SIZE) 1170 abort (); 1171 1172 regstack->reg[++regstack->top] = REGNO (dest); 1173 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest)); 1174 replace_reg (pdest, FIRST_STACK_REG); 1175 } 1176 else 1177 abort (); 1178 1179 return control_flow_insn_deleted; 1180} 1181 1182/* Swap the condition on a branch, if there is one. Return true if we 1183 found a condition to swap. False if the condition was not used as 1184 such. */ 1185 1186static int 1187swap_rtx_condition_1 (rtx pat) 1188{ 1189 const char *fmt; 1190 int i, r = 0; 1191 1192 if (GET_RTX_CLASS (GET_CODE (pat)) == '<') 1193 { 1194 PUT_CODE (pat, swap_condition (GET_CODE (pat))); 1195 r = 1; 1196 } 1197 else 1198 { 1199 fmt = GET_RTX_FORMAT (GET_CODE (pat)); 1200 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--) 1201 { 1202 if (fmt[i] == 'E') 1203 { 1204 int j; 1205 1206 for (j = XVECLEN (pat, i) - 1; j >= 0; j--) 1207 r |= swap_rtx_condition_1 (XVECEXP (pat, i, j)); 1208 } 1209 else if (fmt[i] == 'e') 1210 r |= swap_rtx_condition_1 (XEXP (pat, i)); 1211 } 1212 } 1213 1214 return r; 1215} 1216 1217static int 1218swap_rtx_condition (rtx insn) 1219{ 1220 rtx pat = PATTERN (insn); 1221 1222 /* We're looking for a single set to cc0 or an HImode temporary. */ 1223 1224 if (GET_CODE (pat) == SET 1225 && GET_CODE (SET_DEST (pat)) == REG 1226 && REGNO (SET_DEST (pat)) == FLAGS_REG) 1227 { 1228 insn = next_flags_user (insn); 1229 if (insn == NULL_RTX) 1230 return 0; 1231 pat = PATTERN (insn); 1232 } 1233 1234 /* See if this is, or ends in, a fnstsw. If so, we're not doing anything 1235 with the cc value right now. We may be able to search for one 1236 though. */ 1237 1238 if (GET_CODE (pat) == SET 1239 && GET_CODE (SET_SRC (pat)) == UNSPEC 1240 && XINT (SET_SRC (pat), 1) == UNSPEC_FNSTSW) 1241 { 1242 rtx dest = SET_DEST (pat); 1243 1244 /* Search forward looking for the first use of this value. 1245 Stop at block boundaries. */ 1246 while (insn != BB_END (current_block)) 1247 { 1248 insn = NEXT_INSN (insn); 1249 if (INSN_P (insn) && reg_mentioned_p (dest, insn)) 1250 break; 1251 if (GET_CODE (insn) == CALL_INSN) 1252 return 0; 1253 } 1254 1255 /* We haven't found it. */ 1256 if (insn == BB_END (current_block)) 1257 return 0; 1258 1259 /* So we've found the insn using this value. If it is anything 1260 other than sahf or the value does not die (meaning we'd have 1261 to search further), then we must give up. */ 1262 pat = PATTERN (insn); 1263 if (GET_CODE (pat) != SET 1264 || GET_CODE (SET_SRC (pat)) != UNSPEC 1265 || XINT (SET_SRC (pat), 1) != UNSPEC_SAHF 1266 || ! dead_or_set_p (insn, dest)) 1267 return 0; 1268 1269 /* Now we are prepared to handle this as a normal cc0 setter. */ 1270 insn = next_flags_user (insn); 1271 if (insn == NULL_RTX) 1272 return 0; 1273 pat = PATTERN (insn); 1274 } 1275 1276 if (swap_rtx_condition_1 (pat)) 1277 { 1278 int fail = 0; 1279 INSN_CODE (insn) = -1; 1280 if (recog_memoized (insn) == -1) 1281 fail = 1; 1282 /* In case the flags don't die here, recurse to try fix 1283 following user too. */ 1284 else if (! dead_or_set_p (insn, ix86_flags_rtx)) 1285 { 1286 insn = next_flags_user (insn); 1287 if (!insn || !swap_rtx_condition (insn)) 1288 fail = 1; 1289 } 1290 if (fail) 1291 { 1292 swap_rtx_condition_1 (pat); 1293 return 0; 1294 } 1295 return 1; 1296 } 1297 return 0; 1298} 1299 1300/* Handle a comparison. Special care needs to be taken to avoid 1301 causing comparisons that a 387 cannot do correctly, such as EQ. 1302 1303 Also, a pop insn may need to be emitted. The 387 does have an 1304 `fcompp' insn that can pop two regs, but it is sometimes too expensive 1305 to do this - a `fcomp' followed by a `fstpl %st(0)' may be easier to 1306 set up. */ 1307 1308static void 1309compare_for_stack_reg (rtx insn, stack regstack, rtx pat_src) 1310{ 1311 rtx *src1, *src2; 1312 rtx src1_note, src2_note; 1313 rtx flags_user; 1314 1315 src1 = get_true_reg (&XEXP (pat_src, 0)); 1316 src2 = get_true_reg (&XEXP (pat_src, 1)); 1317 flags_user = next_flags_user (insn); 1318 1319 /* ??? If fxch turns out to be cheaper than fstp, give priority to 1320 registers that die in this insn - move those to stack top first. */ 1321 if ((! STACK_REG_P (*src1) 1322 || (STACK_REG_P (*src2) 1323 && get_hard_regnum (regstack, *src2) == FIRST_STACK_REG)) 1324 && swap_rtx_condition (insn)) 1325 { 1326 rtx temp; 1327 temp = XEXP (pat_src, 0); 1328 XEXP (pat_src, 0) = XEXP (pat_src, 1); 1329 XEXP (pat_src, 1) = temp; 1330 1331 src1 = get_true_reg (&XEXP (pat_src, 0)); 1332 src2 = get_true_reg (&XEXP (pat_src, 1)); 1333 1334 INSN_CODE (insn) = -1; 1335 } 1336 1337 /* We will fix any death note later. */ 1338 1339 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1340 1341 if (STACK_REG_P (*src2)) 1342 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); 1343 else 1344 src2_note = NULL_RTX; 1345 1346 emit_swap_insn (insn, regstack, *src1); 1347 1348 replace_reg (src1, FIRST_STACK_REG); 1349 1350 if (STACK_REG_P (*src2)) 1351 replace_reg (src2, get_hard_regnum (regstack, *src2)); 1352 1353 if (src1_note) 1354 { 1355 pop_stack (regstack, REGNO (XEXP (src1_note, 0))); 1356 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); 1357 } 1358 1359 /* If the second operand dies, handle that. But if the operands are 1360 the same stack register, don't bother, because only one death is 1361 needed, and it was just handled. */ 1362 1363 if (src2_note 1364 && ! (STACK_REG_P (*src1) && STACK_REG_P (*src2) 1365 && REGNO (*src1) == REGNO (*src2))) 1366 { 1367 /* As a special case, two regs may die in this insn if src2 is 1368 next to top of stack and the top of stack also dies. Since 1369 we have already popped src1, "next to top of stack" is really 1370 at top (FIRST_STACK_REG) now. */ 1371 1372 if (get_hard_regnum (regstack, XEXP (src2_note, 0)) == FIRST_STACK_REG 1373 && src1_note) 1374 { 1375 pop_stack (regstack, REGNO (XEXP (src2_note, 0))); 1376 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1); 1377 } 1378 else 1379 { 1380 /* The 386 can only represent death of the first operand in 1381 the case handled above. In all other cases, emit a separate 1382 pop and remove the death note from here. */ 1383 1384 /* link_cc0_insns (insn); */ 1385 1386 remove_regno_note (insn, REG_DEAD, REGNO (XEXP (src2_note, 0))); 1387 1388 emit_pop_insn (insn, regstack, XEXP (src2_note, 0), 1389 EMIT_AFTER); 1390 } 1391 } 1392} 1393 1394/* Substitute new registers in PAT, which is part of INSN. REGSTACK 1395 is the current register layout. Return whether a control flow insn 1396 was deleted in the process. */ 1397 1398static bool 1399subst_stack_regs_pat (rtx insn, stack regstack, rtx pat) 1400{ 1401 rtx *dest, *src; 1402 bool control_flow_insn_deleted = false; 1403 1404 switch (GET_CODE (pat)) 1405 { 1406 case USE: 1407 /* Deaths in USE insns can happen in non optimizing compilation. 1408 Handle them by popping the dying register. */ 1409 src = get_true_reg (&XEXP (pat, 0)); 1410 if (STACK_REG_P (*src) 1411 && find_regno_note (insn, REG_DEAD, REGNO (*src))) 1412 { 1413 emit_pop_insn (insn, regstack, *src, EMIT_AFTER); 1414 return control_flow_insn_deleted; 1415 } 1416 /* ??? Uninitialized USE should not happen. */ 1417 else if (get_hard_regnum (regstack, *src) == -1) 1418 abort (); 1419 break; 1420 1421 case CLOBBER: 1422 { 1423 rtx note; 1424 1425 dest = get_true_reg (&XEXP (pat, 0)); 1426 if (STACK_REG_P (*dest)) 1427 { 1428 note = find_reg_note (insn, REG_DEAD, *dest); 1429 1430 if (pat != PATTERN (insn)) 1431 { 1432 /* The fix_truncdi_1 pattern wants to be able to allocate 1433 it's own scratch register. It does this by clobbering 1434 an fp reg so that it is assured of an empty reg-stack 1435 register. If the register is live, kill it now. 1436 Remove the DEAD/UNUSED note so we don't try to kill it 1437 later too. */ 1438 1439 if (note) 1440 emit_pop_insn (insn, regstack, *dest, EMIT_BEFORE); 1441 else 1442 { 1443 note = find_reg_note (insn, REG_UNUSED, *dest); 1444 if (!note) 1445 abort (); 1446 } 1447 remove_note (insn, note); 1448 replace_reg (dest, FIRST_STACK_REG + 1); 1449 } 1450 else 1451 { 1452 /* A top-level clobber with no REG_DEAD, and no hard-regnum 1453 indicates an uninitialized value. Because reload removed 1454 all other clobbers, this must be due to a function 1455 returning without a value. Load up a NaN. */ 1456 1457 if (! note 1458 && get_hard_regnum (regstack, *dest) == -1) 1459 { 1460 pat = gen_rtx_SET (VOIDmode, 1461 FP_MODE_REG (REGNO (*dest), SFmode), 1462 nan); 1463 PATTERN (insn) = pat; 1464 control_flow_insn_deleted |= move_for_stack_reg (insn, regstack, pat); 1465 } 1466 if (! note && COMPLEX_MODE_P (GET_MODE (*dest)) 1467 && get_hard_regnum (regstack, FP_MODE_REG (REGNO (*dest), DFmode)) == -1) 1468 { 1469 pat = gen_rtx_SET (VOIDmode, 1470 FP_MODE_REG (REGNO (*dest) + 1, SFmode), 1471 nan); 1472 PATTERN (insn) = pat; 1473 control_flow_insn_deleted |= move_for_stack_reg (insn, regstack, pat); 1474 } 1475 } 1476 } 1477 break; 1478 } 1479 1480 case SET: 1481 { 1482 rtx *src1 = (rtx *) 0, *src2; 1483 rtx src1_note, src2_note; 1484 rtx pat_src; 1485 1486 dest = get_true_reg (&SET_DEST (pat)); 1487 src = get_true_reg (&SET_SRC (pat)); 1488 pat_src = SET_SRC (pat); 1489 1490 /* See if this is a `movM' pattern, and handle elsewhere if so. */ 1491 if (STACK_REG_P (*src) 1492 || (STACK_REG_P (*dest) 1493 && (GET_CODE (*src) == REG || GET_CODE (*src) == MEM 1494 || GET_CODE (*src) == CONST_DOUBLE))) 1495 { 1496 control_flow_insn_deleted |= move_for_stack_reg (insn, regstack, pat); 1497 break; 1498 } 1499 1500 switch (GET_CODE (pat_src)) 1501 { 1502 case COMPARE: 1503 compare_for_stack_reg (insn, regstack, pat_src); 1504 break; 1505 1506 case CALL: 1507 { 1508 int count; 1509 for (count = HARD_REGNO_NREGS (REGNO (*dest), GET_MODE (*dest)); 1510 --count >= 0;) 1511 { 1512 regstack->reg[++regstack->top] = REGNO (*dest) + count; 1513 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest) + count); 1514 } 1515 } 1516 replace_reg (dest, FIRST_STACK_REG); 1517 break; 1518 1519 case REG: 1520 /* This is a `tstM2' case. */ 1521 if (*dest != cc0_rtx) 1522 abort (); 1523 src1 = src; 1524 1525 /* Fall through. */ 1526 1527 case FLOAT_TRUNCATE: 1528 case SQRT: 1529 case ABS: 1530 case NEG: 1531 /* These insns only operate on the top of the stack. DEST might 1532 be cc0_rtx if we're processing a tstM pattern. Also, it's 1533 possible that the tstM case results in a REG_DEAD note on the 1534 source. */ 1535 1536 if (src1 == 0) 1537 src1 = get_true_reg (&XEXP (pat_src, 0)); 1538 1539 emit_swap_insn (insn, regstack, *src1); 1540 1541 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1542 1543 if (STACK_REG_P (*dest)) 1544 replace_reg (dest, FIRST_STACK_REG); 1545 1546 if (src1_note) 1547 { 1548 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); 1549 regstack->top--; 1550 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1)); 1551 } 1552 1553 replace_reg (src1, FIRST_STACK_REG); 1554 break; 1555 1556 case MINUS: 1557 case DIV: 1558 /* On i386, reversed forms of subM3 and divM3 exist for 1559 MODE_FLOAT, so the same code that works for addM3 and mulM3 1560 can be used. */ 1561 case MULT: 1562 case PLUS: 1563 /* These insns can accept the top of stack as a destination 1564 from a stack reg or mem, or can use the top of stack as a 1565 source and some other stack register (possibly top of stack) 1566 as a destination. */ 1567 1568 src1 = get_true_reg (&XEXP (pat_src, 0)); 1569 src2 = get_true_reg (&XEXP (pat_src, 1)); 1570 1571 /* We will fix any death note later. */ 1572 1573 if (STACK_REG_P (*src1)) 1574 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1575 else 1576 src1_note = NULL_RTX; 1577 if (STACK_REG_P (*src2)) 1578 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); 1579 else 1580 src2_note = NULL_RTX; 1581 1582 /* If either operand is not a stack register, then the dest 1583 must be top of stack. */ 1584 1585 if (! STACK_REG_P (*src1) || ! STACK_REG_P (*src2)) 1586 emit_swap_insn (insn, regstack, *dest); 1587 else 1588 { 1589 /* Both operands are REG. If neither operand is already 1590 at the top of stack, choose to make the one that is the dest 1591 the new top of stack. */ 1592 1593 int src1_hard_regnum, src2_hard_regnum; 1594 1595 src1_hard_regnum = get_hard_regnum (regstack, *src1); 1596 src2_hard_regnum = get_hard_regnum (regstack, *src2); 1597 if (src1_hard_regnum == -1 || src2_hard_regnum == -1) 1598 abort (); 1599 1600 if (src1_hard_regnum != FIRST_STACK_REG 1601 && src2_hard_regnum != FIRST_STACK_REG) 1602 emit_swap_insn (insn, regstack, *dest); 1603 } 1604 1605 if (STACK_REG_P (*src1)) 1606 replace_reg (src1, get_hard_regnum (regstack, *src1)); 1607 if (STACK_REG_P (*src2)) 1608 replace_reg (src2, get_hard_regnum (regstack, *src2)); 1609 1610 if (src1_note) 1611 { 1612 rtx src1_reg = XEXP (src1_note, 0); 1613 1614 /* If the register that dies is at the top of stack, then 1615 the destination is somewhere else - merely substitute it. 1616 But if the reg that dies is not at top of stack, then 1617 move the top of stack to the dead reg, as though we had 1618 done the insn and then a store-with-pop. */ 1619 1620 if (REGNO (src1_reg) == regstack->reg[regstack->top]) 1621 { 1622 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1623 replace_reg (dest, get_hard_regnum (regstack, *dest)); 1624 } 1625 else 1626 { 1627 int regno = get_hard_regnum (regstack, src1_reg); 1628 1629 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1630 replace_reg (dest, regno); 1631 1632 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)] 1633 = regstack->reg[regstack->top]; 1634 } 1635 1636 CLEAR_HARD_REG_BIT (regstack->reg_set, 1637 REGNO (XEXP (src1_note, 0))); 1638 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); 1639 regstack->top--; 1640 } 1641 else if (src2_note) 1642 { 1643 rtx src2_reg = XEXP (src2_note, 0); 1644 if (REGNO (src2_reg) == regstack->reg[regstack->top]) 1645 { 1646 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1647 replace_reg (dest, get_hard_regnum (regstack, *dest)); 1648 } 1649 else 1650 { 1651 int regno = get_hard_regnum (regstack, src2_reg); 1652 1653 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1654 replace_reg (dest, regno); 1655 1656 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)] 1657 = regstack->reg[regstack->top]; 1658 } 1659 1660 CLEAR_HARD_REG_BIT (regstack->reg_set, 1661 REGNO (XEXP (src2_note, 0))); 1662 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG); 1663 regstack->top--; 1664 } 1665 else 1666 { 1667 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1668 replace_reg (dest, get_hard_regnum (regstack, *dest)); 1669 } 1670 1671 /* Keep operand 1 matching with destination. */ 1672 if (GET_RTX_CLASS (GET_CODE (pat_src)) == 'c' 1673 && REG_P (*src1) && REG_P (*src2) 1674 && REGNO (*src1) != REGNO (*dest)) 1675 { 1676 int tmp = REGNO (*src1); 1677 replace_reg (src1, REGNO (*src2)); 1678 replace_reg (src2, tmp); 1679 } 1680 break; 1681 1682 case UNSPEC: 1683 switch (XINT (pat_src, 1)) 1684 { 1685 case UNSPEC_SIN: 1686 case UNSPEC_COS: 1687 case UNSPEC_FRNDINT: 1688 case UNSPEC_F2XM1: 1689 /* These insns only operate on the top of the stack. */ 1690 1691 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); 1692 1693 emit_swap_insn (insn, regstack, *src1); 1694 1695 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1696 1697 if (STACK_REG_P (*dest)) 1698 replace_reg (dest, FIRST_STACK_REG); 1699 1700 if (src1_note) 1701 { 1702 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); 1703 regstack->top--; 1704 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1)); 1705 } 1706 1707 replace_reg (src1, FIRST_STACK_REG); 1708 break; 1709 1710 case UNSPEC_FPATAN: 1711 case UNSPEC_FYL2X: 1712 case UNSPEC_FSCALE: 1713 /* These insns operate on the top two stack slots. */ 1714 1715 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); 1716 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1)); 1717 1718 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1719 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); 1720 1721 { 1722 struct stack_def temp_stack; 1723 int regno, j, k, temp; 1724 1725 temp_stack = *regstack; 1726 1727 /* Place operand 1 at the top of stack. */ 1728 regno = get_hard_regnum (&temp_stack, *src1); 1729 if (regno < 0) 1730 abort (); 1731 if (regno != FIRST_STACK_REG) 1732 { 1733 k = temp_stack.top - (regno - FIRST_STACK_REG); 1734 j = temp_stack.top; 1735 1736 temp = temp_stack.reg[k]; 1737 temp_stack.reg[k] = temp_stack.reg[j]; 1738 temp_stack.reg[j] = temp; 1739 } 1740 1741 /* Place operand 2 next on the stack. */ 1742 regno = get_hard_regnum (&temp_stack, *src2); 1743 if (regno < 0) 1744 abort (); 1745 if (regno != FIRST_STACK_REG + 1) 1746 { 1747 k = temp_stack.top - (regno - FIRST_STACK_REG); 1748 j = temp_stack.top - 1; 1749 1750 temp = temp_stack.reg[k]; 1751 temp_stack.reg[k] = temp_stack.reg[j]; 1752 temp_stack.reg[j] = temp; 1753 } 1754 1755 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE); 1756 } 1757 1758 replace_reg (src1, FIRST_STACK_REG); 1759 replace_reg (src2, FIRST_STACK_REG + 1); 1760 1761 if (src1_note) 1762 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); 1763 if (src2_note) 1764 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1); 1765 1766 /* Pop both input operands from the stack. */ 1767 CLEAR_HARD_REG_BIT (regstack->reg_set, 1768 regstack->reg[regstack->top]); 1769 CLEAR_HARD_REG_BIT (regstack->reg_set, 1770 regstack->reg[regstack->top - 1]); 1771 regstack->top -= 2; 1772 1773 /* Push the result back onto the stack. */ 1774 regstack->reg[++regstack->top] = REGNO (*dest); 1775 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1776 replace_reg (dest, FIRST_STACK_REG); 1777 break; 1778 1779 case UNSPEC_SAHF: 1780 /* (unspec [(unspec [(compare)] UNSPEC_FNSTSW)] UNSPEC_SAHF) 1781 The combination matches the PPRO fcomi instruction. */ 1782 1783 pat_src = XVECEXP (pat_src, 0, 0); 1784 if (GET_CODE (pat_src) != UNSPEC 1785 || XINT (pat_src, 1) != UNSPEC_FNSTSW) 1786 abort (); 1787 /* Fall through. */ 1788 1789 case UNSPEC_FNSTSW: 1790 /* Combined fcomp+fnstsw generated for doing well with 1791 CSE. When optimizing this would have been broken 1792 up before now. */ 1793 1794 pat_src = XVECEXP (pat_src, 0, 0); 1795 if (GET_CODE (pat_src) != COMPARE) 1796 abort (); 1797 1798 compare_for_stack_reg (insn, regstack, pat_src); 1799 break; 1800 1801 default: 1802 abort (); 1803 } 1804 break; 1805 1806 case IF_THEN_ELSE: 1807 /* This insn requires the top of stack to be the destination. */ 1808 1809 src1 = get_true_reg (&XEXP (pat_src, 1)); 1810 src2 = get_true_reg (&XEXP (pat_src, 2)); 1811 1812 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1813 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); 1814 1815 /* If the comparison operator is an FP comparison operator, 1816 it is handled correctly by compare_for_stack_reg () who 1817 will move the destination to the top of stack. But if the 1818 comparison operator is not an FP comparison operator, we 1819 have to handle it here. */ 1820 if (get_hard_regnum (regstack, *dest) >= FIRST_STACK_REG 1821 && REGNO (*dest) != regstack->reg[regstack->top]) 1822 { 1823 /* In case one of operands is the top of stack and the operands 1824 dies, it is safe to make it the destination operand by 1825 reversing the direction of cmove and avoid fxch. */ 1826 if ((REGNO (*src1) == regstack->reg[regstack->top] 1827 && src1_note) 1828 || (REGNO (*src2) == regstack->reg[regstack->top] 1829 && src2_note)) 1830 { 1831 int idx1 = (get_hard_regnum (regstack, *src1) 1832 - FIRST_STACK_REG); 1833 int idx2 = (get_hard_regnum (regstack, *src2) 1834 - FIRST_STACK_REG); 1835 1836 /* Make reg-stack believe that the operands are already 1837 swapped on the stack */ 1838 regstack->reg[regstack->top - idx1] = REGNO (*src2); 1839 regstack->reg[regstack->top - idx2] = REGNO (*src1); 1840 1841 /* Reverse condition to compensate the operand swap. 1842 i386 do have comparison always reversible. */ 1843 PUT_CODE (XEXP (pat_src, 0), 1844 reversed_comparison_code (XEXP (pat_src, 0), insn)); 1845 } 1846 else 1847 emit_swap_insn (insn, regstack, *dest); 1848 } 1849 1850 { 1851 rtx src_note [3]; 1852 int i; 1853 1854 src_note[0] = 0; 1855 src_note[1] = src1_note; 1856 src_note[2] = src2_note; 1857 1858 if (STACK_REG_P (*src1)) 1859 replace_reg (src1, get_hard_regnum (regstack, *src1)); 1860 if (STACK_REG_P (*src2)) 1861 replace_reg (src2, get_hard_regnum (regstack, *src2)); 1862 1863 for (i = 1; i <= 2; i++) 1864 if (src_note [i]) 1865 { 1866 int regno = REGNO (XEXP (src_note[i], 0)); 1867 1868 /* If the register that dies is not at the top of 1869 stack, then move the top of stack to the dead reg */ 1870 if (regno != regstack->reg[regstack->top]) 1871 { 1872 remove_regno_note (insn, REG_DEAD, regno); 1873 emit_pop_insn (insn, regstack, XEXP (src_note[i], 0), 1874 EMIT_AFTER); 1875 } 1876 else 1877 /* Top of stack never dies, as it is the 1878 destination. */ 1879 abort (); 1880 } 1881 } 1882 1883 /* Make dest the top of stack. Add dest to regstack if 1884 not present. */ 1885 if (get_hard_regnum (regstack, *dest) < FIRST_STACK_REG) 1886 regstack->reg[++regstack->top] = REGNO (*dest); 1887 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1888 replace_reg (dest, FIRST_STACK_REG); 1889 break; 1890 1891 default: 1892 abort (); 1893 } 1894 break; 1895 } 1896 1897 default: 1898 break; 1899 } 1900 1901 return control_flow_insn_deleted; 1902} 1903 1904/* Substitute hard regnums for any stack regs in INSN, which has 1905 N_INPUTS inputs and N_OUTPUTS outputs. REGSTACK is the stack info 1906 before the insn, and is updated with changes made here. 1907 1908 There are several requirements and assumptions about the use of 1909 stack-like regs in asm statements. These rules are enforced by 1910 record_asm_stack_regs; see comments there for details. Any 1911 asm_operands left in the RTL at this point may be assume to meet the 1912 requirements, since record_asm_stack_regs removes any problem asm. */ 1913 1914static void 1915subst_asm_stack_regs (rtx insn, stack regstack) 1916{ 1917 rtx body = PATTERN (insn); 1918 int alt; 1919 1920 rtx *note_reg; /* Array of note contents */ 1921 rtx **note_loc; /* Address of REG field of each note */ 1922 enum reg_note *note_kind; /* The type of each note */ 1923 1924 rtx *clobber_reg = 0; 1925 rtx **clobber_loc = 0; 1926 1927 struct stack_def temp_stack; 1928 int n_notes; 1929 int n_clobbers; 1930 rtx note; 1931 int i; 1932 int n_inputs, n_outputs; 1933 1934 if (! check_asm_stack_operands (insn)) 1935 return; 1936 1937 /* Find out what the constraints required. If no constraint 1938 alternative matches, that is a compiler bug: we should have caught 1939 such an insn in check_asm_stack_operands. */ 1940 extract_insn (insn); 1941 constrain_operands (1); 1942 alt = which_alternative; 1943 1944 preprocess_constraints (); 1945 1946 n_inputs = get_asm_operand_n_inputs (body); 1947 n_outputs = recog_data.n_operands - n_inputs; 1948 1949 if (alt < 0) 1950 abort (); 1951 1952 /* Strip SUBREGs here to make the following code simpler. */ 1953 for (i = 0; i < recog_data.n_operands; i++) 1954 if (GET_CODE (recog_data.operand[i]) == SUBREG 1955 && GET_CODE (SUBREG_REG (recog_data.operand[i])) == REG) 1956 { 1957 recog_data.operand_loc[i] = & SUBREG_REG (recog_data.operand[i]); 1958 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]); 1959 } 1960 1961 /* Set up NOTE_REG, NOTE_LOC and NOTE_KIND. */ 1962 1963 for (i = 0, note = REG_NOTES (insn); note; note = XEXP (note, 1)) 1964 i++; 1965 1966 note_reg = alloca (i * sizeof (rtx)); 1967 note_loc = alloca (i * sizeof (rtx *)); 1968 note_kind = alloca (i * sizeof (enum reg_note)); 1969 1970 n_notes = 0; 1971 for (note = REG_NOTES (insn); note; note = XEXP (note, 1)) 1972 { 1973 rtx reg = XEXP (note, 0); 1974 rtx *loc = & XEXP (note, 0); 1975 1976 if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG) 1977 { 1978 loc = & SUBREG_REG (reg); 1979 reg = SUBREG_REG (reg); 1980 } 1981 1982 if (STACK_REG_P (reg) 1983 && (REG_NOTE_KIND (note) == REG_DEAD 1984 || REG_NOTE_KIND (note) == REG_UNUSED)) 1985 { 1986 note_reg[n_notes] = reg; 1987 note_loc[n_notes] = loc; 1988 note_kind[n_notes] = REG_NOTE_KIND (note); 1989 n_notes++; 1990 } 1991 } 1992 1993 /* Set up CLOBBER_REG and CLOBBER_LOC. */ 1994 1995 n_clobbers = 0; 1996 1997 if (GET_CODE (body) == PARALLEL) 1998 { 1999 clobber_reg = alloca (XVECLEN (body, 0) * sizeof (rtx)); 2000 clobber_loc = alloca (XVECLEN (body, 0) * sizeof (rtx *)); 2001 2002 for (i = 0; i < XVECLEN (body, 0); i++) 2003 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER) 2004 { 2005 rtx clobber = XVECEXP (body, 0, i); 2006 rtx reg = XEXP (clobber, 0); 2007 rtx *loc = & XEXP (clobber, 0); 2008 2009 if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG) 2010 { 2011 loc = & SUBREG_REG (reg); 2012 reg = SUBREG_REG (reg); 2013 } 2014 2015 if (STACK_REG_P (reg)) 2016 { 2017 clobber_reg[n_clobbers] = reg; 2018 clobber_loc[n_clobbers] = loc; 2019 n_clobbers++; 2020 } 2021 } 2022 } 2023 2024 temp_stack = *regstack; 2025 2026 /* Put the input regs into the desired place in TEMP_STACK. */ 2027 2028 for (i = n_outputs; i < n_outputs + n_inputs; i++) 2029 if (STACK_REG_P (recog_data.operand[i]) 2030 && reg_class_subset_p (recog_op_alt[i][alt].class, 2031 FLOAT_REGS) 2032 && recog_op_alt[i][alt].class != FLOAT_REGS) 2033 { 2034 /* If an operand needs to be in a particular reg in 2035 FLOAT_REGS, the constraint was either 't' or 'u'. Since 2036 these constraints are for single register classes, and 2037 reload guaranteed that operand[i] is already in that class, 2038 we can just use REGNO (recog_data.operand[i]) to know which 2039 actual reg this operand needs to be in. */ 2040 2041 int regno = get_hard_regnum (&temp_stack, recog_data.operand[i]); 2042 2043 if (regno < 0) 2044 abort (); 2045 2046 if ((unsigned int) regno != REGNO (recog_data.operand[i])) 2047 { 2048 /* recog_data.operand[i] is not in the right place. Find 2049 it and swap it with whatever is already in I's place. 2050 K is where recog_data.operand[i] is now. J is where it 2051 should be. */ 2052 int j, k, temp; 2053 2054 k = temp_stack.top - (regno - FIRST_STACK_REG); 2055 j = (temp_stack.top 2056 - (REGNO (recog_data.operand[i]) - FIRST_STACK_REG)); 2057 2058 temp = temp_stack.reg[k]; 2059 temp_stack.reg[k] = temp_stack.reg[j]; 2060 temp_stack.reg[j] = temp; 2061 } 2062 } 2063 2064 /* Emit insns before INSN to make sure the reg-stack is in the right 2065 order. */ 2066 2067 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE); 2068 2069 /* Make the needed input register substitutions. Do death notes and 2070 clobbers too, because these are for inputs, not outputs. */ 2071 2072 for (i = n_outputs; i < n_outputs + n_inputs; i++) 2073 if (STACK_REG_P (recog_data.operand[i])) 2074 { 2075 int regnum = get_hard_regnum (regstack, recog_data.operand[i]); 2076 2077 if (regnum < 0) 2078 abort (); 2079 2080 replace_reg (recog_data.operand_loc[i], regnum); 2081 } 2082 2083 for (i = 0; i < n_notes; i++) 2084 if (note_kind[i] == REG_DEAD) 2085 { 2086 int regnum = get_hard_regnum (regstack, note_reg[i]); 2087 2088 if (regnum < 0) 2089 abort (); 2090 2091 replace_reg (note_loc[i], regnum); 2092 } 2093 2094 for (i = 0; i < n_clobbers; i++) 2095 { 2096 /* It's OK for a CLOBBER to reference a reg that is not live. 2097 Don't try to replace it in that case. */ 2098 int regnum = get_hard_regnum (regstack, clobber_reg[i]); 2099 2100 if (regnum >= 0) 2101 { 2102 /* Sigh - clobbers always have QImode. But replace_reg knows 2103 that these regs can't be MODE_INT and will abort. Just put 2104 the right reg there without calling replace_reg. */ 2105 2106 *clobber_loc[i] = FP_MODE_REG (regnum, DFmode); 2107 } 2108 } 2109 2110 /* Now remove from REGSTACK any inputs that the asm implicitly popped. */ 2111 2112 for (i = n_outputs; i < n_outputs + n_inputs; i++) 2113 if (STACK_REG_P (recog_data.operand[i])) 2114 { 2115 /* An input reg is implicitly popped if it is tied to an 2116 output, or if there is a CLOBBER for it. */ 2117 int j; 2118 2119 for (j = 0; j < n_clobbers; j++) 2120 if (operands_match_p (clobber_reg[j], recog_data.operand[i])) 2121 break; 2122 2123 if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0) 2124 { 2125 /* recog_data.operand[i] might not be at the top of stack. 2126 But that's OK, because all we need to do is pop the 2127 right number of regs off of the top of the reg-stack. 2128 record_asm_stack_regs guaranteed that all implicitly 2129 popped regs were grouped at the top of the reg-stack. */ 2130 2131 CLEAR_HARD_REG_BIT (regstack->reg_set, 2132 regstack->reg[regstack->top]); 2133 regstack->top--; 2134 } 2135 } 2136 2137 /* Now add to REGSTACK any outputs that the asm implicitly pushed. 2138 Note that there isn't any need to substitute register numbers. 2139 ??? Explain why this is true. */ 2140 2141 for (i = LAST_STACK_REG; i >= FIRST_STACK_REG; i--) 2142 { 2143 /* See if there is an output for this hard reg. */ 2144 int j; 2145 2146 for (j = 0; j < n_outputs; j++) 2147 if (STACK_REG_P (recog_data.operand[j]) 2148 && REGNO (recog_data.operand[j]) == (unsigned) i) 2149 { 2150 regstack->reg[++regstack->top] = i; 2151 SET_HARD_REG_BIT (regstack->reg_set, i); 2152 break; 2153 } 2154 } 2155 2156 /* Now emit a pop insn for any REG_UNUSED output, or any REG_DEAD 2157 input that the asm didn't implicitly pop. If the asm didn't 2158 implicitly pop an input reg, that reg will still be live. 2159 2160 Note that we can't use find_regno_note here: the register numbers 2161 in the death notes have already been substituted. */ 2162 2163 for (i = 0; i < n_outputs; i++) 2164 if (STACK_REG_P (recog_data.operand[i])) 2165 { 2166 int j; 2167 2168 for (j = 0; j < n_notes; j++) 2169 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j]) 2170 && note_kind[j] == REG_UNUSED) 2171 { 2172 insn = emit_pop_insn (insn, regstack, recog_data.operand[i], 2173 EMIT_AFTER); 2174 break; 2175 } 2176 } 2177 2178 for (i = n_outputs; i < n_outputs + n_inputs; i++) 2179 if (STACK_REG_P (recog_data.operand[i])) 2180 { 2181 int j; 2182 2183 for (j = 0; j < n_notes; j++) 2184 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j]) 2185 && note_kind[j] == REG_DEAD 2186 && TEST_HARD_REG_BIT (regstack->reg_set, 2187 REGNO (recog_data.operand[i]))) 2188 { 2189 insn = emit_pop_insn (insn, regstack, recog_data.operand[i], 2190 EMIT_AFTER); 2191 break; 2192 } 2193 } 2194} 2195 2196/* Substitute stack hard reg numbers for stack virtual registers in 2197 INSN. Non-stack register numbers are not changed. REGSTACK is the 2198 current stack content. Insns may be emitted as needed to arrange the 2199 stack for the 387 based on the contents of the insn. Return whether 2200 a control flow insn was deleted in the process. */ 2201 2202static bool 2203subst_stack_regs (rtx insn, stack regstack) 2204{ 2205 rtx *note_link, note; 2206 bool control_flow_insn_deleted = false; 2207 int i; 2208 2209 if (GET_CODE (insn) == CALL_INSN) 2210 { 2211 int top = regstack->top; 2212 2213 /* If there are any floating point parameters to be passed in 2214 registers for this call, make sure they are in the right 2215 order. */ 2216 2217 if (top >= 0) 2218 { 2219 straighten_stack (PREV_INSN (insn), regstack); 2220 2221 /* Now mark the arguments as dead after the call. */ 2222 2223 while (regstack->top >= 0) 2224 { 2225 CLEAR_HARD_REG_BIT (regstack->reg_set, FIRST_STACK_REG + regstack->top); 2226 regstack->top--; 2227 } 2228 } 2229 } 2230 2231 /* Do the actual substitution if any stack regs are mentioned. 2232 Since we only record whether entire insn mentions stack regs, and 2233 subst_stack_regs_pat only works for patterns that contain stack regs, 2234 we must check each pattern in a parallel here. A call_value_pop could 2235 fail otherwise. */ 2236 2237 if (stack_regs_mentioned (insn)) 2238 { 2239 int n_operands = asm_noperands (PATTERN (insn)); 2240 if (n_operands >= 0) 2241 { 2242 /* This insn is an `asm' with operands. Decode the operands, 2243 decide how many are inputs, and do register substitution. 2244 Any REG_UNUSED notes will be handled by subst_asm_stack_regs. */ 2245 2246 subst_asm_stack_regs (insn, regstack); 2247 return control_flow_insn_deleted; 2248 } 2249 2250 if (GET_CODE (PATTERN (insn)) == PARALLEL) 2251 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++) 2252 { 2253 if (stack_regs_mentioned_p (XVECEXP (PATTERN (insn), 0, i))) 2254 control_flow_insn_deleted 2255 |= subst_stack_regs_pat (insn, regstack, 2256 XVECEXP (PATTERN (insn), 0, i)); 2257 } 2258 else 2259 control_flow_insn_deleted 2260 |= subst_stack_regs_pat (insn, regstack, PATTERN (insn)); 2261 } 2262 2263 /* subst_stack_regs_pat may have deleted a no-op insn. If so, any 2264 REG_UNUSED will already have been dealt with, so just return. */ 2265 2266 if (GET_CODE (insn) == NOTE || INSN_DELETED_P (insn)) 2267 return control_flow_insn_deleted; 2268 2269 /* If there is a REG_UNUSED note on a stack register on this insn, 2270 the indicated reg must be popped. The REG_UNUSED note is removed, 2271 since the form of the newly emitted pop insn references the reg, 2272 making it no longer `unset'. */ 2273 2274 note_link = ®_NOTES (insn); 2275 for (note = *note_link; note; note = XEXP (note, 1)) 2276 if (REG_NOTE_KIND (note) == REG_UNUSED && STACK_REG_P (XEXP (note, 0))) 2277 { 2278 *note_link = XEXP (note, 1); 2279 insn = emit_pop_insn (insn, regstack, XEXP (note, 0), EMIT_AFTER); 2280 } 2281 else 2282 note_link = &XEXP (note, 1); 2283 2284 return control_flow_insn_deleted; 2285} 2286 2287/* Change the organization of the stack so that it fits a new basic 2288 block. Some registers might have to be popped, but there can never be 2289 a register live in the new block that is not now live. 2290 2291 Insert any needed insns before or after INSN, as indicated by 2292 WHERE. OLD is the original stack layout, and NEW is the desired 2293 form. OLD is updated to reflect the code emitted, ie, it will be 2294 the same as NEW upon return. 2295 2296 This function will not preserve block_end[]. But that information 2297 is no longer needed once this has executed. */ 2298 2299static void 2300change_stack (rtx insn, stack old, stack new, enum emit_where where) 2301{ 2302 int reg; 2303 int update_end = 0; 2304 2305 /* We will be inserting new insns "backwards". If we are to insert 2306 after INSN, find the next insn, and insert before it. */ 2307 2308 if (where == EMIT_AFTER) 2309 { 2310 if (current_block && BB_END (current_block) == insn) 2311 update_end = 1; 2312 insn = NEXT_INSN (insn); 2313 } 2314 2315 /* Pop any registers that are not needed in the new block. */ 2316 2317 for (reg = old->top; reg >= 0; reg--) 2318 if (! TEST_HARD_REG_BIT (new->reg_set, old->reg[reg])) 2319 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[reg], DFmode), 2320 EMIT_BEFORE); 2321 2322 if (new->top == -2) 2323 { 2324 /* If the new block has never been processed, then it can inherit 2325 the old stack order. */ 2326 2327 new->top = old->top; 2328 memcpy (new->reg, old->reg, sizeof (new->reg)); 2329 } 2330 else 2331 { 2332 /* This block has been entered before, and we must match the 2333 previously selected stack order. */ 2334 2335 /* By now, the only difference should be the order of the stack, 2336 not their depth or liveliness. */ 2337 2338 GO_IF_HARD_REG_EQUAL (old->reg_set, new->reg_set, win); 2339 abort (); 2340 win: 2341 if (old->top != new->top) 2342 abort (); 2343 2344 /* If the stack is not empty (new->top != -1), loop here emitting 2345 swaps until the stack is correct. 2346 2347 The worst case number of swaps emitted is N + 2, where N is the 2348 depth of the stack. In some cases, the reg at the top of 2349 stack may be correct, but swapped anyway in order to fix 2350 other regs. But since we never swap any other reg away from 2351 its correct slot, this algorithm will converge. */ 2352 2353 if (new->top != -1) 2354 do 2355 { 2356 /* Swap the reg at top of stack into the position it is 2357 supposed to be in, until the correct top of stack appears. */ 2358 2359 while (old->reg[old->top] != new->reg[new->top]) 2360 { 2361 for (reg = new->top; reg >= 0; reg--) 2362 if (new->reg[reg] == old->reg[old->top]) 2363 break; 2364 2365 if (reg == -1) 2366 abort (); 2367 2368 emit_swap_insn (insn, old, 2369 FP_MODE_REG (old->reg[reg], DFmode)); 2370 } 2371 2372 /* See if any regs remain incorrect. If so, bring an 2373 incorrect reg to the top of stack, and let the while loop 2374 above fix it. */ 2375 2376 for (reg = new->top; reg >= 0; reg--) 2377 if (new->reg[reg] != old->reg[reg]) 2378 { 2379 emit_swap_insn (insn, old, 2380 FP_MODE_REG (old->reg[reg], DFmode)); 2381 break; 2382 } 2383 } while (reg >= 0); 2384 2385 /* At this point there must be no differences. */ 2386 2387 for (reg = old->top; reg >= 0; reg--) 2388 if (old->reg[reg] != new->reg[reg]) 2389 abort (); 2390 } 2391 2392 if (update_end) 2393 BB_END (current_block) = PREV_INSN (insn); 2394} 2395 2396/* Print stack configuration. */ 2397 2398static void 2399print_stack (FILE *file, stack s) 2400{ 2401 if (! file) 2402 return; 2403 2404 if (s->top == -2) 2405 fprintf (file, "uninitialized\n"); 2406 else if (s->top == -1) 2407 fprintf (file, "empty\n"); 2408 else 2409 { 2410 int i; 2411 fputs ("[ ", file); 2412 for (i = 0; i <= s->top; ++i) 2413 fprintf (file, "%d ", s->reg[i]); 2414 fputs ("]\n", file); 2415 } 2416} 2417 2418/* This function was doing life analysis. We now let the regular live 2419 code do it's job, so we only need to check some extra invariants 2420 that reg-stack expects. Primary among these being that all registers 2421 are initialized before use. 2422 2423 The function returns true when code was emitted to CFG edges and 2424 commit_edge_insertions needs to be called. */ 2425 2426static int 2427convert_regs_entry (void) 2428{ 2429 int inserted = 0; 2430 edge e; 2431 basic_block block; 2432 2433 FOR_EACH_BB_REVERSE (block) 2434 { 2435 block_info bi = BLOCK_INFO (block); 2436 int reg; 2437 2438 /* Set current register status at last instruction `uninitialized'. */ 2439 bi->stack_in.top = -2; 2440 2441 /* Copy live_at_end and live_at_start into temporaries. */ 2442 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; reg++) 2443 { 2444 if (REGNO_REG_SET_P (block->global_live_at_end, reg)) 2445 SET_HARD_REG_BIT (bi->out_reg_set, reg); 2446 if (REGNO_REG_SET_P (block->global_live_at_start, reg)) 2447 SET_HARD_REG_BIT (bi->stack_in.reg_set, reg); 2448 } 2449 } 2450 2451 /* Load something into each stack register live at function entry. 2452 Such live registers can be caused by uninitialized variables or 2453 functions not returning values on all paths. In order to keep 2454 the push/pop code happy, and to not scrog the register stack, we 2455 must put something in these registers. Use a QNaN. 2456 2457 Note that we are inserting converted code here. This code is 2458 never seen by the convert_regs pass. */ 2459 2460 for (e = ENTRY_BLOCK_PTR->succ; e ; e = e->succ_next) 2461 { 2462 basic_block block = e->dest; 2463 block_info bi = BLOCK_INFO (block); 2464 int reg, top = -1; 2465 2466 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg) 2467 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg)) 2468 { 2469 rtx init; 2470 2471 bi->stack_in.reg[++top] = reg; 2472 2473 init = gen_rtx_SET (VOIDmode, 2474 FP_MODE_REG (FIRST_STACK_REG, SFmode), 2475 nan); 2476 insert_insn_on_edge (init, e); 2477 inserted = 1; 2478 } 2479 2480 bi->stack_in.top = top; 2481 } 2482 2483 return inserted; 2484} 2485 2486/* Construct the desired stack for function exit. This will either 2487 be `empty', or the function return value at top-of-stack. */ 2488 2489static void 2490convert_regs_exit (void) 2491{ 2492 int value_reg_low, value_reg_high; 2493 stack output_stack; 2494 rtx retvalue; 2495 2496 retvalue = stack_result (current_function_decl); 2497 value_reg_low = value_reg_high = -1; 2498 if (retvalue) 2499 { 2500 value_reg_low = REGNO (retvalue); 2501 value_reg_high = value_reg_low 2502 + HARD_REGNO_NREGS (value_reg_low, GET_MODE (retvalue)) - 1; 2503 } 2504 2505 output_stack = &BLOCK_INFO (EXIT_BLOCK_PTR)->stack_in; 2506 if (value_reg_low == -1) 2507 output_stack->top = -1; 2508 else 2509 { 2510 int reg; 2511 2512 output_stack->top = value_reg_high - value_reg_low; 2513 for (reg = value_reg_low; reg <= value_reg_high; ++reg) 2514 { 2515 output_stack->reg[value_reg_high - reg] = reg; 2516 SET_HARD_REG_BIT (output_stack->reg_set, reg); 2517 } 2518 } 2519} 2520 2521/* Adjust the stack of this block on exit to match the stack of the 2522 target block, or copy stack info into the stack of the successor 2523 of the successor hasn't been processed yet. */ 2524static bool 2525compensate_edge (edge e, FILE *file) 2526{ 2527 basic_block block = e->src, target = e->dest; 2528 block_info bi = BLOCK_INFO (block); 2529 struct stack_def regstack, tmpstack; 2530 stack target_stack = &BLOCK_INFO (target)->stack_in; 2531 int reg; 2532 2533 current_block = block; 2534 regstack = bi->stack_out; 2535 if (file) 2536 fprintf (file, "Edge %d->%d: ", block->index, target->index); 2537 2538 if (target_stack->top == -2) 2539 { 2540 /* The target block hasn't had a stack order selected. 2541 We need merely ensure that no pops are needed. */ 2542 for (reg = regstack.top; reg >= 0; --reg) 2543 if (!TEST_HARD_REG_BIT (target_stack->reg_set, regstack.reg[reg])) 2544 break; 2545 2546 if (reg == -1) 2547 { 2548 if (file) 2549 fprintf (file, "new block; copying stack position\n"); 2550 2551 /* change_stack kills values in regstack. */ 2552 tmpstack = regstack; 2553 2554 change_stack (BB_END (block), &tmpstack, target_stack, EMIT_AFTER); 2555 return false; 2556 } 2557 2558 if (file) 2559 fprintf (file, "new block; pops needed\n"); 2560 } 2561 else 2562 { 2563 if (target_stack->top == regstack.top) 2564 { 2565 for (reg = target_stack->top; reg >= 0; --reg) 2566 if (target_stack->reg[reg] != regstack.reg[reg]) 2567 break; 2568 2569 if (reg == -1) 2570 { 2571 if (file) 2572 fprintf (file, "no changes needed\n"); 2573 return false; 2574 } 2575 } 2576 2577 if (file) 2578 { 2579 fprintf (file, "correcting stack to "); 2580 print_stack (file, target_stack); 2581 } 2582 } 2583 2584 /* Care for non-call EH edges specially. The normal return path have 2585 values in registers. These will be popped en masse by the unwind 2586 library. */ 2587 if ((e->flags & (EDGE_EH | EDGE_ABNORMAL_CALL)) == EDGE_EH) 2588 target_stack->top = -1; 2589 2590 /* Other calls may appear to have values live in st(0), but the 2591 abnormal return path will not have actually loaded the values. */ 2592 else if (e->flags & EDGE_ABNORMAL_CALL) 2593 { 2594 /* Assert that the lifetimes are as we expect -- one value 2595 live at st(0) on the end of the source block, and no 2596 values live at the beginning of the destination block. */ 2597 HARD_REG_SET tmp; 2598 2599 CLEAR_HARD_REG_SET (tmp); 2600 GO_IF_HARD_REG_EQUAL (target_stack->reg_set, tmp, eh1); 2601 abort (); 2602 eh1: 2603 2604 /* We are sure that there is st(0) live, otherwise we won't compensate. 2605 For complex return values, we may have st(1) live as well. */ 2606 SET_HARD_REG_BIT (tmp, FIRST_STACK_REG); 2607 if (TEST_HARD_REG_BIT (regstack.reg_set, FIRST_STACK_REG + 1)) 2608 SET_HARD_REG_BIT (tmp, FIRST_STACK_REG + 1); 2609 GO_IF_HARD_REG_EQUAL (regstack.reg_set, tmp, eh2); 2610 abort (); 2611 eh2: 2612 2613 target_stack->top = -1; 2614 } 2615 2616 /* It is better to output directly to the end of the block 2617 instead of to the edge, because emit_swap can do minimal 2618 insn scheduling. We can do this when there is only one 2619 edge out, and it is not abnormal. */ 2620 else if (block->succ->succ_next == NULL && !(e->flags & EDGE_ABNORMAL)) 2621 { 2622 /* change_stack kills values in regstack. */ 2623 tmpstack = regstack; 2624 2625 change_stack (BB_END (block), &tmpstack, target_stack, 2626 (GET_CODE (BB_END (block)) == JUMP_INSN 2627 ? EMIT_BEFORE : EMIT_AFTER)); 2628 } 2629 else 2630 { 2631 rtx seq, after; 2632 2633 /* We don't support abnormal edges. Global takes care to 2634 avoid any live register across them, so we should never 2635 have to insert instructions on such edges. */ 2636 if (e->flags & EDGE_ABNORMAL) 2637 abort (); 2638 2639 current_block = NULL; 2640 start_sequence (); 2641 2642 /* ??? change_stack needs some point to emit insns after. */ 2643 after = emit_note (NOTE_INSN_DELETED); 2644 2645 tmpstack = regstack; 2646 change_stack (after, &tmpstack, target_stack, EMIT_BEFORE); 2647 2648 seq = get_insns (); 2649 end_sequence (); 2650 2651 insert_insn_on_edge (seq, e); 2652 return true; 2653 } 2654 return false; 2655} 2656 2657/* Convert stack register references in one block. */ 2658 2659static int 2660convert_regs_1 (FILE *file, basic_block block) 2661{ 2662 struct stack_def regstack; 2663 block_info bi = BLOCK_INFO (block); 2664 int deleted, inserted, reg; 2665 rtx insn, next; 2666 edge e, beste = NULL; 2667 bool control_flow_insn_deleted = false; 2668 2669 inserted = 0; 2670 deleted = 0; 2671 any_malformed_asm = false; 2672 2673 /* Find the edge we will copy stack from. It should be the most frequent 2674 one as it will get cheapest after compensation code is generated, 2675 if multiple such exists, take one with largest count, prefer critical 2676 one (as splitting critical edges is more expensive), or one with lowest 2677 index, to avoid random changes with different orders of the edges. */ 2678 for (e = block->pred; e ; e = e->pred_next) 2679 { 2680 if (e->flags & EDGE_DFS_BACK) 2681 ; 2682 else if (! beste) 2683 beste = e; 2684 else if (EDGE_FREQUENCY (beste) < EDGE_FREQUENCY (e)) 2685 beste = e; 2686 else if (EDGE_FREQUENCY (beste) > EDGE_FREQUENCY (e)) 2687 ; 2688 else if (beste->count < e->count) 2689 beste = e; 2690 else if (beste->count > e->count) 2691 ; 2692 else if ((EDGE_CRITICAL_P (e) != 0) 2693 != (EDGE_CRITICAL_P (beste) != 0)) 2694 { 2695 if (EDGE_CRITICAL_P (e)) 2696 beste = e; 2697 } 2698 else if (e->src->index < beste->src->index) 2699 beste = e; 2700 } 2701 2702 /* Initialize stack at block entry. */ 2703 if (bi->stack_in.top == -2) 2704 { 2705 if (beste) 2706 inserted |= compensate_edge (beste, file); 2707 else 2708 { 2709 /* No predecessors. Create an arbitrary input stack. */ 2710 int reg; 2711 2712 bi->stack_in.top = -1; 2713 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg) 2714 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg)) 2715 bi->stack_in.reg[++bi->stack_in.top] = reg; 2716 } 2717 } 2718 else 2719 /* Entry blocks do have stack already initialized. */ 2720 beste = NULL; 2721 2722 current_block = block; 2723 2724 if (file) 2725 { 2726 fprintf (file, "\nBasic block %d\nInput stack: ", block->index); 2727 print_stack (file, &bi->stack_in); 2728 } 2729 2730 /* Process all insns in this block. Keep track of NEXT so that we 2731 don't process insns emitted while substituting in INSN. */ 2732 next = BB_HEAD (block); 2733 regstack = bi->stack_in; 2734 do 2735 { 2736 insn = next; 2737 next = NEXT_INSN (insn); 2738 2739 /* Ensure we have not missed a block boundary. */ 2740 if (next == NULL) 2741 abort (); 2742 if (insn == BB_END (block)) 2743 next = NULL; 2744 2745 /* Don't bother processing unless there is a stack reg 2746 mentioned or if it's a CALL_INSN. */ 2747 if (stack_regs_mentioned (insn) 2748 || GET_CODE (insn) == CALL_INSN) 2749 { 2750 if (file) 2751 { 2752 fprintf (file, " insn %d input stack: ", 2753 INSN_UID (insn)); 2754 print_stack (file, ®stack); 2755 } 2756 control_flow_insn_deleted |= subst_stack_regs (insn, ®stack); 2757 } 2758 } 2759 while (next); 2760 2761 if (file) 2762 { 2763 fprintf (file, "Expected live registers ["); 2764 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg) 2765 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg)) 2766 fprintf (file, " %d", reg); 2767 fprintf (file, " ]\nOutput stack: "); 2768 print_stack (file, ®stack); 2769 } 2770 2771 insn = BB_END (block); 2772 if (GET_CODE (insn) == JUMP_INSN) 2773 insn = PREV_INSN (insn); 2774 2775 /* If the function is declared to return a value, but it returns one 2776 in only some cases, some registers might come live here. Emit 2777 necessary moves for them. */ 2778 2779 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg) 2780 { 2781 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg) 2782 && ! TEST_HARD_REG_BIT (regstack.reg_set, reg)) 2783 { 2784 rtx set; 2785 2786 if (file) 2787 { 2788 fprintf (file, "Emitting insn initializing reg %d\n", 2789 reg); 2790 } 2791 2792 set = gen_rtx_SET (VOIDmode, FP_MODE_REG (reg, SFmode), 2793 nan); 2794 insn = emit_insn_after (set, insn); 2795 control_flow_insn_deleted |= subst_stack_regs (insn, ®stack); 2796 } 2797 } 2798 2799 /* Amongst the insns possibly deleted during the substitution process above, 2800 might have been the only trapping insn in the block. We purge the now 2801 possibly dead EH edges here to avoid an ICE from fixup_abnormal_edges, 2802 called at the end of convert_regs. The order in which we process the 2803 blocks ensures that we never delete an already processed edge. 2804 2805 Note that, at this point, the CFG may have been damaged by the emission 2806 of instructions after an abnormal call, which moves the basic block end 2807 (and is the reason why we call fixup_abnormal_edges later). So we must 2808 be sure that the trapping insn has been deleted before trying to purge 2809 dead edges, otherwise we risk purging valid edges. 2810 2811 ??? We are normally supposed not to delete trapping insns, so we pretend 2812 that the insns deleted above don't actually trap. It would have been 2813 better to detect this earlier and avoid creating the EH edge in the first 2814 place, still, but we don't have enough information at that time. */ 2815 2816 if (control_flow_insn_deleted) 2817 purge_dead_edges (block); 2818 2819 /* Something failed if the stack lives don't match. If we had malformed 2820 asms, we zapped the instruction itself, but that didn't produce the 2821 same pattern of register kills as before. */ 2822 GO_IF_HARD_REG_EQUAL (regstack.reg_set, bi->out_reg_set, win); 2823 if (!any_malformed_asm) 2824 abort (); 2825 win: 2826 bi->stack_out = regstack; 2827 2828 /* Compensate the back edges, as those wasn't visited yet. */ 2829 for (e = block->succ; e ; e = e->succ_next) 2830 { 2831 if (e->flags & EDGE_DFS_BACK 2832 || (e->dest == EXIT_BLOCK_PTR)) 2833 { 2834 if (!BLOCK_INFO (e->dest)->done 2835 && e->dest != block) 2836 abort (); 2837 inserted |= compensate_edge (e, file); 2838 } 2839 } 2840 for (e = block->pred; e ; e = e->pred_next) 2841 { 2842 if (e != beste && !(e->flags & EDGE_DFS_BACK) 2843 && e->src != ENTRY_BLOCK_PTR) 2844 { 2845 if (!BLOCK_INFO (e->src)->done) 2846 abort (); 2847 inserted |= compensate_edge (e, file); 2848 } 2849 } 2850 2851 return inserted; 2852} 2853 2854/* Convert registers in all blocks reachable from BLOCK. */ 2855 2856static int 2857convert_regs_2 (FILE *file, basic_block block) 2858{ 2859 basic_block *stack, *sp; 2860 int inserted; 2861 2862 /* We process the blocks in a top-down manner, in a way such that one block 2863 is only processed after all its predecessors. The number of predecessors 2864 of every block has already been computed. */ 2865 2866 stack = xmalloc (sizeof (*stack) * n_basic_blocks); 2867 sp = stack; 2868 2869 *sp++ = block; 2870 2871 inserted = 0; 2872 do 2873 { 2874 edge e; 2875 2876 block = *--sp; 2877 2878 /* Processing BLOCK is achieved by convert_regs_1, which may purge 2879 some dead EH outgoing edge after the deletion of the trapping 2880 insn inside the block. Since the number of predecessors of 2881 BLOCK's successors was computed based on the initial edge set, 2882 we check the necessity to process some of these successors 2883 before such an edge deletion may happen. However, there is 2884 a pitfall: if BLOCK is the only predecessor of a successor and 2885 the edge between them happens to be deleted, the successor 2886 becomes unreachable and should not be processed. The problem 2887 is that there is no way to preventively detect this case so we 2888 stack the successor in all cases and hand over the task of 2889 fixing up the discrepancy to convert_regs_1. */ 2890 2891 for (e = block->succ; e ; e = e->succ_next) 2892 if (! (e->flags & EDGE_DFS_BACK)) 2893 { 2894 BLOCK_INFO (e->dest)->predecessors--; 2895 if (!BLOCK_INFO (e->dest)->predecessors) 2896 *sp++ = e->dest; 2897 } 2898 2899 inserted |= convert_regs_1 (file, block); 2900 BLOCK_INFO (block)->done = 1; 2901 } 2902 while (sp != stack); 2903 2904 return inserted; 2905} 2906 2907/* Traverse all basic blocks in a function, converting the register 2908 references in each insn from the "flat" register file that gcc uses, 2909 to the stack-like registers the 387 uses. */ 2910 2911static int 2912convert_regs (FILE *file) 2913{ 2914 int inserted; 2915 basic_block b; 2916 edge e; 2917 2918 /* Initialize uninitialized registers on function entry. */ 2919 inserted = convert_regs_entry (); 2920 2921 /* Construct the desired stack for function exit. */ 2922 convert_regs_exit (); 2923 BLOCK_INFO (EXIT_BLOCK_PTR)->done = 1; 2924 2925 /* ??? Future: process inner loops first, and give them arbitrary 2926 initial stacks which emit_swap_insn can modify. This ought to 2927 prevent double fxch that aften appears at the head of a loop. */ 2928 2929 /* Process all blocks reachable from all entry points. */ 2930 for (e = ENTRY_BLOCK_PTR->succ; e ; e = e->succ_next) 2931 inserted |= convert_regs_2 (file, e->dest); 2932 2933 /* ??? Process all unreachable blocks. Though there's no excuse 2934 for keeping these even when not optimizing. */ 2935 FOR_EACH_BB (b) 2936 { 2937 block_info bi = BLOCK_INFO (b); 2938 2939 if (! bi->done) 2940 inserted |= convert_regs_2 (file, b); 2941 } 2942 clear_aux_for_blocks (); 2943 2944 fixup_abnormal_edges (); 2945 if (inserted) 2946 commit_edge_insertions (); 2947 2948 if (file) 2949 fputc ('\n', file); 2950 2951 return inserted; 2952} 2953#endif /* STACK_REGS */ 2954 2955#include "gt-reg-stack.h" 2956