reg-stack.c revision 122180
1/* Register to Stack convert for GNU compiler. 2 Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 3 1999, 2000, 2001, 2002 Free Software Foundation, Inc. 4 5 This file is part of GCC. 6 7 GCC is free software; you can redistribute it and/or modify it 8 under the terms of the GNU General Public License as published by 9 the Free Software Foundation; either version 2, or (at your option) 10 any later version. 11 12 GCC is distributed in the hope that it will be useful, but WITHOUT 13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 15 License for more details. 16 17 You should have received a copy of the GNU General Public License 18 along with GCC; see the file COPYING. If not, write to the Free 19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA 20 02111-1307, USA. */ 21 22/* This pass converts stack-like registers from the "flat register 23 file" model that gcc uses, to a stack convention that the 387 uses. 24 25 * The form of the input: 26 27 On input, the function consists of insn that have had their 28 registers fully allocated to a set of "virtual" registers. Note that 29 the word "virtual" is used differently here than elsewhere in gcc: for 30 each virtual stack reg, there is a hard reg, but the mapping between 31 them is not known until this pass is run. On output, hard register 32 numbers have been substituted, and various pop and exchange insns have 33 been emitted. The hard register numbers and the virtual register 34 numbers completely overlap - before this pass, all stack register 35 numbers are virtual, and afterward they are all hard. 36 37 The virtual registers can be manipulated normally by gcc, and their 38 semantics are the same as for normal registers. After the hard 39 register numbers are substituted, the semantics of an insn containing 40 stack-like regs are not the same as for an insn with normal regs: for 41 instance, it is not safe to delete an insn that appears to be a no-op 42 move. In general, no insn containing hard regs should be changed 43 after this pass is done. 44 45 * The form of the output: 46 47 After this pass, hard register numbers represent the distance from 48 the current top of stack to the desired register. A reference to 49 FIRST_STACK_REG references the top of stack, FIRST_STACK_REG + 1, 50 represents the register just below that, and so forth. Also, REG_DEAD 51 notes indicate whether or not a stack register should be popped. 52 53 A "swap" insn looks like a parallel of two patterns, where each 54 pattern is a SET: one sets A to B, the other B to A. 55 56 A "push" or "load" insn is a SET whose SET_DEST is FIRST_STACK_REG 57 and whose SET_DEST is REG or MEM. Any other SET_DEST, such as PLUS, 58 will replace the existing stack top, not push a new value. 59 60 A store insn is a SET whose SET_DEST is FIRST_STACK_REG, and whose 61 SET_SRC is REG or MEM. 62 63 The case where the SET_SRC and SET_DEST are both FIRST_STACK_REG 64 appears ambiguous. As a special case, the presence of a REG_DEAD note 65 for FIRST_STACK_REG differentiates between a load insn and a pop. 66 67 If a REG_DEAD is present, the insn represents a "pop" that discards 68 the top of the register stack. If there is no REG_DEAD note, then the 69 insn represents a "dup" or a push of the current top of stack onto the 70 stack. 71 72 * Methodology: 73 74 Existing REG_DEAD and REG_UNUSED notes for stack registers are 75 deleted and recreated from scratch. REG_DEAD is never created for a 76 SET_DEST, only REG_UNUSED. 77 78 * asm_operands: 79 80 There are several rules on the usage of stack-like regs in 81 asm_operands insns. These rules apply only to the operands that are 82 stack-like regs: 83 84 1. Given a set of input regs that die in an asm_operands, it is 85 necessary to know which are implicitly popped by the asm, and 86 which must be explicitly popped by gcc. 87 88 An input reg that is implicitly popped by the asm must be 89 explicitly clobbered, unless it is constrained to match an 90 output operand. 91 92 2. For any input reg that is implicitly popped by an asm, it is 93 necessary to know how to adjust the stack to compensate for the pop. 94 If any non-popped input is closer to the top of the reg-stack than 95 the implicitly popped reg, it would not be possible to know what the 96 stack looked like - it's not clear how the rest of the stack "slides 97 up". 98 99 All implicitly popped input regs must be closer to the top of 100 the reg-stack than any input that is not implicitly popped. 101 102 3. It is possible that if an input dies in an insn, reload might 103 use the input reg for an output reload. Consider this example: 104 105 asm ("foo" : "=t" (a) : "f" (b)); 106 107 This asm says that input B is not popped by the asm, and that 108 the asm pushes a result onto the reg-stack, ie, the stack is one 109 deeper after the asm than it was before. But, it is possible that 110 reload will think that it can use the same reg for both the input and 111 the output, if input B dies in this insn. 112 113 If any input operand uses the "f" constraint, all output reg 114 constraints must use the "&" earlyclobber. 115 116 The asm above would be written as 117 118 asm ("foo" : "=&t" (a) : "f" (b)); 119 120 4. Some operands need to be in particular places on the stack. All 121 output operands fall in this category - there is no other way to 122 know which regs the outputs appear in unless the user indicates 123 this in the constraints. 124 125 Output operands must specifically indicate which reg an output 126 appears in after an asm. "=f" is not allowed: the operand 127 constraints must select a class with a single reg. 128 129 5. Output operands may not be "inserted" between existing stack regs. 130 Since no 387 opcode uses a read/write operand, all output operands 131 are dead before the asm_operands, and are pushed by the asm_operands. 132 It makes no sense to push anywhere but the top of the reg-stack. 133 134 Output operands must start at the top of the reg-stack: output 135 operands may not "skip" a reg. 136 137 6. Some asm statements may need extra stack space for internal 138 calculations. This can be guaranteed by clobbering stack registers 139 unrelated to the inputs and outputs. 140 141 Here are a couple of reasonable asms to want to write. This asm 142 takes one input, which is internally popped, and produces two outputs. 143 144 asm ("fsincos" : "=t" (cos), "=u" (sin) : "0" (inp)); 145 146 This asm takes two inputs, which are popped by the fyl2xp1 opcode, 147 and replaces them with one output. The user must code the "st(1)" 148 clobber for reg-stack.c to know that fyl2xp1 pops both inputs. 149 150 asm ("fyl2xp1" : "=t" (result) : "0" (x), "u" (y) : "st(1)"); 151 152*/ 153 154#include "config.h" 155#include "system.h" 156#include "tree.h" 157#include "rtl.h" 158#include "tm_p.h" 159#include "function.h" 160#include "insn-config.h" 161#include "regs.h" 162#include "hard-reg-set.h" 163#include "flags.h" 164#include "toplev.h" 165#include "recog.h" 166#include "output.h" 167#include "basic-block.h" 168#include "varray.h" 169#include "reload.h" 170#include "ggc.h" 171 172/* We use this array to cache info about insns, because otherwise we 173 spend too much time in stack_regs_mentioned_p. 174 175 Indexed by insn UIDs. A value of zero is uninitialized, one indicates 176 the insn uses stack registers, two indicates the insn does not use 177 stack registers. */ 178static GTY(()) varray_type stack_regs_mentioned_data; 179 180#ifdef STACK_REGS 181 182#define REG_STACK_SIZE (LAST_STACK_REG - FIRST_STACK_REG + 1) 183 184/* This is the basic stack record. TOP is an index into REG[] such 185 that REG[TOP] is the top of stack. If TOP is -1 the stack is empty. 186 187 If TOP is -2, REG[] is not yet initialized. Stack initialization 188 consists of placing each live reg in array `reg' and setting `top' 189 appropriately. 190 191 REG_SET indicates which registers are live. */ 192 193typedef struct stack_def 194{ 195 int top; /* index to top stack element */ 196 HARD_REG_SET reg_set; /* set of live registers */ 197 unsigned char reg[REG_STACK_SIZE];/* register - stack mapping */ 198} *stack; 199 200/* This is used to carry information about basic blocks. It is 201 attached to the AUX field of the standard CFG block. */ 202 203typedef struct block_info_def 204{ 205 struct stack_def stack_in; /* Input stack configuration. */ 206 struct stack_def stack_out; /* Output stack configuration. */ 207 HARD_REG_SET out_reg_set; /* Stack regs live on output. */ 208 int done; /* True if block already converted. */ 209 int predecessors; /* Number of predecessors that needs 210 to be visited. */ 211} *block_info; 212 213#define BLOCK_INFO(B) ((block_info) (B)->aux) 214 215/* Passed to change_stack to indicate where to emit insns. */ 216enum emit_where 217{ 218 EMIT_AFTER, 219 EMIT_BEFORE 220}; 221 222/* The block we're currently working on. */ 223static basic_block current_block; 224 225/* This is the register file for all register after conversion. */ 226static rtx 227 FP_mode_reg[LAST_STACK_REG+1-FIRST_STACK_REG][(int) MAX_MACHINE_MODE]; 228 229#define FP_MODE_REG(regno,mode) \ 230 (FP_mode_reg[(regno)-FIRST_STACK_REG][(int) (mode)]) 231 232/* Used to initialize uninitialized registers. */ 233static rtx nan; 234 235/* Forward declarations */ 236 237static int stack_regs_mentioned_p PARAMS ((rtx pat)); 238static void straighten_stack PARAMS ((rtx, stack)); 239static void pop_stack PARAMS ((stack, int)); 240static rtx *get_true_reg PARAMS ((rtx *)); 241 242static int check_asm_stack_operands PARAMS ((rtx)); 243static int get_asm_operand_n_inputs PARAMS ((rtx)); 244static rtx stack_result PARAMS ((tree)); 245static void replace_reg PARAMS ((rtx *, int)); 246static void remove_regno_note PARAMS ((rtx, enum reg_note, 247 unsigned int)); 248static int get_hard_regnum PARAMS ((stack, rtx)); 249static rtx emit_pop_insn PARAMS ((rtx, stack, rtx, 250 enum emit_where)); 251static void emit_swap_insn PARAMS ((rtx, stack, rtx)); 252static void move_for_stack_reg PARAMS ((rtx, stack, rtx)); 253static int swap_rtx_condition_1 PARAMS ((rtx)); 254static int swap_rtx_condition PARAMS ((rtx)); 255static void compare_for_stack_reg PARAMS ((rtx, stack, rtx)); 256static void subst_stack_regs_pat PARAMS ((rtx, stack, rtx)); 257static void subst_asm_stack_regs PARAMS ((rtx, stack)); 258static void subst_stack_regs PARAMS ((rtx, stack)); 259static void change_stack PARAMS ((rtx, stack, stack, 260 enum emit_where)); 261static int convert_regs_entry PARAMS ((void)); 262static void convert_regs_exit PARAMS ((void)); 263static int convert_regs_1 PARAMS ((FILE *, basic_block)); 264static int convert_regs_2 PARAMS ((FILE *, basic_block)); 265static int convert_regs PARAMS ((FILE *)); 266static void print_stack PARAMS ((FILE *, stack)); 267static rtx next_flags_user PARAMS ((rtx)); 268static void record_label_references PARAMS ((rtx, rtx)); 269static bool compensate_edge PARAMS ((edge, FILE *)); 270 271/* Return nonzero if any stack register is mentioned somewhere within PAT. */ 272 273static int 274stack_regs_mentioned_p (pat) 275 rtx pat; 276{ 277 const char *fmt; 278 int i; 279 280 if (STACK_REG_P (pat)) 281 return 1; 282 283 fmt = GET_RTX_FORMAT (GET_CODE (pat)); 284 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--) 285 { 286 if (fmt[i] == 'E') 287 { 288 int j; 289 290 for (j = XVECLEN (pat, i) - 1; j >= 0; j--) 291 if (stack_regs_mentioned_p (XVECEXP (pat, i, j))) 292 return 1; 293 } 294 else if (fmt[i] == 'e' && stack_regs_mentioned_p (XEXP (pat, i))) 295 return 1; 296 } 297 298 return 0; 299} 300 301/* Return nonzero if INSN mentions stacked registers, else return zero. */ 302 303int 304stack_regs_mentioned (insn) 305 rtx insn; 306{ 307 unsigned int uid, max; 308 int test; 309 310 if (! INSN_P (insn) || !stack_regs_mentioned_data) 311 return 0; 312 313 uid = INSN_UID (insn); 314 max = VARRAY_SIZE (stack_regs_mentioned_data); 315 if (uid >= max) 316 { 317 /* Allocate some extra size to avoid too many reallocs, but 318 do not grow too quickly. */ 319 max = uid + uid / 20; 320 VARRAY_GROW (stack_regs_mentioned_data, max); 321 } 322 323 test = VARRAY_CHAR (stack_regs_mentioned_data, uid); 324 if (test == 0) 325 { 326 /* This insn has yet to be examined. Do so now. */ 327 test = stack_regs_mentioned_p (PATTERN (insn)) ? 1 : 2; 328 VARRAY_CHAR (stack_regs_mentioned_data, uid) = test; 329 } 330 331 return test == 1; 332} 333 334static rtx ix86_flags_rtx; 335 336static rtx 337next_flags_user (insn) 338 rtx insn; 339{ 340 /* Search forward looking for the first use of this value. 341 Stop at block boundaries. */ 342 343 while (insn != current_block->end) 344 { 345 insn = NEXT_INSN (insn); 346 347 if (INSN_P (insn) && reg_mentioned_p (ix86_flags_rtx, PATTERN (insn))) 348 return insn; 349 350 if (GET_CODE (insn) == CALL_INSN) 351 return NULL_RTX; 352 } 353 return NULL_RTX; 354} 355 356/* Reorganize the stack into ascending numbers, 357 after this insn. */ 358 359static void 360straighten_stack (insn, regstack) 361 rtx insn; 362 stack regstack; 363{ 364 struct stack_def temp_stack; 365 int top; 366 367 /* If there is only a single register on the stack, then the stack is 368 already in increasing order and no reorganization is needed. 369 370 Similarly if the stack is empty. */ 371 if (regstack->top <= 0) 372 return; 373 374 COPY_HARD_REG_SET (temp_stack.reg_set, regstack->reg_set); 375 376 for (top = temp_stack.top = regstack->top; top >= 0; top--) 377 temp_stack.reg[top] = FIRST_STACK_REG + temp_stack.top - top; 378 379 change_stack (insn, regstack, &temp_stack, EMIT_AFTER); 380} 381 382/* Pop a register from the stack. */ 383 384static void 385pop_stack (regstack, regno) 386 stack regstack; 387 int regno; 388{ 389 int top = regstack->top; 390 391 CLEAR_HARD_REG_BIT (regstack->reg_set, regno); 392 regstack->top--; 393 /* If regno was not at the top of stack then adjust stack. */ 394 if (regstack->reg [top] != regno) 395 { 396 int i; 397 for (i = regstack->top; i >= 0; i--) 398 if (regstack->reg [i] == regno) 399 { 400 int j; 401 for (j = i; j < top; j++) 402 regstack->reg [j] = regstack->reg [j + 1]; 403 break; 404 } 405 } 406} 407 408/* Convert register usage from "flat" register file usage to a "stack 409 register file. FIRST is the first insn in the function, FILE is the 410 dump file, if used. 411 412 Construct a CFG and run life analysis. Then convert each insn one 413 by one. Run a last cleanup_cfg pass, if optimizing, to eliminate 414 code duplication created when the converter inserts pop insns on 415 the edges. */ 416 417void 418reg_to_stack (first, file) 419 rtx first; 420 FILE *file; 421{ 422 basic_block bb; 423 int i; 424 int max_uid; 425 426 /* Clean up previous run. */ 427 stack_regs_mentioned_data = 0; 428 429 /* See if there is something to do. Flow analysis is quite 430 expensive so we might save some compilation time. */ 431 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++) 432 if (regs_ever_live[i]) 433 break; 434 if (i > LAST_STACK_REG) 435 return; 436 437 /* Ok, floating point instructions exist. If not optimizing, 438 build the CFG and run life analysis. */ 439 if (!optimize) 440 { 441 count_or_remove_death_notes (NULL, 1); 442 life_analysis (first, file, PROP_DEATH_NOTES); 443 } 444 mark_dfs_back_edges (); 445 446 /* Set up block info for each basic block. */ 447 alloc_aux_for_blocks (sizeof (struct block_info_def)); 448 FOR_EACH_BB_REVERSE (bb) 449 { 450 edge e; 451 for (e = bb->pred; e; e=e->pred_next) 452 if (!(e->flags & EDGE_DFS_BACK) 453 && e->src != ENTRY_BLOCK_PTR) 454 BLOCK_INFO (bb)->predecessors++; 455 } 456 457 /* Create the replacement registers up front. */ 458 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++) 459 { 460 enum machine_mode mode; 461 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); 462 mode != VOIDmode; 463 mode = GET_MODE_WIDER_MODE (mode)) 464 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i); 465 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT); 466 mode != VOIDmode; 467 mode = GET_MODE_WIDER_MODE (mode)) 468 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i); 469 } 470 471 ix86_flags_rtx = gen_rtx_REG (CCmode, FLAGS_REG); 472 473 /* A QNaN for initializing uninitialized variables. 474 475 ??? We can't load from constant memory in PIC mode, because 476 we're insertting these instructions before the prologue and 477 the PIC register hasn't been set up. In that case, fall back 478 on zero, which we can get from `ldz'. */ 479 480 if (flag_pic) 481 nan = CONST0_RTX (SFmode); 482 else 483 { 484 nan = gen_lowpart (SFmode, GEN_INT (0x7fc00000)); 485 nan = force_const_mem (SFmode, nan); 486 } 487 488 /* Allocate a cache for stack_regs_mentioned. */ 489 max_uid = get_max_uid (); 490 VARRAY_CHAR_INIT (stack_regs_mentioned_data, max_uid + 1, 491 "stack_regs_mentioned cache"); 492 493 convert_regs (file); 494 495 free_aux_for_blocks (); 496} 497 498/* Check PAT, which is in INSN, for LABEL_REFs. Add INSN to the 499 label's chain of references, and note which insn contains each 500 reference. */ 501 502static void 503record_label_references (insn, pat) 504 rtx insn, pat; 505{ 506 enum rtx_code code = GET_CODE (pat); 507 int i; 508 const char *fmt; 509 510 if (code == LABEL_REF) 511 { 512 rtx label = XEXP (pat, 0); 513 rtx ref; 514 515 if (GET_CODE (label) != CODE_LABEL) 516 abort (); 517 518 /* If this is an undefined label, LABEL_REFS (label) contains 519 garbage. */ 520 if (INSN_UID (label) == 0) 521 return; 522 523 /* Don't make a duplicate in the code_label's chain. */ 524 525 for (ref = LABEL_REFS (label); 526 ref && ref != label; 527 ref = LABEL_NEXTREF (ref)) 528 if (CONTAINING_INSN (ref) == insn) 529 return; 530 531 CONTAINING_INSN (pat) = insn; 532 LABEL_NEXTREF (pat) = LABEL_REFS (label); 533 LABEL_REFS (label) = pat; 534 535 return; 536 } 537 538 fmt = GET_RTX_FORMAT (code); 539 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 540 { 541 if (fmt[i] == 'e') 542 record_label_references (insn, XEXP (pat, i)); 543 if (fmt[i] == 'E') 544 { 545 int j; 546 for (j = 0; j < XVECLEN (pat, i); j++) 547 record_label_references (insn, XVECEXP (pat, i, j)); 548 } 549 } 550} 551 552/* Return a pointer to the REG expression within PAT. If PAT is not a 553 REG, possible enclosed by a conversion rtx, return the inner part of 554 PAT that stopped the search. */ 555 556static rtx * 557get_true_reg (pat) 558 rtx *pat; 559{ 560 for (;;) 561 switch (GET_CODE (*pat)) 562 { 563 case SUBREG: 564 /* Eliminate FP subregister accesses in favor of the 565 actual FP register in use. */ 566 { 567 rtx subreg; 568 if (FP_REG_P (subreg = SUBREG_REG (*pat))) 569 { 570 int regno_off = subreg_regno_offset (REGNO (subreg), 571 GET_MODE (subreg), 572 SUBREG_BYTE (*pat), 573 GET_MODE (*pat)); 574 *pat = FP_MODE_REG (REGNO (subreg) + regno_off, 575 GET_MODE (subreg)); 576 default: 577 return pat; 578 } 579 } 580 case FLOAT: 581 case FIX: 582 case FLOAT_EXTEND: 583 pat = & XEXP (*pat, 0); 584 } 585} 586 587/* Set if we find any malformed asms in a block. */ 588static bool any_malformed_asm; 589 590/* There are many rules that an asm statement for stack-like regs must 591 follow. Those rules are explained at the top of this file: the rule 592 numbers below refer to that explanation. */ 593 594static int 595check_asm_stack_operands (insn) 596 rtx insn; 597{ 598 int i; 599 int n_clobbers; 600 int malformed_asm = 0; 601 rtx body = PATTERN (insn); 602 603 char reg_used_as_output[FIRST_PSEUDO_REGISTER]; 604 char implicitly_dies[FIRST_PSEUDO_REGISTER]; 605 int alt; 606 607 rtx *clobber_reg = 0; 608 int n_inputs, n_outputs; 609 610 /* Find out what the constraints require. If no constraint 611 alternative matches, this asm is malformed. */ 612 extract_insn (insn); 613 constrain_operands (1); 614 alt = which_alternative; 615 616 preprocess_constraints (); 617 618 n_inputs = get_asm_operand_n_inputs (body); 619 n_outputs = recog_data.n_operands - n_inputs; 620 621 if (alt < 0) 622 { 623 malformed_asm = 1; 624 /* Avoid further trouble with this insn. */ 625 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx); 626 return 0; 627 } 628 629 /* Strip SUBREGs here to make the following code simpler. */ 630 for (i = 0; i < recog_data.n_operands; i++) 631 if (GET_CODE (recog_data.operand[i]) == SUBREG 632 && GET_CODE (SUBREG_REG (recog_data.operand[i])) == REG) 633 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]); 634 635 /* Set up CLOBBER_REG. */ 636 637 n_clobbers = 0; 638 639 if (GET_CODE (body) == PARALLEL) 640 { 641 clobber_reg = (rtx *) alloca (XVECLEN (body, 0) * sizeof (rtx)); 642 643 for (i = 0; i < XVECLEN (body, 0); i++) 644 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER) 645 { 646 rtx clobber = XVECEXP (body, 0, i); 647 rtx reg = XEXP (clobber, 0); 648 649 if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG) 650 reg = SUBREG_REG (reg); 651 652 if (STACK_REG_P (reg)) 653 { 654 clobber_reg[n_clobbers] = reg; 655 n_clobbers++; 656 } 657 } 658 } 659 660 /* Enforce rule #4: Output operands must specifically indicate which 661 reg an output appears in after an asm. "=f" is not allowed: the 662 operand constraints must select a class with a single reg. 663 664 Also enforce rule #5: Output operands must start at the top of 665 the reg-stack: output operands may not "skip" a reg. */ 666 667 memset (reg_used_as_output, 0, sizeof (reg_used_as_output)); 668 for (i = 0; i < n_outputs; i++) 669 if (STACK_REG_P (recog_data.operand[i])) 670 { 671 if (reg_class_size[(int) recog_op_alt[i][alt].class] != 1) 672 { 673 error_for_asm (insn, "output constraint %d must specify a single register", i); 674 malformed_asm = 1; 675 } 676 else 677 { 678 int j; 679 680 for (j = 0; j < n_clobbers; j++) 681 if (REGNO (recog_data.operand[i]) == REGNO (clobber_reg[j])) 682 { 683 error_for_asm (insn, "output constraint %d cannot be specified together with \"%s\" clobber", 684 i, reg_names [REGNO (clobber_reg[j])]); 685 malformed_asm = 1; 686 break; 687 } 688 if (j == n_clobbers) 689 reg_used_as_output[REGNO (recog_data.operand[i])] = 1; 690 } 691 } 692 693 694 /* Search for first non-popped reg. */ 695 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++) 696 if (! reg_used_as_output[i]) 697 break; 698 699 /* If there are any other popped regs, that's an error. */ 700 for (; i < LAST_STACK_REG + 1; i++) 701 if (reg_used_as_output[i]) 702 break; 703 704 if (i != LAST_STACK_REG + 1) 705 { 706 error_for_asm (insn, "output regs must be grouped at top of stack"); 707 malformed_asm = 1; 708 } 709 710 /* Enforce rule #2: All implicitly popped input regs must be closer 711 to the top of the reg-stack than any input that is not implicitly 712 popped. */ 713 714 memset (implicitly_dies, 0, sizeof (implicitly_dies)); 715 for (i = n_outputs; i < n_outputs + n_inputs; i++) 716 if (STACK_REG_P (recog_data.operand[i])) 717 { 718 /* An input reg is implicitly popped if it is tied to an 719 output, or if there is a CLOBBER for it. */ 720 int j; 721 722 for (j = 0; j < n_clobbers; j++) 723 if (operands_match_p (clobber_reg[j], recog_data.operand[i])) 724 break; 725 726 if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0) 727 implicitly_dies[REGNO (recog_data.operand[i])] = 1; 728 } 729 730 /* Search for first non-popped reg. */ 731 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++) 732 if (! implicitly_dies[i]) 733 break; 734 735 /* If there are any other popped regs, that's an error. */ 736 for (; i < LAST_STACK_REG + 1; i++) 737 if (implicitly_dies[i]) 738 break; 739 740 if (i != LAST_STACK_REG + 1) 741 { 742 error_for_asm (insn, 743 "implicitly popped regs must be grouped at top of stack"); 744 malformed_asm = 1; 745 } 746 747 /* Enfore rule #3: If any input operand uses the "f" constraint, all 748 output constraints must use the "&" earlyclobber. 749 750 ??? Detect this more deterministically by having constrain_asm_operands 751 record any earlyclobber. */ 752 753 for (i = n_outputs; i < n_outputs + n_inputs; i++) 754 if (recog_op_alt[i][alt].matches == -1) 755 { 756 int j; 757 758 for (j = 0; j < n_outputs; j++) 759 if (operands_match_p (recog_data.operand[j], recog_data.operand[i])) 760 { 761 error_for_asm (insn, 762 "output operand %d must use `&' constraint", j); 763 malformed_asm = 1; 764 } 765 } 766 767 if (malformed_asm) 768 { 769 /* Avoid further trouble with this insn. */ 770 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx); 771 any_malformed_asm = true; 772 return 0; 773 } 774 775 return 1; 776} 777 778/* Calculate the number of inputs and outputs in BODY, an 779 asm_operands. N_OPERANDS is the total number of operands, and 780 N_INPUTS and N_OUTPUTS are pointers to ints into which the results are 781 placed. */ 782 783static int 784get_asm_operand_n_inputs (body) 785 rtx body; 786{ 787 if (GET_CODE (body) == SET && GET_CODE (SET_SRC (body)) == ASM_OPERANDS) 788 return ASM_OPERANDS_INPUT_LENGTH (SET_SRC (body)); 789 790 else if (GET_CODE (body) == ASM_OPERANDS) 791 return ASM_OPERANDS_INPUT_LENGTH (body); 792 793 else if (GET_CODE (body) == PARALLEL 794 && GET_CODE (XVECEXP (body, 0, 0)) == SET) 795 return ASM_OPERANDS_INPUT_LENGTH (SET_SRC (XVECEXP (body, 0, 0))); 796 797 else if (GET_CODE (body) == PARALLEL 798 && GET_CODE (XVECEXP (body, 0, 0)) == ASM_OPERANDS) 799 return ASM_OPERANDS_INPUT_LENGTH (XVECEXP (body, 0, 0)); 800 801 abort (); 802} 803 804/* If current function returns its result in an fp stack register, 805 return the REG. Otherwise, return 0. */ 806 807static rtx 808stack_result (decl) 809 tree decl; 810{ 811 rtx result; 812 813 /* If the value is supposed to be returned in memory, then clearly 814 it is not returned in a stack register. */ 815 if (aggregate_value_p (DECL_RESULT (decl))) 816 return 0; 817 818 result = DECL_RTL_IF_SET (DECL_RESULT (decl)); 819 if (result != 0) 820 { 821#ifdef FUNCTION_OUTGOING_VALUE 822 result 823 = FUNCTION_OUTGOING_VALUE (TREE_TYPE (DECL_RESULT (decl)), decl); 824#else 825 result = FUNCTION_VALUE (TREE_TYPE (DECL_RESULT (decl)), decl); 826#endif 827 } 828 829 return result != 0 && STACK_REG_P (result) ? result : 0; 830} 831 832 833/* 834 * This section deals with stack register substitution, and forms the second 835 * pass over the RTL. 836 */ 837 838/* Replace REG, which is a pointer to a stack reg RTX, with an RTX for 839 the desired hard REGNO. */ 840 841static void 842replace_reg (reg, regno) 843 rtx *reg; 844 int regno; 845{ 846 if (regno < FIRST_STACK_REG || regno > LAST_STACK_REG 847 || ! STACK_REG_P (*reg)) 848 abort (); 849 850 switch (GET_MODE_CLASS (GET_MODE (*reg))) 851 { 852 default: abort (); 853 case MODE_FLOAT: 854 case MODE_COMPLEX_FLOAT:; 855 } 856 857 *reg = FP_MODE_REG (regno, GET_MODE (*reg)); 858} 859 860/* Remove a note of type NOTE, which must be found, for register 861 number REGNO from INSN. Remove only one such note. */ 862 863static void 864remove_regno_note (insn, note, regno) 865 rtx insn; 866 enum reg_note note; 867 unsigned int regno; 868{ 869 rtx *note_link, this; 870 871 note_link = ®_NOTES (insn); 872 for (this = *note_link; this; this = XEXP (this, 1)) 873 if (REG_NOTE_KIND (this) == note 874 && REG_P (XEXP (this, 0)) && REGNO (XEXP (this, 0)) == regno) 875 { 876 *note_link = XEXP (this, 1); 877 return; 878 } 879 else 880 note_link = &XEXP (this, 1); 881 882 abort (); 883} 884 885/* Find the hard register number of virtual register REG in REGSTACK. 886 The hard register number is relative to the top of the stack. -1 is 887 returned if the register is not found. */ 888 889static int 890get_hard_regnum (regstack, reg) 891 stack regstack; 892 rtx reg; 893{ 894 int i; 895 896 if (! STACK_REG_P (reg)) 897 abort (); 898 899 for (i = regstack->top; i >= 0; i--) 900 if (regstack->reg[i] == REGNO (reg)) 901 break; 902 903 return i >= 0 ? (FIRST_STACK_REG + regstack->top - i) : -1; 904} 905 906/* Emit an insn to pop virtual register REG before or after INSN. 907 REGSTACK is the stack state after INSN and is updated to reflect this 908 pop. WHEN is either emit_insn_before or emit_insn_after. A pop insn 909 is represented as a SET whose destination is the register to be popped 910 and source is the top of stack. A death note for the top of stack 911 cases the movdf pattern to pop. */ 912 913static rtx 914emit_pop_insn (insn, regstack, reg, where) 915 rtx insn; 916 stack regstack; 917 rtx reg; 918 enum emit_where where; 919{ 920 rtx pop_insn, pop_rtx; 921 int hard_regno; 922 923 /* For complex types take care to pop both halves. These may survive in 924 CLOBBER and USE expressions. */ 925 if (COMPLEX_MODE_P (GET_MODE (reg))) 926 { 927 rtx reg1 = FP_MODE_REG (REGNO (reg), DFmode); 928 rtx reg2 = FP_MODE_REG (REGNO (reg) + 1, DFmode); 929 930 pop_insn = NULL_RTX; 931 if (get_hard_regnum (regstack, reg1) >= 0) 932 pop_insn = emit_pop_insn (insn, regstack, reg1, where); 933 if (get_hard_regnum (regstack, reg2) >= 0) 934 pop_insn = emit_pop_insn (insn, regstack, reg2, where); 935 if (!pop_insn) 936 abort (); 937 return pop_insn; 938 } 939 940 hard_regno = get_hard_regnum (regstack, reg); 941 942 if (hard_regno < FIRST_STACK_REG) 943 abort (); 944 945 pop_rtx = gen_rtx_SET (VOIDmode, FP_MODE_REG (hard_regno, DFmode), 946 FP_MODE_REG (FIRST_STACK_REG, DFmode)); 947 948 if (where == EMIT_AFTER) 949 pop_insn = emit_insn_after (pop_rtx, insn); 950 else 951 pop_insn = emit_insn_before (pop_rtx, insn); 952 953 REG_NOTES (pop_insn) 954 = gen_rtx_EXPR_LIST (REG_DEAD, FP_MODE_REG (FIRST_STACK_REG, DFmode), 955 REG_NOTES (pop_insn)); 956 957 regstack->reg[regstack->top - (hard_regno - FIRST_STACK_REG)] 958 = regstack->reg[regstack->top]; 959 regstack->top -= 1; 960 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (reg)); 961 962 return pop_insn; 963} 964 965/* Emit an insn before or after INSN to swap virtual register REG with 966 the top of stack. REGSTACK is the stack state before the swap, and 967 is updated to reflect the swap. A swap insn is represented as a 968 PARALLEL of two patterns: each pattern moves one reg to the other. 969 970 If REG is already at the top of the stack, no insn is emitted. */ 971 972static void 973emit_swap_insn (insn, regstack, reg) 974 rtx insn; 975 stack regstack; 976 rtx reg; 977{ 978 int hard_regno; 979 rtx swap_rtx; 980 int tmp, other_reg; /* swap regno temps */ 981 rtx i1; /* the stack-reg insn prior to INSN */ 982 rtx i1set = NULL_RTX; /* the SET rtx within I1 */ 983 984 hard_regno = get_hard_regnum (regstack, reg); 985 986 if (hard_regno < FIRST_STACK_REG) 987 abort (); 988 if (hard_regno == FIRST_STACK_REG) 989 return; 990 991 other_reg = regstack->top - (hard_regno - FIRST_STACK_REG); 992 993 tmp = regstack->reg[other_reg]; 994 regstack->reg[other_reg] = regstack->reg[regstack->top]; 995 regstack->reg[regstack->top] = tmp; 996 997 /* Find the previous insn involving stack regs, but don't pass a 998 block boundary. */ 999 i1 = NULL; 1000 if (current_block && insn != current_block->head) 1001 { 1002 rtx tmp = PREV_INSN (insn); 1003 rtx limit = PREV_INSN (current_block->head); 1004 while (tmp != limit) 1005 { 1006 if (GET_CODE (tmp) == CODE_LABEL 1007 || GET_CODE (tmp) == CALL_INSN 1008 || NOTE_INSN_BASIC_BLOCK_P (tmp) 1009 || (GET_CODE (tmp) == INSN 1010 && stack_regs_mentioned (tmp))) 1011 { 1012 i1 = tmp; 1013 break; 1014 } 1015 tmp = PREV_INSN (tmp); 1016 } 1017 } 1018 1019 if (i1 != NULL_RTX 1020 && (i1set = single_set (i1)) != NULL_RTX) 1021 { 1022 rtx i1src = *get_true_reg (&SET_SRC (i1set)); 1023 rtx i1dest = *get_true_reg (&SET_DEST (i1set)); 1024 1025 /* If the previous register stack push was from the reg we are to 1026 swap with, omit the swap. */ 1027 1028 if (GET_CODE (i1dest) == REG && REGNO (i1dest) == FIRST_STACK_REG 1029 && GET_CODE (i1src) == REG 1030 && REGNO (i1src) == (unsigned) hard_regno - 1 1031 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX) 1032 return; 1033 1034 /* If the previous insn wrote to the reg we are to swap with, 1035 omit the swap. */ 1036 1037 if (GET_CODE (i1dest) == REG && REGNO (i1dest) == (unsigned) hard_regno 1038 && GET_CODE (i1src) == REG && REGNO (i1src) == FIRST_STACK_REG 1039 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX) 1040 return; 1041 } 1042 1043 swap_rtx = gen_swapxf (FP_MODE_REG (hard_regno, XFmode), 1044 FP_MODE_REG (FIRST_STACK_REG, XFmode)); 1045 1046 if (i1) 1047 emit_insn_after (swap_rtx, i1); 1048 else if (current_block) 1049 emit_insn_before (swap_rtx, current_block->head); 1050 else 1051 emit_insn_before (swap_rtx, insn); 1052} 1053 1054/* Handle a move to or from a stack register in PAT, which is in INSN. 1055 REGSTACK is the current stack. */ 1056 1057static void 1058move_for_stack_reg (insn, regstack, pat) 1059 rtx insn; 1060 stack regstack; 1061 rtx pat; 1062{ 1063 rtx *psrc = get_true_reg (&SET_SRC (pat)); 1064 rtx *pdest = get_true_reg (&SET_DEST (pat)); 1065 rtx src, dest; 1066 rtx note; 1067 1068 src = *psrc; dest = *pdest; 1069 1070 if (STACK_REG_P (src) && STACK_REG_P (dest)) 1071 { 1072 /* Write from one stack reg to another. If SRC dies here, then 1073 just change the register mapping and delete the insn. */ 1074 1075 note = find_regno_note (insn, REG_DEAD, REGNO (src)); 1076 if (note) 1077 { 1078 int i; 1079 1080 /* If this is a no-op move, there must not be a REG_DEAD note. */ 1081 if (REGNO (src) == REGNO (dest)) 1082 abort (); 1083 1084 for (i = regstack->top; i >= 0; i--) 1085 if (regstack->reg[i] == REGNO (src)) 1086 break; 1087 1088 /* The source must be live, and the dest must be dead. */ 1089 if (i < 0 || get_hard_regnum (regstack, dest) >= FIRST_STACK_REG) 1090 abort (); 1091 1092 /* It is possible that the dest is unused after this insn. 1093 If so, just pop the src. */ 1094 1095 if (find_regno_note (insn, REG_UNUSED, REGNO (dest))) 1096 { 1097 emit_pop_insn (insn, regstack, src, EMIT_AFTER); 1098 1099 delete_insn (insn); 1100 return; 1101 } 1102 1103 regstack->reg[i] = REGNO (dest); 1104 1105 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest)); 1106 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src)); 1107 1108 delete_insn (insn); 1109 1110 return; 1111 } 1112 1113 /* The source reg does not die. */ 1114 1115 /* If this appears to be a no-op move, delete it, or else it 1116 will confuse the machine description output patterns. But if 1117 it is REG_UNUSED, we must pop the reg now, as per-insn processing 1118 for REG_UNUSED will not work for deleted insns. */ 1119 1120 if (REGNO (src) == REGNO (dest)) 1121 { 1122 if (find_regno_note (insn, REG_UNUSED, REGNO (dest))) 1123 emit_pop_insn (insn, regstack, dest, EMIT_AFTER); 1124 1125 delete_insn (insn); 1126 return; 1127 } 1128 1129 /* The destination ought to be dead. */ 1130 if (get_hard_regnum (regstack, dest) >= FIRST_STACK_REG) 1131 abort (); 1132 1133 replace_reg (psrc, get_hard_regnum (regstack, src)); 1134 1135 regstack->reg[++regstack->top] = REGNO (dest); 1136 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest)); 1137 replace_reg (pdest, FIRST_STACK_REG); 1138 } 1139 else if (STACK_REG_P (src)) 1140 { 1141 /* Save from a stack reg to MEM, or possibly integer reg. Since 1142 only top of stack may be saved, emit an exchange first if 1143 needs be. */ 1144 1145 emit_swap_insn (insn, regstack, src); 1146 1147 note = find_regno_note (insn, REG_DEAD, REGNO (src)); 1148 if (note) 1149 { 1150 replace_reg (&XEXP (note, 0), FIRST_STACK_REG); 1151 regstack->top--; 1152 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src)); 1153 } 1154 else if ((GET_MODE (src) == XFmode || GET_MODE (src) == TFmode) 1155 && regstack->top < REG_STACK_SIZE - 1) 1156 { 1157 /* A 387 cannot write an XFmode value to a MEM without 1158 clobbering the source reg. The output code can handle 1159 this by reading back the value from the MEM. 1160 But it is more efficient to use a temp register if one is 1161 available. Push the source value here if the register 1162 stack is not full, and then write the value to memory via 1163 a pop. */ 1164 rtx push_rtx, push_insn; 1165 rtx top_stack_reg = FP_MODE_REG (FIRST_STACK_REG, GET_MODE (src)); 1166 1167 if (GET_MODE (src) == TFmode) 1168 push_rtx = gen_movtf (top_stack_reg, top_stack_reg); 1169 else 1170 push_rtx = gen_movxf (top_stack_reg, top_stack_reg); 1171 push_insn = emit_insn_before (push_rtx, insn); 1172 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_DEAD, top_stack_reg, 1173 REG_NOTES (insn)); 1174 } 1175 1176 replace_reg (psrc, FIRST_STACK_REG); 1177 } 1178 else if (STACK_REG_P (dest)) 1179 { 1180 /* Load from MEM, or possibly integer REG or constant, into the 1181 stack regs. The actual target is always the top of the 1182 stack. The stack mapping is changed to reflect that DEST is 1183 now at top of stack. */ 1184 1185 /* The destination ought to be dead. */ 1186 if (get_hard_regnum (regstack, dest) >= FIRST_STACK_REG) 1187 abort (); 1188 1189 if (regstack->top >= REG_STACK_SIZE) 1190 abort (); 1191 1192 regstack->reg[++regstack->top] = REGNO (dest); 1193 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest)); 1194 replace_reg (pdest, FIRST_STACK_REG); 1195 } 1196 else 1197 abort (); 1198} 1199 1200/* Swap the condition on a branch, if there is one. Return true if we 1201 found a condition to swap. False if the condition was not used as 1202 such. */ 1203 1204static int 1205swap_rtx_condition_1 (pat) 1206 rtx pat; 1207{ 1208 const char *fmt; 1209 int i, r = 0; 1210 1211 if (GET_RTX_CLASS (GET_CODE (pat)) == '<') 1212 { 1213 PUT_CODE (pat, swap_condition (GET_CODE (pat))); 1214 r = 1; 1215 } 1216 else 1217 { 1218 fmt = GET_RTX_FORMAT (GET_CODE (pat)); 1219 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--) 1220 { 1221 if (fmt[i] == 'E') 1222 { 1223 int j; 1224 1225 for (j = XVECLEN (pat, i) - 1; j >= 0; j--) 1226 r |= swap_rtx_condition_1 (XVECEXP (pat, i, j)); 1227 } 1228 else if (fmt[i] == 'e') 1229 r |= swap_rtx_condition_1 (XEXP (pat, i)); 1230 } 1231 } 1232 1233 return r; 1234} 1235 1236static int 1237swap_rtx_condition (insn) 1238 rtx insn; 1239{ 1240 rtx pat = PATTERN (insn); 1241 1242 /* We're looking for a single set to cc0 or an HImode temporary. */ 1243 1244 if (GET_CODE (pat) == SET 1245 && GET_CODE (SET_DEST (pat)) == REG 1246 && REGNO (SET_DEST (pat)) == FLAGS_REG) 1247 { 1248 insn = next_flags_user (insn); 1249 if (insn == NULL_RTX) 1250 return 0; 1251 pat = PATTERN (insn); 1252 } 1253 1254 /* See if this is, or ends in, a fnstsw, aka unspec 9. If so, we're 1255 not doing anything with the cc value right now. We may be able to 1256 search for one though. */ 1257 1258 if (GET_CODE (pat) == SET 1259 && GET_CODE (SET_SRC (pat)) == UNSPEC 1260 && XINT (SET_SRC (pat), 1) == UNSPEC_FNSTSW) 1261 { 1262 rtx dest = SET_DEST (pat); 1263 1264 /* Search forward looking for the first use of this value. 1265 Stop at block boundaries. */ 1266 while (insn != current_block->end) 1267 { 1268 insn = NEXT_INSN (insn); 1269 if (INSN_P (insn) && reg_mentioned_p (dest, insn)) 1270 break; 1271 if (GET_CODE (insn) == CALL_INSN) 1272 return 0; 1273 } 1274 1275 /* So we've found the insn using this value. If it is anything 1276 other than sahf, aka unspec 10, or the value does not die 1277 (meaning we'd have to search further), then we must give up. */ 1278 pat = PATTERN (insn); 1279 if (GET_CODE (pat) != SET 1280 || GET_CODE (SET_SRC (pat)) != UNSPEC 1281 || XINT (SET_SRC (pat), 1) != UNSPEC_SAHF 1282 || ! dead_or_set_p (insn, dest)) 1283 return 0; 1284 1285 /* Now we are prepared to handle this as a normal cc0 setter. */ 1286 insn = next_flags_user (insn); 1287 if (insn == NULL_RTX) 1288 return 0; 1289 pat = PATTERN (insn); 1290 } 1291 1292 if (swap_rtx_condition_1 (pat)) 1293 { 1294 int fail = 0; 1295 INSN_CODE (insn) = -1; 1296 if (recog_memoized (insn) == -1) 1297 fail = 1; 1298 /* In case the flags don't die here, recurse to try fix 1299 following user too. */ 1300 else if (! dead_or_set_p (insn, ix86_flags_rtx)) 1301 { 1302 insn = next_flags_user (insn); 1303 if (!insn || !swap_rtx_condition (insn)) 1304 fail = 1; 1305 } 1306 if (fail) 1307 { 1308 swap_rtx_condition_1 (pat); 1309 return 0; 1310 } 1311 return 1; 1312 } 1313 return 0; 1314} 1315 1316/* Handle a comparison. Special care needs to be taken to avoid 1317 causing comparisons that a 387 cannot do correctly, such as EQ. 1318 1319 Also, a pop insn may need to be emitted. The 387 does have an 1320 `fcompp' insn that can pop two regs, but it is sometimes too expensive 1321 to do this - a `fcomp' followed by a `fstpl %st(0)' may be easier to 1322 set up. */ 1323 1324static void 1325compare_for_stack_reg (insn, regstack, pat_src) 1326 rtx insn; 1327 stack regstack; 1328 rtx pat_src; 1329{ 1330 rtx *src1, *src2; 1331 rtx src1_note, src2_note; 1332 rtx flags_user; 1333 1334 src1 = get_true_reg (&XEXP (pat_src, 0)); 1335 src2 = get_true_reg (&XEXP (pat_src, 1)); 1336 flags_user = next_flags_user (insn); 1337 1338 /* ??? If fxch turns out to be cheaper than fstp, give priority to 1339 registers that die in this insn - move those to stack top first. */ 1340 if ((! STACK_REG_P (*src1) 1341 || (STACK_REG_P (*src2) 1342 && get_hard_regnum (regstack, *src2) == FIRST_STACK_REG)) 1343 && swap_rtx_condition (insn)) 1344 { 1345 rtx temp; 1346 temp = XEXP (pat_src, 0); 1347 XEXP (pat_src, 0) = XEXP (pat_src, 1); 1348 XEXP (pat_src, 1) = temp; 1349 1350 src1 = get_true_reg (&XEXP (pat_src, 0)); 1351 src2 = get_true_reg (&XEXP (pat_src, 1)); 1352 1353 INSN_CODE (insn) = -1; 1354 } 1355 1356 /* We will fix any death note later. */ 1357 1358 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1359 1360 if (STACK_REG_P (*src2)) 1361 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); 1362 else 1363 src2_note = NULL_RTX; 1364 1365 emit_swap_insn (insn, regstack, *src1); 1366 1367 replace_reg (src1, FIRST_STACK_REG); 1368 1369 if (STACK_REG_P (*src2)) 1370 replace_reg (src2, get_hard_regnum (regstack, *src2)); 1371 1372 if (src1_note) 1373 { 1374 pop_stack (regstack, REGNO (XEXP (src1_note, 0))); 1375 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); 1376 } 1377 1378 /* If the second operand dies, handle that. But if the operands are 1379 the same stack register, don't bother, because only one death is 1380 needed, and it was just handled. */ 1381 1382 if (src2_note 1383 && ! (STACK_REG_P (*src1) && STACK_REG_P (*src2) 1384 && REGNO (*src1) == REGNO (*src2))) 1385 { 1386 /* As a special case, two regs may die in this insn if src2 is 1387 next to top of stack and the top of stack also dies. Since 1388 we have already popped src1, "next to top of stack" is really 1389 at top (FIRST_STACK_REG) now. */ 1390 1391 if (get_hard_regnum (regstack, XEXP (src2_note, 0)) == FIRST_STACK_REG 1392 && src1_note) 1393 { 1394 pop_stack (regstack, REGNO (XEXP (src2_note, 0))); 1395 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1); 1396 } 1397 else 1398 { 1399 /* The 386 can only represent death of the first operand in 1400 the case handled above. In all other cases, emit a separate 1401 pop and remove the death note from here. */ 1402 1403 /* link_cc0_insns (insn); */ 1404 1405 remove_regno_note (insn, REG_DEAD, REGNO (XEXP (src2_note, 0))); 1406 1407 emit_pop_insn (insn, regstack, XEXP (src2_note, 0), 1408 EMIT_AFTER); 1409 } 1410 } 1411} 1412 1413/* Substitute new registers in PAT, which is part of INSN. REGSTACK 1414 is the current register layout. */ 1415 1416static void 1417subst_stack_regs_pat (insn, regstack, pat) 1418 rtx insn; 1419 stack regstack; 1420 rtx pat; 1421{ 1422 rtx *dest, *src; 1423 1424 switch (GET_CODE (pat)) 1425 { 1426 case USE: 1427 /* Deaths in USE insns can happen in non optimizing compilation. 1428 Handle them by popping the dying register. */ 1429 src = get_true_reg (&XEXP (pat, 0)); 1430 if (STACK_REG_P (*src) 1431 && find_regno_note (insn, REG_DEAD, REGNO (*src))) 1432 { 1433 emit_pop_insn (insn, regstack, *src, EMIT_AFTER); 1434 return; 1435 } 1436 /* ??? Uninitialized USE should not happen. */ 1437 else if (get_hard_regnum (regstack, *src) == -1) 1438 abort (); 1439 break; 1440 1441 case CLOBBER: 1442 { 1443 rtx note; 1444 1445 dest = get_true_reg (&XEXP (pat, 0)); 1446 if (STACK_REG_P (*dest)) 1447 { 1448 note = find_reg_note (insn, REG_DEAD, *dest); 1449 1450 if (pat != PATTERN (insn)) 1451 { 1452 /* The fix_truncdi_1 pattern wants to be able to allocate 1453 it's own scratch register. It does this by clobbering 1454 an fp reg so that it is assured of an empty reg-stack 1455 register. If the register is live, kill it now. 1456 Remove the DEAD/UNUSED note so we don't try to kill it 1457 later too. */ 1458 1459 if (note) 1460 emit_pop_insn (insn, regstack, *dest, EMIT_BEFORE); 1461 else 1462 { 1463 note = find_reg_note (insn, REG_UNUSED, *dest); 1464 if (!note) 1465 abort (); 1466 } 1467 remove_note (insn, note); 1468 replace_reg (dest, LAST_STACK_REG); 1469 } 1470 else 1471 { 1472 /* A top-level clobber with no REG_DEAD, and no hard-regnum 1473 indicates an uninitialized value. Because reload removed 1474 all other clobbers, this must be due to a function 1475 returning without a value. Load up a NaN. */ 1476 1477 if (! note 1478 && get_hard_regnum (regstack, *dest) == -1) 1479 { 1480 pat = gen_rtx_SET (VOIDmode, 1481 FP_MODE_REG (REGNO (*dest), SFmode), 1482 nan); 1483 PATTERN (insn) = pat; 1484 move_for_stack_reg (insn, regstack, pat); 1485 } 1486 if (! note && COMPLEX_MODE_P (GET_MODE (*dest)) 1487 && get_hard_regnum (regstack, FP_MODE_REG (REGNO (*dest), DFmode)) == -1) 1488 { 1489 pat = gen_rtx_SET (VOIDmode, 1490 FP_MODE_REG (REGNO (*dest) + 1, SFmode), 1491 nan); 1492 PATTERN (insn) = pat; 1493 move_for_stack_reg (insn, regstack, pat); 1494 } 1495 } 1496 } 1497 break; 1498 } 1499 1500 case SET: 1501 { 1502 rtx *src1 = (rtx *) 0, *src2; 1503 rtx src1_note, src2_note; 1504 rtx pat_src; 1505 1506 dest = get_true_reg (&SET_DEST (pat)); 1507 src = get_true_reg (&SET_SRC (pat)); 1508 pat_src = SET_SRC (pat); 1509 1510 /* See if this is a `movM' pattern, and handle elsewhere if so. */ 1511 if (STACK_REG_P (*src) 1512 || (STACK_REG_P (*dest) 1513 && (GET_CODE (*src) == REG || GET_CODE (*src) == MEM 1514 || GET_CODE (*src) == CONST_DOUBLE))) 1515 { 1516 move_for_stack_reg (insn, regstack, pat); 1517 break; 1518 } 1519 1520 switch (GET_CODE (pat_src)) 1521 { 1522 case COMPARE: 1523 compare_for_stack_reg (insn, regstack, pat_src); 1524 break; 1525 1526 case CALL: 1527 { 1528 int count; 1529 for (count = HARD_REGNO_NREGS (REGNO (*dest), GET_MODE (*dest)); 1530 --count >= 0;) 1531 { 1532 regstack->reg[++regstack->top] = REGNO (*dest) + count; 1533 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest) + count); 1534 } 1535 } 1536 replace_reg (dest, FIRST_STACK_REG); 1537 break; 1538 1539 case REG: 1540 /* This is a `tstM2' case. */ 1541 if (*dest != cc0_rtx) 1542 abort (); 1543 src1 = src; 1544 1545 /* Fall through. */ 1546 1547 case FLOAT_TRUNCATE: 1548 case SQRT: 1549 case ABS: 1550 case NEG: 1551 /* These insns only operate on the top of the stack. DEST might 1552 be cc0_rtx if we're processing a tstM pattern. Also, it's 1553 possible that the tstM case results in a REG_DEAD note on the 1554 source. */ 1555 1556 if (src1 == 0) 1557 src1 = get_true_reg (&XEXP (pat_src, 0)); 1558 1559 emit_swap_insn (insn, regstack, *src1); 1560 1561 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1562 1563 if (STACK_REG_P (*dest)) 1564 replace_reg (dest, FIRST_STACK_REG); 1565 1566 if (src1_note) 1567 { 1568 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); 1569 regstack->top--; 1570 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1)); 1571 } 1572 1573 replace_reg (src1, FIRST_STACK_REG); 1574 break; 1575 1576 case MINUS: 1577 case DIV: 1578 /* On i386, reversed forms of subM3 and divM3 exist for 1579 MODE_FLOAT, so the same code that works for addM3 and mulM3 1580 can be used. */ 1581 case MULT: 1582 case PLUS: 1583 /* These insns can accept the top of stack as a destination 1584 from a stack reg or mem, or can use the top of stack as a 1585 source and some other stack register (possibly top of stack) 1586 as a destination. */ 1587 1588 src1 = get_true_reg (&XEXP (pat_src, 0)); 1589 src2 = get_true_reg (&XEXP (pat_src, 1)); 1590 1591 /* We will fix any death note later. */ 1592 1593 if (STACK_REG_P (*src1)) 1594 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1595 else 1596 src1_note = NULL_RTX; 1597 if (STACK_REG_P (*src2)) 1598 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); 1599 else 1600 src2_note = NULL_RTX; 1601 1602 /* If either operand is not a stack register, then the dest 1603 must be top of stack. */ 1604 1605 if (! STACK_REG_P (*src1) || ! STACK_REG_P (*src2)) 1606 emit_swap_insn (insn, regstack, *dest); 1607 else 1608 { 1609 /* Both operands are REG. If neither operand is already 1610 at the top of stack, choose to make the one that is the dest 1611 the new top of stack. */ 1612 1613 int src1_hard_regnum, src2_hard_regnum; 1614 1615 src1_hard_regnum = get_hard_regnum (regstack, *src1); 1616 src2_hard_regnum = get_hard_regnum (regstack, *src2); 1617 if (src1_hard_regnum == -1 || src2_hard_regnum == -1) 1618 abort (); 1619 1620 if (src1_hard_regnum != FIRST_STACK_REG 1621 && src2_hard_regnum != FIRST_STACK_REG) 1622 emit_swap_insn (insn, regstack, *dest); 1623 } 1624 1625 if (STACK_REG_P (*src1)) 1626 replace_reg (src1, get_hard_regnum (regstack, *src1)); 1627 if (STACK_REG_P (*src2)) 1628 replace_reg (src2, get_hard_regnum (regstack, *src2)); 1629 1630 if (src1_note) 1631 { 1632 rtx src1_reg = XEXP (src1_note, 0); 1633 1634 /* If the register that dies is at the top of stack, then 1635 the destination is somewhere else - merely substitute it. 1636 But if the reg that dies is not at top of stack, then 1637 move the top of stack to the dead reg, as though we had 1638 done the insn and then a store-with-pop. */ 1639 1640 if (REGNO (src1_reg) == regstack->reg[regstack->top]) 1641 { 1642 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1643 replace_reg (dest, get_hard_regnum (regstack, *dest)); 1644 } 1645 else 1646 { 1647 int regno = get_hard_regnum (regstack, src1_reg); 1648 1649 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1650 replace_reg (dest, regno); 1651 1652 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)] 1653 = regstack->reg[regstack->top]; 1654 } 1655 1656 CLEAR_HARD_REG_BIT (regstack->reg_set, 1657 REGNO (XEXP (src1_note, 0))); 1658 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); 1659 regstack->top--; 1660 } 1661 else if (src2_note) 1662 { 1663 rtx src2_reg = XEXP (src2_note, 0); 1664 if (REGNO (src2_reg) == regstack->reg[regstack->top]) 1665 { 1666 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1667 replace_reg (dest, get_hard_regnum (regstack, *dest)); 1668 } 1669 else 1670 { 1671 int regno = get_hard_regnum (regstack, src2_reg); 1672 1673 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1674 replace_reg (dest, regno); 1675 1676 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)] 1677 = regstack->reg[regstack->top]; 1678 } 1679 1680 CLEAR_HARD_REG_BIT (regstack->reg_set, 1681 REGNO (XEXP (src2_note, 0))); 1682 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG); 1683 regstack->top--; 1684 } 1685 else 1686 { 1687 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1688 replace_reg (dest, get_hard_regnum (regstack, *dest)); 1689 } 1690 1691 /* Keep operand 1 maching with destination. */ 1692 if (GET_RTX_CLASS (GET_CODE (pat_src)) == 'c' 1693 && REG_P (*src1) && REG_P (*src2) 1694 && REGNO (*src1) != REGNO (*dest)) 1695 { 1696 int tmp = REGNO (*src1); 1697 replace_reg (src1, REGNO (*src2)); 1698 replace_reg (src2, tmp); 1699 } 1700 break; 1701 1702 case UNSPEC: 1703 switch (XINT (pat_src, 1)) 1704 { 1705 case UNSPEC_SIN: 1706 case UNSPEC_COS: 1707 /* These insns only operate on the top of the stack. */ 1708 1709 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); 1710 1711 emit_swap_insn (insn, regstack, *src1); 1712 1713 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1714 1715 if (STACK_REG_P (*dest)) 1716 replace_reg (dest, FIRST_STACK_REG); 1717 1718 if (src1_note) 1719 { 1720 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); 1721 regstack->top--; 1722 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1)); 1723 } 1724 1725 replace_reg (src1, FIRST_STACK_REG); 1726 break; 1727 1728 case UNSPEC_SAHF: 1729 /* (unspec [(unspec [(compare)] UNSPEC_FNSTSW)] UNSPEC_SAHF) 1730 The combination matches the PPRO fcomi instruction. */ 1731 1732 pat_src = XVECEXP (pat_src, 0, 0); 1733 if (GET_CODE (pat_src) != UNSPEC 1734 || XINT (pat_src, 1) != UNSPEC_FNSTSW) 1735 abort (); 1736 /* FALLTHRU */ 1737 1738 case UNSPEC_FNSTSW: 1739 /* Combined fcomp+fnstsw generated for doing well with 1740 CSE. When optimizing this would have been broken 1741 up before now. */ 1742 1743 pat_src = XVECEXP (pat_src, 0, 0); 1744 if (GET_CODE (pat_src) != COMPARE) 1745 abort (); 1746 1747 compare_for_stack_reg (insn, regstack, pat_src); 1748 break; 1749 1750 default: 1751 abort (); 1752 } 1753 break; 1754 1755 case IF_THEN_ELSE: 1756 /* This insn requires the top of stack to be the destination. */ 1757 1758 src1 = get_true_reg (&XEXP (pat_src, 1)); 1759 src2 = get_true_reg (&XEXP (pat_src, 2)); 1760 1761 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1762 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); 1763 1764 /* If the comparison operator is an FP comparison operator, 1765 it is handled correctly by compare_for_stack_reg () who 1766 will move the destination to the top of stack. But if the 1767 comparison operator is not an FP comparison operator, we 1768 have to handle it here. */ 1769 if (get_hard_regnum (regstack, *dest) >= FIRST_STACK_REG 1770 && REGNO (*dest) != regstack->reg[regstack->top]) 1771 { 1772 /* In case one of operands is the top of stack and the operands 1773 dies, it is safe to make it the destination operand by 1774 reversing the direction of cmove and avoid fxch. */ 1775 if ((REGNO (*src1) == regstack->reg[regstack->top] 1776 && src1_note) 1777 || (REGNO (*src2) == regstack->reg[regstack->top] 1778 && src2_note)) 1779 { 1780 int idx1 = (get_hard_regnum (regstack, *src1) 1781 - FIRST_STACK_REG); 1782 int idx2 = (get_hard_regnum (regstack, *src2) 1783 - FIRST_STACK_REG); 1784 1785 /* Make reg-stack believe that the operands are already 1786 swapped on the stack */ 1787 regstack->reg[regstack->top - idx1] = REGNO (*src2); 1788 regstack->reg[regstack->top - idx2] = REGNO (*src1); 1789 1790 /* Reverse condition to compensate the operand swap. 1791 i386 do have comparison always reversible. */ 1792 PUT_CODE (XEXP (pat_src, 0), 1793 reversed_comparison_code (XEXP (pat_src, 0), insn)); 1794 } 1795 else 1796 emit_swap_insn (insn, regstack, *dest); 1797 } 1798 1799 { 1800 rtx src_note [3]; 1801 int i; 1802 1803 src_note[0] = 0; 1804 src_note[1] = src1_note; 1805 src_note[2] = src2_note; 1806 1807 if (STACK_REG_P (*src1)) 1808 replace_reg (src1, get_hard_regnum (regstack, *src1)); 1809 if (STACK_REG_P (*src2)) 1810 replace_reg (src2, get_hard_regnum (regstack, *src2)); 1811 1812 for (i = 1; i <= 2; i++) 1813 if (src_note [i]) 1814 { 1815 int regno = REGNO (XEXP (src_note[i], 0)); 1816 1817 /* If the register that dies is not at the top of 1818 stack, then move the top of stack to the dead reg */ 1819 if (regno != regstack->reg[regstack->top]) 1820 { 1821 remove_regno_note (insn, REG_DEAD, regno); 1822 emit_pop_insn (insn, regstack, XEXP (src_note[i], 0), 1823 EMIT_AFTER); 1824 } 1825 else 1826 /* Top of stack never dies, as it is the 1827 destination. */ 1828 abort (); 1829 } 1830 } 1831 1832 /* Make dest the top of stack. Add dest to regstack if 1833 not present. */ 1834 if (get_hard_regnum (regstack, *dest) < FIRST_STACK_REG) 1835 regstack->reg[++regstack->top] = REGNO (*dest); 1836 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1837 replace_reg (dest, FIRST_STACK_REG); 1838 break; 1839 1840 default: 1841 abort (); 1842 } 1843 break; 1844 } 1845 1846 default: 1847 break; 1848 } 1849} 1850 1851/* Substitute hard regnums for any stack regs in INSN, which has 1852 N_INPUTS inputs and N_OUTPUTS outputs. REGSTACK is the stack info 1853 before the insn, and is updated with changes made here. 1854 1855 There are several requirements and assumptions about the use of 1856 stack-like regs in asm statements. These rules are enforced by 1857 record_asm_stack_regs; see comments there for details. Any 1858 asm_operands left in the RTL at this point may be assume to meet the 1859 requirements, since record_asm_stack_regs removes any problem asm. */ 1860 1861static void 1862subst_asm_stack_regs (insn, regstack) 1863 rtx insn; 1864 stack regstack; 1865{ 1866 rtx body = PATTERN (insn); 1867 int alt; 1868 1869 rtx *note_reg; /* Array of note contents */ 1870 rtx **note_loc; /* Address of REG field of each note */ 1871 enum reg_note *note_kind; /* The type of each note */ 1872 1873 rtx *clobber_reg = 0; 1874 rtx **clobber_loc = 0; 1875 1876 struct stack_def temp_stack; 1877 int n_notes; 1878 int n_clobbers; 1879 rtx note; 1880 int i; 1881 int n_inputs, n_outputs; 1882 1883 if (! check_asm_stack_operands (insn)) 1884 return; 1885 1886 /* Find out what the constraints required. If no constraint 1887 alternative matches, that is a compiler bug: we should have caught 1888 such an insn in check_asm_stack_operands. */ 1889 extract_insn (insn); 1890 constrain_operands (1); 1891 alt = which_alternative; 1892 1893 preprocess_constraints (); 1894 1895 n_inputs = get_asm_operand_n_inputs (body); 1896 n_outputs = recog_data.n_operands - n_inputs; 1897 1898 if (alt < 0) 1899 abort (); 1900 1901 /* Strip SUBREGs here to make the following code simpler. */ 1902 for (i = 0; i < recog_data.n_operands; i++) 1903 if (GET_CODE (recog_data.operand[i]) == SUBREG 1904 && GET_CODE (SUBREG_REG (recog_data.operand[i])) == REG) 1905 { 1906 recog_data.operand_loc[i] = & SUBREG_REG (recog_data.operand[i]); 1907 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]); 1908 } 1909 1910 /* Set up NOTE_REG, NOTE_LOC and NOTE_KIND. */ 1911 1912 for (i = 0, note = REG_NOTES (insn); note; note = XEXP (note, 1)) 1913 i++; 1914 1915 note_reg = (rtx *) alloca (i * sizeof (rtx)); 1916 note_loc = (rtx **) alloca (i * sizeof (rtx *)); 1917 note_kind = (enum reg_note *) alloca (i * sizeof (enum reg_note)); 1918 1919 n_notes = 0; 1920 for (note = REG_NOTES (insn); note; note = XEXP (note, 1)) 1921 { 1922 rtx reg = XEXP (note, 0); 1923 rtx *loc = & XEXP (note, 0); 1924 1925 if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG) 1926 { 1927 loc = & SUBREG_REG (reg); 1928 reg = SUBREG_REG (reg); 1929 } 1930 1931 if (STACK_REG_P (reg) 1932 && (REG_NOTE_KIND (note) == REG_DEAD 1933 || REG_NOTE_KIND (note) == REG_UNUSED)) 1934 { 1935 note_reg[n_notes] = reg; 1936 note_loc[n_notes] = loc; 1937 note_kind[n_notes] = REG_NOTE_KIND (note); 1938 n_notes++; 1939 } 1940 } 1941 1942 /* Set up CLOBBER_REG and CLOBBER_LOC. */ 1943 1944 n_clobbers = 0; 1945 1946 if (GET_CODE (body) == PARALLEL) 1947 { 1948 clobber_reg = (rtx *) alloca (XVECLEN (body, 0) * sizeof (rtx)); 1949 clobber_loc = (rtx **) alloca (XVECLEN (body, 0) * sizeof (rtx *)); 1950 1951 for (i = 0; i < XVECLEN (body, 0); i++) 1952 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER) 1953 { 1954 rtx clobber = XVECEXP (body, 0, i); 1955 rtx reg = XEXP (clobber, 0); 1956 rtx *loc = & XEXP (clobber, 0); 1957 1958 if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG) 1959 { 1960 loc = & SUBREG_REG (reg); 1961 reg = SUBREG_REG (reg); 1962 } 1963 1964 if (STACK_REG_P (reg)) 1965 { 1966 clobber_reg[n_clobbers] = reg; 1967 clobber_loc[n_clobbers] = loc; 1968 n_clobbers++; 1969 } 1970 } 1971 } 1972 1973 temp_stack = *regstack; 1974 1975 /* Put the input regs into the desired place in TEMP_STACK. */ 1976 1977 for (i = n_outputs; i < n_outputs + n_inputs; i++) 1978 if (STACK_REG_P (recog_data.operand[i]) 1979 && reg_class_subset_p (recog_op_alt[i][alt].class, 1980 FLOAT_REGS) 1981 && recog_op_alt[i][alt].class != FLOAT_REGS) 1982 { 1983 /* If an operand needs to be in a particular reg in 1984 FLOAT_REGS, the constraint was either 't' or 'u'. Since 1985 these constraints are for single register classes, and 1986 reload guaranteed that operand[i] is already in that class, 1987 we can just use REGNO (recog_data.operand[i]) to know which 1988 actual reg this operand needs to be in. */ 1989 1990 int regno = get_hard_regnum (&temp_stack, recog_data.operand[i]); 1991 1992 if (regno < 0) 1993 abort (); 1994 1995 if ((unsigned int) regno != REGNO (recog_data.operand[i])) 1996 { 1997 /* recog_data.operand[i] is not in the right place. Find 1998 it and swap it with whatever is already in I's place. 1999 K is where recog_data.operand[i] is now. J is where it 2000 should be. */ 2001 int j, k, temp; 2002 2003 k = temp_stack.top - (regno - FIRST_STACK_REG); 2004 j = (temp_stack.top 2005 - (REGNO (recog_data.operand[i]) - FIRST_STACK_REG)); 2006 2007 temp = temp_stack.reg[k]; 2008 temp_stack.reg[k] = temp_stack.reg[j]; 2009 temp_stack.reg[j] = temp; 2010 } 2011 } 2012 2013 /* Emit insns before INSN to make sure the reg-stack is in the right 2014 order. */ 2015 2016 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE); 2017 2018 /* Make the needed input register substitutions. Do death notes and 2019 clobbers too, because these are for inputs, not outputs. */ 2020 2021 for (i = n_outputs; i < n_outputs + n_inputs; i++) 2022 if (STACK_REG_P (recog_data.operand[i])) 2023 { 2024 int regnum = get_hard_regnum (regstack, recog_data.operand[i]); 2025 2026 if (regnum < 0) 2027 abort (); 2028 2029 replace_reg (recog_data.operand_loc[i], regnum); 2030 } 2031 2032 for (i = 0; i < n_notes; i++) 2033 if (note_kind[i] == REG_DEAD) 2034 { 2035 int regnum = get_hard_regnum (regstack, note_reg[i]); 2036 2037 if (regnum < 0) 2038 abort (); 2039 2040 replace_reg (note_loc[i], regnum); 2041 } 2042 2043 for (i = 0; i < n_clobbers; i++) 2044 { 2045 /* It's OK for a CLOBBER to reference a reg that is not live. 2046 Don't try to replace it in that case. */ 2047 int regnum = get_hard_regnum (regstack, clobber_reg[i]); 2048 2049 if (regnum >= 0) 2050 { 2051 /* Sigh - clobbers always have QImode. But replace_reg knows 2052 that these regs can't be MODE_INT and will abort. Just put 2053 the right reg there without calling replace_reg. */ 2054 2055 *clobber_loc[i] = FP_MODE_REG (regnum, DFmode); 2056 } 2057 } 2058 2059 /* Now remove from REGSTACK any inputs that the asm implicitly popped. */ 2060 2061 for (i = n_outputs; i < n_outputs + n_inputs; i++) 2062 if (STACK_REG_P (recog_data.operand[i])) 2063 { 2064 /* An input reg is implicitly popped if it is tied to an 2065 output, or if there is a CLOBBER for it. */ 2066 int j; 2067 2068 for (j = 0; j < n_clobbers; j++) 2069 if (operands_match_p (clobber_reg[j], recog_data.operand[i])) 2070 break; 2071 2072 if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0) 2073 { 2074 /* recog_data.operand[i] might not be at the top of stack. 2075 But that's OK, because all we need to do is pop the 2076 right number of regs off of the top of the reg-stack. 2077 record_asm_stack_regs guaranteed that all implicitly 2078 popped regs were grouped at the top of the reg-stack. */ 2079 2080 CLEAR_HARD_REG_BIT (regstack->reg_set, 2081 regstack->reg[regstack->top]); 2082 regstack->top--; 2083 } 2084 } 2085 2086 /* Now add to REGSTACK any outputs that the asm implicitly pushed. 2087 Note that there isn't any need to substitute register numbers. 2088 ??? Explain why this is true. */ 2089 2090 for (i = LAST_STACK_REG; i >= FIRST_STACK_REG; i--) 2091 { 2092 /* See if there is an output for this hard reg. */ 2093 int j; 2094 2095 for (j = 0; j < n_outputs; j++) 2096 if (STACK_REG_P (recog_data.operand[j]) 2097 && REGNO (recog_data.operand[j]) == (unsigned) i) 2098 { 2099 regstack->reg[++regstack->top] = i; 2100 SET_HARD_REG_BIT (regstack->reg_set, i); 2101 break; 2102 } 2103 } 2104 2105 /* Now emit a pop insn for any REG_UNUSED output, or any REG_DEAD 2106 input that the asm didn't implicitly pop. If the asm didn't 2107 implicitly pop an input reg, that reg will still be live. 2108 2109 Note that we can't use find_regno_note here: the register numbers 2110 in the death notes have already been substituted. */ 2111 2112 for (i = 0; i < n_outputs; i++) 2113 if (STACK_REG_P (recog_data.operand[i])) 2114 { 2115 int j; 2116 2117 for (j = 0; j < n_notes; j++) 2118 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j]) 2119 && note_kind[j] == REG_UNUSED) 2120 { 2121 insn = emit_pop_insn (insn, regstack, recog_data.operand[i], 2122 EMIT_AFTER); 2123 break; 2124 } 2125 } 2126 2127 for (i = n_outputs; i < n_outputs + n_inputs; i++) 2128 if (STACK_REG_P (recog_data.operand[i])) 2129 { 2130 int j; 2131 2132 for (j = 0; j < n_notes; j++) 2133 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j]) 2134 && note_kind[j] == REG_DEAD 2135 && TEST_HARD_REG_BIT (regstack->reg_set, 2136 REGNO (recog_data.operand[i]))) 2137 { 2138 insn = emit_pop_insn (insn, regstack, recog_data.operand[i], 2139 EMIT_AFTER); 2140 break; 2141 } 2142 } 2143} 2144 2145/* Substitute stack hard reg numbers for stack virtual registers in 2146 INSN. Non-stack register numbers are not changed. REGSTACK is the 2147 current stack content. Insns may be emitted as needed to arrange the 2148 stack for the 387 based on the contents of the insn. */ 2149 2150static void 2151subst_stack_regs (insn, regstack) 2152 rtx insn; 2153 stack regstack; 2154{ 2155 rtx *note_link, note; 2156 int i; 2157 2158 if (GET_CODE (insn) == CALL_INSN) 2159 { 2160 int top = regstack->top; 2161 2162 /* If there are any floating point parameters to be passed in 2163 registers for this call, make sure they are in the right 2164 order. */ 2165 2166 if (top >= 0) 2167 { 2168 straighten_stack (PREV_INSN (insn), regstack); 2169 2170 /* Now mark the arguments as dead after the call. */ 2171 2172 while (regstack->top >= 0) 2173 { 2174 CLEAR_HARD_REG_BIT (regstack->reg_set, FIRST_STACK_REG + regstack->top); 2175 regstack->top--; 2176 } 2177 } 2178 } 2179 2180 /* Do the actual substitution if any stack regs are mentioned. 2181 Since we only record whether entire insn mentions stack regs, and 2182 subst_stack_regs_pat only works for patterns that contain stack regs, 2183 we must check each pattern in a parallel here. A call_value_pop could 2184 fail otherwise. */ 2185 2186 if (stack_regs_mentioned (insn)) 2187 { 2188 int n_operands = asm_noperands (PATTERN (insn)); 2189 if (n_operands >= 0) 2190 { 2191 /* This insn is an `asm' with operands. Decode the operands, 2192 decide how many are inputs, and do register substitution. 2193 Any REG_UNUSED notes will be handled by subst_asm_stack_regs. */ 2194 2195 subst_asm_stack_regs (insn, regstack); 2196 return; 2197 } 2198 2199 if (GET_CODE (PATTERN (insn)) == PARALLEL) 2200 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++) 2201 { 2202 if (stack_regs_mentioned_p (XVECEXP (PATTERN (insn), 0, i))) 2203 subst_stack_regs_pat (insn, regstack, 2204 XVECEXP (PATTERN (insn), 0, i)); 2205 } 2206 else 2207 subst_stack_regs_pat (insn, regstack, PATTERN (insn)); 2208 } 2209 2210 /* subst_stack_regs_pat may have deleted a no-op insn. If so, any 2211 REG_UNUSED will already have been dealt with, so just return. */ 2212 2213 if (GET_CODE (insn) == NOTE || INSN_DELETED_P (insn)) 2214 return; 2215 2216 /* If there is a REG_UNUSED note on a stack register on this insn, 2217 the indicated reg must be popped. The REG_UNUSED note is removed, 2218 since the form of the newly emitted pop insn references the reg, 2219 making it no longer `unset'. */ 2220 2221 note_link = ®_NOTES (insn); 2222 for (note = *note_link; note; note = XEXP (note, 1)) 2223 if (REG_NOTE_KIND (note) == REG_UNUSED && STACK_REG_P (XEXP (note, 0))) 2224 { 2225 *note_link = XEXP (note, 1); 2226 insn = emit_pop_insn (insn, regstack, XEXP (note, 0), EMIT_AFTER); 2227 } 2228 else 2229 note_link = &XEXP (note, 1); 2230} 2231 2232/* Change the organization of the stack so that it fits a new basic 2233 block. Some registers might have to be popped, but there can never be 2234 a register live in the new block that is not now live. 2235 2236 Insert any needed insns before or after INSN, as indicated by 2237 WHERE. OLD is the original stack layout, and NEW is the desired 2238 form. OLD is updated to reflect the code emitted, ie, it will be 2239 the same as NEW upon return. 2240 2241 This function will not preserve block_end[]. But that information 2242 is no longer needed once this has executed. */ 2243 2244static void 2245change_stack (insn, old, new, where) 2246 rtx insn; 2247 stack old; 2248 stack new; 2249 enum emit_where where; 2250{ 2251 int reg; 2252 int update_end = 0; 2253 2254 /* We will be inserting new insns "backwards". If we are to insert 2255 after INSN, find the next insn, and insert before it. */ 2256 2257 if (where == EMIT_AFTER) 2258 { 2259 if (current_block && current_block->end == insn) 2260 update_end = 1; 2261 insn = NEXT_INSN (insn); 2262 } 2263 2264 /* Pop any registers that are not needed in the new block. */ 2265 2266 for (reg = old->top; reg >= 0; reg--) 2267 if (! TEST_HARD_REG_BIT (new->reg_set, old->reg[reg])) 2268 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[reg], DFmode), 2269 EMIT_BEFORE); 2270 2271 if (new->top == -2) 2272 { 2273 /* If the new block has never been processed, then it can inherit 2274 the old stack order. */ 2275 2276 new->top = old->top; 2277 memcpy (new->reg, old->reg, sizeof (new->reg)); 2278 } 2279 else 2280 { 2281 /* This block has been entered before, and we must match the 2282 previously selected stack order. */ 2283 2284 /* By now, the only difference should be the order of the stack, 2285 not their depth or liveliness. */ 2286 2287 GO_IF_HARD_REG_EQUAL (old->reg_set, new->reg_set, win); 2288 abort (); 2289 win: 2290 if (old->top != new->top) 2291 abort (); 2292 2293 /* If the stack is not empty (new->top != -1), loop here emitting 2294 swaps until the stack is correct. 2295 2296 The worst case number of swaps emitted is N + 2, where N is the 2297 depth of the stack. In some cases, the reg at the top of 2298 stack may be correct, but swapped anyway in order to fix 2299 other regs. But since we never swap any other reg away from 2300 its correct slot, this algorithm will converge. */ 2301 2302 if (new->top != -1) 2303 do 2304 { 2305 /* Swap the reg at top of stack into the position it is 2306 supposed to be in, until the correct top of stack appears. */ 2307 2308 while (old->reg[old->top] != new->reg[new->top]) 2309 { 2310 for (reg = new->top; reg >= 0; reg--) 2311 if (new->reg[reg] == old->reg[old->top]) 2312 break; 2313 2314 if (reg == -1) 2315 abort (); 2316 2317 emit_swap_insn (insn, old, 2318 FP_MODE_REG (old->reg[reg], DFmode)); 2319 } 2320 2321 /* See if any regs remain incorrect. If so, bring an 2322 incorrect reg to the top of stack, and let the while loop 2323 above fix it. */ 2324 2325 for (reg = new->top; reg >= 0; reg--) 2326 if (new->reg[reg] != old->reg[reg]) 2327 { 2328 emit_swap_insn (insn, old, 2329 FP_MODE_REG (old->reg[reg], DFmode)); 2330 break; 2331 } 2332 } while (reg >= 0); 2333 2334 /* At this point there must be no differences. */ 2335 2336 for (reg = old->top; reg >= 0; reg--) 2337 if (old->reg[reg] != new->reg[reg]) 2338 abort (); 2339 } 2340 2341 if (update_end) 2342 current_block->end = PREV_INSN (insn); 2343} 2344 2345/* Print stack configuration. */ 2346 2347static void 2348print_stack (file, s) 2349 FILE *file; 2350 stack s; 2351{ 2352 if (! file) 2353 return; 2354 2355 if (s->top == -2) 2356 fprintf (file, "uninitialized\n"); 2357 else if (s->top == -1) 2358 fprintf (file, "empty\n"); 2359 else 2360 { 2361 int i; 2362 fputs ("[ ", file); 2363 for (i = 0; i <= s->top; ++i) 2364 fprintf (file, "%d ", s->reg[i]); 2365 fputs ("]\n", file); 2366 } 2367} 2368 2369/* This function was doing life analysis. We now let the regular live 2370 code do it's job, so we only need to check some extra invariants 2371 that reg-stack expects. Primary among these being that all registers 2372 are initialized before use. 2373 2374 The function returns true when code was emitted to CFG edges and 2375 commit_edge_insertions needs to be called. */ 2376 2377static int 2378convert_regs_entry () 2379{ 2380 int inserted = 0; 2381 edge e; 2382 basic_block block; 2383 2384 FOR_EACH_BB_REVERSE (block) 2385 { 2386 block_info bi = BLOCK_INFO (block); 2387 int reg; 2388 2389 /* Set current register status at last instruction `uninitialized'. */ 2390 bi->stack_in.top = -2; 2391 2392 /* Copy live_at_end and live_at_start into temporaries. */ 2393 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; reg++) 2394 { 2395 if (REGNO_REG_SET_P (block->global_live_at_end, reg)) 2396 SET_HARD_REG_BIT (bi->out_reg_set, reg); 2397 if (REGNO_REG_SET_P (block->global_live_at_start, reg)) 2398 SET_HARD_REG_BIT (bi->stack_in.reg_set, reg); 2399 } 2400 } 2401 2402 /* Load something into each stack register live at function entry. 2403 Such live registers can be caused by uninitialized variables or 2404 functions not returning values on all paths. In order to keep 2405 the push/pop code happy, and to not scrog the register stack, we 2406 must put something in these registers. Use a QNaN. 2407 2408 Note that we are insertting converted code here. This code is 2409 never seen by the convert_regs pass. */ 2410 2411 for (e = ENTRY_BLOCK_PTR->succ; e ; e = e->succ_next) 2412 { 2413 basic_block block = e->dest; 2414 block_info bi = BLOCK_INFO (block); 2415 int reg, top = -1; 2416 2417 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg) 2418 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg)) 2419 { 2420 rtx init; 2421 2422 bi->stack_in.reg[++top] = reg; 2423 2424 init = gen_rtx_SET (VOIDmode, 2425 FP_MODE_REG (FIRST_STACK_REG, SFmode), 2426 nan); 2427 insert_insn_on_edge (init, e); 2428 inserted = 1; 2429 } 2430 2431 bi->stack_in.top = top; 2432 } 2433 2434 return inserted; 2435} 2436 2437/* Construct the desired stack for function exit. This will either 2438 be `empty', or the function return value at top-of-stack. */ 2439 2440static void 2441convert_regs_exit () 2442{ 2443 int value_reg_low, value_reg_high; 2444 stack output_stack; 2445 rtx retvalue; 2446 2447 retvalue = stack_result (current_function_decl); 2448 value_reg_low = value_reg_high = -1; 2449 if (retvalue) 2450 { 2451 value_reg_low = REGNO (retvalue); 2452 value_reg_high = value_reg_low 2453 + HARD_REGNO_NREGS (value_reg_low, GET_MODE (retvalue)) - 1; 2454 } 2455 2456 output_stack = &BLOCK_INFO (EXIT_BLOCK_PTR)->stack_in; 2457 if (value_reg_low == -1) 2458 output_stack->top = -1; 2459 else 2460 { 2461 int reg; 2462 2463 output_stack->top = value_reg_high - value_reg_low; 2464 for (reg = value_reg_low; reg <= value_reg_high; ++reg) 2465 { 2466 output_stack->reg[value_reg_high - reg] = reg; 2467 SET_HARD_REG_BIT (output_stack->reg_set, reg); 2468 } 2469 } 2470} 2471 2472/* Adjust the stack of this block on exit to match the stack of the 2473 target block, or copy stack info into the stack of the successor 2474 of the successor hasn't been processed yet. */ 2475static bool 2476compensate_edge (e, file) 2477 edge e; 2478 FILE *file; 2479{ 2480 basic_block block = e->src, target = e->dest; 2481 block_info bi = BLOCK_INFO (block); 2482 struct stack_def regstack, tmpstack; 2483 stack target_stack = &BLOCK_INFO (target)->stack_in; 2484 int reg; 2485 2486 current_block = block; 2487 regstack = bi->stack_out; 2488 if (file) 2489 fprintf (file, "Edge %d->%d: ", block->index, target->index); 2490 2491 if (target_stack->top == -2) 2492 { 2493 /* The target block hasn't had a stack order selected. 2494 We need merely ensure that no pops are needed. */ 2495 for (reg = regstack.top; reg >= 0; --reg) 2496 if (!TEST_HARD_REG_BIT (target_stack->reg_set, regstack.reg[reg])) 2497 break; 2498 2499 if (reg == -1) 2500 { 2501 if (file) 2502 fprintf (file, "new block; copying stack position\n"); 2503 2504 /* change_stack kills values in regstack. */ 2505 tmpstack = regstack; 2506 2507 change_stack (block->end, &tmpstack, target_stack, EMIT_AFTER); 2508 return false; 2509 } 2510 2511 if (file) 2512 fprintf (file, "new block; pops needed\n"); 2513 } 2514 else 2515 { 2516 if (target_stack->top == regstack.top) 2517 { 2518 for (reg = target_stack->top; reg >= 0; --reg) 2519 if (target_stack->reg[reg] != regstack.reg[reg]) 2520 break; 2521 2522 if (reg == -1) 2523 { 2524 if (file) 2525 fprintf (file, "no changes needed\n"); 2526 return false; 2527 } 2528 } 2529 2530 if (file) 2531 { 2532 fprintf (file, "correcting stack to "); 2533 print_stack (file, target_stack); 2534 } 2535 } 2536 2537 /* Care for non-call EH edges specially. The normal return path have 2538 values in registers. These will be popped en masse by the unwind 2539 library. */ 2540 if ((e->flags & (EDGE_EH | EDGE_ABNORMAL_CALL)) == EDGE_EH) 2541 target_stack->top = -1; 2542 2543 /* Other calls may appear to have values live in st(0), but the 2544 abnormal return path will not have actually loaded the values. */ 2545 else if (e->flags & EDGE_ABNORMAL_CALL) 2546 { 2547 /* Assert that the lifetimes are as we expect -- one value 2548 live at st(0) on the end of the source block, and no 2549 values live at the beginning of the destination block. */ 2550 HARD_REG_SET tmp; 2551 2552 CLEAR_HARD_REG_SET (tmp); 2553 GO_IF_HARD_REG_EQUAL (target_stack->reg_set, tmp, eh1); 2554 abort (); 2555 eh1: 2556 2557 /* We are sure that there is st(0) live, otherwise we won't compensate. 2558 For complex return values, we may have st(1) live as well. */ 2559 SET_HARD_REG_BIT (tmp, FIRST_STACK_REG); 2560 if (TEST_HARD_REG_BIT (regstack.reg_set, FIRST_STACK_REG + 1)) 2561 SET_HARD_REG_BIT (tmp, FIRST_STACK_REG + 1); 2562 GO_IF_HARD_REG_EQUAL (regstack.reg_set, tmp, eh2); 2563 abort (); 2564 eh2: 2565 2566 target_stack->top = -1; 2567 } 2568 2569 /* It is better to output directly to the end of the block 2570 instead of to the edge, because emit_swap can do minimal 2571 insn scheduling. We can do this when there is only one 2572 edge out, and it is not abnormal. */ 2573 else if (block->succ->succ_next == NULL && !(e->flags & EDGE_ABNORMAL)) 2574 { 2575 /* change_stack kills values in regstack. */ 2576 tmpstack = regstack; 2577 2578 change_stack (block->end, &tmpstack, target_stack, 2579 (GET_CODE (block->end) == JUMP_INSN 2580 ? EMIT_BEFORE : EMIT_AFTER)); 2581 } 2582 else 2583 { 2584 rtx seq, after; 2585 2586 /* We don't support abnormal edges. Global takes care to 2587 avoid any live register across them, so we should never 2588 have to insert instructions on such edges. */ 2589 if (e->flags & EDGE_ABNORMAL) 2590 abort (); 2591 2592 current_block = NULL; 2593 start_sequence (); 2594 2595 /* ??? change_stack needs some point to emit insns after. */ 2596 after = emit_note (NULL, NOTE_INSN_DELETED); 2597 2598 tmpstack = regstack; 2599 change_stack (after, &tmpstack, target_stack, EMIT_BEFORE); 2600 2601 seq = get_insns (); 2602 end_sequence (); 2603 2604 insert_insn_on_edge (seq, e); 2605 return true; 2606 } 2607 return false; 2608} 2609 2610/* Convert stack register references in one block. */ 2611 2612static int 2613convert_regs_1 (file, block) 2614 FILE *file; 2615 basic_block block; 2616{ 2617 struct stack_def regstack; 2618 block_info bi = BLOCK_INFO (block); 2619 int deleted, inserted, reg; 2620 rtx insn, next; 2621 edge e, beste = NULL; 2622 2623 inserted = 0; 2624 deleted = 0; 2625 any_malformed_asm = false; 2626 2627 /* Find the edge we will copy stack from. It should be the most frequent 2628 one as it will get cheapest after compensation code is generated, 2629 if multiple such exists, take one with largest count, prefer critical 2630 one (as splitting critical edges is more expensive), or one with lowest 2631 index, to avoid random changes with different orders of the edges. */ 2632 for (e = block->pred; e ; e = e->pred_next) 2633 { 2634 if (e->flags & EDGE_DFS_BACK) 2635 ; 2636 else if (! beste) 2637 beste = e; 2638 else if (EDGE_FREQUENCY (beste) < EDGE_FREQUENCY (e)) 2639 beste = e; 2640 else if (EDGE_FREQUENCY (beste) > EDGE_FREQUENCY (e)) 2641 ; 2642 else if (beste->count < e->count) 2643 beste = e; 2644 else if (beste->count > e->count) 2645 ; 2646 else if ((EDGE_CRITICAL_P (e) != 0) 2647 != (EDGE_CRITICAL_P (beste) != 0)) 2648 { 2649 if (EDGE_CRITICAL_P (e)) 2650 beste = e; 2651 } 2652 else if (e->src->index < beste->src->index) 2653 beste = e; 2654 } 2655 2656 /* Initialize stack at block entry. */ 2657 if (bi->stack_in.top == -2) 2658 { 2659 if (beste) 2660 inserted |= compensate_edge (beste, file); 2661 else 2662 { 2663 /* No predecessors. Create an arbitrary input stack. */ 2664 int reg; 2665 2666 bi->stack_in.top = -1; 2667 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg) 2668 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg)) 2669 bi->stack_in.reg[++bi->stack_in.top] = reg; 2670 } 2671 } 2672 else 2673 /* Entry blocks do have stack already initialized. */ 2674 beste = NULL; 2675 2676 current_block = block; 2677 2678 if (file) 2679 { 2680 fprintf (file, "\nBasic block %d\nInput stack: ", block->index); 2681 print_stack (file, &bi->stack_in); 2682 } 2683 2684 /* Process all insns in this block. Keep track of NEXT so that we 2685 don't process insns emitted while substituting in INSN. */ 2686 next = block->head; 2687 regstack = bi->stack_in; 2688 do 2689 { 2690 insn = next; 2691 next = NEXT_INSN (insn); 2692 2693 /* Ensure we have not missed a block boundary. */ 2694 if (next == NULL) 2695 abort (); 2696 if (insn == block->end) 2697 next = NULL; 2698 2699 /* Don't bother processing unless there is a stack reg 2700 mentioned or if it's a CALL_INSN. */ 2701 if (stack_regs_mentioned (insn) 2702 || GET_CODE (insn) == CALL_INSN) 2703 { 2704 if (file) 2705 { 2706 fprintf (file, " insn %d input stack: ", 2707 INSN_UID (insn)); 2708 print_stack (file, ®stack); 2709 } 2710 subst_stack_regs (insn, ®stack); 2711 deleted |= (GET_CODE (insn) == NOTE || INSN_DELETED_P (insn)); 2712 } 2713 } 2714 while (next); 2715 2716 if (file) 2717 { 2718 fprintf (file, "Expected live registers ["); 2719 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg) 2720 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg)) 2721 fprintf (file, " %d", reg); 2722 fprintf (file, " ]\nOutput stack: "); 2723 print_stack (file, ®stack); 2724 } 2725 2726 insn = block->end; 2727 if (GET_CODE (insn) == JUMP_INSN) 2728 insn = PREV_INSN (insn); 2729 2730 /* If the function is declared to return a value, but it returns one 2731 in only some cases, some registers might come live here. Emit 2732 necessary moves for them. */ 2733 2734 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg) 2735 { 2736 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg) 2737 && ! TEST_HARD_REG_BIT (regstack.reg_set, reg)) 2738 { 2739 rtx set; 2740 2741 if (file) 2742 { 2743 fprintf (file, "Emitting insn initializing reg %d\n", 2744 reg); 2745 } 2746 2747 set = gen_rtx_SET (VOIDmode, FP_MODE_REG (reg, SFmode), 2748 nan); 2749 insn = emit_insn_after (set, insn); 2750 subst_stack_regs (insn, ®stack); 2751 deleted |= (GET_CODE (insn) == NOTE || INSN_DELETED_P (insn)); 2752 } 2753 } 2754 2755 /* Amongst the insns possibly deleted during the substitution process above, 2756 might have been the only trapping insn in the block. We purge the now 2757 possibly dead EH edges here to avoid an ICE from fixup_abnormal_edges, 2758 called at the end of convert_regs. The order in which we process the 2759 blocks ensures that we never delete an already processed edge. 2760 2761 ??? We are normally supposed not to delete trapping insns, so we pretend 2762 that the insns deleted above don't actually trap. It would have been 2763 better to detect this earlier and avoid creating the EH edge in the first 2764 place, still, but we don't have enough information at that time. */ 2765 2766 if (deleted) 2767 purge_dead_edges (block); 2768 2769 /* Something failed if the stack lives don't match. If we had malformed 2770 asms, we zapped the instruction itself, but that didn't produce the 2771 same pattern of register kills as before. */ 2772 GO_IF_HARD_REG_EQUAL (regstack.reg_set, bi->out_reg_set, win); 2773 if (!any_malformed_asm) 2774 abort (); 2775 win: 2776 bi->stack_out = regstack; 2777 2778 /* Compensate the back edges, as those wasn't visited yet. */ 2779 for (e = block->succ; e ; e = e->succ_next) 2780 { 2781 if (e->flags & EDGE_DFS_BACK 2782 || (e->dest == EXIT_BLOCK_PTR)) 2783 { 2784 if (!BLOCK_INFO (e->dest)->done 2785 && e->dest != block) 2786 abort (); 2787 inserted |= compensate_edge (e, file); 2788 } 2789 } 2790 for (e = block->pred; e ; e = e->pred_next) 2791 { 2792 if (e != beste && !(e->flags & EDGE_DFS_BACK) 2793 && e->src != ENTRY_BLOCK_PTR) 2794 { 2795 if (!BLOCK_INFO (e->src)->done) 2796 abort (); 2797 inserted |= compensate_edge (e, file); 2798 } 2799 } 2800 2801 return inserted; 2802} 2803 2804/* Convert registers in all blocks reachable from BLOCK. */ 2805 2806static int 2807convert_regs_2 (file, block) 2808 FILE *file; 2809 basic_block block; 2810{ 2811 basic_block *stack, *sp; 2812 int inserted; 2813 2814 /* We process the blocks in a top-down manner, in a way such that one block 2815 is only processed after all its predecessors. The number of predecessors 2816 of every block has already been computed. */ 2817 2818 stack = (basic_block *) xmalloc (sizeof (*stack) * n_basic_blocks); 2819 sp = stack; 2820 2821 *sp++ = block; 2822 2823 inserted = 0; 2824 do 2825 { 2826 edge e; 2827 2828 block = *--sp; 2829 2830 /* Processing BLOCK is achieved by convert_regs_1, which may purge 2831 some dead EH outgoing edge after the deletion of the trapping 2832 insn inside the block. Since the number of predecessors of 2833 BLOCK's successors was computed based on the initial edge set, 2834 we check the necessity to process some of these successors 2835 before such an edge deletion may happen. However, there is 2836 a pitfall: if BLOCK is the only predecessor of a successor and 2837 the edge between them happens to be deleted, the successor 2838 becomes unreachable and should not be processed. The problem 2839 is that there is no way to preventively detect this case so we 2840 stack the successor in all cases and hand over the task of 2841 fixing up the discrepancy to convert_regs_1. */ 2842 2843 for (e = block->succ; e ; e = e->succ_next) 2844 if (! (e->flags & EDGE_DFS_BACK)) 2845 { 2846 BLOCK_INFO (e->dest)->predecessors--; 2847 if (!BLOCK_INFO (e->dest)->predecessors) 2848 *sp++ = e->dest; 2849 } 2850 2851 inserted |= convert_regs_1 (file, block); 2852 BLOCK_INFO (block)->done = 1; 2853 } 2854 while (sp != stack); 2855 2856 return inserted; 2857} 2858 2859/* Traverse all basic blocks in a function, converting the register 2860 references in each insn from the "flat" register file that gcc uses, 2861 to the stack-like registers the 387 uses. */ 2862 2863static int 2864convert_regs (file) 2865 FILE *file; 2866{ 2867 int inserted; 2868 basic_block b; 2869 edge e; 2870 2871 /* Initialize uninitialized registers on function entry. */ 2872 inserted = convert_regs_entry (); 2873 2874 /* Construct the desired stack for function exit. */ 2875 convert_regs_exit (); 2876 BLOCK_INFO (EXIT_BLOCK_PTR)->done = 1; 2877 2878 /* ??? Future: process inner loops first, and give them arbitrary 2879 initial stacks which emit_swap_insn can modify. This ought to 2880 prevent double fxch that aften appears at the head of a loop. */ 2881 2882 /* Process all blocks reachable from all entry points. */ 2883 for (e = ENTRY_BLOCK_PTR->succ; e ; e = e->succ_next) 2884 inserted |= convert_regs_2 (file, e->dest); 2885 2886 /* ??? Process all unreachable blocks. Though there's no excuse 2887 for keeping these even when not optimizing. */ 2888 FOR_EACH_BB (b) 2889 { 2890 block_info bi = BLOCK_INFO (b); 2891 2892 if (! bi->done) 2893 inserted |= convert_regs_2 (file, b); 2894 } 2895 clear_aux_for_blocks (); 2896 2897 fixup_abnormal_edges (); 2898 if (inserted) 2899 commit_edge_insertions (); 2900 2901 if (file) 2902 fputc ('\n', file); 2903 2904 return inserted; 2905} 2906#endif /* STACK_REGS */ 2907 2908#include "gt-reg-stack.h" 2909