tc-i386.h revision 77312
133965Sjdp/* tc-i386.h -- Header file for tc-i386.c 277312Sobrien Copyright (C) 1989, 92, 93, 94, 95, 96, 97, 98, 99, 2000, 2001 360518Sobrien Free Software Foundation. 433965Sjdp 533965Sjdp This file is part of GAS, the GNU Assembler. 633965Sjdp 733965Sjdp GAS is free software; you can redistribute it and/or modify 833965Sjdp it under the terms of the GNU General Public License as published by 933965Sjdp the Free Software Foundation; either version 2, or (at your option) 1033965Sjdp any later version. 1133965Sjdp 1233965Sjdp GAS is distributed in the hope that it will be useful, 1333965Sjdp but WITHOUT ANY WARRANTY; without even the implied warranty of 1433965Sjdp MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 1533965Sjdp GNU General Public License for more details. 1633965Sjdp 1733965Sjdp You should have received a copy of the GNU General Public License 1833965Sjdp along with GAS; see the file COPYING. If not, write to the Free 1933965Sjdp Software Foundation, 59 Temple Place - Suite 330, Boston, MA 2033965Sjdp 02111-1307, USA. */ 2133965Sjdp 2277312Sobrien 2360518Sobrien/* $FreeBSD: head/contrib/binutils/gas/config/tc-i386.h 77312 2001-05-28 06:11:56Z obrien $ */ 2460518Sobrien 2577312Sobrien 2633965Sjdp#ifndef TC_I386 2733965Sjdp#define TC_I386 1 2833965Sjdp 2933965Sjdp#ifdef ANSI_PROTOTYPES 3033965Sjdpstruct fix; 3133965Sjdp#endif 3233965Sjdp 3333965Sjdp#define TARGET_BYTES_BIG_ENDIAN 0 3433965Sjdp 3533965Sjdp#ifdef TE_LYNX 3633965Sjdp#define TARGET_FORMAT "coff-i386-lynx" 3733965Sjdp#endif 3833965Sjdp 3933965Sjdp#ifdef BFD_ASSEMBLER 4033965Sjdp/* This is used to determine relocation types in tc-i386.c. The first 4133965Sjdp parameter is the current relocation type, the second one is the desired 4233965Sjdp type. The idea is that if the original type is already some kind of PIC 4333965Sjdp relocation, we leave it alone, otherwise we give it the desired type */ 4433965Sjdp 4533965Sjdp#define tc_fix_adjustable(X) tc_i386_fix_adjustable(X) 4633965Sjdpextern int tc_i386_fix_adjustable PARAMS ((struct fix *)); 4733965Sjdp 4877312Sobrien#if (defined (OBJ_MAYBE_ELF) || defined (OBJ_ELF) || defined (OBJ_MAYBE_COFF) || defined (OBJ_COFF)) && !defined (TE_PE) 4977312Sobrien/* This arranges for gas/write.c to not apply a relocation if 5077312Sobrien tc_fix_adjustable() says it is not adjustable. 5177312Sobrien The "! symbol_used_in_reloc_p" test is there specifically to cover 5277312Sobrien the case of non-global symbols in linkonce sections. It's the 5377312Sobrien generally correct thing to do though; If a reloc is going to be 5477312Sobrien emitted against a symbol then we don't want to adjust the fixup by 5577312Sobrien applying the reloc during assembly. The reloc will be applied by 5677312Sobrien the linker during final link. */ 5777312Sobrien#define TC_FIX_ADJUSTABLE(fixP) \ 5877312Sobrien (! symbol_used_in_reloc_p ((fixP)->fx_addsy) && tc_fix_adjustable (fixP)) 5977312Sobrien#endif 6033965Sjdp 6133965Sjdp/* This expression evaluates to false if the relocation is for a local object 6233965Sjdp for which we still want to do the relocation at runtime. True if we 6333965Sjdp are willing to perform this relocation while building the .o file. 6433965Sjdp This is only used for pcrel relocations, so GOTOFF does not need to be 6533965Sjdp checked here. I am not sure if some of the others are ever used with 6677312Sobrien pcrel, but it is easier to be safe than sorry. */ 6733965Sjdp 6860518Sobrien#define TC_RELOC_RTSYM_LOC_FIXUP(FIX) \ 6960518Sobrien ((FIX)->fx_r_type != BFD_RELOC_386_PLT32 \ 7060518Sobrien && (FIX)->fx_r_type != BFD_RELOC_386_GOT32 \ 7160518Sobrien && (FIX)->fx_r_type != BFD_RELOC_386_GOTPC \ 7260518Sobrien && ((FIX)->fx_addsy == NULL \ 7360518Sobrien || (! S_IS_EXTERNAL ((FIX)->fx_addsy) \ 7460518Sobrien && ! S_IS_WEAK ((FIX)->fx_addsy) \ 7560518Sobrien && S_IS_DEFINED ((FIX)->fx_addsy) \ 7660518Sobrien && ! S_IS_COMMON ((FIX)->fx_addsy)))) 7733965Sjdp 7833965Sjdp#define TARGET_ARCH bfd_arch_i386 7977312Sobrien#define TARGET_MACH (i386_mach ()) 8077312Sobrienextern unsigned long i386_mach PARAMS ((void)); 8133965Sjdp 8233973Sjdp#ifdef TE_FreeBSD 8360518Sobrien#define AOUT_TARGET_FORMAT "a.out-i386-freebsd" 8433973Sjdp#endif 8533965Sjdp#ifdef TE_NetBSD 8660518Sobrien#define AOUT_TARGET_FORMAT "a.out-i386-netbsd" 8733965Sjdp#endif 8833965Sjdp#ifdef TE_386BSD 8960518Sobrien#define AOUT_TARGET_FORMAT "a.out-i386-bsd" 9033965Sjdp#endif 9133965Sjdp#ifdef TE_LINUX 9260518Sobrien#define AOUT_TARGET_FORMAT "a.out-i386-linux" 9333965Sjdp#endif 9433965Sjdp#ifdef TE_Mach 9560518Sobrien#define AOUT_TARGET_FORMAT "a.out-mach3" 9633965Sjdp#endif 9733965Sjdp#ifdef TE_DYNIX 9860518Sobrien#define AOUT_TARGET_FORMAT "a.out-i386-dynix" 9933965Sjdp#endif 10060518Sobrien#ifndef AOUT_TARGET_FORMAT 10160518Sobrien#define AOUT_TARGET_FORMAT "a.out-i386" 10233965Sjdp#endif 10333965Sjdp 10477312Sobrien#if ((defined (OBJ_MAYBE_COFF) && defined (OBJ_MAYBE_AOUT)) \ 10577312Sobrien || defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)) 10660518Sobrienextern const char *i386_target_format PARAMS ((void)); 10760518Sobrien#define TARGET_FORMAT i386_target_format () 10860518Sobrien#else 10933965Sjdp#ifdef OBJ_ELF 11033965Sjdp#define TARGET_FORMAT "elf32-i386" 11133965Sjdp#endif 11260518Sobrien#ifdef OBJ_AOUT 11360518Sobrien#define TARGET_FORMAT AOUT_TARGET_FORMAT 11433965Sjdp#endif 11533965Sjdp#endif 11633965Sjdp 11733965Sjdp#else /* ! BFD_ASSEMBLER */ 11833965Sjdp 11933965Sjdp/* COFF STUFF */ 12033965Sjdp 12133965Sjdp#define COFF_MAGIC I386MAGIC 12233965Sjdp#define BFD_ARCH bfd_arch_i386 12333965Sjdp#define COFF_FLAGS F_AR32WR 12433965Sjdp#define TC_COUNT_RELOC(x) ((x)->fx_addsy || (x)->fx_r_type==7) 12533965Sjdp#define TC_COFF_FIX2RTYPE(fixP) tc_coff_fix2rtype(fixP) 12633965Sjdpextern short tc_coff_fix2rtype PARAMS ((struct fix *)); 12733965Sjdp#define TC_COFF_SIZEMACHDEP(frag) tc_coff_sizemachdep(frag) 12833965Sjdpextern int tc_coff_sizemachdep PARAMS ((fragS *frag)); 12960518Sobrien 13060518Sobrien#ifdef TE_GO32 13160518Sobrien/* DJGPP now expects some sections to be 2**4 aligned. */ 13260518Sobrien#define SUB_SEGMENT_ALIGN(SEG) \ 13360518Sobrien ((strcmp (obj_segment_name (SEG), ".text") == 0 \ 13460518Sobrien || strcmp (obj_segment_name (SEG), ".data") == 0 \ 13560518Sobrien || strcmp (obj_segment_name (SEG), ".bss") == 0 \ 13660518Sobrien || strncmp (obj_segment_name (SEG), ".gnu.linkonce.t", 15) == 0 \ 13760518Sobrien || strncmp (obj_segment_name (SEG), ".gnu.linkonce.d", 15) == 0 \ 13860518Sobrien || strncmp (obj_segment_name (SEG), ".gnu.linkonce.r", 15) == 0) \ 13960518Sobrien ? 4 \ 14060518Sobrien : 2) 14160518Sobrien#else 14233965Sjdp#define SUB_SEGMENT_ALIGN(SEG) 2 14360518Sobrien#endif 14460518Sobrien 14533965Sjdp#define TC_RVA_RELOC 7 14633965Sjdp/* Need this for PIC relocations */ 14733965Sjdp#define NEED_FX_R_TYPE 14833965Sjdp 14933965Sjdp#ifdef TE_386BSD 15033965Sjdp/* The BSDI linker apparently rejects objects with a machine type of 15133965Sjdp M_386 (100). */ 15233965Sjdp#define AOUT_MACHTYPE 0 15333965Sjdp#else 15433965Sjdp#define AOUT_MACHTYPE 100 15533965Sjdp#endif 15633965Sjdp 15733965Sjdp#undef REVERSE_SORT_RELOCS 15833965Sjdp 15933965Sjdp#endif /* ! BFD_ASSEMBLER */ 16033965Sjdp 16160518Sobrien#define TC_FORCE_RELOCATION(fixp) tc_i386_force_relocation(fixp) 16260518Sobrienextern int tc_i386_force_relocation PARAMS ((struct fix *)); 16360518Sobrien 16433965Sjdp#ifdef BFD_ASSEMBLER 16533965Sjdp#define NO_RELOC BFD_RELOC_NONE 16633965Sjdp#else 16733965Sjdp#define NO_RELOC 0 16833965Sjdp#endif 16933965Sjdp#define tc_coff_symbol_emit_hook(a) ; /* not used */ 17033965Sjdp 17133965Sjdp#ifndef BFD_ASSEMBLER 17233965Sjdp#ifndef OBJ_AOUT 17333965Sjdp#ifndef TE_PE 17460518Sobrien#ifndef TE_GO32 17533965Sjdp/* Local labels starts with .L */ 17633965Sjdp#define LOCAL_LABEL(name) (name[0] == '.' \ 17733965Sjdp && (name[1] == 'L' || name[1] == 'X' || name[1] == '.')) 17833965Sjdp#endif 17933965Sjdp#endif 18033965Sjdp#endif 18160518Sobrien#endif 18233965Sjdp 18333965Sjdp#define LOCAL_LABELS_FB 1 18433965Sjdp 18533965Sjdp#define tc_aout_pre_write_hook(x) {;} /* not used */ 18633965Sjdp#define tc_crawl_symbol_chain(a) {;} /* not used */ 18733965Sjdp#define tc_headers_hook(a) {;} /* not used */ 18833965Sjdp 18960518Sobrienextern const char extra_symbol_chars[]; 19060518Sobrien#define tc_symbol_chars extra_symbol_chars 19160518Sobrien 19233965Sjdp#define MAX_OPERANDS 3 /* max operands per insn */ 19360518Sobrien#define MAX_IMMEDIATE_OPERANDS 2/* max immediates per insn (lcall, ljmp) */ 19460518Sobrien#define MAX_MEMORY_OPERANDS 2 /* max memory refs per insn (string ops) */ 19533965Sjdp 19660518Sobrien/* Prefixes will be emitted in the order defined below. 19760518Sobrien WAIT_PREFIX must be the first prefix since FWAIT is really is an 19877312Sobrien instruction, and so must come before any prefixes. */ 19960518Sobrien#define WAIT_PREFIX 0 20060518Sobrien#define LOCKREP_PREFIX 1 20160518Sobrien#define ADDR_PREFIX 2 20260518Sobrien#define DATA_PREFIX 3 20360518Sobrien#define SEG_PREFIX 4 20477312Sobrien#define REX_PREFIX 5 /* must come last. */ 20577312Sobrien#define MAX_PREFIXES 6 /* max prefixes per opcode */ 20660518Sobrien 20733965Sjdp/* we define the syntax here (modulo base,index,scale syntax) */ 20833965Sjdp#define REGISTER_PREFIX '%' 20933965Sjdp#define IMMEDIATE_PREFIX '$' 21033965Sjdp#define ABSOLUTE_PREFIX '*' 21133965Sjdp 21233965Sjdp#define TWO_BYTE_OPCODE_ESCAPE 0x0f 21333965Sjdp#define NOP_OPCODE (char) 0x90 21433965Sjdp 21533965Sjdp/* register numbers */ 21633965Sjdp#define EBP_REG_NUM 5 21733965Sjdp#define ESP_REG_NUM 4 21833965Sjdp 21933965Sjdp/* modrm_byte.regmem for twobyte escape */ 22033965Sjdp#define ESCAPE_TO_TWO_BYTE_ADDRESSING ESP_REG_NUM 22133965Sjdp/* index_base_byte.index for no index register addressing */ 22233965Sjdp#define NO_INDEX_REGISTER ESP_REG_NUM 22333965Sjdp/* index_base_byte.base for no base register addressing */ 22433965Sjdp#define NO_BASE_REGISTER EBP_REG_NUM 22560518Sobrien#define NO_BASE_REGISTER_16 6 22633965Sjdp 22760518Sobrien/* these are the instruction mnemonic suffixes. */ 22860518Sobrien#define WORD_MNEM_SUFFIX 'w' 22960518Sobrien#define BYTE_MNEM_SUFFIX 'b' 23060518Sobrien#define SHORT_MNEM_SUFFIX 's' 23160518Sobrien#define LONG_MNEM_SUFFIX 'l' 23277312Sobrien#define QWORD_MNEM_SUFFIX 'q' 23360518Sobrien/* Intel Syntax */ 23460518Sobrien#define LONG_DOUBLE_MNEM_SUFFIX 'x' 23533965Sjdp 23633965Sjdp/* modrm.mode = REGMEM_FIELD_HAS_REG when a register is in there */ 23733965Sjdp#define REGMEM_FIELD_HAS_REG 0x3/* always = 0x3 */ 23833965Sjdp#define REGMEM_FIELD_HAS_MEM (~REGMEM_FIELD_HAS_REG) 23933965Sjdp 24033965Sjdp#define END_OF_INSN '\0' 24133965Sjdp 24260518Sobrien/* Intel Syntax */ 24360518Sobrien/* Values 0-4 map onto scale factor */ 24460518Sobrien#define BYTE_PTR 0 24560518Sobrien#define WORD_PTR 1 24660518Sobrien#define DWORD_PTR 2 24760518Sobrien#define QWORD_PTR 3 24860518Sobrien#define XWORD_PTR 4 24960518Sobrien#define SHORT 5 25060518Sobrien#define OFFSET_FLAT 6 25160518Sobrien#define FLAT 7 25260518Sobrien#define NONE_FOUND 8 25360518Sobrien 25433965Sjdptypedef struct 25533965Sjdp{ 25633965Sjdp /* instruction name sans width suffix ("mov" for movl insns) */ 25733965Sjdp char *name; 25833965Sjdp 25933965Sjdp /* how many operands */ 26033965Sjdp unsigned int operands; 26133965Sjdp 26260518Sobrien /* base_opcode is the fundamental opcode byte without optional 26360518Sobrien prefix(es). */ 26433965Sjdp unsigned int base_opcode; 26533965Sjdp 26633965Sjdp /* extension_opcode is the 3 bit extension for group <n> insns. 26760518Sobrien This field is also used to store the 8-bit opcode suffix for the 26860518Sobrien AMD 3DNow! instructions. 26933965Sjdp If this template has no extension opcode (the usual case) use None */ 27060518Sobrien unsigned int extension_opcode; 27177312Sobrien#define None 0xffff /* If no extension_opcode is possible. */ 27233965Sjdp 27377312Sobrien /* cpu feature flags */ 27477312Sobrien unsigned int cpu_flags; 27577312Sobrien#define Cpu086 0x1 /* Any old cpu will do, 0 does the same */ 27677312Sobrien#define Cpu186 0x2 /* i186 or better required */ 27777312Sobrien#define Cpu286 0x4 /* i286 or better required */ 27877312Sobrien#define Cpu386 0x8 /* i386 or better required */ 27977312Sobrien#define Cpu486 0x10 /* i486 or better required */ 28077312Sobrien#define Cpu586 0x20 /* i585 or better required */ 28177312Sobrien#define Cpu686 0x40 /* i686 or better required */ 28277312Sobrien#define CpuP4 0x80 /* Pentium4 or better required */ 28377312Sobrien#define CpuK6 0x100 /* AMD K6 or better required*/ 28477312Sobrien#define CpuAthlon 0x200 /* AMD Athlon or better required*/ 28577312Sobrien#define CpuSledgehammer 0x400 /* Sledgehammer or better required */ 28677312Sobrien#define CpuMMX 0x800 /* MMX support required */ 28777312Sobrien#define CpuSSE 0x1000 /* Streaming SIMD extensions required */ 28877312Sobrien#define CpuSSE2 0x2000 /* Streaming SIMD extensions 2 required */ 28977312Sobrien#define Cpu3dnow 0x4000 /* 3dnow! support required */ 29077312Sobrien#define CpuUnknown 0x8000 /* The CPU is unknown, be on the safe side. */ 29177312Sobrien 29277312Sobrien /* These flags are set by gas depending on the flag_code. */ 29377312Sobrien#define Cpu64 0x4000000 /* 64bit support required */ 29477312Sobrien#define CpuNo64 0x8000000 /* Not supported in the 64bit mode */ 29577312Sobrien 29677312Sobrien /* The default value for unknown CPUs - enable all features to avoid problems. */ 29777312Sobrien#define CpuUnknownFlags (Cpu086|Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuP4|CpuSledgehammer|CpuMMX|CpuSSE|CpuSSE2|Cpu3dnow|CpuK6|CpuAthlon) 29877312Sobrien 29933965Sjdp /* the bits in opcode_modifier are used to generate the final opcode from 30033965Sjdp the base_opcode. These bits also are used to detect alternate forms of 30133965Sjdp the same instruction */ 30233965Sjdp unsigned int opcode_modifier; 30333965Sjdp 30433965Sjdp /* opcode_modifier bits: */ 30560518Sobrien#define W 0x1 /* set if operands can be words or dwords 30660518Sobrien encoded the canonical way */ 30760518Sobrien#define D 0x2 /* D = 0 if Reg --> Regmem; 30860518Sobrien D = 1 if Regmem --> Reg: MUST BE 0x2 */ 30960518Sobrien#define Modrm 0x4 31060518Sobrien#define FloatR 0x8 /* src/dest swap for floats: MUST BE 0x8 */ 31160518Sobrien#define ShortForm 0x10 /* register is in low 3 bits of opcode */ 31260518Sobrien#define FloatMF 0x20 /* FP insn memory format bit, sized by 0x4 */ 31377312Sobrien#define Jump 0x40 /* special case for jump insns. */ 31460518Sobrien#define JumpDword 0x80 /* call and jump */ 31560518Sobrien#define JumpByte 0x100 /* loop and jecxz */ 31633965Sjdp#define JumpInterSegment 0x200 /* special case for intersegment leaps/calls */ 31760518Sobrien#define FloatD 0x400 /* direction for float insns: MUST BE 0x400 */ 31860518Sobrien#define Seg2ShortForm 0x800 /* encoding of load segment reg insns */ 31977312Sobrien#define Seg3ShortForm 0x1000 /* fs/gs segment register insns. */ 32060518Sobrien#define Size16 0x2000 /* needs size prefix if in 32-bit mode */ 32160518Sobrien#define Size32 0x4000 /* needs size prefix if in 16-bit mode */ 32277312Sobrien#define Size64 0x8000 /* needs size prefix if in 16-bit mode */ 32377312Sobrien#define IgnoreSize 0x10000 /* instruction ignores operand size prefix */ 32477312Sobrien#define DefaultSize 0x20000 /* default insn size depends on mode */ 32577312Sobrien#define No_bSuf 0x40000 /* b suffix on instruction illegal */ 32677312Sobrien#define No_wSuf 0x80000 /* w suffix on instruction illegal */ 32777312Sobrien#define No_lSuf 0x100000 /* l suffix on instruction illegal */ 32877312Sobrien#define No_sSuf 0x200000 /* s suffix on instruction illegal */ 32977312Sobrien#define No_qSuf 0x400000 /* q suffix on instruction illegal */ 33077312Sobrien#define No_xSuf 0x800000 /* x suffix on instruction illegal */ 33177312Sobrien#define FWait 0x1000000 /* instruction needs FWAIT */ 33277312Sobrien#define IsString 0x2000000 /* quick test for string instructions */ 33377312Sobrien#define regKludge 0x4000000 /* fake an extra reg operand for clr, imul */ 33477312Sobrien#define IsPrefix 0x8000000 /* opcode is a prefix */ 33577312Sobrien#define ImmExt 0x10000000 /* instruction has extension in 8 bit imm */ 33677312Sobrien#define NoRex64 0x20000000 /* instruction don't need Rex64 prefix. */ 33777312Sobrien#define Rex64 0x40000000 /* instruction require Rex64 prefix. */ 33860518Sobrien#define Ugh 0x80000000 /* deprecated fp insn, gets a warning */ 33933965Sjdp 34033965Sjdp /* operand_types[i] describes the type of operand i. This is made 34133965Sjdp by OR'ing together all of the possible type masks. (e.g. 34233965Sjdp 'operand_types[i] = Reg|Imm' specifies that operand i can be 34377312Sobrien either a register or an immediate operand. */ 34433965Sjdp unsigned int operand_types[3]; 34577312Sobrien 34677312Sobrien /* operand_types[i] bits */ 34777312Sobrien /* register */ 34877312Sobrien#define Reg8 0x1 /* 8 bit reg */ 34977312Sobrien#define Reg16 0x2 /* 16 bit reg */ 35077312Sobrien#define Reg32 0x4 /* 32 bit reg */ 35177312Sobrien#define Reg64 0x8 /* 64 bit reg */ 35277312Sobrien /* immediate */ 35377312Sobrien#define Imm8 0x10 /* 8 bit immediate */ 35477312Sobrien#define Imm8S 0x20 /* 8 bit immediate sign extended */ 35577312Sobrien#define Imm16 0x40 /* 16 bit immediate */ 35677312Sobrien#define Imm32 0x80 /* 32 bit immediate */ 35777312Sobrien#define Imm32S 0x100 /* 32 bit immediate sign extended */ 35877312Sobrien#define Imm64 0x200 /* 64 bit immediate */ 35977312Sobrien#define Imm1 0x400 /* 1 bit immediate */ 36077312Sobrien /* memory */ 36177312Sobrien#define BaseIndex 0x800 36277312Sobrien /* Disp8,16,32 are used in different ways, depending on the 36377312Sobrien instruction. For jumps, they specify the size of the PC relative 36477312Sobrien displacement, for baseindex type instructions, they specify the 36577312Sobrien size of the offset relative to the base register, and for memory 36677312Sobrien offset instructions such as `mov 1234,%al' they specify the size of 36777312Sobrien the offset relative to the segment base. */ 36877312Sobrien#define Disp8 0x1000 /* 8 bit displacement */ 36977312Sobrien#define Disp16 0x2000 /* 16 bit displacement */ 37077312Sobrien#define Disp32 0x4000 /* 32 bit displacement */ 37177312Sobrien#define Disp32S 0x8000 /* 32 bit signed displacement */ 37277312Sobrien#define Disp64 0x10000 /* 64 bit displacement */ 37377312Sobrien /* specials */ 37477312Sobrien#define InOutPortReg 0x20000 /* register to hold in/out port addr = dx */ 37577312Sobrien#define ShiftCount 0x40000 /* register to hold shift cound = cl */ 37677312Sobrien#define Control 0x80000 /* Control register */ 37777312Sobrien#define Debug 0x100000 /* Debug register */ 37877312Sobrien#define Test 0x200000 /* Test register */ 37977312Sobrien#define FloatReg 0x400000 /* Float register */ 38077312Sobrien#define FloatAcc 0x800000 /* Float stack top %st(0) */ 38177312Sobrien#define SReg2 0x1000000 /* 2 bit segment register */ 38277312Sobrien#define SReg3 0x2000000 /* 3 bit segment register */ 38377312Sobrien#define Acc 0x4000000 /* Accumulator %al or %ax or %eax */ 38477312Sobrien#define JumpAbsolute 0x8000000 38577312Sobrien#define RegMMX 0x10000000 /* MMX register */ 38677312Sobrien#define RegXMM 0x20000000 /* XMM registers in PIII */ 38777312Sobrien#define EsSeg 0x40000000 /* String insn operand with fixed es segment */ 38877312Sobrien 38977312Sobrien /* InvMem is for instructions with a modrm byte that only allow a 39077312Sobrien general register encoding in the i.tm.mode and i.tm.regmem fields, 39177312Sobrien eg. control reg moves. They really ought to support a memory form, 39277312Sobrien but don't, so we add an InvMem flag to the register operand to 39377312Sobrien indicate that it should be encoded in the i.tm.regmem field. */ 39477312Sobrien#define InvMem 0x80000000 39577312Sobrien 39677312Sobrien#define Reg (Reg8|Reg16|Reg32|Reg64) /* gen'l register */ 39777312Sobrien#define WordReg (Reg16|Reg32|Reg64) 39877312Sobrien#define ImplicitRegister (InOutPortReg|ShiftCount|Acc|FloatAcc) 39977312Sobrien#define Imm (Imm8|Imm8S|Imm16|Imm32S|Imm32|Imm64) /* gen'l immediate */ 40077312Sobrien#define EncImm (Imm8|Imm16|Imm32|Imm32S) /* Encodable gen'l immediate */ 40177312Sobrien#define Disp (Disp8|Disp16|Disp32|Disp32S|Disp64) /* General displacement */ 40277312Sobrien#define AnyMem (Disp8|Disp16|Disp32|Disp32S|BaseIndex|InvMem) /* General memory */ 40377312Sobrien /* The following aliases are defined because the opcode table 40477312Sobrien carefully specifies the allowed memory types for each instruction. 40577312Sobrien At the moment we can only tell a memory reference size by the 40677312Sobrien instruction suffix, so there's not much point in defining Mem8, 40777312Sobrien Mem16, Mem32 and Mem64 opcode modifiers - We might as well just use 40877312Sobrien the suffix directly to check memory operands. */ 40977312Sobrien#define LLongMem AnyMem /* 64 bits (or more) */ 41077312Sobrien#define LongMem AnyMem /* 32 bit memory ref */ 41177312Sobrien#define ShortMem AnyMem /* 16 bit memory ref */ 41277312Sobrien#define WordMem AnyMem /* 16 or 32 bit memory ref */ 41377312Sobrien#define ByteMem AnyMem /* 8 bit memory ref */ 41433965Sjdp} 41533965Sjdptemplate; 41633965Sjdp 41733965Sjdp/* 41833965Sjdp 'templates' is for grouping together 'template' structures for opcodes 41933965Sjdp of the same name. This is only used for storing the insns in the grand 42033965Sjdp ole hash table of insns. 42133965Sjdp The templates themselves start at START and range up to (but not including) 42233965Sjdp END. 42333965Sjdp */ 42433965Sjdptypedef struct 42577312Sobrien{ 42677312Sobrien const template *start; 42777312Sobrien const template *end; 42877312Sobrien} 42977312Sobrientemplates; 43033965Sjdp 43133965Sjdp/* these are for register name --> number & type hash lookup */ 43233965Sjdptypedef struct 43377312Sobrien{ 43477312Sobrien char *reg_name; 43577312Sobrien unsigned int reg_type; 43677312Sobrien unsigned int reg_flags; 43777312Sobrien#define RegRex 0x1 /* Extended register. */ 43877312Sobrien#define RegRex64 0x2 /* Extended 8 bit register. */ 43977312Sobrien unsigned int reg_num; 44077312Sobrien} 44133965Sjdpreg_entry; 44233965Sjdp 44333965Sjdptypedef struct 44477312Sobrien{ 44577312Sobrien char *seg_name; 44677312Sobrien unsigned int seg_prefix; 44777312Sobrien} 44833965Sjdpseg_entry; 44933965Sjdp 45077312Sobrien/* 386 operand encoding bytes: see 386 book for details of this. */ 45133965Sjdptypedef struct 45277312Sobrien{ 45377312Sobrien unsigned int regmem; /* codes register or memory operand */ 45477312Sobrien unsigned int reg; /* codes register operand (or extended opcode) */ 45577312Sobrien unsigned int mode; /* how to interpret regmem & reg */ 45677312Sobrien} 45733965Sjdpmodrm_byte; 45833965Sjdp 45977312Sobrien/* x86-64 extension prefix. */ 46033965Sjdptypedef struct 46133965Sjdp { 46277312Sobrien unsigned int mode64; 46377312Sobrien unsigned int extX; /* Used to extend modrm reg field. */ 46477312Sobrien unsigned int extY; /* Used to extend SIB index field. */ 46577312Sobrien unsigned int extZ; /* Used to extend modrm reg/mem, SIB base, modrm base fields. */ 46677312Sobrien unsigned int empty; /* Used to old-style byte registers to new style. */ 46733965Sjdp } 46877312Sobrienrex_byte; 46977312Sobrien 47077312Sobrien/* 386 opcode byte to code indirect addressing. */ 47177312Sobrientypedef struct 47277312Sobrien{ 47377312Sobrien unsigned base; 47477312Sobrien unsigned index; 47577312Sobrien unsigned scale; 47677312Sobrien} 47760518Sobriensib_byte; 47833965Sjdp 47977312Sobrien/* x86 arch names and features */ 48077312Sobrientypedef struct 48177312Sobrien{ 48277312Sobrien const char *name; /* arch name */ 48377312Sobrien unsigned int flags; /* cpu feature flags */ 48477312Sobrien} 48577312Sobrienarch_entry; 48677312Sobrien 48733965Sjdp/* The name of the global offset table generated by the compiler. Allow 48877312Sobrien this to be overridden if need be. */ 48933965Sjdp#ifndef GLOBAL_OFFSET_TABLE_NAME 49033965Sjdp#define GLOBAL_OFFSET_TABLE_NAME "_GLOBAL_OFFSET_TABLE_" 49133965Sjdp#endif 49233965Sjdp 49333965Sjdp#ifdef BFD_ASSEMBLER 49433965Sjdpvoid i386_validate_fix PARAMS ((struct fix *)); 49533965Sjdp#define TC_VALIDATE_FIX(FIXP,SEGTYPE,SKIP) i386_validate_fix(FIXP) 49633965Sjdp#endif 49733965Sjdp 49833965Sjdp#endif /* TC_I386 */ 49933965Sjdp 50033965Sjdp#define md_operand(x) 50133965Sjdp 50233965Sjdpextern const struct relax_type md_relax_table[]; 50333965Sjdp#define TC_GENERIC_RELAX_TABLE md_relax_table 50433965Sjdp 50533965Sjdp#define md_do_align(n, fill, len, max, around) \ 50633965Sjdpif ((n) && !need_pass_2 \ 50733965Sjdp && (!(fill) || ((char)*(fill) == (char)0x90 && (len) == 1)) \ 50860518Sobrien && subseg_text_p (now_seg)) \ 50933965Sjdp { \ 51077312Sobrien frag_align_code ((n), (max)); \ 51133965Sjdp goto around; \ 51233965Sjdp } 51333965Sjdp 51477312Sobrien#define MAX_MEM_FOR_RS_ALIGN_CODE 15 51577312Sobrien 51633965Sjdpextern void i386_align_code PARAMS ((fragS *, int)); 51733965Sjdp 51833965Sjdp#define HANDLE_ALIGN(fragP) \ 51933965Sjdpif (fragP->fr_type == rs_align_code) \ 52033965Sjdp i386_align_code (fragP, (fragP->fr_next->fr_address \ 52133965Sjdp - fragP->fr_address \ 52233965Sjdp - fragP->fr_fix)); 52333965Sjdp 52433965Sjdp/* call md_apply_fix3 with segment instead of md_apply_fix */ 52533965Sjdp#define MD_APPLY_FIX3 52633965Sjdp 52733965Sjdpvoid i386_print_statistics PARAMS ((FILE *)); 52833965Sjdp#define tc_print_statistics i386_print_statistics 52933965Sjdp 53033965Sjdp#define md_number_to_chars number_to_chars_littleendian 53133965Sjdp 53233965Sjdp#ifdef SCO_ELF 53333965Sjdp#define tc_init_after_args() sco_id () 53433965Sjdpextern void sco_id PARAMS ((void)); 53533965Sjdp#endif 53633965Sjdp 53738891Sjdp#define DIFF_EXPR_OK /* foo-. gets turned into PC relative relocs */ 538