pmc.h revision 266911
1/*- 2 * Copyright (c) 2003-2008, Joseph Koshy 3 * Copyright (c) 2007 The FreeBSD Foundation 4 * All rights reserved. 5 * 6 * Portions of this software were developed by A. Joseph Koshy under 7 * sponsorship from the FreeBSD Foundation and Google, Inc. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 * 30 * $FreeBSD: stable/10/sys/sys/pmc.h 266911 2014-05-31 00:40:13Z hiren $ 31 */ 32 33#ifndef _SYS_PMC_H_ 34#define _SYS_PMC_H_ 35 36#include <dev/hwpmc/pmc_events.h> 37 38#include <machine/pmc_mdep.h> 39#include <machine/profile.h> 40 41#define PMC_MODULE_NAME "hwpmc" 42#define PMC_NAME_MAX 64 /* HW counter name size */ 43#define PMC_CLASS_MAX 8 /* max #classes of PMCs per-system */ 44 45/* 46 * Kernel<->userland API version number [MMmmpppp] 47 * 48 * Major numbers are to be incremented when an incompatible change to 49 * the ABI occurs that older clients will not be able to handle. 50 * 51 * Minor numbers are incremented when a backwards compatible change 52 * occurs that allows older correct programs to run unchanged. For 53 * example, when support for a new PMC type is added. 54 * 55 * The patch version is incremented for every bug fix. 56 */ 57#define PMC_VERSION_MAJOR 0x03 58#define PMC_VERSION_MINOR 0x01 59#define PMC_VERSION_PATCH 0x0000 60 61#define PMC_VERSION (PMC_VERSION_MAJOR << 24 | \ 62 PMC_VERSION_MINOR << 16 | PMC_VERSION_PATCH) 63 64/* 65 * Kinds of CPUs known. 66 * 67 * We keep track of CPU variants that need to be distinguished in 68 * some way for PMC operations. CPU names are grouped by manufacturer 69 * and numbered sparsely in order to minimize changes to the ABI involved 70 * when new CPUs are added. 71 */ 72 73#define __PMC_CPUS() \ 74 __PMC_CPU(AMD_K7, 0x00, "AMD K7") \ 75 __PMC_CPU(AMD_K8, 0x01, "AMD K8") \ 76 __PMC_CPU(INTEL_P5, 0x80, "Intel Pentium") \ 77 __PMC_CPU(INTEL_P6, 0x81, "Intel Pentium Pro") \ 78 __PMC_CPU(INTEL_CL, 0x82, "Intel Celeron") \ 79 __PMC_CPU(INTEL_PII, 0x83, "Intel Pentium II") \ 80 __PMC_CPU(INTEL_PIII, 0x84, "Intel Pentium III") \ 81 __PMC_CPU(INTEL_PM, 0x85, "Intel Pentium M") \ 82 __PMC_CPU(INTEL_PIV, 0x86, "Intel Pentium IV") \ 83 __PMC_CPU(INTEL_CORE, 0x87, "Intel Core Solo/Duo") \ 84 __PMC_CPU(INTEL_CORE2, 0x88, "Intel Core2") \ 85 __PMC_CPU(INTEL_CORE2EXTREME, 0x89, "Intel Core2 Extreme") \ 86 __PMC_CPU(INTEL_ATOM, 0x8A, "Intel Atom") \ 87 __PMC_CPU(INTEL_COREI7, 0x8B, "Intel Core i7") \ 88 __PMC_CPU(INTEL_WESTMERE, 0x8C, "Intel Westmere") \ 89 __PMC_CPU(INTEL_SANDYBRIDGE, 0x8D, "Intel Sandy Bridge") \ 90 __PMC_CPU(INTEL_IVYBRIDGE, 0x8E, "Intel Ivy Bridge") \ 91 __PMC_CPU(INTEL_SANDYBRIDGE_XEON, 0x8F, "Intel Sandy Bridge Xeon") \ 92 __PMC_CPU(INTEL_IVYBRIDGE_XEON, 0x90, "Intel Ivy Bridge Xeon") \ 93 __PMC_CPU(INTEL_HASWELL, 0x91, "Intel Haswell") \ 94 __PMC_CPU(INTEL_ATOM_SILVERMONT, 0x92, "Intel Atom Silvermont") \ 95 __PMC_CPU(INTEL_XSCALE, 0x100, "Intel XScale") \ 96 __PMC_CPU(MIPS_24K, 0x200, "MIPS 24K") \ 97 __PMC_CPU(MIPS_OCTEON, 0x201, "Cavium Octeon") \ 98 __PMC_CPU(PPC_7450, 0x300, "PowerPC MPC7450") \ 99 __PMC_CPU(PPC_970, 0x380, "IBM PowerPC 970") \ 100 __PMC_CPU(GENERIC, 0x400, "Generic") 101 102enum pmc_cputype { 103#undef __PMC_CPU 104#define __PMC_CPU(S,V,D) PMC_CPU_##S = V, 105 __PMC_CPUS() 106}; 107 108#define PMC_CPU_FIRST PMC_CPU_AMD_K7 109#define PMC_CPU_LAST PMC_CPU_GENERIC 110 111/* 112 * Classes of PMCs 113 */ 114 115#define __PMC_CLASSES() \ 116 __PMC_CLASS(TSC) /* CPU Timestamp counter */ \ 117 __PMC_CLASS(K7) /* AMD K7 performance counters */ \ 118 __PMC_CLASS(K8) /* AMD K8 performance counters */ \ 119 __PMC_CLASS(P5) /* Intel Pentium counters */ \ 120 __PMC_CLASS(P6) /* Intel Pentium Pro counters */ \ 121 __PMC_CLASS(P4) /* Intel Pentium-IV counters */ \ 122 __PMC_CLASS(IAF) /* Intel Core2/Atom, fixed function */ \ 123 __PMC_CLASS(IAP) /* Intel Core...Atom, programmable */ \ 124 __PMC_CLASS(UCF) /* Intel Uncore fixed function */ \ 125 __PMC_CLASS(UCP) /* Intel Uncore programmable */ \ 126 __PMC_CLASS(XSCALE) /* Intel XScale counters */ \ 127 __PMC_CLASS(MIPS24K) /* MIPS 24K */ \ 128 __PMC_CLASS(OCTEON) /* Cavium Octeon */ \ 129 __PMC_CLASS(PPC7450) /* Motorola MPC7450 class */ \ 130 __PMC_CLASS(PPC970) /* IBM PowerPC 970 class */ \ 131 __PMC_CLASS(SOFT) /* Software events */ 132 133enum pmc_class { 134#undef __PMC_CLASS 135#define __PMC_CLASS(N) PMC_CLASS_##N , 136 __PMC_CLASSES() 137}; 138 139#define PMC_CLASS_FIRST PMC_CLASS_TSC 140#define PMC_CLASS_LAST PMC_CLASS_SOFT 141 142/* 143 * A PMC can be in the following states: 144 * 145 * Hardware states: 146 * DISABLED -- administratively prohibited from being used. 147 * FREE -- HW available for use 148 * Software states: 149 * ALLOCATED -- allocated 150 * STOPPED -- allocated, but not counting events 151 * RUNNING -- allocated, and in operation; 'pm_runcount' 152 * holds the number of CPUs using this PMC at 153 * a given instant 154 * DELETED -- being destroyed 155 */ 156 157#define __PMC_HWSTATES() \ 158 __PMC_STATE(DISABLED) \ 159 __PMC_STATE(FREE) 160 161#define __PMC_SWSTATES() \ 162 __PMC_STATE(ALLOCATED) \ 163 __PMC_STATE(STOPPED) \ 164 __PMC_STATE(RUNNING) \ 165 __PMC_STATE(DELETED) 166 167#define __PMC_STATES() \ 168 __PMC_HWSTATES() \ 169 __PMC_SWSTATES() 170 171enum pmc_state { 172#undef __PMC_STATE 173#define __PMC_STATE(S) PMC_STATE_##S, 174 __PMC_STATES() 175 __PMC_STATE(MAX) 176}; 177 178#define PMC_STATE_FIRST PMC_STATE_DISABLED 179#define PMC_STATE_LAST PMC_STATE_DELETED 180 181/* 182 * An allocated PMC may used as a 'global' counter or as a 183 * 'thread-private' one. Each such mode of use can be in either 184 * statistical sampling mode or in counting mode. Thus a PMC in use 185 * 186 * SS i.e., SYSTEM STATISTICAL -- system-wide statistical profiling 187 * SC i.e., SYSTEM COUNTER -- system-wide counting mode 188 * TS i.e., THREAD STATISTICAL -- thread virtual, statistical profiling 189 * TC i.e., THREAD COUNTER -- thread virtual, counting mode 190 * 191 * Statistical profiling modes rely on the PMC periodically delivering 192 * a interrupt to the CPU (when the configured number of events have 193 * been measured), so the PMC must have the ability to generate 194 * interrupts. 195 * 196 * In counting modes, the PMC counts its configured events, with the 197 * value of the PMC being read whenever needed by its owner process. 198 * 199 * The thread specific modes "virtualize" the PMCs -- the PMCs appear 200 * to be thread private and count events only when the profiled thread 201 * actually executes on the CPU. 202 * 203 * The system-wide "global" modes keep the PMCs running all the time 204 * and are used to measure the behaviour of the whole system. 205 */ 206 207#define __PMC_MODES() \ 208 __PMC_MODE(SS, 0) \ 209 __PMC_MODE(SC, 1) \ 210 __PMC_MODE(TS, 2) \ 211 __PMC_MODE(TC, 3) 212 213enum pmc_mode { 214#undef __PMC_MODE 215#define __PMC_MODE(M,N) PMC_MODE_##M = N, 216 __PMC_MODES() 217}; 218 219#define PMC_MODE_FIRST PMC_MODE_SS 220#define PMC_MODE_LAST PMC_MODE_TC 221 222#define PMC_IS_COUNTING_MODE(mode) \ 223 ((mode) == PMC_MODE_SC || (mode) == PMC_MODE_TC) 224#define PMC_IS_SYSTEM_MODE(mode) \ 225 ((mode) == PMC_MODE_SS || (mode) == PMC_MODE_SC) 226#define PMC_IS_SAMPLING_MODE(mode) \ 227 ((mode) == PMC_MODE_SS || (mode) == PMC_MODE_TS) 228#define PMC_IS_VIRTUAL_MODE(mode) \ 229 ((mode) == PMC_MODE_TS || (mode) == PMC_MODE_TC) 230 231/* 232 * PMC row disposition 233 */ 234 235#define __PMC_DISPOSITIONS(N) \ 236 __PMC_DISP(STANDALONE) /* global/disabled counters */ \ 237 __PMC_DISP(FREE) /* free/available */ \ 238 __PMC_DISP(THREAD) /* thread-virtual PMCs */ \ 239 __PMC_DISP(UNKNOWN) /* sentinel */ 240 241enum pmc_disp { 242#undef __PMC_DISP 243#define __PMC_DISP(D) PMC_DISP_##D , 244 __PMC_DISPOSITIONS() 245}; 246 247#define PMC_DISP_FIRST PMC_DISP_STANDALONE 248#define PMC_DISP_LAST PMC_DISP_THREAD 249 250/* 251 * Counter capabilities 252 * 253 * __PMC_CAPS(NAME, VALUE, DESCRIPTION) 254 */ 255 256#define __PMC_CAPS() \ 257 __PMC_CAP(INTERRUPT, 0, "generate interrupts") \ 258 __PMC_CAP(USER, 1, "count user-mode events") \ 259 __PMC_CAP(SYSTEM, 2, "count system-mode events") \ 260 __PMC_CAP(EDGE, 3, "do edge detection of events") \ 261 __PMC_CAP(THRESHOLD, 4, "ignore events below a threshold") \ 262 __PMC_CAP(READ, 5, "read PMC counter") \ 263 __PMC_CAP(WRITE, 6, "reprogram PMC counter") \ 264 __PMC_CAP(INVERT, 7, "invert comparision sense") \ 265 __PMC_CAP(QUALIFIER, 8, "further qualify monitored events") \ 266 __PMC_CAP(PRECISE, 9, "perform precise sampling") \ 267 __PMC_CAP(TAGGING, 10, "tag upstream events") \ 268 __PMC_CAP(CASCADE, 11, "cascade counters") 269 270enum pmc_caps 271{ 272#undef __PMC_CAP 273#define __PMC_CAP(NAME, VALUE, DESCR) PMC_CAP_##NAME = (1 << VALUE) , 274 __PMC_CAPS() 275}; 276 277#define PMC_CAP_FIRST PMC_CAP_INTERRUPT 278#define PMC_CAP_LAST PMC_CAP_CASCADE 279 280/* 281 * PMC Event Numbers 282 * 283 * These are generated from the definitions in "dev/hwpmc/pmc_events.h". 284 */ 285 286enum pmc_event { 287#undef __PMC_EV 288#undef __PMC_EV_BLOCK 289#define __PMC_EV_BLOCK(C,V) PMC_EV_ ## C ## __BLOCK_START = (V) - 1 , 290#define __PMC_EV(C,N) PMC_EV_ ## C ## _ ## N , 291 __PMC_EVENTS() 292}; 293 294/* 295 * PMC SYSCALL INTERFACE 296 */ 297 298/* 299 * "PMC_OPS" -- these are the commands recognized by the kernel 300 * module, and are used when performing a system call from userland. 301 */ 302#define __PMC_OPS() \ 303 __PMC_OP(CONFIGURELOG, "Set log file") \ 304 __PMC_OP(FLUSHLOG, "Flush log file") \ 305 __PMC_OP(GETCPUINFO, "Get system CPU information") \ 306 __PMC_OP(GETDRIVERSTATS, "Get driver statistics") \ 307 __PMC_OP(GETMODULEVERSION, "Get module version") \ 308 __PMC_OP(GETPMCINFO, "Get per-cpu PMC information") \ 309 __PMC_OP(PMCADMIN, "Set PMC state") \ 310 __PMC_OP(PMCALLOCATE, "Allocate and configure a PMC") \ 311 __PMC_OP(PMCATTACH, "Attach a PMC to a process") \ 312 __PMC_OP(PMCDETACH, "Detach a PMC from a process") \ 313 __PMC_OP(PMCGETMSR, "Get a PMC's hardware address") \ 314 __PMC_OP(PMCRELEASE, "Release a PMC") \ 315 __PMC_OP(PMCRW, "Read/Set a PMC") \ 316 __PMC_OP(PMCSETCOUNT, "Set initial count/sampling rate") \ 317 __PMC_OP(PMCSTART, "Start a PMC") \ 318 __PMC_OP(PMCSTOP, "Stop a PMC") \ 319 __PMC_OP(WRITELOG, "Write a cookie to the log file") \ 320 __PMC_OP(CLOSELOG, "Close log file") \ 321 __PMC_OP(GETDYNEVENTINFO, "Get dynamic events list") 322 323 324enum pmc_ops { 325#undef __PMC_OP 326#define __PMC_OP(N, D) PMC_OP_##N, 327 __PMC_OPS() 328}; 329 330 331/* 332 * Flags used in operations on PMCs. 333 */ 334 335#define PMC_F_FORCE 0x00000001 /*OP ADMIN force operation */ 336#define PMC_F_DESCENDANTS 0x00000002 /*OP ALLOCATE track descendants */ 337#define PMC_F_LOG_PROCCSW 0x00000004 /*OP ALLOCATE track ctx switches */ 338#define PMC_F_LOG_PROCEXIT 0x00000008 /*OP ALLOCATE log proc exits */ 339#define PMC_F_NEWVALUE 0x00000010 /*OP RW write new value */ 340#define PMC_F_OLDVALUE 0x00000020 /*OP RW get old value */ 341#define PMC_F_KGMON 0x00000040 /*OP ALLOCATE kgmon(8) profiling */ 342/* V2 API */ 343#define PMC_F_CALLCHAIN 0x00000080 /*OP ALLOCATE capture callchains */ 344 345/* internal flags */ 346#define PMC_F_ATTACHED_TO_OWNER 0x00010000 /*attached to owner*/ 347#define PMC_F_NEEDS_LOGFILE 0x00020000 /*needs log file */ 348#define PMC_F_ATTACH_DONE 0x00040000 /*attached at least once */ 349 350#define PMC_CALLCHAIN_DEPTH_MAX 32 351 352#define PMC_CC_F_USERSPACE 0x01 /*userspace callchain*/ 353 354/* 355 * Cookies used to denote allocated PMCs, and the values of PMCs. 356 */ 357 358typedef uint32_t pmc_id_t; 359typedef uint64_t pmc_value_t; 360 361#define PMC_ID_INVALID (~ (pmc_id_t) 0) 362 363/* 364 * PMC IDs have the following format: 365 * 366 * +--------+----------+-----------+-----------+ 367 * | CPU | PMC MODE | PMC CLASS | ROW INDEX | 368 * +--------+----------+-----------+-----------+ 369 * 370 * where each field is 8 bits wide. Field 'CPU' is set to the 371 * requested CPU for system-wide PMCs or PMC_CPU_ANY for process-mode 372 * PMCs. Field 'PMC MODE' is the allocated PMC mode. Field 'PMC 373 * CLASS' is the class of the PMC. Field 'ROW INDEX' is the row index 374 * for the PMC. 375 * 376 * The 'ROW INDEX' ranges over 0..NWPMCS where NHWPMCS is the total 377 * number of hardware PMCs on this cpu. 378 */ 379 380 381#define PMC_ID_TO_ROWINDEX(ID) ((ID) & 0xFF) 382#define PMC_ID_TO_CLASS(ID) (((ID) & 0xFF00) >> 8) 383#define PMC_ID_TO_MODE(ID) (((ID) & 0xFF0000) >> 16) 384#define PMC_ID_TO_CPU(ID) (((ID) & 0xFF000000) >> 24) 385#define PMC_ID_MAKE_ID(CPU,MODE,CLASS,ROWINDEX) \ 386 ((((CPU) & 0xFF) << 24) | (((MODE) & 0xFF) << 16) | \ 387 (((CLASS) & 0xFF) << 8) | ((ROWINDEX) & 0xFF)) 388 389/* 390 * Data structures for system calls supported by the pmc driver. 391 */ 392 393/* 394 * OP PMCALLOCATE 395 * 396 * Allocate a PMC on the named CPU. 397 */ 398 399#define PMC_CPU_ANY ~0 400 401struct pmc_op_pmcallocate { 402 uint32_t pm_caps; /* PMC_CAP_* */ 403 uint32_t pm_cpu; /* CPU number or PMC_CPU_ANY */ 404 enum pmc_class pm_class; /* class of PMC desired */ 405 enum pmc_event pm_ev; /* [enum pmc_event] desired */ 406 uint32_t pm_flags; /* additional modifiers PMC_F_* */ 407 enum pmc_mode pm_mode; /* desired mode */ 408 pmc_id_t pm_pmcid; /* [return] process pmc id */ 409 410 union pmc_md_op_pmcallocate pm_md; /* MD layer extensions */ 411}; 412 413/* 414 * OP PMCADMIN 415 * 416 * Set the administrative state (i.e., whether enabled or disabled) of 417 * a PMC 'pm_pmc' on CPU 'pm_cpu'. Note that 'pm_pmc' specifies an 418 * absolute PMC number and need not have been first allocated by the 419 * calling process. 420 */ 421 422struct pmc_op_pmcadmin { 423 int pm_cpu; /* CPU# */ 424 uint32_t pm_flags; /* flags */ 425 int pm_pmc; /* PMC# */ 426 enum pmc_state pm_state; /* desired state */ 427}; 428 429/* 430 * OP PMCATTACH / OP PMCDETACH 431 * 432 * Attach/detach a PMC and a process. 433 */ 434 435struct pmc_op_pmcattach { 436 pmc_id_t pm_pmc; /* PMC to attach to */ 437 pid_t pm_pid; /* target process */ 438}; 439 440/* 441 * OP PMCSETCOUNT 442 * 443 * Set the sampling rate (i.e., the reload count) for statistical counters. 444 * 'pm_pmcid' need to have been previously allocated using PMCALLOCATE. 445 */ 446 447struct pmc_op_pmcsetcount { 448 pmc_value_t pm_count; /* initial/sample count */ 449 pmc_id_t pm_pmcid; /* PMC id to set */ 450}; 451 452 453/* 454 * OP PMCRW 455 * 456 * Read the value of a PMC named by 'pm_pmcid'. 'pm_pmcid' needs 457 * to have been previously allocated using PMCALLOCATE. 458 */ 459 460 461struct pmc_op_pmcrw { 462 uint32_t pm_flags; /* PMC_F_{OLD,NEW}VALUE*/ 463 pmc_id_t pm_pmcid; /* pmc id */ 464 pmc_value_t pm_value; /* new&returned value */ 465}; 466 467 468/* 469 * OP GETPMCINFO 470 * 471 * retrieve PMC state for a named CPU. The caller is expected to 472 * allocate 'npmc' * 'struct pmc_info' bytes of space for the return 473 * values. 474 */ 475 476struct pmc_info { 477 char pm_name[PMC_NAME_MAX]; /* pmc name */ 478 enum pmc_class pm_class; /* enum pmc_class */ 479 int pm_enabled; /* whether enabled */ 480 enum pmc_disp pm_rowdisp; /* FREE, THREAD or STANDLONE */ 481 pid_t pm_ownerpid; /* owner, or -1 */ 482 enum pmc_mode pm_mode; /* current mode [enum pmc_mode] */ 483 enum pmc_event pm_event; /* current event */ 484 uint32_t pm_flags; /* current flags */ 485 pmc_value_t pm_reloadcount; /* sampling counters only */ 486}; 487 488struct pmc_op_getpmcinfo { 489 int32_t pm_cpu; /* 0 <= cpu < mp_maxid */ 490 struct pmc_info pm_pmcs[]; /* space for 'npmc' structures */ 491}; 492 493 494/* 495 * OP GETCPUINFO 496 * 497 * Retrieve system CPU information. 498 */ 499 500 501struct pmc_classinfo { 502 enum pmc_class pm_class; /* class id */ 503 uint32_t pm_caps; /* counter capabilities */ 504 uint32_t pm_width; /* width of the PMC */ 505 uint32_t pm_num; /* number of PMCs in class */ 506}; 507 508struct pmc_op_getcpuinfo { 509 enum pmc_cputype pm_cputype; /* what kind of CPU */ 510 uint32_t pm_ncpu; /* max CPU number */ 511 uint32_t pm_npmc; /* #PMCs per CPU */ 512 uint32_t pm_nclass; /* #classes of PMCs */ 513 struct pmc_classinfo pm_classes[PMC_CLASS_MAX]; 514}; 515 516/* 517 * OP CONFIGURELOG 518 * 519 * Configure a log file for writing system-wide statistics to. 520 */ 521 522struct pmc_op_configurelog { 523 int pm_flags; 524 int pm_logfd; /* logfile fd (or -1) */ 525}; 526 527/* 528 * OP GETDRIVERSTATS 529 * 530 * Retrieve pmc(4) driver-wide statistics. 531 */ 532 533struct pmc_op_getdriverstats { 534 int pm_intr_ignored; /* #interrupts ignored */ 535 int pm_intr_processed; /* #interrupts processed */ 536 int pm_intr_bufferfull; /* #interrupts with ENOSPC */ 537 int pm_syscalls; /* #syscalls */ 538 int pm_syscall_errors; /* #syscalls with errors */ 539 int pm_buffer_requests; /* #buffer requests */ 540 int pm_buffer_requests_failed; /* #failed buffer requests */ 541 int pm_log_sweeps; /* #sample buffer processing passes */ 542}; 543 544/* 545 * OP RELEASE / OP START / OP STOP 546 * 547 * Simple operations on a PMC id. 548 */ 549 550struct pmc_op_simple { 551 pmc_id_t pm_pmcid; 552}; 553 554/* 555 * OP WRITELOG 556 * 557 * Flush the current log buffer and write 4 bytes of user data to it. 558 */ 559 560struct pmc_op_writelog { 561 uint32_t pm_userdata; 562}; 563 564/* 565 * OP GETMSR 566 * 567 * Retrieve the machine specific address assoicated with the allocated 568 * PMC. This number can be used subsequently with a read-performance-counter 569 * instruction. 570 */ 571 572struct pmc_op_getmsr { 573 uint32_t pm_msr; /* machine specific address */ 574 pmc_id_t pm_pmcid; /* allocated pmc id */ 575}; 576 577/* 578 * OP GETDYNEVENTINFO 579 * 580 * Retrieve a PMC dynamic class events list. 581 */ 582 583struct pmc_dyn_event_descr { 584 char pm_ev_name[PMC_NAME_MAX]; 585 enum pmc_event pm_ev_code; 586}; 587 588struct pmc_op_getdyneventinfo { 589 enum pmc_class pm_class; 590 unsigned int pm_nevent; 591 struct pmc_dyn_event_descr pm_events[PMC_EV_DYN_COUNT]; 592}; 593 594#ifdef _KERNEL 595 596#include <sys/malloc.h> 597#include <sys/sysctl.h> 598 599#include <machine/frame.h> 600 601#define PMC_HASH_SIZE 1024 602#define PMC_MTXPOOL_SIZE 2048 603#define PMC_LOG_BUFFER_SIZE 4 604#define PMC_NLOGBUFFERS 1024 605#define PMC_NSAMPLES 1024 606#define PMC_CALLCHAIN_DEPTH 16 607 608#define PMC_SYSCTL_NAME_PREFIX "kern." PMC_MODULE_NAME "." 609 610/* 611 * Locking keys 612 * 613 * (b) - pmc_bufferlist_mtx (spin lock) 614 * (k) - pmc_kthread_mtx (sleep lock) 615 * (o) - po->po_mtx (spin lock) 616 */ 617 618/* 619 * PMC commands 620 */ 621 622struct pmc_syscall_args { 623 register_t pmop_code; /* one of PMC_OP_* */ 624 void *pmop_data; /* syscall parameter */ 625}; 626 627/* 628 * Interface to processor specific s1tuff 629 */ 630 631/* 632 * struct pmc_descr 633 * 634 * Machine independent (i.e., the common parts) of a human readable 635 * PMC description. 636 */ 637 638struct pmc_descr { 639 char pd_name[PMC_NAME_MAX]; /* name */ 640 uint32_t pd_caps; /* capabilities */ 641 enum pmc_class pd_class; /* class of the PMC */ 642 uint32_t pd_width; /* width in bits */ 643}; 644 645/* 646 * struct pmc_target 647 * 648 * This structure records all the target processes associated with a 649 * PMC. 650 */ 651 652struct pmc_target { 653 LIST_ENTRY(pmc_target) pt_next; 654 struct pmc_process *pt_process; /* target descriptor */ 655}; 656 657/* 658 * struct pmc 659 * 660 * Describes each allocated PMC. 661 * 662 * Each PMC has precisely one owner, namely the process that allocated 663 * the PMC. 664 * 665 * A PMC may be attached to multiple target processes. The 666 * 'pm_targets' field links all the target processes being monitored 667 * by this PMC. 668 * 669 * The 'pm_savedvalue' field is protected by a mutex. 670 * 671 * On a multi-cpu machine, multiple target threads associated with a 672 * process-virtual PMC could be concurrently executing on different 673 * CPUs. The 'pm_runcount' field is atomically incremented every time 674 * the PMC gets scheduled on a CPU and atomically decremented when it 675 * get descheduled. Deletion of a PMC is only permitted when this 676 * field is '0'. 677 * 678 */ 679 680struct pmc { 681 LIST_HEAD(,pmc_target) pm_targets; /* list of target processes */ 682 LIST_ENTRY(pmc) pm_next; /* owner's list */ 683 684 /* 685 * System-wide PMCs are allocated on a CPU and are not moved 686 * around. For system-wide PMCs we record the CPU the PMC was 687 * allocated on in the 'CPU' field of the pmc ID. 688 * 689 * Virtual PMCs run on whichever CPU is currently executing 690 * their targets' threads. For these PMCs we need to save 691 * their current PMC counter values when they are taken off 692 * CPU. 693 */ 694 695 union { 696 pmc_value_t pm_savedvalue; /* Virtual PMCS */ 697 } pm_gv; 698 699 /* 700 * For sampling mode PMCs, we keep track of the PMC's "reload 701 * count", which is the counter value to be loaded in when 702 * arming the PMC for the next counting session. For counting 703 * modes on PMCs that are read-only (e.g., the x86 TSC), we 704 * keep track of the initial value at the start of 705 * counting-mode operation. 706 */ 707 708 union { 709 pmc_value_t pm_reloadcount; /* sampling PMC modes */ 710 pmc_value_t pm_initial; /* counting PMC modes */ 711 } pm_sc; 712 713 uint32_t pm_stalled; /* marks stalled sampling PMCs */ 714 uint32_t pm_caps; /* PMC capabilities */ 715 enum pmc_event pm_event; /* event being measured */ 716 uint32_t pm_flags; /* additional flags PMC_F_... */ 717 struct pmc_owner *pm_owner; /* owner thread state */ 718 int pm_runcount; /* #cpus currently on */ 719 enum pmc_state pm_state; /* current PMC state */ 720 721 /* 722 * The PMC ID field encodes the row-index for the PMC, its 723 * mode, class and the CPU# associated with the PMC. 724 */ 725 726 pmc_id_t pm_id; /* allocated PMC id */ 727 728 /* md extensions */ 729 union pmc_md_pmc pm_md; 730}; 731 732/* 733 * Accessor macros for 'struct pmc' 734 */ 735 736#define PMC_TO_MODE(P) PMC_ID_TO_MODE((P)->pm_id) 737#define PMC_TO_CLASS(P) PMC_ID_TO_CLASS((P)->pm_id) 738#define PMC_TO_ROWINDEX(P) PMC_ID_TO_ROWINDEX((P)->pm_id) 739#define PMC_TO_CPU(P) PMC_ID_TO_CPU((P)->pm_id) 740 741 742/* 743 * struct pmc_process 744 * 745 * Record a 'target' process being profiled. 746 * 747 * The target process being profiled could be different from the owner 748 * process which allocated the PMCs. Each target process descriptor 749 * is associated with NHWPMC 'struct pmc *' pointers. Each PMC at a 750 * given hardware row-index 'n' will use slot 'n' of the 'pp_pmcs[]' 751 * array. The size of this structure is thus PMC architecture 752 * dependent. 753 * 754 */ 755 756struct pmc_targetstate { 757 struct pmc *pp_pmc; /* target PMC */ 758 pmc_value_t pp_pmcval; /* per-process value */ 759}; 760 761struct pmc_process { 762 LIST_ENTRY(pmc_process) pp_next; /* hash chain */ 763 int pp_refcnt; /* reference count */ 764 uint32_t pp_flags; /* flags PMC_PP_* */ 765 struct proc *pp_proc; /* target thread */ 766 struct pmc_targetstate pp_pmcs[]; /* NHWPMCs */ 767}; 768 769#define PMC_PP_ENABLE_MSR_ACCESS 0x00000001 770 771/* 772 * struct pmc_owner 773 * 774 * We associate a PMC with an 'owner' process. 775 * 776 * A process can be associated with 0..NCPUS*NHWPMC PMCs during its 777 * lifetime, where NCPUS is the numbers of CPUS in the system and 778 * NHWPMC is the number of hardware PMCs per CPU. These are 779 * maintained in the list headed by the 'po_pmcs' to save on space. 780 * 781 */ 782 783struct pmc_owner { 784 LIST_ENTRY(pmc_owner) po_next; /* hash chain */ 785 LIST_ENTRY(pmc_owner) po_ssnext; /* list of SS PMC owners */ 786 LIST_HEAD(, pmc) po_pmcs; /* owned PMC list */ 787 TAILQ_HEAD(, pmclog_buffer) po_logbuffers; /* (o) logbuffer list */ 788 struct mtx po_mtx; /* spin lock for (o) */ 789 struct proc *po_owner; /* owner proc */ 790 uint32_t po_flags; /* (k) flags PMC_PO_* */ 791 struct proc *po_kthread; /* (k) helper kthread */ 792 struct pmclog_buffer *po_curbuf; /* current log buffer */ 793 struct file *po_file; /* file reference */ 794 int po_error; /* recorded error */ 795 short po_sscount; /* # SS PMCs owned */ 796 short po_logprocmaps; /* global mappings done */ 797}; 798 799#define PMC_PO_OWNS_LOGFILE 0x00000001 /* has a log file */ 800#define PMC_PO_SHUTDOWN 0x00000010 /* in the process of shutdown */ 801#define PMC_PO_INITIAL_MAPPINGS_DONE 0x00000020 802 803/* 804 * struct pmc_hw -- describe the state of the PMC hardware 805 * 806 * When in use, a HW PMC is associated with one allocated 'struct pmc' 807 * pointed to by field 'phw_pmc'. When inactive, this field is NULL. 808 * 809 * On an SMP box, one or more HW PMC's in process virtual mode with 810 * the same 'phw_pmc' could be executing on different CPUs. In order 811 * to handle this case correctly, we need to ensure that only 812 * incremental counts get added to the saved value in the associated 813 * 'struct pmc'. The 'phw_save' field is used to keep the saved PMC 814 * value at the time the hardware is started during this context 815 * switch (i.e., the difference between the new (hardware) count and 816 * the saved count is atomically added to the count field in 'struct 817 * pmc' at context switch time). 818 * 819 */ 820 821struct pmc_hw { 822 uint32_t phw_state; /* see PHW_* macros below */ 823 struct pmc *phw_pmc; /* current thread PMC */ 824}; 825 826#define PMC_PHW_RI_MASK 0x000000FF 827#define PMC_PHW_CPU_SHIFT 8 828#define PMC_PHW_CPU_MASK 0x0000FF00 829#define PMC_PHW_FLAGS_SHIFT 16 830#define PMC_PHW_FLAGS_MASK 0xFFFF0000 831 832#define PMC_PHW_INDEX_TO_STATE(ri) ((ri) & PMC_PHW_RI_MASK) 833#define PMC_PHW_STATE_TO_INDEX(state) ((state) & PMC_PHW_RI_MASK) 834#define PMC_PHW_CPU_TO_STATE(cpu) (((cpu) << PMC_PHW_CPU_SHIFT) & \ 835 PMC_PHW_CPU_MASK) 836#define PMC_PHW_STATE_TO_CPU(state) (((state) & PMC_PHW_CPU_MASK) >> \ 837 PMC_PHW_CPU_SHIFT) 838#define PMC_PHW_FLAGS_TO_STATE(flags) (((flags) << PMC_PHW_FLAGS_SHIFT) & \ 839 PMC_PHW_FLAGS_MASK) 840#define PMC_PHW_STATE_TO_FLAGS(state) (((state) & PMC_PHW_FLAGS_MASK) >> \ 841 PMC_PHW_FLAGS_SHIFT) 842#define PMC_PHW_FLAG_IS_ENABLED (PMC_PHW_FLAGS_TO_STATE(0x01)) 843#define PMC_PHW_FLAG_IS_SHAREABLE (PMC_PHW_FLAGS_TO_STATE(0x02)) 844 845/* 846 * struct pmc_sample 847 * 848 * Space for N (tunable) PC samples and associated control data. 849 */ 850 851struct pmc_sample { 852 uint16_t ps_nsamples; /* callchain depth */ 853 uint8_t ps_cpu; /* cpu number */ 854 uint8_t ps_flags; /* other flags */ 855 pid_t ps_pid; /* process PID or -1 */ 856 struct thread *ps_td; /* which thread */ 857 struct pmc *ps_pmc; /* interrupting PMC */ 858 uintptr_t *ps_pc; /* (const) callchain start */ 859}; 860 861#define PMC_SAMPLE_FREE ((uint16_t) 0) 862#define PMC_SAMPLE_INUSE ((uint16_t) 0xFFFF) 863 864struct pmc_samplebuffer { 865 struct pmc_sample * volatile ps_read; /* read pointer */ 866 struct pmc_sample * volatile ps_write; /* write pointer */ 867 uintptr_t *ps_callchains; /* all saved call chains */ 868 struct pmc_sample *ps_fence; /* one beyond ps_samples[] */ 869 struct pmc_sample ps_samples[]; /* array of sample entries */ 870}; 871 872 873/* 874 * struct pmc_cpustate 875 * 876 * A CPU is modelled as a collection of HW PMCs with space for additional 877 * flags. 878 */ 879 880struct pmc_cpu { 881 uint32_t pc_state; /* physical cpu number + flags */ 882 struct pmc_samplebuffer *pc_sb[2]; /* space for samples */ 883 struct pmc_hw *pc_hwpmcs[]; /* 'npmc' pointers */ 884}; 885 886#define PMC_PCPU_CPU_MASK 0x000000FF 887#define PMC_PCPU_FLAGS_MASK 0xFFFFFF00 888#define PMC_PCPU_FLAGS_SHIFT 8 889#define PMC_PCPU_STATE_TO_CPU(S) ((S) & PMC_PCPU_CPU_MASK) 890#define PMC_PCPU_STATE_TO_FLAGS(S) (((S) & PMC_PCPU_FLAGS_MASK) >> PMC_PCPU_FLAGS_SHIFT) 891#define PMC_PCPU_FLAGS_TO_STATE(F) (((F) << PMC_PCPU_FLAGS_SHIFT) & PMC_PCPU_FLAGS_MASK) 892#define PMC_PCPU_CPU_TO_STATE(C) ((C) & PMC_PCPU_CPU_MASK) 893#define PMC_PCPU_FLAG_HTT (PMC_PCPU_FLAGS_TO_STATE(0x1)) 894 895/* 896 * struct pmc_binding 897 * 898 * CPU binding information. 899 */ 900 901struct pmc_binding { 902 int pb_bound; /* is bound? */ 903 int pb_cpu; /* if so, to which CPU */ 904}; 905 906 907struct pmc_mdep; 908 909/* 910 * struct pmc_classdep 911 * 912 * PMC class-dependent operations. 913 */ 914struct pmc_classdep { 915 uint32_t pcd_caps; /* class capabilities */ 916 enum pmc_class pcd_class; /* class id */ 917 int pcd_num; /* number of PMCs */ 918 int pcd_ri; /* row index of the first PMC in class */ 919 int pcd_width; /* width of the PMC */ 920 921 /* configuring/reading/writing the hardware PMCs */ 922 int (*pcd_config_pmc)(int _cpu, int _ri, struct pmc *_pm); 923 int (*pcd_get_config)(int _cpu, int _ri, struct pmc **_ppm); 924 int (*pcd_read_pmc)(int _cpu, int _ri, pmc_value_t *_value); 925 int (*pcd_write_pmc)(int _cpu, int _ri, pmc_value_t _value); 926 927 /* pmc allocation/release */ 928 int (*pcd_allocate_pmc)(int _cpu, int _ri, struct pmc *_t, 929 const struct pmc_op_pmcallocate *_a); 930 int (*pcd_release_pmc)(int _cpu, int _ri, struct pmc *_pm); 931 932 /* starting and stopping PMCs */ 933 int (*pcd_start_pmc)(int _cpu, int _ri); 934 int (*pcd_stop_pmc)(int _cpu, int _ri); 935 936 /* description */ 937 int (*pcd_describe)(int _cpu, int _ri, struct pmc_info *_pi, 938 struct pmc **_ppmc); 939 940 /* class-dependent initialization & finalization */ 941 int (*pcd_pcpu_init)(struct pmc_mdep *_md, int _cpu); 942 int (*pcd_pcpu_fini)(struct pmc_mdep *_md, int _cpu); 943 944 /* machine-specific interface */ 945 int (*pcd_get_msr)(int _ri, uint32_t *_msr); 946}; 947 948/* 949 * struct pmc_mdep 950 * 951 * Machine dependent bits needed per CPU type. 952 */ 953 954struct pmc_mdep { 955 uint32_t pmd_cputype; /* from enum pmc_cputype */ 956 uint32_t pmd_npmc; /* number of PMCs per CPU */ 957 uint32_t pmd_nclass; /* number of PMC classes present */ 958 959 /* 960 * Machine dependent methods. 961 */ 962 963 /* per-cpu initialization and finalization */ 964 int (*pmd_pcpu_init)(struct pmc_mdep *_md, int _cpu); 965 int (*pmd_pcpu_fini)(struct pmc_mdep *_md, int _cpu); 966 967 /* thread context switch in/out */ 968 int (*pmd_switch_in)(struct pmc_cpu *_p, struct pmc_process *_pp); 969 int (*pmd_switch_out)(struct pmc_cpu *_p, struct pmc_process *_pp); 970 971 /* handle a PMC interrupt */ 972 int (*pmd_intr)(int _cpu, struct trapframe *_tf); 973 974 /* 975 * PMC class dependent information. 976 */ 977 struct pmc_classdep pmd_classdep[]; 978}; 979 980/* 981 * Per-CPU state. This is an array of 'mp_ncpu' pointers 982 * to struct pmc_cpu descriptors. 983 */ 984 985extern struct pmc_cpu **pmc_pcpu; 986 987/* driver statistics */ 988extern struct pmc_op_getdriverstats pmc_stats; 989 990#if defined(DEBUG) 991 992/* debug flags, major flag groups */ 993struct pmc_debugflags { 994 int pdb_CPU; 995 int pdb_CSW; 996 int pdb_LOG; 997 int pdb_MDP; 998 int pdb_MOD; 999 int pdb_OWN; 1000 int pdb_PMC; 1001 int pdb_PRC; 1002 int pdb_SAM; 1003}; 1004 1005extern struct pmc_debugflags pmc_debugflags; 1006 1007#define PMC_DEBUG_STRSIZE 128 1008#define PMC_DEBUG_DEFAULT_FLAGS { 0, 0, 0, 0, 0, 0, 0, 0 } 1009 1010#define PMCDBG(M,N,L,F,...) do { \ 1011 if (pmc_debugflags.pdb_ ## M & (1 << PMC_DEBUG_MIN_ ## N)) \ 1012 printf(#M ":" #N ":" #L ": " F "\n", __VA_ARGS__); \ 1013} while (0) 1014 1015/* Major numbers */ 1016#define PMC_DEBUG_MAJ_CPU 0 /* cpu switches */ 1017#define PMC_DEBUG_MAJ_CSW 1 /* context switches */ 1018#define PMC_DEBUG_MAJ_LOG 2 /* logging */ 1019#define PMC_DEBUG_MAJ_MDP 3 /* machine dependent */ 1020#define PMC_DEBUG_MAJ_MOD 4 /* misc module infrastructure */ 1021#define PMC_DEBUG_MAJ_OWN 5 /* owner */ 1022#define PMC_DEBUG_MAJ_PMC 6 /* pmc management */ 1023#define PMC_DEBUG_MAJ_PRC 7 /* processes */ 1024#define PMC_DEBUG_MAJ_SAM 8 /* sampling */ 1025 1026/* Minor numbers */ 1027 1028/* Common (8 bits) */ 1029#define PMC_DEBUG_MIN_ALL 0 /* allocation */ 1030#define PMC_DEBUG_MIN_REL 1 /* release */ 1031#define PMC_DEBUG_MIN_OPS 2 /* ops: start, stop, ... */ 1032#define PMC_DEBUG_MIN_INI 3 /* init */ 1033#define PMC_DEBUG_MIN_FND 4 /* find */ 1034 1035/* MODULE */ 1036#define PMC_DEBUG_MIN_PMH 14 /* pmc_hook */ 1037#define PMC_DEBUG_MIN_PMS 15 /* pmc_syscall */ 1038 1039/* OWN */ 1040#define PMC_DEBUG_MIN_ORM 8 /* owner remove */ 1041#define PMC_DEBUG_MIN_OMR 9 /* owner maybe remove */ 1042 1043/* PROCESSES */ 1044#define PMC_DEBUG_MIN_TLK 8 /* link target */ 1045#define PMC_DEBUG_MIN_TUL 9 /* unlink target */ 1046#define PMC_DEBUG_MIN_EXT 10 /* process exit */ 1047#define PMC_DEBUG_MIN_EXC 11 /* process exec */ 1048#define PMC_DEBUG_MIN_FRK 12 /* process fork */ 1049#define PMC_DEBUG_MIN_ATT 13 /* attach/detach */ 1050#define PMC_DEBUG_MIN_SIG 14 /* signalling */ 1051 1052/* CONTEXT SWITCHES */ 1053#define PMC_DEBUG_MIN_SWI 8 /* switch in */ 1054#define PMC_DEBUG_MIN_SWO 9 /* switch out */ 1055 1056/* PMC */ 1057#define PMC_DEBUG_MIN_REG 8 /* pmc register */ 1058#define PMC_DEBUG_MIN_ALR 9 /* allocate row */ 1059 1060/* MACHINE DEPENDENT LAYER */ 1061#define PMC_DEBUG_MIN_REA 8 /* read */ 1062#define PMC_DEBUG_MIN_WRI 9 /* write */ 1063#define PMC_DEBUG_MIN_CFG 10 /* config */ 1064#define PMC_DEBUG_MIN_STA 11 /* start */ 1065#define PMC_DEBUG_MIN_STO 12 /* stop */ 1066#define PMC_DEBUG_MIN_INT 13 /* interrupts */ 1067 1068/* CPU */ 1069#define PMC_DEBUG_MIN_BND 8 /* bind */ 1070#define PMC_DEBUG_MIN_SEL 9 /* select */ 1071 1072/* LOG */ 1073#define PMC_DEBUG_MIN_GTB 8 /* get buf */ 1074#define PMC_DEBUG_MIN_SIO 9 /* schedule i/o */ 1075#define PMC_DEBUG_MIN_FLS 10 /* flush */ 1076#define PMC_DEBUG_MIN_SAM 11 /* sample */ 1077#define PMC_DEBUG_MIN_CLO 12 /* close */ 1078 1079#else 1080#define PMCDBG(M,N,L,F,...) /* nothing */ 1081#endif 1082 1083/* declare a dedicated memory pool */ 1084MALLOC_DECLARE(M_PMC); 1085 1086/* 1087 * Functions 1088 */ 1089 1090struct pmc_mdep *pmc_md_initialize(void); /* MD init function */ 1091void pmc_md_finalize(struct pmc_mdep *_md); /* MD fini function */ 1092int pmc_getrowdisp(int _ri); 1093int pmc_process_interrupt(int _cpu, int _soft, struct pmc *_pm, 1094 struct trapframe *_tf, int _inuserspace); 1095int pmc_save_kernel_callchain(uintptr_t *_cc, int _maxsamples, 1096 struct trapframe *_tf); 1097int pmc_save_user_callchain(uintptr_t *_cc, int _maxsamples, 1098 struct trapframe *_tf); 1099struct pmc_mdep *pmc_mdep_alloc(int nclasses); 1100void pmc_mdep_free(struct pmc_mdep *md); 1101#endif /* _KERNEL */ 1102#endif /* _SYS_PMC_H_ */ 1103