ata.h revision 271238
1302504Smav/*-
2302504Smav * Copyright (c) 2000 - 2008 S��ren Schmidt <sos@FreeBSD.org>
3302504Smav * All rights reserved.
4302504Smav *
5302504Smav * Redistribution and use in source and binary forms, with or without
6302504Smav * modification, are permitted provided that the following conditions
7302504Smav * are met:
8302504Smav * 1. Redistributions of source code must retain the above copyright
9302504Smav *    notice, this list of conditions and the following disclaimer,
10302504Smav *    without modification, immediately at the beginning of the file.
11302504Smav * 2. Redistributions in binary form must reproduce the above copyright
12302504Smav *    notice, this list of conditions and the following disclaimer in the
13302504Smav *    documentation and/or other materials provided with the distribution.
14302504Smav *
15302504Smav * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16302504Smav * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17302504Smav * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18302504Smav * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19302504Smav * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20302504Smav * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21302504Smav * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22302504Smav * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23302504Smav * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24302504Smav * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25302504Smav *
26302504Smav * $FreeBSD: stable/10/sys/sys/ata.h 271238 2014-09-07 21:30:47Z smh $
27302504Smav */
28302504Smav
29302504Smav#ifndef _SYS_ATA_H_
30302504Smav#define _SYS_ATA_H_
31302504Smav
32302504Smav#include <sys/ioccom.h>
33302504Smav
34302504Smav/* ATA/ATAPI device parameters */
35302504Smavstruct ata_params {
36302504Smav/*000*/ u_int16_t       config;         /* configuration info */
37302504Smav#define ATA_PROTO_MASK                  0x8003
38302504Smav#define ATA_PROTO_ATAPI                 0x8000
39302504Smav#define ATA_PROTO_ATAPI_12              0x8000
40302504Smav#define ATA_PROTO_ATAPI_16              0x8001
41302504Smav#define ATA_PROTO_CFA                   0x848a
42302504Smav#define ATA_ATAPI_TYPE_MASK             0x1f00
43302504Smav#define ATA_ATAPI_TYPE_DIRECT           0x0000  /* disk/floppy */
44302504Smav#define ATA_ATAPI_TYPE_TAPE             0x0100  /* streaming tape */
45302504Smav#define ATA_ATAPI_TYPE_CDROM            0x0500  /* CD-ROM device */
46302504Smav#define ATA_ATAPI_TYPE_OPTICAL          0x0700  /* optical disk */
47302504Smav#define ATA_DRQ_MASK                    0x0060
48302504Smav#define ATA_DRQ_SLOW                    0x0000  /* cpu 3 ms delay */
49302504Smav#define ATA_DRQ_INTR                    0x0020  /* interrupt 10 ms delay */
50302504Smav#define ATA_DRQ_FAST                    0x0040  /* accel 50 us delay */
51302504Smav#define ATA_RESP_INCOMPLETE             0x0004
52302504Smav
53302504Smav/*001*/ u_int16_t       cylinders;              /* # of cylinders */
54302504Smav/*002*/ u_int16_t       specconf;		/* specific configuration */
55302504Smav/*003*/ u_int16_t       heads;                  /* # heads */
56302504Smav	u_int16_t       obsolete4;
57302504Smav	u_int16_t       obsolete5;
58302504Smav/*006*/ u_int16_t       sectors;                /* # sectors/track */
59302504Smav/*007*/ u_int16_t       vendor7[3];
60302504Smav/*010*/ u_int8_t        serial[20];             /* serial number */
61302504Smav/*020*/ u_int16_t       retired20;
62302504Smav	u_int16_t       retired21;
63302504Smav	u_int16_t       obsolete22;
64302504Smav/*023*/ u_int8_t        revision[8];            /* firmware revision */
65302504Smav/*027*/ u_int8_t        model[40];              /* model name */
66302504Smav/*047*/ u_int16_t       sectors_intr;           /* sectors per interrupt */
67302504Smav/*048*/ u_int16_t       usedmovsd;              /* double word read/write? */
68302504Smav/*049*/ u_int16_t       capabilities1;
69302504Smav#define ATA_SUPPORT_DMA                 0x0100
70302504Smav#define ATA_SUPPORT_LBA                 0x0200
71302504Smav#define ATA_SUPPORT_IORDY               0x0400
72302504Smav#define ATA_SUPPORT_IORDYDIS            0x0800
73302504Smav#define ATA_SUPPORT_OVERLAP             0x4000
74302504Smav
75302504Smav/*050*/ u_int16_t       capabilities2;
76302504Smav/*051*/ u_int16_t       retired_piomode;        /* PIO modes 0-2 */
77302504Smav#define ATA_RETIRED_PIO_MASK            0x0300
78302504Smav
79302504Smav/*052*/ u_int16_t       retired_dmamode;        /* DMA modes */
80302504Smav#define ATA_RETIRED_DMA_MASK            0x0003
81302504Smav
82302504Smav/*053*/ u_int16_t       atavalid;               /* fields valid */
83302504Smav#define ATA_FLAG_54_58                  0x0001  /* words 54-58 valid */
84302504Smav#define ATA_FLAG_64_70                  0x0002  /* words 64-70 valid */
85302504Smav#define ATA_FLAG_88                     0x0004  /* word 88 valid */
86302504Smav
87302504Smav/*054*/ u_int16_t       current_cylinders;
88302504Smav/*055*/ u_int16_t       current_heads;
89302504Smav/*056*/ u_int16_t       current_sectors;
90302504Smav/*057*/ u_int16_t       current_size_1;
91302504Smav/*058*/ u_int16_t       current_size_2;
92302504Smav/*059*/ u_int16_t       multi;
93302504Smav#define ATA_MULTI_VALID                 0x0100
94302504Smav
95302504Smav/*060*/ u_int16_t       lba_size_1;
96302504Smav	u_int16_t       lba_size_2;
97302504Smav	u_int16_t       obsolete62;
98302504Smav/*063*/ u_int16_t       mwdmamodes;             /* multiword DMA modes */
99302504Smav/*064*/ u_int16_t       apiomodes;              /* advanced PIO modes */
100302504Smav
101302504Smav/*065*/ u_int16_t       mwdmamin;               /* min. M/W DMA time/word ns */
102302504Smav/*066*/ u_int16_t       mwdmarec;               /* rec. M/W DMA time ns */
103302504Smav/*067*/ u_int16_t       pioblind;               /* min. PIO cycle w/o flow */
104302504Smav/*068*/ u_int16_t       pioiordy;               /* min. PIO cycle IORDY flow */
105302504Smav/*069*/ u_int16_t       support3;
106302504Smav#define ATA_SUPPORT_RZAT                0x0020
107302504Smav#define ATA_SUPPORT_DRAT                0x4000
108302504Smav	u_int16_t       reserved70;
109302504Smav/*071*/ u_int16_t       rlsovlap;               /* rel time (us) for overlap */
110302504Smav/*072*/ u_int16_t       rlsservice;             /* rel time (us) for service */
111302504Smav	u_int16_t       reserved73;
112304425Smav	u_int16_t       reserved74;
113304425Smav/*075*/ u_int16_t       queue;
114302504Smav#define ATA_QUEUE_LEN(x)                ((x) & 0x001f)
115302504Smav
116302504Smav/*76*/  u_int16_t       satacapabilities;
117302504Smav#define ATA_SATA_GEN1                   0x0002
118302504Smav#define ATA_SATA_GEN2                   0x0004
119302504Smav#define ATA_SATA_GEN3                   0x0008
120302504Smav#define ATA_SUPPORT_NCQ                 0x0100
121302504Smav#define ATA_SUPPORT_IFPWRMNGTRCV        0x0200
122302504Smav#define ATA_SUPPORT_PHYEVENTCNT         0x0400
123302504Smav#define ATA_SUPPORT_NCQ_UNLOAD          0x0800
124302504Smav#define ATA_SUPPORT_NCQ_PRIO            0x1000
125302504Smav#define ATA_SUPPORT_HAPST               0x2000
126302504Smav#define ATA_SUPPORT_DAPST               0x4000
127302504Smav#define ATA_SUPPORT_READLOGDMAEXT       0x8000
128302504Smav
129302504Smav/*77*/  u_int16_t       satacapabilities2;
130302504Smav#define ATA_SATA_CURR_GEN_MASK          0x0006
131302504Smav#define ATA_SUPPORT_NCQ_STREAM          0x0010
132302504Smav#define ATA_SUPPORT_NCQ_QMANAGEMENT     0x0020
133302504Smav#define ATA_SUPPORT_RCVSND_FPDMA_QUEUED 0x0040
134302504Smav/*78*/  u_int16_t       satasupport;
135302504Smav#define ATA_SUPPORT_NONZERO             0x0002
136302504Smav#define ATA_SUPPORT_AUTOACTIVATE        0x0004
137302504Smav#define ATA_SUPPORT_IFPWRMNGT           0x0008
138302504Smav#define ATA_SUPPORT_INORDERDATA         0x0010
139302504Smav#define ATA_SUPPORT_ASYNCNOTIF          0x0020
140302504Smav#define ATA_SUPPORT_SOFTSETPRESERVE     0x0040
141302504Smav/*79*/  u_int16_t       sataenabled;
142302504Smav#define ATA_ENABLED_DAPST               0x0080
143302504Smav
144302504Smav/*080*/ u_int16_t       version_major;
145302504Smav/*081*/ u_int16_t       version_minor;
146302504Smav
147302504Smav	struct {
148302504Smav/*082/085*/ u_int16_t   command1;
149302504Smav#define ATA_SUPPORT_SMART               0x0001
150302504Smav#define ATA_SUPPORT_SECURITY            0x0002
151302504Smav#define ATA_SUPPORT_REMOVABLE           0x0004
152302504Smav#define ATA_SUPPORT_POWERMGT            0x0008
153302504Smav#define ATA_SUPPORT_PACKET              0x0010
154302504Smav#define ATA_SUPPORT_WRITECACHE          0x0020
155302504Smav#define ATA_SUPPORT_LOOKAHEAD           0x0040
156302504Smav#define ATA_SUPPORT_RELEASEIRQ          0x0080
157302504Smav#define ATA_SUPPORT_SERVICEIRQ          0x0100
158302504Smav#define ATA_SUPPORT_RESET               0x0200
159302504Smav#define ATA_SUPPORT_PROTECTED           0x0400
160302504Smav#define ATA_SUPPORT_WRITEBUFFER         0x1000
161302504Smav#define ATA_SUPPORT_READBUFFER          0x2000
162302504Smav#define ATA_SUPPORT_NOP                 0x4000
163302504Smav
164302504Smav/*083/086*/ u_int16_t   command2;
165302504Smav#define ATA_SUPPORT_MICROCODE           0x0001
166302504Smav#define ATA_SUPPORT_QUEUED              0x0002
167302504Smav#define ATA_SUPPORT_CFA                 0x0004
168302504Smav#define ATA_SUPPORT_APM                 0x0008
169302504Smav#define ATA_SUPPORT_NOTIFY              0x0010
170302504Smav#define ATA_SUPPORT_STANDBY             0x0020
171302504Smav#define ATA_SUPPORT_SPINUP              0x0040
172302504Smav#define ATA_SUPPORT_MAXSECURITY         0x0100
173302504Smav#define ATA_SUPPORT_AUTOACOUSTIC        0x0200
174302504Smav#define ATA_SUPPORT_ADDRESS48           0x0400
175302504Smav#define ATA_SUPPORT_OVERLAY             0x0800
176302504Smav#define ATA_SUPPORT_FLUSHCACHE          0x1000
177302504Smav#define ATA_SUPPORT_FLUSHCACHE48        0x2000
178302504Smav
179302504Smav/*084/087*/ u_int16_t   extension;
180302504Smav#define ATA_SUPPORT_SMARTLOG		0x0001
181302504Smav#define ATA_SUPPORT_SMARTTEST		0x0002
182302504Smav#define ATA_SUPPORT_MEDIASN		0x0004
183302504Smav#define ATA_SUPPORT_MEDIAPASS		0x0008
184302504Smav#define ATA_SUPPORT_STREAMING		0x0010
185302504Smav#define ATA_SUPPORT_GENLOG		0x0020
186302504Smav#define ATA_SUPPORT_WRITEDMAFUAEXT	0x0040
187302504Smav#define ATA_SUPPORT_WRITEDMAQFUAEXT	0x0080
188302504Smav#define ATA_SUPPORT_64BITWWN		0x0100
189302504Smav#define ATA_SUPPORT_UNLOAD		0x2000
190302504Smav	} __packed support, enabled;
191302504Smav
192302504Smav/*088*/ u_int16_t       udmamodes;              /* UltraDMA modes */
193302504Smav/*089*/ u_int16_t       erase_time;             /* time req'd in 2min units */
194302504Smav/*090*/ u_int16_t       enhanced_erase_time;    /* time req'd in 2min units */
195302504Smav/*091*/ u_int16_t       apm_value;
196302504Smav/*092*/ u_int16_t       master_passwd_revision; /* password revision code */
197302504Smav/*093*/ u_int16_t       hwres;
198302504Smav#define ATA_CABLE_ID                    0x2000
199302504Smav
200302504Smav/*094*/ u_int16_t       acoustic;
201302504Smav#define ATA_ACOUSTIC_CURRENT(x)         ((x) & 0x00ff)
202302504Smav#define ATA_ACOUSTIC_VENDOR(x)          (((x) & 0xff00) >> 8)
203302504Smav
204302504Smav/*095*/ u_int16_t       stream_min_req_size;
205302504Smav/*096*/ u_int16_t       stream_transfer_time;
206302504Smav/*097*/ u_int16_t       stream_access_latency;
207302504Smav/*098*/ u_int32_t       stream_granularity;
208302504Smav/*100*/ u_int16_t       lba_size48_1;
209302504Smav	u_int16_t       lba_size48_2;
210302504Smav	u_int16_t       lba_size48_3;
211302504Smav	u_int16_t       lba_size48_4;
212302504Smav	u_int16_t       reserved104;
213302504Smav/*105*/	u_int16_t       max_dsm_blocks;
214302504Smav/*106*/	u_int16_t       pss;
215302504Smav#define ATA_PSS_LSPPS			0x000F
216302504Smav#define ATA_PSS_LSSABOVE512		0x1000
217302504Smav#define ATA_PSS_MULTLS			0x2000
218302504Smav#define ATA_PSS_VALID_MASK		0xC000
219302504Smav#define ATA_PSS_VALID_VALUE		0x4000
220302504Smav/*107*/ u_int16_t       isd;
221302504Smav/*108*/ u_int16_t       wwn[4];
222302504Smav	u_int16_t       reserved112[5];
223302504Smav/*117*/ u_int16_t       lss_1;
224302504Smav/*118*/ u_int16_t       lss_2;
225302504Smav/*119*/ u_int16_t       support2;
226302504Smav#define ATA_SUPPORT_WRITEREADVERIFY	0x0002
227302504Smav#define ATA_SUPPORT_WRITEUNCORREXT	0x0004
228302504Smav#define ATA_SUPPORT_RWLOGDMAEXT		0x0008
229302504Smav#define ATA_SUPPORT_MICROCODE3		0x0010
230302504Smav#define ATA_SUPPORT_FREEFALL		0x0020
231302504Smav/*120*/ u_int16_t       enabled2;
232302504Smav	u_int16_t       reserved121[6];
233302504Smav/*127*/ u_int16_t       removable_status;
234302504Smav/*128*/ u_int16_t       security_status;
235302504Smav#define ATA_SECURITY_LEVEL		0x0100	/* 0: high, 1: maximum */
236302504Smav#define ATA_SECURITY_ENH_SUPP		0x0020	/* enhanced erase supported */
237302504Smav#define ATA_SECURITY_COUNT_EXP		0x0010	/* count expired */
238302504Smav#define ATA_SECURITY_FROZEN		0x0008	/* security config is frozen */
239302504Smav#define ATA_SECURITY_LOCKED		0x0004	/* drive is locked */
240302504Smav#define ATA_SECURITY_ENABLED		0x0002	/* ATA Security is enabled */
241302504Smav#define ATA_SECURITY_SUPPORTED		0x0001	/* ATA Security is supported */
242302504Smav
243302504Smav	u_int16_t       reserved129[31];
244302504Smav/*160*/ u_int16_t       cfa_powermode1;
245302504Smav	u_int16_t       reserved161;
246302504Smav/*162*/ u_int16_t       cfa_kms_support;
247302504Smav/*163*/ u_int16_t       cfa_trueide_modes;
248302504Smav/*164*/ u_int16_t       cfa_memory_modes;
249302504Smav	u_int16_t       reserved165[4];
250302504Smav/*169*/	u_int16_t       support_dsm;
251302504Smav#define ATA_SUPPORT_DSM_TRIM		0x0001
252302504Smav	u_int16_t       reserved170[6];
253302504Smav/*176*/ u_int8_t        media_serial[60];
254302504Smav/*206*/ u_int16_t       sct;
255302504Smav	u_int16_t       reserved206[2];
256302504Smav/*209*/ u_int16_t       lsalign;
257302504Smav/*210*/ u_int16_t       wrv_sectors_m3_1;
258302504Smav	u_int16_t       wrv_sectors_m3_2;
259302504Smav/*212*/ u_int16_t       wrv_sectors_m2_1;
260302504Smav	u_int16_t       wrv_sectors_m2_2;
261302504Smav/*214*/ u_int16_t       nv_cache_caps;
262302504Smav/*215*/ u_int16_t       nv_cache_size_1;
263302504Smav	u_int16_t       nv_cache_size_2;
264302504Smav/*217*/ u_int16_t       media_rotation_rate;
265302504Smav#define ATA_RATE_NOT_REPORTED		0x0000
266302504Smav#define ATA_RATE_NON_ROTATING		0x0001
267302504Smav	u_int16_t       reserved218;
268302504Smav/*219*/ u_int16_t       nv_cache_opt;
269302504Smav/*220*/ u_int16_t       wrv_mode;
270302504Smav	u_int16_t       reserved221;
271302504Smav/*222*/ u_int16_t       transport_major;
272302504Smav/*223*/ u_int16_t       transport_minor;
273302504Smav	u_int16_t       reserved224[31];
274302504Smav/*255*/ u_int16_t       integrity;
275302504Smav} __packed;
276302504Smav
277302504Smav/* ATA Dataset Management */
278302504Smav#define ATA_DSM_BLK_SIZE	512
279302504Smav#define ATA_DSM_BLK_RANGES	64
280302504Smav#define ATA_DSM_RANGE_SIZE	8
281302504Smav#define ATA_DSM_RANGE_MAX	65535
282302504Smav
283302504Smav/*
284302504Smav * ATA Device Register
285302504Smav *
286302504Smav * bit 7 Obsolete (was 1 in early ATA specs)
287302504Smav * bit 6 Sets LBA/CHS mode. 1=LBA, 0=CHS
288302504Smav * bit 5 Obsolete (was 1 in early ATA specs)
289302504Smav * bit 4 1 = Slave Drive, 0 = Master Drive
290302504Smav * bit 3-0 In LBA mode, 27-24 of address. In CHS mode, head number
291302504Smav*/
292302504Smav
293302504Smav#define ATA_DEV_MASTER		0x00
294302504Smav#define ATA_DEV_SLAVE		0x10
295302504Smav#define ATA_DEV_LBA		0x40
296302504Smav
297302504Smav/* ATA limits */
298302504Smav#define ATA_MAX_28BIT_LBA	268435455UL
299302504Smav
300302504Smav/* ATA Status Register */
301302504Smav#define ATA_STATUS_ERROR	0x01
302302504Smav#define ATA_STATUS_DEVICE_FAULT	0x20
303302504Smav
304302504Smav/* ATA Error Register */
305302504Smav#define ATA_ERROR_ABORT		0x04
306302504Smav#define ATA_ERROR_ID_NOT_FOUND	0x10
307302504Smav
308302504Smav/* ATA HPA Features */
309302504Smav#define ATA_HPA_FEAT_MAX_ADDR	0x00
310302504Smav#define ATA_HPA_FEAT_SET_PWD	0x01
311302504Smav#define ATA_HPA_FEAT_LOCK	0x02
312302504Smav#define ATA_HPA_FEAT_UNLOCK	0x03
313302504Smav#define ATA_HPA_FEAT_FREEZE	0x04
314302504Smav
315302504Smav/* ATA transfer modes */
316302504Smav#define ATA_MODE_MASK           0x0f
317302504Smav#define ATA_DMA_MASK            0xf0
318302504Smav#define ATA_PIO                 0x00
319302504Smav#define ATA_PIO0                0x08
320302504Smav#define ATA_PIO1                0x09
321302504Smav#define ATA_PIO2                0x0a
322302504Smav#define ATA_PIO3                0x0b
323302504Smav#define ATA_PIO4                0x0c
324302504Smav#define ATA_PIO_MAX             0x0f
325302504Smav#define ATA_DMA                 0x10
326302504Smav#define ATA_WDMA0               0x20
327302504Smav#define ATA_WDMA1               0x21
328302504Smav#define ATA_WDMA2               0x22
329302504Smav#define ATA_UDMA0               0x40
330302504Smav#define ATA_UDMA1               0x41
331302504Smav#define ATA_UDMA2               0x42
332302504Smav#define ATA_UDMA3               0x43
333302504Smav#define ATA_UDMA4               0x44
334302504Smav#define ATA_UDMA5               0x45
335302504Smav#define ATA_UDMA6               0x46
336302504Smav#define ATA_SA150               0x47
337302504Smav#define ATA_SA300               0x48
338302504Smav#define ATA_DMA_MAX             0x4f
339302504Smav
340302504Smav
341302504Smav/* ATA commands */
342302504Smav#define ATA_NOP                         0x00    /* NOP */
343302504Smav#define         ATA_NF_FLUSHQUEUE       0x00    /* flush queued cmd's */
344302504Smav#define         ATA_NF_AUTOPOLL         0x01    /* start autopoll function */
345302504Smav#define ATA_DATA_SET_MANAGEMENT		0x06
346302504Smav#define 	ATA_DSM_TRIM		0x01
347302504Smav#define ATA_DEVICE_RESET                0x08    /* reset device */
348302504Smav#define ATA_READ                        0x20    /* read */
349302504Smav#define ATA_READ48                      0x24    /* read 48bit LBA */
350302504Smav#define ATA_READ_DMA48                  0x25    /* read DMA 48bit LBA */
351302504Smav#define ATA_READ_DMA_QUEUED48           0x26    /* read DMA QUEUED 48bit LBA */
352302504Smav#define ATA_READ_NATIVE_MAX_ADDRESS48   0x27    /* read native max addr 48bit */
353302504Smav#define ATA_READ_MUL48                  0x29    /* read multi 48bit LBA */
354302504Smav#define ATA_READ_STREAM_DMA48           0x2a    /* read DMA stream 48bit LBA */
355302504Smav#define ATA_READ_LOG_EXT                0x2f    /* read log ext - PIO Data-In */
356302504Smav#define ATA_READ_STREAM48               0x2b    /* read stream 48bit LBA */
357302504Smav#define ATA_WRITE                       0x30    /* write */
358302504Smav#define ATA_WRITE48                     0x34    /* write 48bit LBA */
359302504Smav#define ATA_WRITE_DMA48                 0x35    /* write DMA 48bit LBA */
360302504Smav#define ATA_WRITE_DMA_QUEUED48          0x36    /* write DMA QUEUED 48bit LBA*/
361302504Smav#define ATA_SET_MAX_ADDRESS48           0x37    /* set max address 48bit */
362302504Smav#define ATA_WRITE_MUL48                 0x39    /* write multi 48bit LBA */
363302504Smav#define ATA_WRITE_STREAM_DMA48          0x3a
364302504Smav#define ATA_WRITE_STREAM48              0x3b
365302504Smav#define ATA_WRITE_DMA_FUA48             0x3d
366302504Smav#define ATA_WRITE_DMA_QUEUED_FUA48      0x3e
367302504Smav#define ATA_WRITE_LOG_EXT               0x3f
368302504Smav#define ATA_READ_VERIFY                 0x40
369302504Smav#define ATA_READ_VERIFY48               0x42
370302504Smav#define ATA_READ_LOG_DMA_EXT            0x47    /* read log DMA ext - PIO Data-In */
371302504Smav#define ATA_READ_FPDMA_QUEUED           0x60    /* read DMA NCQ */
372302504Smav#define ATA_WRITE_FPDMA_QUEUED          0x61    /* write DMA NCQ */
373302504Smav#define ATA_SEND_FPDMA_QUEUED           0x64    /* send DMA NCQ */
374302504Smav#define ATA_RECV_FPDMA_QUEUED           0x65    /* recieve DMA NCQ */
375302504Smav#define ATA_SEP_ATTN                    0x67    /* SEP request */
376302504Smav#define ATA_SEEK                        0x70    /* seek */
377302504Smav#define ATA_PACKET_CMD                  0xa0    /* packet command */
378302504Smav#define ATA_ATAPI_IDENTIFY              0xa1    /* get ATAPI params*/
379302504Smav#define ATA_SERVICE                     0xa2    /* service command */
380302504Smav#define ATA_SMART_CMD                   0xb0    /* SMART command */
381302504Smav#define ATA_CFA_ERASE                   0xc0    /* CFA erase */
382302504Smav#define ATA_READ_MUL                    0xc4    /* read multi */
383302504Smav#define ATA_WRITE_MUL                   0xc5    /* write multi */
384302504Smav#define ATA_SET_MULTI                   0xc6    /* set multi size */
385302504Smav#define ATA_READ_DMA_QUEUED             0xc7    /* read DMA QUEUED */
386302504Smav#define ATA_READ_DMA                    0xc8    /* read DMA */
387302504Smav#define ATA_WRITE_DMA                   0xca    /* write DMA */
388302504Smav#define ATA_WRITE_DMA_QUEUED            0xcc    /* write DMA QUEUED */
389302504Smav#define ATA_WRITE_MUL_FUA48             0xce
390302504Smav#define ATA_STANDBY_IMMEDIATE           0xe0    /* standby immediate */
391302504Smav#define ATA_IDLE_IMMEDIATE              0xe1    /* idle immediate */
392302504Smav#define ATA_STANDBY_CMD                 0xe2    /* standby */
393302504Smav#define ATA_IDLE_CMD                    0xe3    /* idle */
394302504Smav#define ATA_READ_BUFFER                 0xe4    /* read buffer */
395302504Smav#define ATA_READ_PM                     0xe4    /* read portmultiplier */
396302504Smav#define ATA_SLEEP                       0xe6    /* sleep */
397302504Smav#define ATA_FLUSHCACHE                  0xe7    /* flush cache to disk */
398302504Smav#define ATA_WRITE_PM                    0xe8    /* write portmultiplier */
399302504Smav#define ATA_FLUSHCACHE48                0xea    /* flush cache to disk */
400302504Smav#define ATA_ATA_IDENTIFY                0xec    /* get ATA params */
401302504Smav#define ATA_SETFEATURES                 0xef    /* features command */
402302504Smav#define         ATA_SF_SETXFER          0x03    /* set transfer mode */
403302504Smav#define         ATA_SF_ENAB_WCACHE      0x02    /* enable write cache */
404302504Smav#define         ATA_SF_DIS_WCACHE       0x82    /* disable write cache */
405302504Smav#define         ATA_SF_ENAB_PUIS        0x06    /* enable PUIS */
406302504Smav#define         ATA_SF_DIS_PUIS         0x86    /* disable PUIS */
407302504Smav#define         ATA_SF_PUIS_SPINUP      0x07    /* PUIS spin-up */
408302504Smav#define         ATA_SF_ENAB_RCACHE      0xaa    /* enable readahead cache */
409302504Smav#define         ATA_SF_DIS_RCACHE       0x55    /* disable readahead cache */
410302504Smav#define         ATA_SF_ENAB_RELIRQ      0x5d    /* enable release interrupt */
411302504Smav#define         ATA_SF_DIS_RELIRQ       0xdd    /* disable release interrupt */
412302504Smav#define         ATA_SF_ENAB_SRVIRQ      0x5e    /* enable service interrupt */
413302504Smav#define         ATA_SF_DIS_SRVIRQ       0xde    /* disable service interrupt */
414302504Smav#define ATA_SECURITY_SET_PASSWORD       0xf1    /* set drive password */
415302504Smav#define ATA_SECURITY_UNLOCK             0xf2    /* unlock drive using passwd */
416302504Smav#define ATA_SECURITY_ERASE_PREPARE      0xf3    /* prepare to erase drive */
417302504Smav#define ATA_SECURITY_ERASE_UNIT         0xf4    /* erase all blocks on drive */
418302504Smav#define ATA_SECURITY_FREEZE_LOCK        0xf5    /* freeze security config */
419302504Smav#define ATA_SECURITY_DISABLE_PASSWORD   0xf6    /* disable drive password */
420302504Smav#define ATA_READ_NATIVE_MAX_ADDRESS     0xf8    /* read native max address */
421302504Smav#define ATA_SET_MAX_ADDRESS             0xf9    /* set max address */
422302504Smav
423302504Smav
424302504Smav/* ATAPI commands */
425302504Smav#define ATAPI_TEST_UNIT_READY           0x00    /* check if device is ready */
426302504Smav#define ATAPI_REZERO                    0x01    /* rewind */
427302504Smav#define ATAPI_REQUEST_SENSE             0x03    /* get sense data */
428302504Smav#define ATAPI_FORMAT                    0x04    /* format unit */
429302504Smav#define ATAPI_READ                      0x08    /* read data */
430302504Smav#define ATAPI_WRITE                     0x0a    /* write data */
431302504Smav#define ATAPI_WEOF                      0x10    /* write filemark */
432302504Smav#define         ATAPI_WF_WRITE          0x01
433302504Smav#define ATAPI_SPACE                     0x11    /* space command */
434302504Smav#define         ATAPI_SP_FM             0x01
435302504Smav#define         ATAPI_SP_EOD            0x03
436302504Smav#define ATAPI_INQUIRY			0x12	/* get inquiry data */
437302504Smav#define ATAPI_MODE_SELECT               0x15    /* mode select */
438302504Smav#define ATAPI_ERASE                     0x19    /* erase */
439302504Smav#define ATAPI_MODE_SENSE                0x1a    /* mode sense */
440302504Smav#define ATAPI_START_STOP                0x1b    /* start/stop unit */
441302504Smav#define         ATAPI_SS_LOAD           0x01
442302504Smav#define         ATAPI_SS_RETENSION      0x02
443302504Smav#define         ATAPI_SS_EJECT          0x04
444302504Smav#define ATAPI_PREVENT_ALLOW             0x1e    /* media removal */
445302504Smav#define ATAPI_READ_FORMAT_CAPACITIES    0x23    /* get format capacities */
446302504Smav#define ATAPI_READ_CAPACITY             0x25    /* get volume capacity */
447302504Smav#define ATAPI_READ_BIG                  0x28    /* read data */
448302504Smav#define ATAPI_WRITE_BIG                 0x2a    /* write data */
449302504Smav#define ATAPI_LOCATE                    0x2b    /* locate to position */
450302504Smav#define ATAPI_READ_POSITION             0x34    /* read position */
451302504Smav#define ATAPI_SYNCHRONIZE_CACHE         0x35    /* flush buf, close channel */
452302504Smav#define ATAPI_WRITE_BUFFER              0x3b    /* write device buffer */
453302504Smav#define ATAPI_READ_BUFFER               0x3c    /* read device buffer */
454302504Smav#define ATAPI_READ_SUBCHANNEL           0x42    /* get subchannel info */
455302504Smav#define ATAPI_READ_TOC                  0x43    /* get table of contents */
456302504Smav#define ATAPI_PLAY_10                   0x45    /* play by lba */
457302504Smav#define ATAPI_PLAY_MSF                  0x47    /* play by MSF address */
458302504Smav#define ATAPI_PLAY_TRACK                0x48    /* play by track number */
459302504Smav#define ATAPI_PAUSE                     0x4b    /* pause audio operation */
460302504Smav#define ATAPI_READ_DISK_INFO            0x51    /* get disk info structure */
461302504Smav#define ATAPI_READ_TRACK_INFO           0x52    /* get track info structure */
462302504Smav#define ATAPI_RESERVE_TRACK             0x53    /* reserve track */
463302504Smav#define ATAPI_SEND_OPC_INFO             0x54    /* send OPC structurek */
464302504Smav#define ATAPI_MODE_SELECT_BIG           0x55    /* set device parameters */
465302504Smav#define ATAPI_REPAIR_TRACK              0x58    /* repair track */
466302504Smav#define ATAPI_READ_MASTER_CUE           0x59    /* read master CUE info */
467302504Smav#define ATAPI_MODE_SENSE_BIG            0x5a    /* get device parameters */
468302504Smav#define ATAPI_CLOSE_TRACK               0x5b    /* close track/session */
469302504Smav#define ATAPI_READ_BUFFER_CAPACITY      0x5c    /* get buffer capicity */
470302504Smav#define ATAPI_SEND_CUE_SHEET            0x5d    /* send CUE sheet */
471302504Smav#define ATAPI_SERVICE_ACTION_IN         0x96	/* get service data */
472302504Smav#define ATAPI_BLANK                     0xa1    /* blank the media */
473302504Smav#define ATAPI_SEND_KEY                  0xa3    /* send DVD key structure */
474302504Smav#define ATAPI_REPORT_KEY                0xa4    /* get DVD key structure */
475302504Smav#define ATAPI_PLAY_12                   0xa5    /* play by lba */
476302504Smav#define ATAPI_LOAD_UNLOAD               0xa6    /* changer control command */
477302504Smav#define ATAPI_READ_STRUCTURE            0xad    /* get DVD structure */
478302504Smav#define ATAPI_PLAY_CD                   0xb4    /* universal play command */
479302504Smav#define ATAPI_SET_SPEED                 0xbb    /* set drive speed */
480302504Smav#define ATAPI_MECH_STATUS               0xbd    /* get changer status */
481302504Smav#define ATAPI_READ_CD                   0xbe    /* read data */
482302504Smav#define ATAPI_POLL_DSC                  0xff    /* poll DSC status bit */
483302504Smav
484302504Smav
485302504Smavstruct ata_ioc_devices {
486302504Smav    int                 channel;
487302504Smav    char                name[2][32];
488302504Smav    struct ata_params   params[2];
489302504Smav};
490302504Smav
491302504Smav/* pr channel ATA ioctl calls */
492302504Smav#define IOCATAGMAXCHANNEL       _IOR('a',  1, int)
493302504Smav#define IOCATAREINIT            _IOW('a',  2, int)
494302504Smav#define IOCATAATTACH            _IOW('a',  3, int)
495302504Smav#define IOCATADETACH            _IOW('a',  4, int)
496302504Smav#define IOCATADEVICES           _IOWR('a',  5, struct ata_ioc_devices)
497302504Smav
498302504Smav/* ATAPI request sense structure */
499302504Smavstruct atapi_sense {
500302504Smav    u_int8_t	error;				/* current or deferred errors */
501302504Smav#define	ATA_SENSE_VALID			0x80
502302504Smav
503302504Smav    u_int8_t	segment;			/* segment number */
504302504Smav    u_int8_t	key;				/* sense key */
505302504Smav#define ATA_SENSE_KEY_MASK		0x0f    /* sense key mask */
506302504Smav#define ATA_SENSE_NO_SENSE		0x00    /* no specific sense key info */
507302504Smav#define ATA_SENSE_RECOVERED_ERROR 	0x01    /* command OK, data recovered */
508302504Smav#define ATA_SENSE_NOT_READY		0x02    /* no access to drive */
509302504Smav#define ATA_SENSE_MEDIUM_ERROR		0x03    /* non-recovered data error */
510302504Smav#define ATA_SENSE_HARDWARE_ERROR	0x04    /* non-recoverable HW failure */
511302504Smav#define ATA_SENSE_ILLEGAL_REQUEST	0x05    /* invalid command param(s) */
512302504Smav#define ATA_SENSE_UNIT_ATTENTION	0x06    /* media changed */
513302504Smav#define ATA_SENSE_DATA_PROTECT		0x07    /* write protect */
514302504Smav#define ATA_SENSE_BLANK_CHECK		0x08    /* blank check */
515302504Smav#define ATA_SENSE_VENDOR_SPECIFIC	0x09    /* vendor specific skey */
516302504Smav#define ATA_SENSE_COPY_ABORTED		0x0a    /* copy aborted */
517302504Smav#define ATA_SENSE_ABORTED_COMMAND	0x0b    /* command aborted, try again */
518302504Smav#define ATA_SENSE_EQUAL			0x0c    /* equal */
519302504Smav#define ATA_SENSE_VOLUME_OVERFLOW	0x0d    /* volume overflow */
520302504Smav#define ATA_SENSE_MISCOMPARE		0x0e    /* data dont match the medium */
521302504Smav#define ATA_SENSE_RESERVED		0x0f
522302504Smav#define	ATA_SENSE_ILI			0x20;
523302504Smav#define	ATA_SENSE_EOM			0x40;
524302504Smav#define	ATA_SENSE_FILEMARK		0x80;
525302504Smav
526302504Smav    u_int32_t   cmd_info;		/* cmd information */
527302504Smav    u_int8_t	sense_length;		/* additional sense len (n-7) */
528302504Smav    u_int32_t   cmd_specific_info;	/* additional cmd spec info */
529302504Smav    u_int8_t    asc;			/* additional sense code */
530302504Smav    u_int8_t    ascq;			/* additional sense code qual */
531302504Smav    u_int8_t    replaceable_unit_code;	/* replaceable unit code */
532302504Smav    u_int8_t	specific;		/* sense key specific */
533302504Smav#define	ATA_SENSE_SPEC_VALID	0x80
534302504Smav#define	ATA_SENSE_SPEC_MASK	0x7f
535302504Smav
536302504Smav    u_int8_t	specific1;		/* sense key specific */
537302504Smav    u_int8_t	specific2;		/* sense key specific */
538302504Smav} __packed;
539302504Smav
540302504Smavstruct ata_ioc_request {
541302504Smav    union {
542302504Smav	struct {
543302504Smav	    u_int8_t            command;
544302504Smav	    u_int8_t            feature;
545302504Smav	    u_int64_t           lba;
546302504Smav	    u_int16_t           count;
547302504Smav	} ata;
548302504Smav	struct {
549302504Smav	    char                ccb[16];
550302504Smav	    struct atapi_sense	sense;
551302504Smav	} atapi;
552302504Smav    } u;
553302504Smav    caddr_t             data;
554302504Smav    int                 count;
555302504Smav    int                 flags;
556302504Smav#define ATA_CMD_CONTROL                 0x01
557302504Smav#define ATA_CMD_READ                    0x02
558302504Smav#define ATA_CMD_WRITE                   0x04
559302504Smav#define ATA_CMD_ATAPI                   0x08
560302504Smav
561302504Smav    int                 timeout;
562302504Smav    int                 error;
563302504Smav};
564302504Smav
565302504Smavstruct ata_security_password {
566302504Smav	u_int16_t		ctrl;
567302504Smav#define ATA_SECURITY_PASSWORD_USER	0x0000
568302504Smav#define ATA_SECURITY_PASSWORD_MASTER	0x0001
569302504Smav#define ATA_SECURITY_ERASE_NORMAL	0x0000
570302504Smav#define ATA_SECURITY_ERASE_ENHANCED	0x0002
571302504Smav#define ATA_SECURITY_LEVEL_HIGH		0x0000
572302504Smav#define ATA_SECURITY_LEVEL_MAXIMUM	0x0100
573302504Smav
574302504Smav	u_int8_t		password[32];
575302504Smav	u_int16_t		revision;
576302504Smav	u_int16_t		reserved[238];
577302504Smav};
578302504Smav
579302504Smav/* pr device ATA ioctl calls */
580302504Smav#define IOCATAREQUEST           _IOWR('a', 100, struct ata_ioc_request)
581302504Smav#define IOCATAGPARM             _IOR('a', 101, struct ata_params)
582302504Smav#define IOCATAGMODE             _IOR('a', 102, int)
583302504Smav#define IOCATASMODE             _IOW('a', 103, int)
584302504Smav
585302504Smav#define IOCATAGSPINDOWN		_IOR('a', 104, int)
586302504Smav#define IOCATASSPINDOWN		_IOW('a', 105, int)
587302504Smav
588302504Smav
589302504Smavstruct ata_ioc_raid_config {
590302504Smav	    int                 lun;
591302504Smav	    int                 type;
592302504Smav#define AR_JBOD                         0x0001
593302504Smav#define AR_SPAN                         0x0002
594302504Smav#define AR_RAID0                        0x0004
595302504Smav#define AR_RAID1                        0x0008
596302504Smav#define AR_RAID01                       0x0010
597302504Smav#define AR_RAID3                        0x0020
598302504Smav#define AR_RAID4                        0x0040
599302504Smav#define AR_RAID5                        0x0080
600302504Smav
601302504Smav	    int                 interleave;
602302504Smav	    int                 status;
603302504Smav#define AR_READY                        1
604302504Smav#define AR_DEGRADED                     2
605302504Smav#define AR_REBUILDING                   4
606302504Smav
607302504Smav	    int                 progress;
608302504Smav	    int                 total_disks;
609302504Smav	    int                 disks[16];
610302504Smav};
611302504Smav
612302504Smavstruct ata_ioc_raid_status {
613302504Smav	    int                 lun;
614302504Smav	    int                 type;
615302504Smav	    int                 interleave;
616302504Smav	    int                 status;
617302504Smav	    int                 progress;
618302504Smav	    int                 total_disks;
619302504Smav	    struct {
620302504Smav		    int		state;
621302504Smav#define AR_DISK_ONLINE			0x01
622302504Smav#define AR_DISK_PRESENT			0x02
623302504Smav#define AR_DISK_SPARE			0x04
624302504Smav		    int		lun;
625302504Smav	    } disks[16];
626302504Smav};
627302504Smav
628302504Smav/* ATA RAID ioctl calls */
629302504Smav#define IOCATARAIDCREATE        _IOWR('a', 200, struct ata_ioc_raid_config)
630302504Smav#define IOCATARAIDDELETE        _IOW('a', 201, int)
631302504Smav#define IOCATARAIDSTATUS        _IOWR('a', 202, struct ata_ioc_raid_status)
632302504Smav#define IOCATARAIDADDSPARE      _IOW('a', 203, struct ata_ioc_raid_config)
633302504Smav#define IOCATARAIDREBUILD       _IOW('a', 204, int)
634302504Smav
635302504Smav#endif /* _SYS_ATA_H_ */
636302504Smav