psycho.c revision 266020
1251875Speter/*- 2251875Speter * Copyright (c) 1999, 2000 Matthew R. Green 3251875Speter * Copyright (c) 2001 - 2003 by Thomas Moestl <tmm@FreeBSD.org> 4251875Speter * Copyright (c) 2005 - 2006 Marius Strobl <marius@FreeBSD.org> 5251875Speter * All rights reserved. 6251875Speter * 7251875Speter * Redistribution and use in source and binary forms, with or without 8251875Speter * modification, are permitted provided that the following conditions 9251875Speter * are met: 10251875Speter * 1. Redistributions of source code must retain the above copyright 11251875Speter * notice, this list of conditions and the following disclaimer. 12251875Speter * 2. Redistributions in binary form must reproduce the above copyright 13251875Speter * notice, this list of conditions and the following disclaimer in the 14251875Speter * documentation and/or other materials provided with the distribution. 15251875Speter * 3. The name of the author may not be used to endorse or promote products 16251875Speter * derived from this software without specific prior written permission. 17251875Speter * 18251875Speter * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 19251875Speter * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 20251875Speter * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 21251875Speter * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 22251875Speter * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 23251875Speter * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 24251875Speter * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 25251875Speter * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 26251875Speter * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27251875Speter * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28251875Speter * SUCH DAMAGE. 29251875Speter * 30251875Speter * from: NetBSD: psycho.c,v 1.39 2001/10/07 20:30:41 eeh Exp 31251875Speter */ 32251875Speter 33251875Speter#include <sys/cdefs.h> 34251875Speter__FBSDID("$FreeBSD: stable/10/sys/sparc64/pci/psycho.c 266020 2014-05-14 14:17:51Z ian $"); 35251875Speter 36251875Speter/* 37251875Speter * Support for `Hummingbird' (UltraSPARC IIe), `Psycho' and `Psycho+' 38251875Speter * (UltraSPARC II) and `Sabre' (UltraSPARC IIi) UPA to PCI bridges. 39253734Speter */ 40253734Speter 41253734Speter#include "opt_ofw_pci.h" 42253734Speter#include "opt_psycho.h" 43253734Speter 44253734Speter#include <sys/param.h> 45251875Speter#include <sys/systm.h> 46251875Speter#include <sys/bus.h> 47251875Speter#include <sys/endian.h> 48251875Speter#include <sys/kdb.h> 49251875Speter#include <sys/kernel.h> 50251875Speter#include <sys/lock.h> 51251875Speter#include <sys/malloc.h> 52251875Speter#include <sys/module.h> 53251875Speter#include <sys/mutex.h> 54251875Speter#include <sys/pcpu.h> 55251875Speter#include <sys/reboot.h> 56251875Speter#include <sys/rman.h> 57251875Speter#include <sys/sysctl.h> 58251875Speter 59251875Speter#include <dev/ofw/ofw_bus.h> 60251875Speter#include <dev/ofw/ofw_pci.h> 61251875Speter#include <dev/ofw/openfirm.h> 62251875Speter 63251875Speter#include <machine/bus.h> 64251875Speter#include <machine/bus_common.h> 65251875Speter#include <machine/bus_private.h> 66251875Speter#include <machine/iommureg.h> 67251875Speter#include <machine/iommuvar.h> 68251875Speter#include <machine/resource.h> 69251875Speter#include <machine/ver.h> 70251875Speter 71251875Speter#include <dev/pci/pcireg.h> 72251875Speter#include <dev/pci/pcivar.h> 73251875Speter 74251875Speter#include <sparc64/pci/ofw_pci.h> 75251875Speter#include <sparc64/pci/psychoreg.h> 76251875Speter#include <sparc64/pci/psychovar.h> 77251875Speter 78251875Speter#include "pcib_if.h" 79251875Speter 80251875Speterstatic const struct psycho_desc *psycho_find_desc(const struct psycho_desc *, 81251875Speter const char *); 82251875Speterstatic const struct psycho_desc *psycho_get_desc(device_t); 83251875Speterstatic void psycho_set_intr(struct psycho_softc *, u_int, bus_addr_t, 84251875Speter driver_filter_t, driver_intr_t); 85251875Speterstatic int psycho_find_intrmap(struct psycho_softc *, u_int, bus_addr_t *, 86251875Speter bus_addr_t *, u_long *); 87251875Speterstatic void sabre_dmamap_sync(bus_dma_tag_t dt, bus_dmamap_t map, 88251875Speter bus_dmasync_op_t op); 89251875Speterstatic void psycho_intr_enable(void *); 90251875Speterstatic void psycho_intr_disable(void *); 91251875Speterstatic void psycho_intr_assign(void *); 92251875Speterstatic void psycho_intr_clear(void *); 93251875Speter 94251875Speter/* Interrupt handlers */ 95251875Speterstatic driver_filter_t psycho_ue; 96251875Speterstatic driver_filter_t psycho_ce; 97251875Speterstatic driver_filter_t psycho_pci_bus; 98251875Speterstatic driver_filter_t psycho_powerdebug; 99251875Speterstatic driver_intr_t psycho_powerdown; 100251875Speterstatic driver_intr_t psycho_overtemp; 101251875Speter#ifdef PSYCHO_MAP_WAKEUP 102251875Speterstatic driver_filter_t psycho_wakeup; 103251875Speter#endif 104251875Speter 105251875Speter/* IOMMU support */ 106251875Speterstatic void psycho_iommu_init(struct psycho_softc *, int, uint32_t); 107251875Speter 108251875Speter/* 109251875Speter * Methods 110251875Speter */ 111251875Speterstatic device_probe_t psycho_probe; 112251875Speterstatic device_attach_t psycho_attach; 113251875Speterstatic bus_read_ivar_t psycho_read_ivar; 114251875Speterstatic bus_setup_intr_t psycho_setup_intr; 115251875Speterstatic bus_alloc_resource_t psycho_alloc_resource; 116251875Speterstatic bus_activate_resource_t psycho_activate_resource; 117251875Speterstatic bus_adjust_resource_t psycho_adjust_resource; 118251875Speterstatic bus_get_dma_tag_t psycho_get_dma_tag; 119251875Speterstatic pcib_maxslots_t psycho_maxslots; 120251875Speterstatic pcib_read_config_t psycho_read_config; 121251875Speterstatic pcib_write_config_t psycho_write_config; 122251875Speterstatic pcib_route_interrupt_t psycho_route_interrupt; 123251875Speterstatic ofw_bus_get_node_t psycho_get_node; 124251875Speterstatic ofw_pci_setup_device_t psycho_setup_device; 125251875Speter 126251875Speterstatic device_method_t psycho_methods[] = { 127251875Speter /* Device interface */ 128251875Speter DEVMETHOD(device_probe, psycho_probe), 129251875Speter DEVMETHOD(device_attach, psycho_attach), 130251875Speter DEVMETHOD(device_shutdown, bus_generic_shutdown), 131251875Speter DEVMETHOD(device_suspend, bus_generic_suspend), 132251875Speter DEVMETHOD(device_resume, bus_generic_resume), 133251875Speter 134251875Speter /* Bus interface */ 135251875Speter DEVMETHOD(bus_read_ivar, psycho_read_ivar), 136251875Speter DEVMETHOD(bus_setup_intr, psycho_setup_intr), 137251875Speter DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr), 138251875Speter DEVMETHOD(bus_alloc_resource, psycho_alloc_resource), 139251875Speter DEVMETHOD(bus_activate_resource, psycho_activate_resource), 140251875Speter DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource), 141251875Speter DEVMETHOD(bus_adjust_resource, psycho_adjust_resource), 142251875Speter DEVMETHOD(bus_release_resource, bus_generic_release_resource), 143251875Speter DEVMETHOD(bus_get_dma_tag, psycho_get_dma_tag), 144251875Speter 145251875Speter /* pcib interface */ 146251875Speter DEVMETHOD(pcib_maxslots, psycho_maxslots), 147251875Speter DEVMETHOD(pcib_read_config, psycho_read_config), 148251875Speter DEVMETHOD(pcib_write_config, psycho_write_config), 149251875Speter DEVMETHOD(pcib_route_interrupt, psycho_route_interrupt), 150251875Speter 151251875Speter /* ofw_bus interface */ 152251875Speter DEVMETHOD(ofw_bus_get_node, psycho_get_node), 153251875Speter 154251875Speter /* ofw_pci interface */ 155251875Speter DEVMETHOD(ofw_pci_setup_device, psycho_setup_device), 156251875Speter 157251875Speter DEVMETHOD_END 158251875Speter}; 159251875Speter 160251875Speterstatic devclass_t psycho_devclass; 161251875Speter 162251875SpeterDEFINE_CLASS_0(pcib, psycho_driver, psycho_methods, 163251875Speter sizeof(struct psycho_softc)); 164251875SpeterEARLY_DRIVER_MODULE(psycho, nexus, psycho_driver, psycho_devclass, NULL, NULL, 165251875Speter BUS_PASS_BUS); 166251875Speter 167251875Speterstatic SYSCTL_NODE(_hw, OID_AUTO, psycho, CTLFLAG_RD, 0, "psycho parameters"); 168251875Speter 169251875Speterstatic u_int psycho_powerfail = 1; 170251875SpeterTUNABLE_INT("hw.psycho.powerfail", &psycho_powerfail); 171251875SpeterSYSCTL_UINT(_hw_psycho, OID_AUTO, powerfail, CTLFLAG_RDTUN, &psycho_powerfail, 172251875Speter 0, "powerfail action (0: none, 1: shutdown (default), 2: debugger)"); 173251875Speter 174251875Speterstatic SLIST_HEAD(, psycho_softc) psycho_softcs = 175251875Speter SLIST_HEAD_INITIALIZER(psycho_softcs); 176251875Speter 177251875Speterstatic const struct intr_controller psycho_ic = { 178251875Speter psycho_intr_enable, 179251875Speter psycho_intr_disable, 180251875Speter psycho_intr_assign, 181251875Speter psycho_intr_clear 182251875Speter}; 183251875Speter 184251875Speterstruct psycho_icarg { 185251875Speter struct psycho_softc *pica_sc; 186251875Speter bus_addr_t pica_map; 187251875Speter bus_addr_t pica_clr; 188251875Speter}; 189251875Speter 190251875Speter#define PSYCHO_READ8(sc, off) \ 191251875Speter bus_read_8((sc)->sc_mem_res, (off)) 192251875Speter#define PSYCHO_WRITE8(sc, off, v) \ 193251875Speter bus_write_8((sc)->sc_mem_res, (off), (v)) 194251875Speter#define PCICTL_READ8(sc, off) \ 195251875Speter PSYCHO_READ8((sc), (sc)->sc_pcictl + (off)) 196251875Speter#define PCICTL_WRITE8(sc, off, v) \ 197251875Speter PSYCHO_WRITE8((sc), (sc)->sc_pcictl + (off), (v)) 198251875Speter 199251875Speter/* 200251875Speter * "Sabre" is the UltraSPARC IIi onboard UPA to PCI bridge. It manages a 201251875Speter * single PCI bus and does not have a streaming buffer. It often has an APB 202251875Speter * (advanced PCI bridge) connected to it, which was designed specifically for 203251875Speter * the IIi. The APB lets the IIi handle two independent PCI buses, and 204251875Speter * appears as two "Simba"'s underneath the Sabre. 205251875Speter * 206251875Speter * "Hummingbird" is the UltraSPARC IIe onboard UPA to PCI bridge. It's 207251875Speter * basically the same as Sabre but without an APB underneath it. 208251875Speter * 209251875Speter * "Psycho" and "Psycho+" are dual UPA to PCI bridges. They sit on the UPA 210251875Speter * bus and manage two PCI buses. "Psycho" has two 64-bit 33MHz buses, while 211251875Speter * "Psycho+" controls both a 64-bit 33Mhz and a 64-bit 66Mhz PCI bus. You 212251875Speter * will usually find a "Psycho+" since I don't think the original "Psycho" 213251875Speter * ever shipped, and if it did it would be in the U30. 214251875Speter * 215251875Speter * Each "Psycho" PCI bus appears as a separate OFW node, but since they are 216251875Speter * both part of the same IC, they only have a single register space. As such, 217251875Speter * they need to be configured together, even though the autoconfiguration will 218251875Speter * attach them separately. 219251875Speter * 220251875Speter * On UltraIIi machines, "Sabre" itself usually takes pci0, with "Simba" often 221251875Speter * as pci1 and pci2, although they have been implemented with other PCI bus 222251875Speter * numbers on some machines. 223251875Speter * 224251875Speter * On UltraII machines, there can be any number of "Psycho+" ICs, each 225251875Speter * providing two PCI buses. 226251875Speter */ 227251875Speter 228251875Speterstruct psycho_desc { 229251875Speter const char *pd_string; 230251875Speter int pd_mode; 231251875Speter const char *pd_name; 232251875Speter}; 233251875Speter 234251875Speterstatic const struct psycho_desc psycho_compats[] = { 235251875Speter { "pci108e,8000", PSYCHO_MODE_PSYCHO, "Psycho compatible" }, 236251875Speter { "pci108e,a000", PSYCHO_MODE_SABRE, "Sabre compatible" }, 237251875Speter { "pci108e,a001", PSYCHO_MODE_SABRE, "Hummingbird compatible" }, 238251875Speter { NULL, 0, NULL } 239251875Speter}; 240251875Speter 241251875Speterstatic const struct psycho_desc psycho_models[] = { 242251875Speter { "SUNW,psycho", PSYCHO_MODE_PSYCHO, "Psycho" }, 243251875Speter { "SUNW,sabre", PSYCHO_MODE_SABRE, "Sabre" }, 244251875Speter { NULL, 0, NULL } 245251875Speter}; 246251875Speter 247251875Speterstatic const struct psycho_desc * 248251875Speterpsycho_find_desc(const struct psycho_desc *table, const char *string) 249251875Speter{ 250251875Speter const struct psycho_desc *desc; 251251875Speter 252251875Speter if (string == NULL) 253251875Speter return (NULL); 254251875Speter for (desc = table; desc->pd_string != NULL; desc++) 255251875Speter if (strcmp(desc->pd_string, string) == 0) 256251875Speter return (desc); 257251875Speter return (NULL); 258251875Speter} 259251875Speter 260251875Speterstatic const struct psycho_desc * 261251875Speterpsycho_get_desc(device_t dev) 262251875Speter{ 263251875Speter const struct psycho_desc *rv; 264251875Speter 265251875Speter rv = psycho_find_desc(psycho_models, ofw_bus_get_model(dev)); 266251875Speter if (rv == NULL) 267251875Speter rv = psycho_find_desc(psycho_compats, 268251875Speter ofw_bus_get_compat(dev)); 269251875Speter return (rv); 270251875Speter} 271251875Speter 272251875Speterstatic int 273251875Speterpsycho_probe(device_t dev) 274251875Speter{ 275251875Speter const char *dtype; 276251875Speter 277251875Speter dtype = ofw_bus_get_type(dev); 278251875Speter if (dtype != NULL && strcmp(dtype, OFW_TYPE_PCI) == 0 && 279251875Speter psycho_get_desc(dev) != NULL) { 280251875Speter device_set_desc(dev, "U2P UPA-PCI bridge"); 281251875Speter return (0); 282251875Speter } 283251875Speter return (ENXIO); 284251875Speter} 285251875Speter 286251875Speterstatic int 287251875Speterpsycho_attach(device_t dev) 288251875Speter{ 289251875Speter struct psycho_icarg *pica; 290251875Speter struct psycho_softc *asc, *sc, *osc; 291251875Speter struct ofw_pci_ranges *range; 292251875Speter const struct psycho_desc *desc; 293251875Speter bus_addr_t intrclr, intrmap; 294251875Speter uint64_t csr, dr; 295251875Speter phandle_t node; 296251875Speter uint32_t dvmabase, prop, prop_array[2]; 297251875Speter u_int rerun, ver; 298251875Speter int i, j; 299251875Speter 300251875Speter node = ofw_bus_get_node(dev); 301251875Speter sc = device_get_softc(dev); 302251875Speter desc = psycho_get_desc(dev); 303251875Speter 304251875Speter sc->sc_node = node; 305251875Speter sc->sc_dev = dev; 306251875Speter sc->sc_mode = desc->pd_mode; 307251875Speter 308251875Speter /* 309251875Speter * The Psycho gets three register banks: 310251875Speter * (0) per-PBM configuration and status registers 311251875Speter * (1) per-PBM PCI configuration space, containing only the 312251875Speter * PBM 256-byte PCI header 313251875Speter * (2) the shared Psycho configuration registers 314251875Speter */ 315251875Speter if (sc->sc_mode == PSYCHO_MODE_PSYCHO) { 316251875Speter i = 2; 317251875Speter sc->sc_pcictl = 318251875Speter bus_get_resource_start(dev, SYS_RES_MEMORY, 0) - 319251875Speter bus_get_resource_start(dev, SYS_RES_MEMORY, 2); 320251875Speter switch (sc->sc_pcictl) { 321251875Speter case PSR_PCICTL0: 322251875Speter sc->sc_half = 0; 323251875Speter break; 324251875Speter case PSR_PCICTL1: 325251875Speter sc->sc_half = 1; 326251875Speter break; 327251875Speter default: 328251875Speter panic("%s: bogus PCI control register location", 329251875Speter __func__); 330251875Speter /* NOTREACHED */ 331251875Speter } 332251875Speter } else { 333251875Speter i = 0; 334251875Speter sc->sc_pcictl = PSR_PCICTL0; 335251875Speter sc->sc_half = 0; 336251875Speter } 337251875Speter sc->sc_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &i, 338251875Speter (sc->sc_mode == PSYCHO_MODE_PSYCHO ? RF_SHAREABLE : 0) | 339251875Speter RF_ACTIVE); 340251875Speter if (sc->sc_mem_res == NULL) 341251875Speter panic("%s: could not allocate registers", __func__); 342251875Speter 343251875Speter /* 344251875Speter * Match other Psychos that are already configured against 345251875Speter * the base physical address. This will be the same for a 346251875Speter * pair of devices that share register space. 347251875Speter */ 348251875Speter osc = NULL; 349251875Speter SLIST_FOREACH(asc, &psycho_softcs, sc_link) { 350251875Speter if (rman_get_start(asc->sc_mem_res) == 351251875Speter rman_get_start(sc->sc_mem_res)) { 352251875Speter /* Found partner. */ 353251875Speter osc = asc; 354251875Speter break; 355251875Speter } 356251875Speter } 357251875Speter if (osc == NULL) { 358251875Speter sc->sc_mtx = malloc(sizeof(*sc->sc_mtx), M_DEVBUF, 359251875Speter M_NOWAIT | M_ZERO); 360251875Speter if (sc->sc_mtx == NULL) 361251875Speter panic("%s: could not malloc mutex", __func__); 362251875Speter mtx_init(sc->sc_mtx, "pcib_mtx", NULL, MTX_SPIN); 363251875Speter } else { 364251875Speter if (sc->sc_mode != PSYCHO_MODE_PSYCHO) 365251875Speter panic("%s: no partner expected", __func__); 366251875Speter if (mtx_initialized(osc->sc_mtx) == 0) 367251875Speter panic("%s: mutex not initialized", __func__); 368251875Speter sc->sc_mtx = osc->sc_mtx; 369251875Speter } 370251875Speter 371251875Speter csr = PSYCHO_READ8(sc, PSR_CS); 372251875Speter ver = PSYCHO_GCSR_VERS(csr); 373251875Speter sc->sc_ign = 0x1f; /* Hummingbird/Sabre IGN is always 0x1f. */ 374251875Speter if (sc->sc_mode == PSYCHO_MODE_PSYCHO) 375251875Speter sc->sc_ign = PSYCHO_GCSR_IGN(csr); 376251875Speter if (OF_getprop(node, "clock-frequency", &prop, sizeof(prop)) == -1) 377251875Speter prop = 33000000; 378251875Speter 379251875Speter device_printf(dev, 380251875Speter "%s, impl %d, version %d, IGN %#x, bus %c, %dMHz\n", 381251875Speter desc->pd_name, (u_int)PSYCHO_GCSR_IMPL(csr), ver, sc->sc_ign, 382251875Speter 'A' + sc->sc_half, prop / 1000 / 1000); 383251875Speter 384251875Speter /* Set up the PCI control and PCI diagnostic registers. */ 385251875Speter 386253734Speter csr = PCICTL_READ8(sc, PCR_CS); 387251875Speter csr &= ~PCICTL_ARB_PARK; 388251875Speter if (OF_getproplen(node, "no-bus-parking") < 0) 389251875Speter csr |= PCICTL_ARB_PARK; 390251875Speter 391251875Speter /* Workarounds for version specific bugs. */ 392251875Speter dr = PCICTL_READ8(sc, PCR_DIAG); 393251875Speter switch (ver) { 394251875Speter case 0: 395251875Speter dr |= DIAG_RTRY_DIS; 396251875Speter dr &= ~DIAG_DWSYNC_DIS; 397251875Speter rerun = 0; 398251875Speter break; 399251875Speter case 1: 400251875Speter csr &= ~PCICTL_ARB_PARK; 401251875Speter dr |= DIAG_RTRY_DIS | DIAG_DWSYNC_DIS; 402251875Speter rerun = 0; 403251875Speter break; 404251875Speter default: 405251875Speter dr |= DIAG_DWSYNC_DIS; 406251875Speter dr &= ~DIAG_RTRY_DIS; 407251875Speter rerun = 1; 408251875Speter break; 409251875Speter } 410251875Speter 411251875Speter csr |= PCICTL_ERRINTEN | PCICTL_ARB_4; 412251875Speter csr &= ~(PCICTL_SBHINTEN | PCICTL_WAKEUPEN); 413251875Speter#ifdef PSYCHO_DEBUG 414251875Speter device_printf(dev, "PCI CSR 0x%016llx -> 0x%016llx\n", 415251875Speter (unsigned long long)PCICTL_READ8(sc, PCR_CS), 416251875Speter (unsigned long long)csr); 417251875Speter#endif 418251875Speter PCICTL_WRITE8(sc, PCR_CS, csr); 419251875Speter 420251875Speter dr &= ~DIAG_ISYNC_DIS; 421251875Speter#ifdef PSYCHO_DEBUG 422251875Speter device_printf(dev, "PCI DR 0x%016llx -> 0x%016llx\n", 423251875Speter (unsigned long long)PCICTL_READ8(sc, PCR_DIAG), 424251875Speter (unsigned long long)dr); 425251875Speter#endif 426251875Speter PCICTL_WRITE8(sc, PCR_DIAG, dr); 427251875Speter 428251875Speter if (sc->sc_mode == PSYCHO_MODE_SABRE) { 429251875Speter /* Use the PROM preset for now. */ 430251875Speter csr = PCICTL_READ8(sc, PCR_TAS); 431251875Speter if (csr == 0) 432251875Speter panic("%s: Hummingbird/Sabre TAS not initialized.", 433251875Speter __func__); 434251875Speter dvmabase = (ffs(csr) - 1) << PCITAS_ADDR_SHIFT; 435251875Speter } else 436251875Speter dvmabase = -1; 437251875Speter 438251875Speter /* Initialize memory and I/O rmans. */ 439251875Speter sc->sc_pci_io_rman.rm_type = RMAN_ARRAY; 440251875Speter sc->sc_pci_io_rman.rm_descr = "Psycho PCI I/O Ports"; 441251875Speter if (rman_init(&sc->sc_pci_io_rman) != 0 || 442251875Speter rman_manage_region(&sc->sc_pci_io_rman, 0, PSYCHO_IO_SIZE) != 0) 443251875Speter panic("%s: failed to set up I/O rman", __func__); 444251875Speter sc->sc_pci_mem_rman.rm_type = RMAN_ARRAY; 445251875Speter sc->sc_pci_mem_rman.rm_descr = "Psycho PCI Memory"; 446251875Speter if (rman_init(&sc->sc_pci_mem_rman) != 0 || 447251875Speter rman_manage_region(&sc->sc_pci_mem_rman, 0, PSYCHO_MEM_SIZE) != 0) 448251875Speter panic("%s: failed to set up memory rman", __func__); 449251875Speter 450251875Speter i = OF_getprop_alloc(node, "ranges", sizeof(*range), (void **)&range); 451251875Speter /* 452251875Speter * Make sure that the expected ranges are present. The 453251875Speter * OFW_PCI_CS_MEM64 one is not currently used though. 454251875Speter */ 455251875Speter if (i != PSYCHO_NRANGE) 456251875Speter panic("%s: unsupported number of ranges", __func__); 457251875Speter /* 458251875Speter * Find the addresses of the various bus spaces. 459251875Speter * There should not be multiple ones of one kind. 460251875Speter * The physical start addresses of the ranges are the configuration, 461251875Speter * memory and I/O handles. 462251875Speter */ 463251875Speter for (i = 0; i < PSYCHO_NRANGE; i++) { 464251875Speter j = OFW_PCI_RANGE_CS(&range[i]); 465251875Speter if (sc->sc_pci_bh[j] != 0) 466251875Speter panic("%s: duplicate range for space %d", 467251875Speter __func__, j); 468251875Speter sc->sc_pci_bh[j] = OFW_PCI_RANGE_PHYS(&range[i]); 469251875Speter } 470251875Speter free(range, M_OFWPROP); 471251875Speter 472251875Speter /* Register the softc, this is needed for paired Psychos. */ 473251875Speter SLIST_INSERT_HEAD(&psycho_softcs, sc, sc_link); 474251875Speter 475251875Speter /* 476251875Speter * If we're a Hummingbird/Sabre or the first of a pair of Psychos 477251875Speter * to arrive here, do the interrupt setup and start up the IOMMU. 478251875Speter */ 479251875Speter if (osc == NULL) { 480251875Speter /* 481251875Speter * Hunt through all the interrupt mapping regs and register 482251875Speter * our interrupt controller for the corresponding interrupt 483251875Speter * vectors. We do this early in order to be able to catch 484251875Speter * stray interrupts. 485251875Speter */ 486251875Speter for (i = 0; i <= PSYCHO_MAX_INO; i++) { 487251875Speter if (psycho_find_intrmap(sc, i, &intrmap, &intrclr, 488251875Speter NULL) == 0) 489251875Speter continue; 490251875Speter pica = malloc(sizeof(*pica), M_DEVBUF, M_NOWAIT); 491251875Speter if (pica == NULL) 492251875Speter panic("%s: could not allocate interrupt " 493251875Speter "controller argument", __func__); 494251875Speter pica->pica_sc = sc; 495251875Speter pica->pica_map = intrmap; 496251875Speter pica->pica_clr = intrclr; 497251875Speter#ifdef PSYCHO_DEBUG 498251875Speter /* 499251875Speter * Enable all interrupts and clear all interrupt 500251875Speter * states. This aids the debugging of interrupt 501251875Speter * routing problems. 502251875Speter */ 503251875Speter device_printf(dev, 504251875Speter "intr map (INO %d, %s) %#lx: %#lx, clr: %#lx\n", 505251875Speter i, intrmap <= PSR_PCIB3_INT_MAP ? "PCI" : "OBIO", 506251875Speter (u_long)intrmap, (u_long)PSYCHO_READ8(sc, 507251875Speter intrmap), (u_long)intrclr); 508251875Speter PSYCHO_WRITE8(sc, intrmap, INTMAP_VEC(sc->sc_ign, i)); 509251875Speter PSYCHO_WRITE8(sc, intrclr, INTCLR_IDLE); 510251875Speter PSYCHO_WRITE8(sc, intrmap, 511251875Speter INTMAP_ENABLE(INTMAP_VEC(sc->sc_ign, i), 512251875Speter PCPU_GET(mid))); 513251875Speter#endif 514251875Speter j = intr_controller_register(INTMAP_VEC(sc->sc_ign, 515251875Speter i), &psycho_ic, pica); 516251875Speter if (j != 0) 517251875Speter device_printf(dev, "could not register " 518251875Speter "interrupt controller for INO %d (%d)\n", 519251875Speter i, j); 520251875Speter } 521251875Speter 522251875Speter if (sc->sc_mode == PSYCHO_MODE_PSYCHO) 523251875Speter sparc64_counter_init(device_get_nameunit(dev), 524251875Speter rman_get_bustag(sc->sc_mem_res), 525251875Speter rman_get_bushandle(sc->sc_mem_res), PSR_TC0); 526251875Speter 527251875Speter /* 528251875Speter * Set up IOMMU and PCI configuration if we're the first 529251875Speter * of a pair of Psychos to arrive here or a Hummingbird 530251875Speter * or Sabre. 531251875Speter * 532251875Speter * We should calculate a TSB size based on amount of RAM 533251875Speter * and number of bus controllers and number and type of 534251875Speter * child devices. 535251875Speter * 536251875Speter * For the moment, 32KB should be more than enough. 537251875Speter */ 538251875Speter sc->sc_is = malloc(sizeof(*sc->sc_is), M_DEVBUF, M_NOWAIT | 539251875Speter M_ZERO); 540251875Speter if (sc->sc_is == NULL) 541251875Speter panic("%s: could not malloc IOMMU state", __func__); 542251875Speter sc->sc_is->is_flags = IOMMU_PRESERVE_PROM; 543251875Speter if (sc->sc_mode == PSYCHO_MODE_SABRE) { 544251875Speter sc->sc_dma_methods = 545251875Speter malloc(sizeof(*sc->sc_dma_methods), M_DEVBUF, 546251875Speter M_NOWAIT); 547251875Speter if (sc->sc_dma_methods == NULL) 548251875Speter panic("%s: could not malloc DMA methods", 549251875Speter __func__); 550251875Speter memcpy(sc->sc_dma_methods, &iommu_dma_methods, 551251875Speter sizeof(*sc->sc_dma_methods)); 552251875Speter sc->sc_dma_methods->dm_dmamap_sync = 553251875Speter sabre_dmamap_sync; 554251875Speter sc->sc_is->is_pmaxaddr = 555251875Speter IOMMU_MAXADDR(SABRE_IOMMU_BITS); 556251875Speter } else { 557251875Speter sc->sc_dma_methods = &iommu_dma_methods; 558251875Speter sc->sc_is->is_pmaxaddr = 559251875Speter IOMMU_MAXADDR(PSYCHO_IOMMU_BITS); 560251875Speter } 561253734Speter sc->sc_is->is_sb[0] = sc->sc_is->is_sb[1] = 0; 562251875Speter if (OF_getproplen(node, "no-streaming-cache") < 0) 563251875Speter sc->sc_is->is_sb[0] = sc->sc_pcictl + PCR_STRBUF; 564251875Speter sc->sc_is->is_flags |= (rerun != 1) ? IOMMU_RERUN_DISABLE : 0; 565251875Speter psycho_iommu_init(sc, 3, dvmabase); 566251875Speter } else { 567251875Speter /* Just copy IOMMU state, config tag and address. */ 568251875Speter sc->sc_dma_methods = &iommu_dma_methods; 569251875Speter sc->sc_is = osc->sc_is; 570251875Speter if (OF_getproplen(node, "no-streaming-cache") < 0) 571251875Speter sc->sc_is->is_sb[1] = sc->sc_pcictl + PCR_STRBUF; 572251875Speter iommu_reset(sc->sc_is); 573251875Speter } 574251875Speter 575251875Speter /* Allocate our tags. */ 576251875Speter sc->sc_pci_iot = sparc64_alloc_bus_tag(NULL, rman_get_bustag( 577251875Speter sc->sc_mem_res), PCI_IO_BUS_SPACE, NULL); 578251875Speter if (sc->sc_pci_iot == NULL) 579251875Speter panic("%s: could not allocate PCI I/O tag", __func__); 580251875Speter sc->sc_pci_cfgt = sparc64_alloc_bus_tag(NULL, rman_get_bustag( 581251875Speter sc->sc_mem_res), PCI_CONFIG_BUS_SPACE, NULL); 582251875Speter if (sc->sc_pci_cfgt == NULL) 583251875Speter panic("%s: could not allocate PCI configuration space tag", 584251875Speter __func__); 585251875Speter if (bus_dma_tag_create(bus_get_dma_tag(dev), 8, 0, 586251875Speter sc->sc_is->is_pmaxaddr, ~0, NULL, NULL, sc->sc_is->is_pmaxaddr, 587251875Speter 0xff, 0xffffffff, 0, NULL, NULL, &sc->sc_pci_dmat) != 0) 588251875Speter panic("%s: could not create PCI DMA tag", __func__); 589251875Speter /* Customize the tag. */ 590251875Speter sc->sc_pci_dmat->dt_cookie = sc->sc_is; 591251875Speter sc->sc_pci_dmat->dt_mt = sc->sc_dma_methods; 592251875Speter 593251875Speter i = OF_getprop(node, "bus-range", (void *)prop_array, 594251875Speter sizeof(prop_array)); 595251875Speter if (i == -1) 596251875Speter panic("%s: could not get bus-range", __func__); 597251875Speter if (i != sizeof(prop_array)) 598251875Speter panic("%s: broken bus-range (%d)", __func__, i); 599251875Speter sc->sc_pci_secbus = prop_array[0]; 600251875Speter sc->sc_pci_subbus = prop_array[1]; 601251875Speter if (bootverbose) 602251875Speter device_printf(dev, "bus range %u to %u; PCI bus %d\n", 603251875Speter sc->sc_pci_secbus, sc->sc_pci_subbus, sc->sc_pci_secbus); 604251875Speter 605251875Speter /* Clear any pending PCI error bits. */ 606251875Speter PCIB_WRITE_CONFIG(dev, sc->sc_pci_secbus, PCS_DEVICE, PCS_FUNC, 607251875Speter PCIR_STATUS, PCIB_READ_CONFIG(dev, sc->sc_pci_secbus, 608251875Speter PCS_DEVICE, PCS_FUNC, PCIR_STATUS, 2), 2); 609251875Speter PCICTL_WRITE8(sc, PCR_CS, PCICTL_READ8(sc, PCR_CS)); 610251875Speter PCICTL_WRITE8(sc, PCR_AFS, PCICTL_READ8(sc, PCR_AFS)); 611251875Speter 612251875Speter if (osc == NULL) { 613251875Speter /* 614251875Speter * Establish handlers for interesting interrupts... 615251875Speter * 616251875Speter * XXX We need to remember these and remove this to support 617251875Speter * hotplug on the UPA/FHC bus. 618251875Speter * 619251875Speter * XXX Not all controllers have these, but installing them 620251875Speter * is better than trying to sort through this mess. 621251875Speter */ 622251875Speter psycho_set_intr(sc, 1, PSR_UE_INT_MAP, psycho_ue, NULL); 623251875Speter psycho_set_intr(sc, 2, PSR_CE_INT_MAP, psycho_ce, NULL); 624251875Speter switch (psycho_powerfail) { 625251875Speter case 0: 626251875Speter break; 627251875Speter case 2: 628251875Speter psycho_set_intr(sc, 3, PSR_POWER_INT_MAP, 629251875Speter psycho_powerdebug, NULL); 630251875Speter break; 631251875Speter default: 632251875Speter psycho_set_intr(sc, 3, PSR_POWER_INT_MAP, NULL, 633251875Speter psycho_powerdown); 634251875Speter break; 635251875Speter } 636251875Speter if (sc->sc_mode == PSYCHO_MODE_PSYCHO) { 637251875Speter /* 638251875Speter * Hummingbirds/Sabres do not have the following two 639251875Speter * interrupts. 640251875Speter */ 641251875Speter 642251875Speter /* 643251875Speter * The spare hardware interrupt is used for the 644251875Speter * over-temperature interrupt. 645 */ 646 psycho_set_intr(sc, 4, PSR_SPARE_INT_MAP, NULL, 647 psycho_overtemp); 648#ifdef PSYCHO_MAP_WAKEUP 649 /* 650 * psycho_wakeup() doesn't do anything useful right 651 * now. 652 */ 653 psycho_set_intr(sc, 5, PSR_PWRMGT_INT_MAP, 654 psycho_wakeup, NULL); 655#endif /* PSYCHO_MAP_WAKEUP */ 656 } 657 } 658 /* 659 * Register a PCI bus error interrupt handler according to which 660 * half this is. Hummingbird/Sabre don't have a PCI bus B error 661 * interrupt but they are also only used for PCI bus A. 662 */ 663 psycho_set_intr(sc, 0, sc->sc_half == 0 ? PSR_PCIAERR_INT_MAP : 664 PSR_PCIBERR_INT_MAP, psycho_pci_bus, NULL); 665 666 /* 667 * Set the latency timer register as this isn't always done by the 668 * firmware. 669 */ 670 PCIB_WRITE_CONFIG(dev, sc->sc_pci_secbus, PCS_DEVICE, PCS_FUNC, 671 PCIR_LATTIMER, OFW_PCI_LATENCY, 1); 672 673 for (i = PCIR_VENDOR; i < PCIR_STATUS; i += sizeof(uint16_t)) 674 le16enc(&sc->sc_pci_hpbcfg[i], bus_space_read_2( 675 sc->sc_pci_cfgt, sc->sc_pci_bh[OFW_PCI_CS_CONFIG], 676 PSYCHO_CONF_OFF(sc->sc_pci_secbus, PCS_DEVICE, 677 PCS_FUNC, i))); 678 for (i = PCIR_REVID; i <= PCIR_BIST; i += sizeof(uint8_t)) 679 sc->sc_pci_hpbcfg[i] = bus_space_read_1(sc->sc_pci_cfgt, 680 sc->sc_pci_bh[OFW_PCI_CS_CONFIG], PSYCHO_CONF_OFF( 681 sc->sc_pci_secbus, PCS_DEVICE, PCS_FUNC, i)); 682 683 ofw_bus_setup_iinfo(node, &sc->sc_pci_iinfo, sizeof(ofw_pci_intr_t)); 684 /* 685 * On E250 the interrupt map entry for the EBus bridge is wrong, 686 * causing incorrect interrupts to be assigned to some devices on 687 * the EBus. Work around it by changing our copy of the interrupt 688 * map mask to perform a full comparison of the INO. That way 689 * the interrupt map entry for the EBus bridge won't match at all 690 * and the INOs specified in the "interrupts" properties of the 691 * EBus devices will be used directly instead. 692 */ 693 if (strcmp(sparc64_model, "SUNW,Ultra-250") == 0 && 694 sc->sc_pci_iinfo.opi_imapmsk != NULL) 695 *(ofw_pci_intr_t *)(&sc->sc_pci_iinfo.opi_imapmsk[ 696 sc->sc_pci_iinfo.opi_addrc]) = INTMAP_INO_MASK; 697 698 device_add_child(dev, "pci", -1); 699 return (bus_generic_attach(dev)); 700} 701 702static void 703psycho_set_intr(struct psycho_softc *sc, u_int index, bus_addr_t intrmap, 704 driver_filter_t filt, driver_intr_t intr) 705{ 706 u_long vec; 707 int rid; 708 709 rid = index; 710 sc->sc_irq_res[index] = bus_alloc_resource_any(sc->sc_dev, 711 SYS_RES_IRQ, &rid, RF_ACTIVE); 712 if (sc->sc_irq_res[index] == NULL && intrmap >= PSR_POWER_INT_MAP) { 713 /* 714 * These interrupts aren't mandatory and not available 715 * with all controllers (not even Psychos). 716 */ 717 return; 718 } 719 if (sc->sc_irq_res[index] == NULL || 720 INTIGN(vec = rman_get_start(sc->sc_irq_res[index])) != 721 sc->sc_ign || 722 INTVEC(PSYCHO_READ8(sc, intrmap)) != vec || 723 intr_vectors[vec].iv_ic != &psycho_ic || 724 bus_setup_intr(sc->sc_dev, sc->sc_irq_res[index], 725 INTR_TYPE_MISC | INTR_BRIDGE, filt, intr, sc, 726 &sc->sc_ihand[index]) != 0) 727 panic("%s: failed to set up interrupt %d", __func__, index); 728} 729 730static int 731psycho_find_intrmap(struct psycho_softc *sc, u_int ino, 732 bus_addr_t *intrmapptr, bus_addr_t *intrclrptr, bus_addr_t *intrdiagptr) 733{ 734 bus_addr_t intrclr, intrmap; 735 uint64_t diag; 736 int found; 737 738 /* 739 * XXX we only compare INOs rather than INRs since the firmware may 740 * not provide the IGN and the IGN is constant for all devices on 741 * that PCI controller. 742 * This could cause problems for the FFB/external interrupt which 743 * has a full vector that can be set arbitrarily. 744 */ 745 746 if (ino > PSYCHO_MAX_INO) { 747 device_printf(sc->sc_dev, "out of range INO %d requested\n", 748 ino); 749 return (0); 750 } 751 752 found = 0; 753 /* Hunt through OBIO first. */ 754 diag = PSYCHO_READ8(sc, PSR_OBIO_INT_DIAG); 755 for (intrmap = PSR_SCSI_INT_MAP, intrclr = PSR_SCSI_INT_CLR; 756 intrmap <= PSR_PWRMGT_INT_MAP; intrmap += 8, intrclr += 8, 757 diag >>= 2) { 758 if (sc->sc_mode == PSYCHO_MODE_SABRE && 759 (intrmap == PSR_TIMER0_INT_MAP || 760 intrmap == PSR_TIMER1_INT_MAP || 761 intrmap == PSR_PCIBERR_INT_MAP || 762 intrmap == PSR_PWRMGT_INT_MAP)) 763 continue; 764 if (INTINO(PSYCHO_READ8(sc, intrmap)) == ino) { 765 diag &= 2; 766 found = 1; 767 break; 768 } 769 } 770 771 if (!found) { 772 diag = PSYCHO_READ8(sc, PSR_PCI_INT_DIAG); 773 /* Now do PCI interrupts. */ 774 for (intrmap = PSR_PCIA0_INT_MAP, intrclr = PSR_PCIA0_INT_CLR; 775 intrmap <= PSR_PCIB3_INT_MAP; intrmap += 8, intrclr += 32, 776 diag >>= 8) { 777 if (sc->sc_mode == PSYCHO_MODE_PSYCHO && 778 (intrmap == PSR_PCIA2_INT_MAP || 779 intrmap == PSR_PCIA3_INT_MAP)) 780 continue; 781 if (((PSYCHO_READ8(sc, intrmap) ^ ino) & 0x3c) == 0) { 782 intrclr += 8 * (ino & 3); 783 diag = (diag >> ((ino & 3) * 2)) & 2; 784 found = 1; 785 break; 786 } 787 } 788 } 789 if (intrmapptr != NULL) 790 *intrmapptr = intrmap; 791 if (intrclrptr != NULL) 792 *intrclrptr = intrclr; 793 if (intrdiagptr != NULL) 794 *intrdiagptr = diag; 795 return (found); 796} 797 798/* 799 * Interrupt handlers 800 */ 801static int 802psycho_ue(void *arg) 803{ 804 struct psycho_softc *sc = arg; 805 uint64_t afar, afsr; 806 807 afar = PSYCHO_READ8(sc, PSR_UE_AFA); 808 afsr = PSYCHO_READ8(sc, PSR_UE_AFS); 809 /* 810 * On the UltraSPARC-IIi/IIe, IOMMU misses/protection faults cause 811 * the AFAR to be set to the physical address of the TTE entry that 812 * was invalid/write protected. Call into the IOMMU code to have 813 * them decoded to virtual I/O addresses. 814 */ 815 if ((afsr & UEAFSR_P_DTE) != 0) 816 iommu_decode_fault(sc->sc_is, afar); 817 panic("%s: uncorrectable DMA error AFAR %#lx AFSR %#lx", 818 device_get_nameunit(sc->sc_dev), (u_long)afar, (u_long)afsr); 819 return (FILTER_HANDLED); 820} 821 822static int 823psycho_ce(void *arg) 824{ 825 struct psycho_softc *sc = arg; 826 uint64_t afar, afsr; 827 828 mtx_lock_spin(sc->sc_mtx); 829 afar = PSYCHO_READ8(sc, PSR_CE_AFA); 830 afsr = PSYCHO_READ8(sc, PSR_CE_AFS); 831 device_printf(sc->sc_dev, "correctable DMA error AFAR %#lx " 832 "AFSR %#lx\n", (u_long)afar, (u_long)afsr); 833 /* Clear the error bits that we caught. */ 834 PSYCHO_WRITE8(sc, PSR_CE_AFS, afsr); 835 mtx_unlock_spin(sc->sc_mtx); 836 return (FILTER_HANDLED); 837} 838 839static int 840psycho_pci_bus(void *arg) 841{ 842 struct psycho_softc *sc = arg; 843 uint64_t afar, afsr; 844 845 afar = PCICTL_READ8(sc, PCR_AFA); 846 afsr = PCICTL_READ8(sc, PCR_AFS); 847 panic("%s: PCI bus %c error AFAR %#lx AFSR %#lx", 848 device_get_nameunit(sc->sc_dev), 'A' + sc->sc_half, (u_long)afar, 849 (u_long)afsr); 850 return (FILTER_HANDLED); 851} 852 853static int 854psycho_powerdebug(void *arg __unused) 855{ 856 857 kdb_enter(KDB_WHY_POWERFAIL, "powerfail"); 858 return (FILTER_HANDLED); 859} 860 861static void 862psycho_powerdown(void *arg __unused) 863{ 864 static int shutdown; 865 866 /* As the interrupt is cleared we may be called multiple times. */ 867 if (shutdown != 0) 868 return; 869 shutdown++; 870 printf("Power Failure Detected: Shutting down NOW.\n"); 871 shutdown_nice(RB_POWEROFF); 872} 873 874static void 875psycho_overtemp(void *arg __unused) 876{ 877 static int shutdown; 878 879 /* As the interrupt is cleared we may be called multiple times. */ 880 if (shutdown != 0) 881 return; 882 shutdown++; 883 printf("DANGER: OVER TEMPERATURE detected.\nShutting down NOW.\n"); 884 shutdown_nice(RB_POWEROFF); 885} 886 887#ifdef PSYCHO_MAP_WAKEUP 888static int 889psycho_wakeup(void *arg) 890{ 891 struct psycho_softc *sc = arg; 892 893 /* We don't really have a framework to deal with this properly. */ 894 device_printf(sc->sc_dev, "power management wakeup\n"); 895 return (FILTER_HANDLED); 896} 897#endif /* PSYCHO_MAP_WAKEUP */ 898 899static void 900psycho_iommu_init(struct psycho_softc *sc, int tsbsize, uint32_t dvmabase) 901{ 902 struct iommu_state *is = sc->sc_is; 903 904 /* Punch in our copies. */ 905 is->is_bustag = rman_get_bustag(sc->sc_mem_res); 906 is->is_bushandle = rman_get_bushandle(sc->sc_mem_res); 907 is->is_iommu = PSR_IOMMU; 908 is->is_dtag = PSR_IOMMU_TLB_TAG_DIAG; 909 is->is_ddram = PSR_IOMMU_TLB_DATA_DIAG; 910 is->is_dqueue = PSR_IOMMU_QUEUE_DIAG; 911 is->is_dva = PSR_IOMMU_SVADIAG; 912 is->is_dtcmp = PSR_IOMMU_TLB_CMP_DIAG; 913 914 iommu_init(device_get_nameunit(sc->sc_dev), is, tsbsize, dvmabase, 0); 915} 916 917static int 918psycho_maxslots(device_t dev) 919{ 920 921 /* XXX: is this correct? */ 922 return (PCI_SLOTMAX); 923} 924 925static uint32_t 926psycho_read_config(device_t dev, u_int bus, u_int slot, u_int func, u_int reg, 927 int width) 928{ 929 struct psycho_softc *sc; 930 bus_space_handle_t bh; 931 u_long offset = 0; 932 uint8_t byte; 933 uint16_t shrt; 934 uint32_t r, wrd; 935 int i; 936 937 sc = device_get_softc(dev); 938 if (bus < sc->sc_pci_secbus || bus > sc->sc_pci_subbus || 939 slot > PCI_SLOTMAX || func > PCI_FUNCMAX || reg > PCI_REGMAX) 940 return (-1); 941 942 bh = sc->sc_pci_bh[OFW_PCI_CS_CONFIG]; 943 944 /* 945 * The Hummingbird and Sabre bridges are picky in that they 946 * only allow their config space to be accessed using the 947 * "native" width of the respective register being accessed 948 * and return semi-random other content of their config space 949 * otherwise. Given that the PCI specs don't say anything 950 * about such a (unusual) limitation and lots of stuff expects 951 * to be able to access the contents of the config space at 952 * any width we allow just that. We do this by using a copy 953 * of the header of the bridge (the rest is all zero anyway) 954 * read during attach (expect for PCIR_STATUS) in order to 955 * simplify things. 956 * The Psycho bridges contain a dupe of their header at 0x80 957 * which we nullify that way also. 958 */ 959 if (bus == sc->sc_pci_secbus && slot == PCS_DEVICE && 960 func == PCS_FUNC) { 961 if (offset % width != 0) 962 return (-1); 963 964 if (reg >= sizeof(sc->sc_pci_hpbcfg)) 965 return (0); 966 967 if ((reg < PCIR_STATUS && reg + width > PCIR_STATUS) || 968 reg == PCIR_STATUS || reg == PCIR_STATUS + 1) 969 le16enc(&sc->sc_pci_hpbcfg[PCIR_STATUS], 970 bus_space_read_2(sc->sc_pci_cfgt, bh, 971 PSYCHO_CONF_OFF(sc->sc_pci_secbus, 972 PCS_DEVICE, PCS_FUNC, PCIR_STATUS))); 973 974 switch (width) { 975 case 1: 976 return (sc->sc_pci_hpbcfg[reg]); 977 case 2: 978 return (le16dec(&sc->sc_pci_hpbcfg[reg])); 979 case 4: 980 return (le32dec(&sc->sc_pci_hpbcfg[reg])); 981 } 982 } 983 984 offset = PSYCHO_CONF_OFF(bus, slot, func, reg); 985 switch (width) { 986 case 1: 987 i = bus_space_peek_1(sc->sc_pci_cfgt, bh, offset, &byte); 988 r = byte; 989 break; 990 case 2: 991 i = bus_space_peek_2(sc->sc_pci_cfgt, bh, offset, &shrt); 992 r = shrt; 993 break; 994 case 4: 995 i = bus_space_peek_4(sc->sc_pci_cfgt, bh, offset, &wrd); 996 r = wrd; 997 break; 998 default: 999 panic("%s: bad width", __func__); 1000 /* NOTREACHED */ 1001 } 1002 1003 if (i) { 1004#ifdef PSYCHO_DEBUG 1005 printf("%s: read data error reading: %d.%d.%d: 0x%x\n", 1006 __func__, bus, slot, func, reg); 1007#endif 1008 r = -1; 1009 } 1010 return (r); 1011} 1012 1013static void 1014psycho_write_config(device_t dev, u_int bus, u_int slot, u_int func, 1015 u_int reg, uint32_t val, int width) 1016{ 1017 struct psycho_softc *sc; 1018 bus_space_handle_t bh; 1019 u_long offset = 0; 1020 1021 sc = device_get_softc(dev); 1022 if (bus < sc->sc_pci_secbus || bus > sc->sc_pci_subbus || 1023 slot > PCI_SLOTMAX || func > PCI_FUNCMAX || reg > PCI_REGMAX) 1024 return; 1025 1026 offset = PSYCHO_CONF_OFF(bus, slot, func, reg); 1027 bh = sc->sc_pci_bh[OFW_PCI_CS_CONFIG]; 1028 switch (width) { 1029 case 1: 1030 bus_space_write_1(sc->sc_pci_cfgt, bh, offset, val); 1031 break; 1032 case 2: 1033 bus_space_write_2(sc->sc_pci_cfgt, bh, offset, val); 1034 break; 1035 case 4: 1036 bus_space_write_4(sc->sc_pci_cfgt, bh, offset, val); 1037 break; 1038 default: 1039 panic("%s: bad width", __func__); 1040 /* NOTREACHED */ 1041 } 1042} 1043 1044static int 1045psycho_route_interrupt(device_t bridge, device_t dev, int pin) 1046{ 1047 struct psycho_softc *sc; 1048 struct ofw_pci_register reg; 1049 bus_addr_t intrmap; 1050 ofw_pci_intr_t pintr, mintr; 1051 1052 sc = device_get_softc(bridge); 1053 pintr = pin; 1054 if (ofw_bus_lookup_imap(ofw_bus_get_node(dev), &sc->sc_pci_iinfo, 1055 ®, sizeof(reg), &pintr, sizeof(pintr), &mintr, sizeof(mintr), 1056 NULL)) 1057 return (mintr); 1058 /* 1059 * If this is outside of the range for an intpin, it's likely a full 1060 * INO, and no mapping is required at all; this happens on the U30, 1061 * where there's no interrupt map at the Psycho node. Fortunately, 1062 * there seem to be no INOs in the intpin range on this boxen, so 1063 * this easy heuristics will do. 1064 */ 1065 if (pin > 4) 1066 return (pin); 1067 /* 1068 * Guess the INO; we always assume that this is a non-OBIO 1069 * device, and that pin is a "real" intpin number. Determine 1070 * the mapping register to be used by the slot number. 1071 * We only need to do this on E450s, it seems; here, the slot numbers 1072 * for bus A are one-based, while those for bus B seemingly have an 1073 * offset of 2 (hence the factor of 3 below). 1074 */ 1075 intrmap = PSR_PCIA0_INT_MAP + 1076 8 * (pci_get_slot(dev) - 1 + 3 * sc->sc_half); 1077 mintr = INTINO(PSYCHO_READ8(sc, intrmap)) + pin - 1; 1078 device_printf(bridge, 1079 "guessing interrupt %d for device %d.%d pin %d\n", 1080 (int)mintr, pci_get_slot(dev), pci_get_function(dev), pin); 1081 return (mintr); 1082} 1083 1084static int 1085psycho_read_ivar(device_t dev, device_t child, int which, uintptr_t *result) 1086{ 1087 struct psycho_softc *sc; 1088 1089 sc = device_get_softc(dev); 1090 switch (which) { 1091 case PCIB_IVAR_DOMAIN: 1092 *result = device_get_unit(dev); 1093 return (0); 1094 case PCIB_IVAR_BUS: 1095 *result = sc->sc_pci_secbus; 1096 return (0); 1097 } 1098 return (ENOENT); 1099} 1100 1101static void 1102sabre_dmamap_sync(bus_dma_tag_t dt, bus_dmamap_t map, bus_dmasync_op_t op) 1103{ 1104 struct iommu_state *is = dt->dt_cookie; 1105 1106 if ((map->dm_flags & DMF_LOADED) == 0) 1107 return; 1108 1109 if ((op & BUS_DMASYNC_POSTREAD) != 0) 1110 (void)bus_space_read_8(is->is_bustag, is->is_bushandle, 1111 PSR_DMA_WRITE_SYNC); 1112 1113 if ((op & BUS_DMASYNC_PREWRITE) != 0) 1114 membar(Sync); 1115} 1116 1117static void 1118psycho_intr_enable(void *arg) 1119{ 1120 struct intr_vector *iv = arg; 1121 struct psycho_icarg *pica = iv->iv_icarg; 1122 1123 PSYCHO_WRITE8(pica->pica_sc, pica->pica_map, 1124 INTMAP_ENABLE(iv->iv_vec, iv->iv_mid)); 1125} 1126 1127static void 1128psycho_intr_disable(void *arg) 1129{ 1130 struct intr_vector *iv = arg; 1131 struct psycho_icarg *pica = iv->iv_icarg; 1132 1133 PSYCHO_WRITE8(pica->pica_sc, pica->pica_map, iv->iv_vec); 1134} 1135 1136static void 1137psycho_intr_assign(void *arg) 1138{ 1139 struct intr_vector *iv = arg; 1140 struct psycho_icarg *pica = iv->iv_icarg; 1141 1142 PSYCHO_WRITE8(pica->pica_sc, pica->pica_map, INTMAP_TID( 1143 PSYCHO_READ8(pica->pica_sc, pica->pica_map), iv->iv_mid)); 1144} 1145 1146static void 1147psycho_intr_clear(void *arg) 1148{ 1149 struct intr_vector *iv = arg; 1150 struct psycho_icarg *pica = iv->iv_icarg; 1151 1152 PSYCHO_WRITE8(pica->pica_sc, pica->pica_clr, INTCLR_IDLE); 1153} 1154 1155static int 1156psycho_setup_intr(device_t dev, device_t child, struct resource *ires, 1157 int flags, driver_filter_t *filt, driver_intr_t *intr, void *arg, 1158 void **cookiep) 1159{ 1160 struct psycho_softc *sc; 1161 u_long vec; 1162 1163 sc = device_get_softc(dev); 1164 /* 1165 * Make sure the vector is fully specified and we registered 1166 * our interrupt controller for it. 1167 */ 1168 vec = rman_get_start(ires); 1169 if (INTIGN(vec) != sc->sc_ign || 1170 intr_vectors[vec].iv_ic != &psycho_ic) { 1171 device_printf(dev, "invalid interrupt vector 0x%lx\n", vec); 1172 return (EINVAL); 1173 } 1174 return (bus_generic_setup_intr(dev, child, ires, flags, filt, intr, 1175 arg, cookiep)); 1176} 1177 1178static struct resource * 1179psycho_alloc_resource(device_t bus, device_t child, int type, int *rid, 1180 u_long start, u_long end, u_long count, u_int flags) 1181{ 1182 struct psycho_softc *sc; 1183 struct resource *rv; 1184 struct rman *rm; 1185 1186 sc = device_get_softc(bus); 1187 switch (type) { 1188 case SYS_RES_IRQ: 1189 /* 1190 * XXX: Don't accept blank ranges for now, only single 1191 * interrupts. The other case should not happen with 1192 * the MI PCI code... 1193 * XXX: This may return a resource that is out of the 1194 * range that was specified. Is this correct...? 1195 */ 1196 if (start != end) 1197 panic("%s: XXX: interrupt range", __func__); 1198 start = end = INTMAP_VEC(sc->sc_ign, end); 1199 return (bus_generic_alloc_resource(bus, child, type, rid, 1200 start, end, count, flags)); 1201 case SYS_RES_MEMORY: 1202 rm = &sc->sc_pci_mem_rman; 1203 break; 1204 case SYS_RES_IOPORT: 1205 rm = &sc->sc_pci_io_rman; 1206 break; 1207 default: 1208 return (NULL); 1209 } 1210 1211 rv = rman_reserve_resource(rm, start, end, count, flags & ~RF_ACTIVE, 1212 child); 1213 if (rv == NULL) 1214 return (NULL); 1215 rman_set_rid(rv, *rid); 1216 1217 if ((flags & RF_ACTIVE) != 0 && bus_activate_resource(child, type, 1218 *rid, rv) != 0) { 1219 rman_release_resource(rv); 1220 return (NULL); 1221 } 1222 return (rv); 1223} 1224 1225static int 1226psycho_activate_resource(device_t bus, device_t child, int type, int rid, 1227 struct resource *r) 1228{ 1229 struct psycho_softc *sc; 1230 struct bus_space_tag *tag; 1231 1232 sc = device_get_softc(bus); 1233 switch (type) { 1234 case SYS_RES_IRQ: 1235 return (bus_generic_activate_resource(bus, child, type, rid, 1236 r)); 1237 case SYS_RES_MEMORY: 1238 tag = sparc64_alloc_bus_tag(r, rman_get_bustag( 1239 sc->sc_mem_res), PCI_MEMORY_BUS_SPACE, NULL); 1240 if (tag == NULL) 1241 return (ENOMEM); 1242 rman_set_bustag(r, tag); 1243 rman_set_bushandle(r, sc->sc_pci_bh[OFW_PCI_CS_MEM32] + 1244 rman_get_start(r)); 1245 break; 1246 case SYS_RES_IOPORT: 1247 rman_set_bustag(r, sc->sc_pci_iot); 1248 rman_set_bushandle(r, sc->sc_pci_bh[OFW_PCI_CS_IO] + 1249 rman_get_start(r)); 1250 break; 1251 } 1252 return (rman_activate_resource(r)); 1253} 1254 1255static int 1256psycho_adjust_resource(device_t bus, device_t child, int type, 1257 struct resource *r, u_long start, u_long end) 1258{ 1259 struct psycho_softc *sc; 1260 struct rman *rm; 1261 1262 sc = device_get_softc(bus); 1263 switch (type) { 1264 case SYS_RES_IRQ: 1265 return (bus_generic_adjust_resource(bus, child, type, r, 1266 start, end)); 1267 case SYS_RES_MEMORY: 1268 rm = &sc->sc_pci_mem_rman; 1269 break; 1270 case SYS_RES_IOPORT: 1271 rm = &sc->sc_pci_io_rman; 1272 break; 1273 default: 1274 return (EINVAL); 1275 } 1276 if (rman_is_region_manager(r, rm) == 0) 1277 return (EINVAL); 1278 return (rman_adjust_resource(r, start, end)); 1279} 1280 1281static bus_dma_tag_t 1282psycho_get_dma_tag(device_t bus, device_t child __unused) 1283{ 1284 struct psycho_softc *sc; 1285 1286 sc = device_get_softc(bus); 1287 return (sc->sc_pci_dmat); 1288} 1289 1290static phandle_t 1291psycho_get_node(device_t bus, device_t child __unused) 1292{ 1293 struct psycho_softc *sc; 1294 1295 sc = device_get_softc(bus); 1296 /* We only have one child, the PCI bus, which needs our own node. */ 1297 return (sc->sc_node); 1298} 1299 1300static void 1301psycho_setup_device(device_t bus, device_t child) 1302{ 1303 struct psycho_softc *sc; 1304 uint32_t rev; 1305 1306 sc = device_get_softc(bus); 1307 /* 1308 * Revision 0 EBus bridges have a bug which prevents them from 1309 * working when bus parking is enabled. 1310 */ 1311 if ((strcmp(ofw_bus_get_name(child), "ebus") == 0 || 1312 strcmp(ofw_bus_get_name(child), "pci108e,1000") == 0) && 1313 OF_getprop(ofw_bus_get_node(child), "revision-id", &rev, 1314 sizeof(rev)) > 0 && rev == 0) 1315 PCICTL_WRITE8(sc, PCR_CS, PCICTL_READ8(sc, PCR_CS) & 1316 ~PCICTL_ARB_PARK); 1317} 1318